WO2002011188A2

WO2002011188A2 - A mem sensor and a method of making same

Info

Publication number: WO2002011188A2
Application number: PCT/US2001/023797
Authority: WO
Inventors: Randall L. Kubena; Michael J. Little; Leroy H. Hackett
Original assignee: Hrl Laboratories, Llc; Hughes Electronics Corporation
Priority date: 2000-08-01
Filing date: 2001-07-27
Publication date: 2002-02-07
Also published as: US6630367B1; JP2004504951A; EP1305640A2; TW504488B; AU2001278067A1; US6730978B2; WO2002011188A3; US20030207487A1

Abstract

A method of making a micro electro-mechanical switch or tunneling sensor. A cantilevered beamstructure and a mating structure are defined on a first substrate or wafer; and at least one contactstructure and a mating structure are defined on a second substrate or wafer, the mating structureon the second substrate or wafer being of a complementary shape to the mating structure on thefirst substrate or wafer. A bonding layer, preferably a eutectic bonding layer, is provided on at least one of the mating structures. The mating structure of the first substrate is moved into aconfronting relationship with the mating structure of the second substrate or wafer. Pressure isapplied between the two substrates so as to cause a bond to occur between the two mating structures at the bonding or eutectic layer. Then the first substrate or wafer is removed to free thecantilevered beam structure for movement relative to the second substrate or wafer.

Description

A MEM Sensor and a Method of Making Same

Technical Field

The present disclosure relates to micro electro-mechanical (MEM) tunneling sensors using dual wafers which are bonded togetlier preferably eutectically. In one aspect the disclosure discusses a single crystal, dual wafer, tunneling sensor and a method of making same.

Related Applications

This invention is related to other inventions which the subject of separate patent applications filed thereon. See: US Patent Application Serial Number 09/629,682 entitled "A Single Crystal,

Dual Wafer, Tunneling Sensor or Switch with Silicon on Insulator Substrate and a Method of Making Same" (attorney docket 617965-3) and US Patent Application Serial Number 09/629,680 entitled "A Single Crystal, Dual Wafer, Tunneling Sensor or Switch with Substrate Protrusion and a Method of Making Same" (attorney docket 617337-2), both of which applications have the same filing date as this application. The inventors named in this application are the inventors of the first embodiment disclosed herein with reference to Figures 1 A - 12B. However, subsequent improvements have been made which reflect what is believed to be the best modes for practicing embodiments after Figure 12B to ensure that the best mode requirements of 35 USC 111 first

paragraph have been satisfied.

Background of the Invention

The present invention provides a new process of fabricating a single crystal silicon MEM

tunneling devices using low-cost bulk micromachining techniques while providing the advantages

of surface micromachining. The prior art, in terms of surface micromachining, uses e-beam

evaporated metal that is patterned on a silicon dioxide (SiO₂) layer to form the control, self-test,

and tip electrodes of a tunneling MEM sensor. A cantilevered beam is then formed over the

electrodes using a sacrificial resist layer, a plating seed layer, a resist mold, and metal

electroplating. Finally, the sacrificial layer is removed using a series of chemical etchants. The

prior art for bulk micromachining has utilized either mechanical pins and/or epoxy for the

assembly of multi-Si wafer stacks, a multi-Si wafer stack using metal-to-metal bonding and an active sandwiched membrane of silicon nitride and metal, or a dissolved wafer process on quartz

substrates (Si-on-quartz) using anodic bonding. None of these bulk micromachining processes

allow one to fabricate a single crystal Si cantilever (with no deposited layers over broad areas on

the beam which can produce thermally mismatched expansion coefficients) above a set of

tunneling electrodes on a Si substrate and also electrically connect the cantilever to pads located

on the substrate. The fabrication techniques described herein provide these capabilities in addition to providing a low temperature process so that CMOS circuitry can be fabricated in the Si substrate before the MEMS sensors are added. Finally, the use of single crystal Si for the

cantilever provides for improved process reproductibility for controlling the stress and device

geometry.

Tunneling sensors may be used in various military, navigation, automotive, and space

applications. Space applications include satellite stabilization in which MEM sensor technology

can significantly reduce the cost, power, and weight of the presently used gyro systems.

Automotive air bag deployment, ride control, and anti-lock brake systems provide other

applications for MEM sensors. Military applications include high dynamic range accelerometers

and low drift gyros.

Brief Description of the Invention

Generally speaking, the present invention provides a method of making a micro electro¬

mechanical sensor wherein a cantilevered beam structure and a mating structure are defined on a

first substrate or wafer and at least one contact structure and a mating structure are defined on a

second substrate or wafer. The mating structure on the second substrate or wafer is of a

complementary shape to the mating structures on the first substrate or wafer. A bonding or

eutectic layer is provided on at least one of the mating structures and the mating structure are

moved into a confronting relationship with each other. Pressure is then applied between the two substrates and heat may also be applied so as to cause a bond to occur between the two mating

structures at the bonding or eutectic layer. Then the first substrate or wafer is removed to free the

cantilevered beam structure for movement relative to the second substrate or wafer. The bonding or eutectic layer also provides a convenient electrical path to the cantilevered beam for making a

circuit with the contact formed on the cantilevered beam.

In another aspect, the present invention provides an assembly or assemblies for making a

single crystal silicon MEM sensor therefrom. A first substrate or wafer is provided upon which

is defined a beam structure and a mating structure. A second substrate or wafer is provided upon

which is defined at least one contact structure and a mating structure, the mating structure on the

second substrate or wafer being of a complementary shape to the mating structure on the first

substrate or wafer. A pressure and heat sensitive bonding layer is disposed on at least one of the

mating structures for bonding the mating structure defined on the first substrate or wafer with the

mating structure on the second substrate in response to the application of pressure and heat

therebetween.

Brief Description of the Figures

Figures 1 A through 6A depict the fabrication of a first embodiment of the cantilever

portion of a MEM sensor.

Figures IB through 6B correspond to Figures 1A - 6A, but show the cantilever portion,

during its various stages of fabrication, in plan view:

Figures 7A through 9A show, in cross section view, the fabrication of the base portion of the first embodiment tunneling sensor;

Figures 7B through 9B correspond to Figures 7A - 9A but show the fabrication process

for the base portion in plan view;

Figures 10 and 1 1 show the cantilever portion and the base portion being aligned with

each other and being bonded together preferably by eutectic bonding;

Figures 12A and 12B show in a cross sectional view and in a plan view the completed

tunneling sensor according to the first embodiment of the invention:

Figures 13 A and 14A depict steps used in fabricating a second embodiment of a the

cantilever portion of a MEM sensor;

Figures 13B and 14B correspond to Figures 13 A and 14 A, but show the cantilever

portion, in plan view;

Figures 15A-19A depict, in cross section view, the fabrication of the base portion of the

second embodiment of the tunneling sensor;

Figures 15B-19B correspond to Figures 15A-19A, but show the fabrication process for

the second embodiment of the wafer in plan view;

Figures 20 and 21 show the cantilever and base portion embodiment being aligned with

each other and bonded together preferably by eutectic bonding;

Figures 22A and 23 show the completed MEM sensor according to the second

embodiment in cross sectional view, while Figure 22B shows the completed MEM sensor

according to the second embodiment in plan sectional view;

Figures 24A through 29A depict, in cross sectional view, a modification applicable to both the first and second embodiments of the cantilever portion of the MEM sensor;

Figures 24B through 29B correspond to Figures 24A - 29A, but show the fabrication

process for the modification in plan view; -

Figure 30 depicts a side elevational section view of another embodiment of a MEM

sensor, this embodiment having a preferably eutectic bond in a central region of its columnar

support;

Figure 31 depicts a side elevational section view of yet another embodiment of a MEM

sensor, this embodiment having a preferably eutectic bond adjacent the cantilevered beam 12;

Figure 32 depicts a side elevational section view of still another embodiment of a MEM

support as in the embodiment of Figure 30, but also having a ribbon conductor on the

cantilevered beam structure;

Figure 33 depicts a side elevational section view of another embodiment of a MEM

sensor, t this embodiment having a preferably eutectic bond adjacent the cantilevered beam

structure as in the case of the embodiment of Figure 31, but also having a ribbon conductor on the

cantilevered beam structure;

Figure 34 depicts a side elevational section view of still another embodiment of a MEM

sensor, this embodiment having a preferably eutectic bond adjacent the cantilevered beam, but

also utilizing a base structure having a silicon protrusion which forms part of the columnar support structure;

Figure 35 depicts a side elevational section view of yet another embodiment of a MEM sensor, this embodiment having a preferably eutectic bond adjacent the cantilevered beam and

utilizing a base structure having a silicon protrusion which forms part of the columnar support

structure as in the case of the embodiment of Figure 34, but also utilizing a ribbon conductor on

the cantilevered beam structure;

Figure 36 depicts a side elevational section view of another embodiment of a MEM

support as in the embodiment of Figure 30, but also utilizing a base structure having a silicon

protrusion which forms part of the columnar support structure;

Figure 37 depicts a side elevational section view of another embodiment of a. MEM

support and a base structure having a silicon protrusion which forms part of the columnar

support structure as in the embodiment of Figure 36, but also utilizing a ribbon conductor on the

cantilevered beam structure;

Figure 38 depicts a side elevational section view of an embodiment of a MEM switch,

this embodiment being similar to the sensor embodiment of Figure 32, but being equipped with an

additional pad which is used to apply electrostatic forces to the beam to close the switch;

Figure 39 depicts a side elevational section view of another embodiment of a MEM switch, this embodiment being similar to the switch embodiment of Figure 38, but the preferably

eutectic bond occurs adjacent the cantilevered beam as opposed in a central region of the

columnar support;

Figure 40 depicts a side elevational section view of yet another embodiment of a MEM switch, this embodiment being similar to the switch embodiment of Figure 39, but also utilizing a

base structure having a silicon protrusion which forms part of the columnar support structure for

the cantilevered beam; and

Figure 41 depicts a side elevational section view of yet another embodiment of a MEM

switch, this embodiment being similar to the switch embodiment of Figure 40, but including an

SiO, layer between the ribbon conductor and the Si of the cantilevered beam.

Detailed Description

Several embodiments of the invention will be described with respect to the

aforementioned figures. The first embodiment will be described with reference-to Figures 1 A

through 15. A second embodiment will be discussed with reference to Figures 16 through 23.

Further additional embodiments and modifications are described thereafter. Since some of the

fabrication steps are the same for many of the embodiments, reference will often be made to

earlier discussed embodiments to reduce repetition. For example, the second embodiment makes

reference to Figures 1A-4B when describing the second embodiment to reduce repetition of that

material.

The MEM devices shown in the accompanying figures are not drawn to scale, but rather

are drawn to depict the relevant structures for those skilled in this art. Those skilled in this art

realize that these devices, while mechanical in nature, are very small and are typically manufactured using generally the same type of technology used to produce semiconductor devices. Thus a thousand or more devices might well be manufactured at one time on a silicon

wafer. To gain an appreciation of the small scale of these devices, the reader may wish to turn to

Figure 15 which includes size information for a preferred embodiment of a MEM sensor utilizing

the present invention.

Turning to Figure 1 A and IB, a starting wafer for the fabrication of the cantilever is

depicted. The starting wafer includes a wafer of bulk n-type silicon (Si) 10 upon which is formed

a thin layer of doped p-type silicon 12. The silicon wafer 10 is preferably of a single crystalline

structure having a <100> crystalline orientation. The p-type silicon layer 12 is preferably grown

as an epitaxial layer on silicon wafer 10. The layer 12 preferably has a thickness of in the range of

1 to 20 micrometers (μm), but can have a thickness anywhere in the range of 0.1 μm to 800 μm.

Generally speaking, the longer the cantilevered beam is the thicker the beam is. Since layer 12 will

eventually form the cantilevered beam, the thickness of layer 12 is selected to suit the length of

the beam to be formed.

Layer 12 is doped with Boron such that its resistivity is reduced to less than 0.05 Ω-cm

and is preferably doped to drop its resistivity to the range of 0.01 to 0.05 Ω-cm. The resistivity

of the bulk silicon wafer or substrate 10 is preferably about 10 Ω-cm. Boron is a relatively small

atom compared to silicon, and therefore including it as a dopant at the levels needed (10 ) in

order to reduce the resistivity of the layer 12 tends to induce stress which is preferably

compensated for by also doping, at a similar concentration level, a non-impurity atom having a

larger atom size, such as germanium. Germanium is considered a non-impurity since it neither

contributes nor removes any electron carriers in the resulting material. Layer 12 shown in Figures 1A and IB is patterned using well known photolithographic

techniques to form a mask layer, patterned as shown at numeral 14, preferably to assume the

shape of a capital letter 'E'. While the shape of the capital letter Ε' is preferred, other shapes

can be used. In this embodiment, the outer peripheral portion of the E-shape will form a mating

structure which will be used to join the cantilever portion of the sensor to the base portion.

After the mask layer 14 has been patterned as shown in Figures 2A and 2B, the wafer is

subjected to a plasma etch in order to etch through the thin layer of p-type doped silicon 12 and

also to over etch into the silicon wafer 10 by a distance of approximately 500 A.

The mask 14 shown in Figures 2A and 2B is then removed and another photoresist layer

16 is applied which is patterned as shown in Figures 3 A and 3B by providing two openings

therein 16-1 and 16-2. Opening 16-1 basically follows the outer perimeter of the Ε' shape of the

underlying thin layer of p-type silicon 12 while opening 16-2 is disposed at or adjacent a tip of

the interior leg of the Ε'-shaped p-type silicon layer 12.

Layers of Ti/Pt/Au are next deposited over mask 16 and through openings 16-1 and 16-2

to form a post contact 18-1 and a tunnelling tip contact 18-2. The Ti/Pt/Au layers preferably

have a total thickness of about 2000 A. The individual layers of Ti and Pt may have thicknesses

in the ranges of 100-200 A and 1000-2000 A, respectively. After removal of the photoresist 16,

the wafer is subjected to a sintering step at approximately 520°C to form an ohmic Ti-Si juncture

between contacts 18-1 and 18-2 and the underlying layer 12.

The structures shown in Figures 4A and 4B are then covered with a layer of photoresist

20 which, as shown in Figure 5A, is patterned so that is assumes the same shape as did photoresist layer 16 previously discussed with reference to Figures 3A and 3B. Thus,

photoresist layer 20 has an opening 20-1 and another opening 20-2 therein. Those skilled in the

art will appreciate that the size of the openings 16-1, 16-2, 20-1 and 20-2 are not drawn to scale

on the figures and that openings 16-2 and 20-2 would tend to be significantly smaller than would

be openings 16-1 and 20-1. As such, when a rather thick layer of Ti/Pt/Au is deposited on the

wafer, it basically fills opening 20-1 (see Fig. 5A); however, those skilled in the art will

appreciate that there is some fill-in at the sides of a mask when a layer such as layer 22 is

deposited because of an increasing overhang which occurs at the edges of openings 20-1 and 20-2

as the deposition process proceeds. Since the width of the opening 20-1 is quite wide, the effect

of the fill-in is not particularly important. However, since opening 20-2 is rather narrow to begin

with, the deposited Ti/Pt/Au 22, as shown at numeral 20-2, assumes a pyramidal-like or conical-

like shape. The thickness of the deposition of Ti/Pt/Au layer 22 is sufficiently thick to assure

that layer 22 will close across the top of opening 20-2 during the deposition process. Finally, a

relatively thin layer, preferably about lOOA thick, of Au/Si 24 is deposited on the structure and

through opening 20-1 as depicted by numeral 24-1.

The photoresist 20 is then dissolved lifting of the layers 22 and 24 formed thereon and

leaving the structure depicted by Figures 6A and 6B. The height of layers 22-1 and 24-1 above layer 12 is preferably on the order of 11,500 A while the height of the pyramidal-like or .

conical structure 22-2 is preferable on the order of 8,500 A. The cantilevered beam portion of the

MEMS sensor of this first embodiment has now been formed, and thus we will now move onto the formation of the base structure for this first embodiment of the MEM sensor. Λs will be seen, layers 22-1 and 24-1 form a mating structure for mating the cantilevered beam portion with

its base portion.

The fabrication of the base portion will now be described. Turning first to Figures 7A and

7B, there is shown a wafer 30 with layers of silicon dioxide 32 and 34 formed on its major

surfaces. The thickness of each layer 32 and 34 is preferably on the order of 1.0 micrometers.

Next, a mask is formed by a layer of photoresist 36 which is applied and patterned as shown in

Figures 8A and 8B to form openings 36-1, 36-2, 36-3 and 36-4 therein. Opening 36-1 basically

corresponds in shape and configuration to opening 16-1 discussed with reference to Figures 3 A

and 3B. Similarly, opening 36-2 basically corresponds to opening 16-2 discussed with reference

to Figures 3A and 3B. Openings 36-3 and 36-4 allow for the deposition of control and self test

electrodes 38-3 and 38-4. A layer of Ti/Pt/Au 38 is deposited on mask 36 and through the

openings therein in order to form contact electrodes 38-1, 38-2, 38-3 and 38^ on layer 34.

Photoresist layer 36 also has openings in it so that when layer 38 is deposited, connection pads

40 are also formed for each one of the electrodes as well as interconnecting ribbon conductors 42.

Preferably, a guard ring 44 is placed around tip electrode 36-2 and its associated ribbon conductor

42-2 and connection pad 40-2. The guard ring is not shown in the elevation views for ease of

illustration.

The photoresist layer 36 is then removed lifting off the layer 38 deposited thereon and

leaving the structure shown in Figures 9A and 9B. Contact 38-1 assumes the shape of the outer

periphery of a letter E and provides a mating structure for joining with the similar-shaped mating

structure 22-1, 24-1 of the cantilevered beam portion 2. Turning to Figure 10, the cantilevered beam portion 2, preferably fabricated as described

with reference to Figures 1 A-6B, is mechanically aligned relative to the base portion 4 fabricated

as described with reference to Figures 7A-9B. Of course, those skilled in the art will appreciate

that the patterns shown on the surfaces of wafers 10 and 30 repeat many times over the surface

of a wafer so that there are many cantilevered beam forming structures 2 comprising elements 22-

1, 24-1, 12 and 22-2 and many corresponding base structures 4 comprising elements 38-1 through

38-4 which are manufactured for mating on the silicon wafers 10 and 30. The two wafers are

brought into alignment (See Figure 11) and subjected to pressure and heating so as to cause a

eutectic bond to occur between layer 24-1 and layer 38-1. The pressure is developed preferably

by applying a force of about 5,000 N at about 400°C between three inch (7.5 cm) wafers 2,4

containing 1000 devices. Of course, the force needs to be adjusted depending on the size of the

wafer and the total surface area to be bonded. If the bonding is done non-eutectically, the

temperature used will be higher.

Layers 24-1 and 38-1 have preferably assumed the shape of the outerperpherial edge of a

capital letter Ε' and therefore the moveable contact 22-2 of the MEM sensor is well protected

by this physical shape. After performing the bonding, silicon layer 10 is dissolved away to arrive

at the resulting MEM sensor shown in Figures 12A and 12B. The silicon can be dissolved with

ethylenediamine pyrocatechol (EDP). This leaves only the Boron doped silicon cantilevered

beam 12 with its contact 22-2 and its supporting or mating structure 22-1 and 24-1 bonded to

the base structure 4. Preferable dimensions for the MEM sensor are given on Figure 12A. The

beam preferably has a length of 200 to 300 μm (0.2 to 0.3 mm). Instead of using EDP as the etchant, plasma etching can be used if a thin layer of SiO is

used, for example, as an etch stop between layer 12 and substrate 10.

A second embodiment of a MEM sensor will now be described. As in the case of the first

embodiment, this discussion will begin with the fabrication of the cantilever beam portion 2, then

go onto a discussion of the base portion 4 and the preferable eutectic bonding and the completion

of the MEM sensor. As will be seen, this second embodiment differs from the first embodiment

by the manner in which the cantilevered beam is supported above base portion 4.

According to the second embodiment, the fabrication of the cantilever beam forming

structure 2 starts as has been described with reference to Figures 1 A through 4B of the first

embodiment. Assuming that the fabrication steps discussed with reference to Figures 1 A through

4B have been carried out, the structure depicted in Figures 4A and 4B will been obtained.

Alternatively, post contact 18-1 may be formed by layers of Ti and Au (i.e without Pt),

which would involve an additional masking step to eliminate the Pt layer from post contact 18-1.

However, in this alternative, the sintering would cause Si to migrate into the Au to form an Au/Si

eutectic at the exposed portion of post contact 18-1 shown in Figures 4A and 4B. As a further

alternative, the exposed portion of the post contact 18-1 shown in Figures 4A and 4B could

simply be deposited as Au/Si eutectic, in which case the Pt layer in the post contact 18-1 could

be optionally included. Post contact 18-1 may be eliminated if the subsequently described bonding between the cantilevered beam portion 2 and the base portion 4 occurs non-eutectically.

As a result, the exposed portion of the post contact 18-1 shown in Figures 4 A and 4B is

formed, according to this embodiment preferably either by Au or by Au/Si. From that point, a layer of photoresist 20' is put down and patterned to have a single

opening 20-2 therein as shown in Figures 13A and 13B. A layer of gold 26, having a thickness of

15,000 A, is applied over the photoresist 20' and the gold, as it deposits upon contact 18-2

through opening 20-2, will assume a pyramidal-like or conical-like shape so as to form a pointed

contact 26-2 due to the formation of an overhang at the opening 20-2 during the deposition of the

gold layer 26. After contact 26-2 is formed, the remaining photoresist 20' is dissolved so that the

cantilever beam structure then appears as shown in Figures 14A and 14B. Comparing Figures

14A and 14B of the second embodiment with Figures 6 A and 6B of the first embodiment, the

primary difference between the two embodiments is the absence of layers 22-1 and 24-1 in the

second embodiment, so that the mating structure is provided by layer 18-1 in this embodiment.

The fabrication of the base portion 4 of the second embodiment of the MEM sensor will

now be described with reference to Figures 15A through 19B. Turning to Figures 15A and 15B, a

wafer 30' of silicon is shown upon which a layer of photoresist 50 has been deposited and

patterned to assume preferably the outerperipheral shape of a capital letter 'E'. The exposed

silicon is then subjected to an etch, etching it back approximately 20,000 A, to define a

protruding portion 30-1 of wafer 30' under the patterned mask 50 of the photoresist. The

photoresist mask 50 is then removed and wafer 30 is oxidized to form layers of oxide 52, 54 on

its exposed surfaces. The oxide layers are each preferably about 1 μm thick. Of course, the end

surfaces shown in Figure 16A are not shown as being oxidized because it is assumed that the

pattern shown in Figure 16A is only one of a number of repeating patterns occurring across an entire wafer 30'. Turning to Figures 17A and 17B, a layer of photoresist 56 is applied having an opening

therein 56-1 which again assumes the outerperipheral shape of a capital letter Ε', as previously

described. Then, a layer of Ti/Pt/Au 58, preferably having a thickness of 2,000 A, is deposited

through opening 56-1 followed by the deposition of a layer 60 of an Au/Si eutectic preferably

with a 1,000 A thickness. Layers 58-1 of Ti/Pt/Au and 60-1 of the Au/Si eutectic are thus

formed, which layers preferably follow the outerperipheral shape of a capital letter Ε', as

previously described. Of course, if the post contact 18-1 is formed of an Au/Si eutectic, then

layer 60 may be formed of simply Au or simply omitted due to the presence of Au at the .

exposed layer 58-1.

Photoresist layer 56 is then removed and a layer 62 of photoresist is applied and

patterned to have (i) openings 62-2, 62-3 and 62-4, as shown in Figure 18 A, (ii) openings for

pads 40-1 through 40-4 and their associated ribbon conductors 42 and (iii) an opening for guard

ring 44 and its pad, as depicted in Figure 18B. For the ease of illustration, the opening for guard

ring 44 is not shown in Figure 18 A. As is shown by Figures 19A and 19B, a layer 38 of Ti/Pt/Au

is deposited over the photoresist and through openings 62-2 through 62-4 forming contacts 38-3,

38-4 and 38-2 as shown in Figures 19A and 19B. Those contacts are interconnected with their

associated pads 40-2 through 44-4 by the aforementioned ribbon conductors 42, which contacts

40 and ribbon conductors 42 are preferably formed at the same time as contacts 38-3, 38-4 and

38-2 are formed. The outerperipheral layers 58-1 and 60-1 are also connected with pad 40-1 by

an associated ribbon conductor 42.. The layer 62 of photoresist is removed so that the base

portion appears as shown in Figures 19A and 19B. The protrusion 30-1 , which preferably extends approximately 20,000 A high above the adjacent portions of wafer 30', and the relatively

thin layers 58-1 and 60-1 form the mating structure for the base portion 4.

Turning to Figure 20, the cantilever beam forming portion 2 according to the second

embodiment is now bonded to base portion 4. As is shown in Figure 20, the two wafers 10 and

30' are brought into a confronting relationship so that their mating structure 18-1, 30-1, 58-1 and

60-1 are in alignment so that layers 18-1 and 60-1 properly mate with each other. Pressure and

heat (preferably by applying a force of 5,000 N at 400°C between three inch wafers 2, 4 having

1000 sensors disposed thereon) are applied so that eutectic bonding occurs between layers 18-1

and 60-1 as shown- in Figure 21. Thereafter, silicon wafer 10 is dissolved so that the MEM

sensor structure shown in Figure 22 is obtained. The p-type silicon layer 12 includes a portion

12-2 which serves as the cantilevered beam and another portion which is attached to the base

portion 4 through the underlying layers. The gold contact 26-2 is coupled to pad 40-1 by

elements 18-2, 12-2, 12-1, 18-1, 60-1, 58-1 and its associated ribbon conductor 42. If the bonding

is done non-eutectically, then higher temperatures will be required.

Figure 23 is basically identical to Figure 22, but shows the MEM sensor in somewhat

more detail and the preferred dimensions of the MEM sensor are also shown on this figure.

It will be recalled that in both the first and second embodiment discussed above with respect to Figure 4B, a layer of Ti/Pt/Au 18 was applied forming contacts 18-1 and 18-2 which

were sintered in order to form an ohmic bond with Boron-doped cantilever 12. It was noted that

sintering could be avoided by providing a ribbon conductor between contacts 18-1 and 18-2. Such a modification is now described in greater detail and is depicted starting with Figures 24A and 24B.

According to this modification, the Si epitaxial layer 12 formed on silicon wafer 10 may

be (i) doped with Boron or (ii) may be either undoped or doped with other impurities. If

undoped (or doped with other impurities), then a thin etch stop layer 11 is used between the Si

device layer 12 and the silicon wafer 10. This configuration is called Silicon On Insulator (SOI).

The etch stop layer 11, if used, is preferably a layer of SiO₂ having a thickness of about 1 - 2 μm.

This etch stop layer 11 will be used to release the cantilevered beam from wafer 10. If layer 12 is

doped with Boron, it is doped to reduce the resistivity of the epitaxial layer 12 to less than 0.05

Ω— cm. At that level of doping the epitaxial layer 12 can resist a subsequent EDP etch used to

release the cantilevered beam from wafer 10.

Optionally, the silicon wafer 10 with the doped or undoped Si epitaxial layer 12 formed

thereon (as shown in Figures 24 A and 24B) may be subjected to thermal oxidation to form a

relatively thin layer of SiO. on the exposed surface of layer 12. Layer 12 is preferably about 1.2

μm thick (but it can be thinner or thicker depending upon the application). The thickness of the

optional SiO layer is preferably on the order of 0.2 μm. To arrive at this point, both major

surfaces may be oxidized and the oxide stripped from the bottom layer, if desired. The optional

oxide layer may be used to provide an even better barrier against the diffusion of Si from the

beam into the Au of the tunneling tip formed at one end of the beam. This optional oxide layer

may be used with any embodiment of the cantilevered beam, but is omitted from most of the

figures for ease of illustration. It does appear, however, in Figures 37 and 41 and is identified there by element number 70. Turning now to Figures 25 A and 25B, a layer of photoresist 14 is then applied on layer

12 (or on the optional oxide layer, if present) and patterned preferably to assume the same "E"

letter shape as the layer photoresist 14 discussed with reference to Figures 2 A and 2B. The

structure shown in Figures 25A and 25B is then subjected to a plasma etch which etches through

layers 11 and 12 into the silicon substrate 10 by approximately 500 A. Then a layer of

photoresist 16 is applied and patterned as shown by Figures 26A and 26B. The layer 16 of

photoresist is patterned to assume basically the same arrangement and configuration as layer 16

discussed with respect to Figures 3 A and 3B except that an additional opening 16-5 is included

communicating between openings 61-1 and 16-2 to provide for the formation of a ribbon

conductor 18-5 when a layer 18 of metals, preferably Ti/Pt/Au, is subsequently deposited on

photoresist 16. After depositing the layer 18, the photoresist 16 is removed lifting off the

portions of the layer 18 formed thereon, leaving portions 18-1, 18-2 and 18-5 of layer 18 on the

underlying layer 12, as shown in Figures 27A and 27B, or on the optional oxide layer, if present.

After arriving at the structure shown in Figures 27A and 27B, a tunneling tip 22 is added

by appropriate masking and deposition of Au or a layer of Ti/Pt/Au, for example, thereby

arriving at the structure shown by Figures 28A and 28B. Depending on the configuration utilized,

a member 22-1 (see Figure 6A) could be deposited at the same time so that the MEM sensor would be completed as previously described with reference to Figures 10 and 1 1. If instead the

silicon base 30 is formed with a protrusion 30-1 (see Figure 16A, for example), then the deposition of member 22-1 can be omitted and the MEM sensor can be completed as previously

described with reference to Figures 20 and 21. After bonding the structure depicted by Figures 28A and 28B to the base structure 4 of Figures 19A and 19B and releasing the silicon wafer 10

from the cantilevered beam, the structure shown by Figures 29A and 29B is arrived at. The

cantilevered beam 12 is preferably released by performing two plasma etches. The first etch

dissolves wafer 10 and the second etch removes the etch stop layer 11.

Figure 30 shows yet another embodiment of a MEM sensor. In this case the MEM

sensor is shown in its completed form. With the information already presented herein, those

skilled in the art will not find it difficult to modify the detailed description already given to

produce this embodiment and still further embodiments, all of which will now be discussed. In

the embodiment of Figures 1 A - 12B the preferable eutectic bond occurs close to the silicon

substrate 10 between layers 24-1 and 38-1. In the embodiment of Figure 30, the preferable

eutectic bond occurs closer to a center point in the supporting arm 80 between the Au and Au/Si

layers. Otherwise this embodiment is similar to the first embodiment described with reference to

Figures 1 A - 12B. In the embodiment of Figure 31, the preferable eutectic bond occurs between

the Au and Au/Si layers which are arranged close to the cantilevered beam 12 as opposed to close

to base 4 as in the case of the first embodiment described with reference to Figures 1 A - 12B. In

the case of the embodiments of Figures 30 and 31, the cantilevered beam 12 should have good

conductivity so that it acts as a conduction path between contact 22-2 at the end of the beam 12 and contact 40-1 on the base 4 (See Figure 12B). Preferably the resistivity of the boron doped

silicon cantilevered beam 12 is less than 0.05 Ω-cm. Due to the low resistivity of the beam 12,

EDP may be used to etch away substrate 10 (see Figures 10 and 1 1 and the related description). Alternatively, an SOI wafer could be used and the SiO layer 1 1 (Figures 24A - 28B) would be used as an etch stop layer to protect the beam 12 when etching away substrate 10.

Comparing the embodiments of Figures 10, 23, 29 and 30, the embodiments of Figures 23

and 29 are preferred since they only need a relatively thin metal mating layer and provide a more

rigid Si post or protrusion 30-1 for better stability.

The embodiments of Figures 32 and 33 are similar to the embodiments of Figures 29 and

30, but these two embodiments make use of the ribbon conductor 18-5 described with reference

to Figures 24A through 29B. For these embodiments, if layer is doped with Boron, the resistivity

of the cantilevered beam 12 is preferably less than 0.05 Ω-cm. The ribbon conductor allows the

use of higher resistivity silicon for the cantilevered beam 12. If layer 12 is doped with Boron,

then the cantilevered beam can be released from wafer 10 using EDP as the etchant. Alternatively,

an SIO construction can be utilized with a SiO₂ stop layer 11 (See Figures 24A - 28B) utilized to

protect the beam 12 while the substrate 10 is etched away.

The embodiments of Figures 34 - 37 are similar to the embodiment of Figures 29, 31, 30

and 32, respectively, except instead of using a planar substrate, a substrate with a silicon

protrusion 30-1 is utilized as described with reference to the second embodiment (see Figures

13A - 23 and the related description).

Generally speaking, the embodiments of Figures 13A - 23 and 34 - 37 are preferred for a

MEM sensor since these embodiments, which all utilize the a base substrate 30' with a silicon

post or protrusion 30-1 , are believed to give the resulting sensors and switches better mechanical

stability.

The structure which has been described so far has been set up as a sensor. Those skilled in the art know not only how to utilize these structures as a sensor but also know how to modify

these structures, when needed, to make them function as. a switch. The sensor devices shown in

the preceding figures are preferably used as accelerometers, although they can be used for other

types of sensors (such as gyroscopes, magnetometers, etc.) or as switches, as a matter of design

choice, and with appropriate modification when needed or desired.

Four embodiments of a switch version of a^'MEM device in accordance with the present

invention will now be described with reference to Figures 38 - 41. In order to function as a

switch, two metal pads 26-3 and 26-4 are deposited on the cantilevered beam structure 12 instead

of a pointed contact 26-2. In these embodiments the cantilevered beam is preferably formed of

undoped silicon. When the switch closes, the metal pad 26-4 bridges two contacts 38-5 and 38-6,

which are deposited at the same time that layer 38 is deposited on the base structure 4. The

ribbon conductor 18-5 described with reference to Figures 24A through 29B is utilized, due to the

relatively high resistivity of undoped Si, to bring an electrical connection with metal pad 26-3

down to the base substrate 4. The switch is closed by imparting an electrostatic force on the

cantilevered beam 12 by applying a voltage between metal pads 38-3 and 26-3. That voltage

causes the metal pad 26-4 to make a circuit connecting contacts 38-5 and 38-6 when the metal

pad 26-4 makes physical contact with those two contacts when the switch closes. Otherwise

these embodiments are similar to the previously discussed embodiments. It should be noted,

however, that since the cantilevered beam 12 is preferably formed of undoped silicon, the EDP

etchant will not prove satisfactory..Instead the SiO₂ etch stop layer 1 1 described with reference

to Figures 24A - 29B is preferably used to protect the beam 12 when etching away substrate 10. In Figure 38 the switch is formed on a generally planar base 4 and the cantilevered beam is

supported by a column 80 formed of deposited metals and the Au/Si eutectic. The Au/Si eutectic

is arranged towards the middle of the column in this embodiment. In the embodiment of Figure 39

the Au/Si eutectic is arranged closer to the beam 12. In the embodiment of Figure 40 the Au/Si

eutectic layer is disposed next to the beam and in this embodiment the base structure 4 has a

protrusion 30-1 which acts as a portion of the column 80 which supports the beam 12. Of the

switch embodiments, the embodiment of Figure 40 is preferred for the same reason that sensors

with a protrusion 30-1 in their base structures 4 are also preferred, namely, it is believed to give

the resulting sensors and switches better mechanical stability.

In Figure 41 an SiO₂ layer 70 is shown disposed between beam 12 and layer 18. Layer 18

preferably is formed of layers of Ti, Pt and Au. The Pt acts as a diffusion barrier to the Si to

keep it from migrating into the Au contacts. If layer 18 does not provide adequate protection for

whatever metal is used in making contacts, then the use of a diffusion barrier such a SiO₂ layer 70

would be appropriate.

The structures shown in the drawings has been described in many instances with

reference to a capital letter Ε'. However, this shape is not particularly critical, but it is preferred

since it provides good mechanical support for the cantilevered structure formed primarily by beam portion of layer 12. Of course, the shape of the supporting structure or mating structure

around cantilever beam 12 can be changed as a matter of design choice and it need not form the

perimeter of the capital letter Ε', but can form any convenient shape, including circular,

triangular or other shapes as desired. In the embodiment utilizing a ribbon conductor on the cantilevered beam 12, the pads and

contacts (e.g. 26-2 and 26-3) formed on the beam 12 are generally shown as being formed over the

ribbon conductor 18-1, 18-2, 18-5. The ribbon conductor on the beam can be routed in any

convenient fashion and could butt against or otherwise make contact with the other metal

elements formed on the cantilevered beam 12 in which case elements such as 26-2 and 26-3 could

be formed directly on the beam 12 itself.

The contacts at the distal ends of the cantilevered beams are depicted and described as

being conical or triangular. Those skilled in the art will appreciate that those contacts may have

other configurations and may be flat in some embodiments.

Throughout this description are references to Ti Pt/Au layers. Those skilled in the art will

appreciate that this nomenclature refers to a situation where the Ti/Pt/Au layer comprises

individual layers of Ti, Pt and Au. The Ti layer promotes adhesion, while the Pt layer acts as a

barrier to the diffusion of Si from adjacent layers into the Au. Other adhesion layers such as Cr

and/or other diffusion barrier layers such as a Pd could also be used or could alternatively be

used. It is desirable to keep Si from migrating into the Au, if the Au forms a contact, since if Si

diffuses into an Au contact it will tend to form SiO₂ on the exposed surface and, since SiO₂ is a

dielectric, it has deleterious effects on the ability of the Au contact to perform its intended

function. As such, a diffusion barrier layer such as Pt and/or Pd is preferably employed between

an Au contact and adjacent Si material.

The nomenclature Au/Si or Au-Si refers a mixture of Au and Si. The Au and Si can be deposited as separate layers with the understanding that the Si will tend to migrate at elevated temperature into the Au to form an eutectic. However, for ease of manufacturing, the Au/Si

eutectic is preferably deposited as a mixture except in those embodiments where the migration of

Si into Au is specifically relied upon to form Au/Si.

Many different embodiments of a MEM device have been described. Most are sensors

and some are switches. Many more embodiments can certainly be envisioned by those skilled in

the art based the technology disclosed herein. But in all cases the base structure 4 is united with

the cantilevered beam forming structure 2 by applying pressure and preferably also heat,

preferably to cause an eutectic bond to occur between the then exposed layers of the two

structures 2 and 4. The bonding may instead be done non-eutectically, but then higher

temperatures must be used. Since it is usually desirable to reduce and/or eliminate high

temperature fabrication processes, the bonding between the two structures 2 and 4 is preferably

done eutectically and the eutectic bond preferably occurs between confronting layers of Si and

Au/Si.

Having described the invention with respect to certain preferred embodiments thereof,

modification will now suggest itself to those skilled in the art. The invention is not to be limited

to the foregoing description, except as required by the appended claims.

Claims

What is claimed is:

1. A method of making a MEM tunneling sensor comprising the steps of:

(a) defining a cantilevered beam structure and a mating structure on a first substrate or

wafer;

(b) forming at least one contact structure and a mating structure on a second substrate

or wafer, the mating structure on the second substrate or wafer being of a

complementary shape to the mating structure on the first substrate or wafer;

(c) positioning the mating structure of the first substrate or wafer into a confronting

relationship with the mating structure of the second substrate or wafer; and

(d) bonding a layer associated with said mating structure on the first substrate or

wafer with a layer associated with the mating structure on the second substrate or

wafer.

2. A method of making a MEM tunneling sensor as claimed in claim 1 wherein the second

substrate or wafer is formed of silicon.

3. A method of making a MEM tunneling sensor as claimed in claim 2 wherein the silicon

forming the second substrate or wafer is of a single crystalline structure.

4. A method of making a MEM tunneling sensor as claimed in claim 3 wherein the crystalline structure of the silicon is <100>.

5. A method of making a MEM tunneling sensor as claimed in claim 4 wherein the silicon is

n-type.

6. A method of making a MEM tunneling sensor as claimed in claim 1 wherein the first

substrate or wafer is formed of silicon.

7. A method of making a MEM tunneling sensor as claimed in claim 6 wherein the silicon

forming the first substrate or wafer is of a single crystalline structure.

8. A method of making a MEM tunneling sensor as claimed in claim 7 wherein the crystalline

structure of the silicon in the first substrate or wafer is <100>.

9. A method of making a MEM tunneling sensor as claimed in claim 8 wherein the silicon of

the first substrate or wafer is n-type.

10. A method of making a MEM tunneling sensor as claimed in claim 1 wherein heat is

applied together with pressure between the two substrates so as to cause an eutectic bond to

occur between the two mating structures.

11. A method of making a MEM tunneling sensor as claimed in claim 1 wherein the

cantilevered beam structure is formed by:

(a) forming an epitaxial layer of silicon on said first substrate or wafer, said epitaxial

layer being doped;

(b) masking and etching the epitaxial layer of silicon to define a beam structure

disposed on said first substrate or wafer; and

(c) removing the first substrate or wafer by etching.

12. A method of making a MEM tunneling sensor as claimed in claim 11 wherein a contact is

formed on an end of said beam structure by depositing a metal through a small opening in a

temporary mask layer, the small opening being sufficiently small that the metal being deposited

tends to overhang the small opening increasingly as the deposition of the metal proceeds whereby

the contact being deposited through the small opening assumes an elongate shape of decreasing

cross section as the deposition proceeds.'

13. A method of making a MEM tunneling sensor as claimed in claim 11 wherein etching

accomplished by ethylenediamine pyrocatechol as an etchant.

14. A method of making a MEM tunneling sensor as claimed in claim 11 wherein the epitaxial

layer is doped with boron at a sufficient concentration to reduce the resistivity of the epitaxial

layer to less than 0.05 Ω-cm.

15. A method of making a MEM tunneling sensor as claimed in claim 14 wherein a layer of

metal is selectively deposited on said epitaxial layer and sintered at an elevated temperature to

form first and second ohmic contacts on said epitaxial layer, said second ohmic contact being

disposed near a distal end of the beam structure and the first ohmic contact forming the mating

structure on the first substrate or wafer.

16. A method of making a MEM tunneling sensor as claimed in claim 15 wherein the layer of

metal is formed of individual layers of Ti, Pt and Au.

17. A method of making a MEM tunneling sensor as claimed in claim 16 wherein a relatively

thick layer of Ti/Pt/Au is deposited and then sintered on a relatively thin metal layer of Ti/Pt/Au,

a first portion of the relatively thick layer of Ti/Pt/Au forming the mating structure on the first

substrate or wafer and overlying said first ohmic contact and a second portion of the relatively

thick layer of metal forming a pointed contact at said second ohmic contact.

18. A method of making a MEM tunneling sensor as claimed in claim 17 further including

forming Ti/Pt/Au contacts on said second substrate or wafer, at least one of said contacts on the

second substrate or wafer defining the mating structure on the second substrate or wafer.

19. A method of making a MEM tunneling sensor as claimed in claim 18 wherein the bonding

occurs eutectically and the layer for producing an eutectic bond is provided by a layer of Au-Si eutectic deposited on the Ti/Pt/Au contact on said second substrate or wafer and/or by a layer of

Au-Si eutectic deposited on first portion of the relatively thick layer of Ti/Pt/Au on the first

substrate or wafer.

20. A MEM tunneling sensor assembly comprising:

(a) a beam structure and a mating structure defined on a first substrate or wafer;

(b) at least one contact structure and a mating structure defined on a second substrate

or wafer, the mating structure on the second substrate or wafer being of a

complementary shape to the mating structure on the first substrate or wafer; and

(c) a bonding layer disposed on at least one of said mating structures for bonding the

mating structure defined on the first substrate or wafer to the mating structure on

the second substrate or wafer.

21. The MEM tunneling sensor assembly for making a MEM tunneling sensor as claimed in

claim 20 wherein said assembly is for making a MEM tunneling sensor therefrom, said

bonding layer disposed on at least one of said mating structures being pressure/heat

sensitive to bond said mating structures defined on the first substrate or water to said

mating structure on the second substrate in response to the application of pressure/heat

there between.

22. A MEM tunneling sensor assembly as claimed in claims 20 or 21 wherein the second substrate or wafer is formed of silicon.

23. A MEM tunneling sensor assembly as claimed in claim 22 wherein the silicon forming the

second substrate or wafer is of a single crystalline structure.

24. A MEM tunneling sensor assembly as claimed in claim 20 wherein the first and second

substrates or wafers are each formed of single crystal silicon.

25. A MEM tunneling sensor assembly as claimed in claim 23 or 24 wherein the crystalline

structure of the silicon is <100>.

26. A MEM tunneling sensor assembly as claimed in claim 25 wherein the silicon is n-type.

27. A MEM tunneling sensor assembly as claimed in claim 20 or 21 wherein the first

substrate or wafer is formed of silicon.

28. A MEM tunneling sensor assembly as claimed in claim 27 wherein the silicon forming the

first substrate or wafer is of a single crystalline structure.

29. A MEM tunneling sensor assembly as claimed in claim 28 wherein the crystalline

structure of the silicon in the first substrate or wafer is <100>.

30. A MEM tunneling sensor assembly as claimed in claim 29 wherein the silicon of the first

substrate or wafer is n-type silicon.

31. A MEM tunneling sensor assembly as claimed in claim 20 or 21 wherein a pointed

contact is disposed on an end of said beam structure.

32. The sensor of claim 20 wherein, the mating structures are joined one to another at said

bonding layer.

33. A MEM tunneling sensor assembly as claimed in claim 20, 21 or 32 wherein the

cantilevered beam structure is formed from an epitaxial layer of silicon on said first substrate or

wafer, said epitaxial layer being doped with a dopant.

34. A MEM tunneling sensor assembly as claimed in claim 31 or 33 wherein the epitaxial

layer to less than less than 0.05 Ω-cm.

35. A MEM tunneling sensor assembly as claimed in claim 33 or 34 further including first and

second ohmic contacts on said epitaxial layer, said second ohmic contact being disposed near a

distal end of the beam structure and said first ohmic contact forming the mating structure on the

first substrate or wafer.

36. A MEM tunneling sensor assembly as claimed in claim 33 wherein the first and second

ohmic contacts are formed of layers of Ti, Pt and Au.

37. A MEM tunneling sensor assembly as claimed in claim 35 wherein a relatively thick layer

of metal is disposed on the first and second ohmic contacts, a first portion of the relatively thick

layer of metal being disposed on said first ohmic contact and providing the mating structure on

the first substrate or wafer and a second portion of the relatively thick layer of metal forming a

pointed contact on said second ohmic contact.

38. A MEM tunneling sensor assembly as claimed in claim 37 further including metal

contacts disposed on said second substrate or wafer, at least one of said contacts on the second

substrate or wafer defining the mating structure on the second substrate or wafer.

39. A MEM tunneling sensor assembly as claimed in claim 38 wherein the bonding layer is

provided by a layer of Au-Si eutectic disposed on the metal contact on said second substrate or

wafer and/or by a layer of Au-Si eutectic disposed on the first portion of the relatively thick

layer of metal on the first substrate or wafer.

40. The method of any of claims 1 through 19 further comprising the step of (e) removing at

least a portion of the first substrate or wafer to release the cantilevered beam structure.

1. The sensor of claims 37, 38 or 39 wherein the metal is Ti/Pt Au.