WO2001091390A3 - Pipelined and sliced shared-memory switch - Google Patents
Pipelined and sliced shared-memory switch Download PDFInfo
- Publication number
- WO2001091390A3 WO2001091390A3 PCT/US2001/016222 US0116222W WO0191390A3 WO 2001091390 A3 WO2001091390 A3 WO 2001091390A3 US 0116222 W US0116222 W US 0116222W WO 0191390 A3 WO0191390 A3 WO 0191390A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- sliced
- words
- pipelined
- output port
- memory switch
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
- H04L49/105—ATM switching elements
- H04L49/108—ATM switching elements using shared central buffer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
- H04L49/255—Control mechanisms for ATM switching fabrics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
- H04L49/309—Header conversion, routing tables or routing tags
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5679—Arbitration or scheduling
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2001263297A AU2001263297A1 (en) | 2000-05-19 | 2001-05-17 | Pipelined and sliced shared-memory switch |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US57491700A | 2000-05-19 | 2000-05-19 | |
US09/574,917 | 2000-05-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001091390A2 WO2001091390A2 (en) | 2001-11-29 |
WO2001091390A3 true WO2001091390A3 (en) | 2002-04-18 |
Family
ID=24298171
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/016222 WO2001091390A2 (en) | 2000-05-19 | 2001-05-17 | Pipelined and sliced shared-memory switch |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR20010106079A (en) |
AU (1) | AU2001263297A1 (en) |
WO (1) | WO2001091390A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2413919A (en) * | 2003-03-03 | 2005-11-09 | Xyratex Tech Ltd | Apparatus and method for switching data packets |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5799209A (en) * | 1995-12-29 | 1998-08-25 | Chatter; Mukesh | Multi-port internally cached DRAM system utilizing independent serial interfaces and buffers arbitratively connected under a dynamic configuration |
US5905725A (en) * | 1996-12-16 | 1999-05-18 | Juniper Networks | High speed switching device |
US5910928A (en) * | 1993-08-19 | 1999-06-08 | Mmc Networks, Inc. | Memory interface unit, shared memory switch system and associated method |
US6031842A (en) * | 1996-09-11 | 2000-02-29 | Mcdata Corporation | Low latency shared memory switch architecture |
-
2000
- 2000-11-17 KR KR1020000068369A patent/KR20010106079A/en not_active Application Discontinuation
-
2001
- 2001-05-17 AU AU2001263297A patent/AU2001263297A1/en not_active Abandoned
- 2001-05-17 WO PCT/US2001/016222 patent/WO2001091390A2/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5910928A (en) * | 1993-08-19 | 1999-06-08 | Mmc Networks, Inc. | Memory interface unit, shared memory switch system and associated method |
US5799209A (en) * | 1995-12-29 | 1998-08-25 | Chatter; Mukesh | Multi-port internally cached DRAM system utilizing independent serial interfaces and buffers arbitratively connected under a dynamic configuration |
US6031842A (en) * | 1996-09-11 | 2000-02-29 | Mcdata Corporation | Low latency shared memory switch architecture |
US5905725A (en) * | 1996-12-16 | 1999-05-18 | Juniper Networks | High speed switching device |
Also Published As
Publication number | Publication date |
---|---|
KR20010106079A (en) | 2001-11-29 |
AU2001263297A1 (en) | 2001-12-03 |
WO2001091390A2 (en) | 2001-11-29 |
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