WO2001082456A2

WO2001082456A2 - Voltage control

Info

Publication number: WO2001082456A2
Application number: PCT/GB2001/001840
Authority: WO
Inventors: Ian Kenneth Appleton
Original assignee: Ubinetics Limited
Priority date: 2000-04-27
Filing date: 2001-04-25
Publication date: 2001-11-01
Also published as: GB0010286D0; AU2001250514A1; GB2361779A; WO2001082456A3; GB2361779B

Abstract

A computer usable medium comprises a plurality of sub-systems (2, 3), each of which is provided with a respective voltage regulator (5a, 5b) at its input side, each sub-system having a respective voltage supply requirement. The voltage regulators (5a, 5b) are configured to match the voltage supplied thereto from a host supply (4) to the respective voltage supply requirements of the sub-systems (2, 3).

Description

Voltage Control

This invention relates to controlling the voltage supplied to sub-systems forming part of a system such as a digital processor on a PC card.

The operating voltage of modern digital processors is being reduced in order to reduce the overall power consumption of such processors. The PCMCIA specification for PC cards specifies that the interface to a host system, such as a PC or a personal digital assistant (PDA), uses either 5N or 3.3N signals. For compatibility with as many as different types of host as possible, it is desirable for a PC card to use a 5N interface. Unfox-lxinately, this creates problems with using low voltage digital signal processing on the PC card as the operating voltage is reduced to meet modern power consumption requirements.

The present invention provides a computer usable medium comprising a plurality of sub-systems, each of which is provided with a respective voltage regulator at its input side, each sub-system having a respective voltage supply requirement, wherein the voltage regulators are configured to match the voltage supplied thereto from a host supply to the respective voltage supply requirements of the sub-systems.

In a preferred embodiment, a first of the sub-systems is an interface to a host system, and a second of the sub-systems is a digital processor, and wherein the supply voltage requirement of the first sub-system is higher than that of the second sub-system. Preferably, a a third of the sub-systems is an analogue conversion chip, and a fourth of the sub-systems is a radio sub-system, and the supply voltage requirements of the four sub-systems progressively decrease from the first sub-system to the fourth sub-system.

Advantageously, a respective integrated circuit constitutes each of the sub-systems, and a respective integrated circuit constitutes each of the voltage regulators.

Conveniently, each of the voltage regulators is an LDO voltage regulator. Preferably, a PC card constitutes the computer usable medium.

The invention also provides a method of controlling voltage supplied by a host system to a plurality of sub-systems associated with a computer usable medium, the method comprising the step of providing a respective voltage regulator between the voltage supply of the host system and the power input of each sub-system, the voltage regulators being configured to match the voltage supplied thereto by the voltage supply of the host system to respective voltage requirements of the sub-systems.

The invention will now be described in greater detail, by way of example, with reference to the drawings, in which:-

Figure 1 is a schematic circuit diagram illustrating the operation of a PC card with a 5N host; and Figure 2 is a diagram similar to that of Figure 1, but illustrating operation of a PC card with a 3.3V host.

Referring to the drawings, Figure 1 is a schematic representation of a PC card, indicated generally by the reference number 1, for operation with a host system, such as a PC or a PDA. The PC card 1 includes first and second sub-systems (integrated circuits) 2 and 3, the first of which is a PCMCIA Universal Asynchronous Receiver and Transmitter (UART), and the second of which is a digital processor. The UART 2 is the interface to the host system and uses 5N signal^'s. Each of the sub-systems 2 and 3 is provided with a pair of protection diodes 2a and 3a respectively, a respective diode being provided on each signal input 2a¹, 2a¹¹, 3a¹ and 3a¹¹. The protection diodes 2a and 3a limit the maximum voltage that can be applied to the associated sub-systems 2 and 3 to the value of the supply voltage plus the voltage drop across the protection diodes.

Each of the sub-systems 2 and 3 is connected to the supply voltage, indicated generally by the reference number 4, via a respective low drop out (LDO) voltage regulator 5a and 5b. The LDO regulators 5a and 5b are integrated circuits forming part of the PC card 1, the LDO regulator 5a being arranged to have a 4.8V output, and the LDO regulator 5b being arranged to have 3.5V output. An LDO voltage regulator is a particular form of voltage converter, whose input can drop to within a small margin above the required output voltage before the regulator loses regulation. Also, when the input voltage is below the required level, the output will follow the input voltage minus a small margin.

As shown in Figure 1, logic signals pass between the PC card 1 and the host system. These logic signals include, for example, data bus signals, address bus signals and serial communications signals. The maximum voltage of a logic signal that can be applied to a digital input to an integrated circuit, such as the sub-systems 2 and 3, is limited to the supply voltage to that integrated circuit plus the voltage drop across its internal protection diodes 2a or 3a. Moreover, the minimum voltage for such a logic signal is typically 0.7 x the supply voltage. Thus, as shown in Figure 1, logic signals in the voltage range of 0 to 4.75 - 5.25V are applied to the digital input to the sub-system 2, these signals being up to the same voltage as the supply voltage - nominally 5V, but in practice lying in the range of 4.75 - 5.25V as the host has a tolerance of ± 5%. Logic signals in the voltage range 0 to 4.8 V are applied to the digital input of the sub- system 3, as the supply voltage in this case is the supply voltage of the sub-system 2, that is to say the 4.8V output of the LDO voltage regulator 5a.

The logic signals in the direction left-to-right are, therefore, never more than the supply voltage + 0.7N, and this prevents phantom powering of the sub-systems 2 and 3 via the internal protection diodes 2a and 3a. Moreover, the logic signal voltages are chosen so that the signals in the direction right-to-left are never less than the minimum specification for a high level input - typically 70% of the supply voltage for CMOS devices. Accordingly, the logic signals passing from the sub-system 3 to the sub-system 2 lie within the range 0 - 3.5N, and the logic signals passing from the sub-system 2 to the host system lie within the range of 0 - 4.8N. Thus, signals from a lower voltage sub-system to a higher voltage sub-system are always at least 0.7 times the higher voltage sub-system supply, so that the specification for these devices is met.

The circuit inside the PC card 1 consists of the two sub-systems 2 a d 3 connected in series, and the use of the LDO voltage regulators 5a and 5b ensures that the power supply voltage supplied to the sub-systems is a set of decreasing voltages, such that, at the input end, a suitable voltage (5V) is used for the external interface to the host system, and, at the other end, a suitable low voltage (3.5V) is used to power the digital processor constituting the sub-system 3. This ensures that power consumption is minimised.

In practice, the PC card 1 would include two further sub-systems (not shown), namely an analogue conversion chip and a radio sub-system. The analogue conversion chip is configured to operate with a power supply voltage of 3.2V, and the radio sub-system is configured to operate with a supply voltage of 2.9V. Accordingly, the former is supplied with power via a 3.2V LDO voltage regulator, and the latter is supplied with power via a XV LDO voltage regulator. In this way, the power supply voltage to the four sub-systems is as a set of decreasing voltages.

Figure 2 is a schematic representation of the PC card 1 for operation with a host system, such as the PC or a PDA, which uses 3.3V signals. In this case, the supply voltage, although nominally 3.3V, lies in the range of 3.0 to 3.6V as the host has a tolerance of ± 10%. In this scenario, the LDO voltage regulators 5a and 5b drop out of regulation, and supply a little less than the host supply to each sub-system 2 and 3. All the logic signals are then compatible, and it is not necessary to have a decreasing set of supply voltages. Thus, logic signals from the host system to the sub-system 2 are in the range of 0 to 3.0 - 3.6V. Logic signals from the sub-system 2 to the sub-system 3 are in the range 2.9 - 3.5V, and logic signals from the sub-system 3 to the sub-system 2 and from the sub-system 2 to the host system are in the range of 2.9 - 3.5V. Although, in this configuration, the LDO voltage regulators 5a and 5b have little or no affect on the operation of the PC card 1, their provision on the PC card does enable that card to be used with host systems at both 5V and 3.3V.

Claims

1. A computer usable medium comprising a plurality of sub-systems, each of which is provided with a respective voltage regulator at its input side, each sub-system having a respective voltage supply requirement, wherein the voltage regulators are configured to match the voltage supplied thereto from a host supply to the respective voltage supply requirements of the sub-systems.

2. A computer usable medium as claimed in claim 1, wherein a first of the sub-systems is an interface to a host system, and a second of the sub-systems is a digital processor, and wherein the supply voltage requirement of the first sub-system is higher than that of the second sub-system.

3. A computer usable medium as claimed in claim 2, wherein a third of the sub-systems is an analogue conversion chip, and a fourth of the sub-systems is a radio sub-system, and the supply voltage requirements of the four sub-systems progressively decrease from the first sub-system to the fourth sub-system.

4. A computer usable medium as claimed in any one of claims 1 to 3, wherein a respective integrated circuit constitutes each of the sub-systems.

5. A computer usable medium as claimed in any one of claims 1 to 4, wherein a respective integrated circuit constitutes each of the voltage regulators.

6. A computer usable medium as claimed in claim 5, wherein each of the voltage regulators is an LDO voltage regulator.

7. A computer usable medium as claimed in any one of claims 1 to 6, wherein a

PC card constitutes the computer usable medium.

8. A method of controlling voltage supplied by a host system to a plurality of sub-systems associated with a computer usable medium, the method comprising the step of providing a respective voltage regulator between the voltage supply of the host system and the power input of each sub-system, the voltage regulators being configured to match the voltage supplied thereto by the voltage supply of the host system to respective voltage requirements of the sub-systems.