WO2001082089A2 - Modular computer system - Google Patents

Modular computer system Download PDF

Info

Publication number
WO2001082089A2
WO2001082089A2 PCT/US2001/012666 US0112666W WO0182089A2 WO 2001082089 A2 WO2001082089 A2 WO 2001082089A2 US 0112666 W US0112666 W US 0112666W WO 0182089 A2 WO0182089 A2 WO 0182089A2
Authority
WO
WIPO (PCT)
Prior art keywords
module
specified
computer system
interface
data
Prior art date
Application number
PCT/US2001/012666
Other languages
French (fr)
Other versions
WO2001082089A3 (en
Inventor
Frank W. Ahern
Desi Rhoden
Jeff Doss
Charles Mollo
Original Assignee
Mobility Electronics, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mobility Electronics, Inc. filed Critical Mobility Electronics, Inc.
Priority to AU2001257103A priority Critical patent/AU2001257103A1/en
Priority to EP01930580.4A priority patent/EP1275049B1/en
Priority to CA2445711A priority patent/CA2445711C/en
Publication of WO2001082089A2 publication Critical patent/WO2001082089A2/en
Publication of WO2001082089A3 publication Critical patent/WO2001082089A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/4045Coupling between buses using bus bridges where the bus bridge performs an extender function

Definitions

  • the present invention is generally related to computers and data processing systems, and more particularly to computer systems having at least one host processor and connectable to a plurality of peripherals, expansion devices, and /or other computers, including notebook and other portable and handheld computers, storage devices, displays, USB, IEEE 1394, audio, keyboards, mouse's and so forth.
  • PCI bus is pervasive in the industry, but as a parallel data bus is not easily extended over any distance or bridged to other remote PCI based devices due to loading and physical constraints, most notably the inability to extend the PCI bus more than a few inches.
  • Full bridges are known, such as used in traditional laptop computer/docking stations. However, separating the laptop computer from the docking station a significant distance has not been possible.
  • processing power of computer systems has been resident within the traditional computer used by the user because the microprocessor traditionally is directly connected to and resident on the PCI motherboard. Thus, upgrading processing power usually meant significant costs and/or replacing the computer or computer system.
  • the PCI bus is primarily a wide multiplexed address and data bus that provides support for everything from a single data word for every address to very long bursts of data words for a single address, with the implication being that burst data is intended for sequential addresses.
  • the highest performance of the PCI bus comes from the bursts of data, however most PCI devices require reasonable performance for even the smallest single data word operations.
  • Many PCI devices utilize only the single data mode for their transfers, i addition, starting with the implementation of the PCI 2.1 version of the specification, there has been at least pseudo isochronous behavior demanded from the bus placing limits on an individual device's utilization of the bus, thus virtually guaranteeing every device gets a dedicated segment of time on a very regular interval and within a relatively short time period.
  • the fundamental reason behind such operation of the PCI bus is to enable such things as real time audio and video data
  • Typical high speed serial bus operation allows the possibility of all sizes of data transfers across the bus like PCI, but it certainly favors the very long bursts of data unlike PCI.
  • the typical operation of a serial bus includes an extensive header of information for every data transaction on the bus much like Ethernet, which requires on the order of 68 bytes of header of information for every data transaction regardless of length. In other words, every data transaction on Ethernet would have to include 68 bytes of data along with the header information just to approach 50% utilization of the bus. As it turns out Ethernet also requires some guaranteed dead time between operations to "mostly" prevent collisions from other Ethernet devices on the widely disperse bus, and that dead time further reduces the average performance.
  • FiberChannel has such a robust protocol that virtually all other serial protocols can be transmitted across FC completely embedded within the FC protocol, sort of like including the complete family history along with object size, physical location within the room, room measurements, room number, street address, city, zip code, country, planet, galaxy, universe, ... etc. and of course all the same information about the destination location as well, even if all you want to do is move the object to the other side of the same room.
  • Small transfers across many of these protocols while possible, are extremely expensive from a bandwidth point of view and impractical in a bus applications where small transfers are common and would be disproportionally burdened with more high overhead than actual data transfer. Of course the possibility of isochronous operation on the more general serial bus is not very reasonable.
  • split-BridgeTM technology fundamentals are a natural for extending anything that exists within a computer. It basically uses a single-byte of overhead for 32 bits of data and address - actually less when you consider that byte enables, which are not really "overhead", are included as well.
  • PCI bridge First of all is the splitting of a PCI bridge into two separate and distinct pieces.
  • a PCI bridge was never intended to be resident in two separate modules or chips and no mechanism existed to allow the sharing of setup information across two separate and distinct devices.
  • a PCI bridge requires a number of programmable registers that supply information to both ports of a typical device. For the purpose of the following discussion, the two ports are defined into a north and south segment of the complete bridge.
  • the north segment is typically the configuration port of choice and the south side merely takes the information from the registers on the north side and operates accordingly.
  • the problem exists when the north and south portions are physically and spatially separated and none of the register information is available to the south side because all the registers are in the north chip.
  • a typical system solution conceived by the applicant prior to the invention of Split-Bridge TM technology would have been to merely create a separate set of registers in the south chip for configuration of that port. However, merely creating a separate set of registers in the south port would still leave the set up of those registers to the initialization code of the operating system and hence would have required a change to the system software.
  • Split-Bridge TM technology chose to make the physical splitting of the bridge into two separate and spaced devices "transparent" to the system software (in other words, no knowledge to the system software that two devices were in fact behaving as one bridge chip). In order to make the operations transparent, all accesses to the configuration space were encoded, serialized, and
  • the 8 bit to 10 bit encoding of the data on the bus is not new, but follows existing published works.
  • the direct sending of 32 bits of information along with the 4 bits of control or byte enables, along with an additional 4 bits of extension represents a 40 bit for every 36 bits of existing PCI data, address, and control or a flat 10% overhead regardless of the transfer size or duration, and this
  • the present invention achieves technical advantages as a modular computer system having a universal connectivity station adapted to connect and route data via serial data links to a plurality of devices, these serial links and interfaces at each end thereof employing proprietary Split-Bridge TM technology disclosed and claimed in co-pending and commonly assigned patent applications identified as serial number 09/130,057 and 09/130,058, the teachings of which are incorporated herein by reference.
  • the core is the performance module of the modular computer system and may include some or all of the central processing unit (CPU), memory, AGP Graphics, and System Bus Chip adapted to communicably couple these three together or in combination with other items.
  • the UCS communicably couples the processor module via high speed serial links based on the proprietary Split-Bridge TM technology of Mobility Electronics of Phoenix Arizona, the applicant of the present invention, to other computers or to other individual modules such as storage modules including hard disk drives, a user interface module consisting of a keyboard, mouse, monitor and printer, as well as a LAN Module such as any Internet connection or another UCS, another UCS, audiovisual device, LAN storage just to name a few.
  • the UCS is adapted to couple via a Split-Bridge TM technology serial link with a portable or handheld computer or device remotely located from the UCS but still functionally coupled to the modular computer system via the UCS.
  • the UCS and associated Split-Bridge TM technology serial links are all transparent to the modules which can have parallel data busses including those based on PCI or Cardbus architectures.
  • the modular computer system of the present invention including the UCS is a novel approach to computer architecture and upgrade ability.
  • the separate performance module may be selectively upgraded or modified as desired and as technology increases the performance of key components including microprocessor speed, standards, and architectures without necessitating the replacement or modification of the rest of the computer system.
  • the UCS allows the performance module to be upgraded while the rest of the system devices coupled thereto does not need to be modified. Upgrading to single
  • Figure 1 illustrates prior art computer systems depicted as a traditional performance desk top computer shown at 10, and a portable computing device 12, such as a notebook or laptop computer, mechanically coupled to mechanical docking station 14;
  • a portable computing device 12 such as a notebook or laptop computer, mechanically coupled to mechanical docking station 14;
  • FIG 2 is a block diagram of a prior art bridge 16 used to couple two system computing buses, such as used between the portable computing device 12 and the mechanical docking station 14 shown in Figure 1;
  • Figure 3 illustrates the proprietary Split-Bridge TM technology serial communication technology of the applicant enabling high speed serial communications within the modular computer system of the present invention
  • FIG. 4 is a block diagram of the modular computer system of the present invention utilizing a universal connectivity station (UCS) communicably coupled to a plurality of devices via serial links, such as the Split-Bridge TM technology
  • UCS universal connectivity station
  • the Split-Bridge TM technology revolutionizes the status quo for computer systems.
  • the Split-Bridge TM technology does not require the need for custom hardware or custom software to achieve full performance serial communication between devices, including devices having parallel data buses including the PCI bus.
  • the Split-Bridge TM technology appears just like a standard PCI bridge, and all software operating systems and device drivers already take such standard devices into consideration.
  • OS Operating System
  • the modular computing system has simple elegance, allowing the PCI bus which is so pervasive in the computer industry, that possible applications of the initial PCI form of Split- Bridge TM technology are all most limitless.
  • FIG. 4 there is depicted at 20 a modular computer system according to one illustrative embodiment of the present invention.
  • the modular modular computer system according to one illustrative embodiment of the present invention.
  • Each UCS 22 provides input/output, or I/O, capability of the computer or computer system 20, as well as
  • USC 22 includes all possible variations and combinations of port replication and connectivity, including but not limited to the following ports: P/S2, mouse and keyboard, serial, parallel, audio, USB, IEEE 1394, or firewire, SCSI, and the like. Each USC 22 also includes the ability to expand the capability or features of the computer system 20 by adding
  • any type of drive bays including EIDE, USB, and 1394 CD Roms, DVD's, hard drives, tape back up's, ZIP drives®, jazz® drives, and the like.
  • a plurality of interconnecting and interactive devices are communicably coupled to each UCS 22 via respective high speed serial links generally shown at 25 26 based on the proprietary Split-Bridge TM technology.
  • the serial links 26 comprise of a pair of simplex links forms a duplex link interconnecting each end of the Split-Bridge TM technology interfaces
  • the serial links 26 may also employ optical fiber and optical transceivers if desired.
  • the various modules making up modular computer system 20 may include, and a plurality of, but are not limited to, a memory/storage device 30, servers 32 having one or multiple processors arid possibly serving other UCS's 22, as shown, and modular computer systems, remote users and so forth, a display 34, a portable computing device 36, such as a notebook computer, a laptop computer, a portable digital assistant (PDA), and a remote wireless peripheral 38 which may interconnected via a wireless link shown at 40 and implementing the proprietary Split-Bridge TM technology.
  • a memory/storage device 30 may include, and a plurality of, but are not limited to, a memory/storage device 30, servers 32 having one or multiple processors arid possibly serving other UCS's 22, as shown, and modular computer systems, remote users and so forth, a display 34, a portable computing device 36, such as a notebook computer, a laptop computer, a portable digital assistant (PDA), and
  • Examples of remote wireless terminals 38 may include 3 rd generation (3G) devices now being developed and employed, including wireless personal devices having capabilities for voice, data, video and other forms of information which can be unidirectionally or bidirectionally streamed between the remote peripheral 38 and UCS 22.
  • 3G 3 rd generation
  • An appropriate antenna resides at each of the remote peripheral 38 and UCS 22 which are interconnected to respective transceivers communicably coupled to the respective ends of the Split-Bridge TM technology interfaces.
  • multiple UCSs 22 can be integrated to communicate with each other via serially links 26, each UCS 22 locally serving multiple modules.
  • Multiple computers can be connected to a common UCS, or to multiple UCS's.
  • a computer or server room can have rack's of computer processors or servers, each separately connected over a system of up to hundred's of feet, to one or many UCS's located throughout an office or other environment. This allows the desktop to have just a terminal or whatever capabilities the IT manager desires, enhancing security and control.
  • System 20 also provides the ability to simultaneously connect multiple
  • 101950-00057 computers 36 and allows full peer-to-peer communications, allowing the processor module (CPU) 42 to communicate with the portable device computer 36 or to the computer room computers 32, allowing all of these computers to share information and processing capability. This also allows certain of the computers, such as the portable computer 36, to upgrade its processing capability when it is connected to the UCS 22 with other higher capability computers.
  • processor module CPU
  • the modular computer system 20 of the present invention further comprises a processor module 42, which may be remotely positioned from the UCS 22, but for purposes of inclusion, could internally reside with the UCS 22.
  • the processor module 42 from a performance point of view, is the heart and sole of the modular computer system 20 and can be made up of one or more core parts including: the CPU, memory, APG Graphics, and a system bus interface to connect the other 3 together.
  • the processor module 42 operates in conjunction with memory such as a hard disk drive, which can reside within the processor module 42, or be remotely located as shown at 30 if desired.
  • the APG Graphics could be located separately within the system and interconnected via a serial link 26, or even located within UCS 22 if desired.
  • the processor module 42 which may comprise of a high speed microprocessor or microprocessors, digital signal processors (DSP's), and can be upgraded or interchanged from the systems 20 without effecting the other devices or operation of the system, thereby permitting increased performance at a very low cost.
  • Computers today typically require the replacement or upgrading of other devices when the performance portion of the computer system is replaced.
  • the modular computer system 20 of the present invention revolutionizes the computer architectures available by separating out the processor module 42 from
  • Each of the modules 30, 32, 34, 36, and 38 all have functional access and use of the processor module 42 via the UCS 22 over the respective serial links 26 and 40, and from a performance point of view, appear to each of these devices to be hardwired to the processor module 42. That is, the Split-Bridge TM technology links interconnecting each of the devices via the UCS 22 to the processor module 42 is transparent to each device, thus requiring no change to the OS of each device, the format of data transfer therebetween, or any other changes. This is rendered possible by the revolutionary Split-Bridge TM technology.
  • the data module 30 may be customized, portable, and used only by one user. This allows the user to take the portable module 30 with them from location to location, system 20 to system 20.
  • the data module 30 can store each users unique information, and can be accessed and used on any processor module 42 and UCS 22.
  • the Split-Bridge TM technology provides that information from the parallel buses of each device be first loaded into first-in first-out (FIFO) registers before being serialized into frames for transmission over the high speed serial link. Received frames are deserialized and loaded into FIFO registers at the other end thereof, such as UCS 22, for being placed onto the destination bus of the opposing device. Interrupts, error signals and status signals are sent along the serial link.
  • the proprietary Split-Bridge TM technology takes address and data from a bus, one transaction at a time, together with 4 bits that act either as control or byte enable signals. Two or more additional bits may be added to tag each transaction as either an addressing cycle, an acknowledging
  • one or more of the busses in the plurality of devices, as well as in the UCS 22, employ the PCI or PCMCIA standard, although it is contemplated that other bus standards can be used as well.
  • the preferred Split-Bridges TM technology operate with a plurality of configuration registers that is loaded with information specified under the PCI standard.
  • the Split-Bridges TM technology transfer information between busses depending on whether the pending address falls within a range embraced by the configuration registers. This scheme works with devices on the other side of the Split-Bridge TM technology, which can be given unique base addresses two avoid addressing conflicts.
  • the Split-Bridges TM technology may be formed as two separate application-specific integrated circuits (ASICs) joined by a duplex link formed as a pair of simplex links.
  • ASICs application-specific integrated circuits
  • these two integrated ASICs have the same structure, but can act in two different modes in response to a control signal applied to one of its pins.
  • Working with hierarchical busses (primary and secondary busses) these integrated circuits are placed in a mode appropriate for its associated bus.
  • the 101950-00057 preferably has an arbitrator that can grant masters control of the secondary bus.
  • the ASIC can also supply a number of ports to support other devices such as a USB and generic configurable I/O ports, as well as parallel and serial ports.
  • the UCS preferably comprises a PCI bus having a plurality of PC card slots located with the UCS housing.
  • Each PC card slot is provided with a Split-Bridge TM technology interface, and preferably one of the ASICs assembled with a standardized serial connector comprising at least 4 pins, as depicted in the cross referenced commonly assigned patent applications, the teachings of which are incorporated herein by reference.
  • the modular computer system 20 of the present invention derives technical advantages in that the UCS station 22 with its associated interface cards and parallel data bus interconnecting each interface card, is truly functionally transparent to each of the interconnected modules including the memory storage device 30, the server 32, the display 34, the portable computing device 36, the remote wireless peripheral 38, and the processor module 42.
  • This integration of devices into a modular computer system has truly enormous potential and uses depending on the desired needs and requirements of one's computing system.
  • the physical location and proximity of each of the devices forming the modular computer system are no longer strictly limited due to the high speed serial interconnection links of the proprietary Split-Bridge TM technology.
  • Each of the devices can be remotely located, or located in proximity to one another as desired.
  • the display 34 and portable computing device 36 may be resident within one's office, with the UCS 22 in another room, and with the memory storage device 30, server 32, and performance module 42 remotely
  • a plurality of portable computing devices 36 can all be remotely located from UCS 22, and from each other, allowing networking to modular system 20 either through wireless serial links as depicted at 26, or wirelessly as depicted at 40.
  • the proprietary Split-Bridge TM technology presently allows for extended communication distances of 5 meters, but through advancement in technology can continue to be extended. For instance, using optical communication links in place of copper wire simplex links, along with suitable optical transceivers, can yield links that are exceptionally long.
  • Using wireless technology, as depicted at 40, allows a remote peripheral 38 to be located perhaps anywhere in the world, such as by implementing repeaters incorporating the proprietary Split-bridge TM technology high speed serial communication technology. Additional techniques can be used by slowing the transfer rate, and increasing the number of pipes, to achieve link distances of hundreds of feet, and allowing the use of CAT5 cable.

Abstract

A modular computer system (20) including a universal connectivity station (UCS) (22) interconnected to a plurality of remote modules (30, 32, 34, 36, 38, 42) via a plurality of respective high speed serial links (26, 40) such as based on proprietary Split-BridgeTM technology. The plurality modules, including a processor module (42) which may include core parts including a CPU, memory, AGP Graphics, and system bus interface may be remotely located from each of the other modules, including the UCS (22). The present invention achieves technical advantages wherein each module of the modular computer system (20) appear to each device to be interconnected to the other on a parallel bus since the high speed serial links appear transparent. Preferably, although not necessary, each of the modules including the UCS (22) are based on the PCI bus architecture, or the PCMCIA bus architecture, although other bus architectures are well suited to be incorporated using the present invention. The processor module can be upgraded to change or improve the performance of the modular computer system (20) without requiring any changes to the remaining system, thus drastically improving the price to performance trade-offs of the system. Moreover, the operating system (OS) of each module, including both the software and harware, do not need to be changed as the entire modular system (20) is based on a common architecture, such as the PCI or Cardbus bus architecture.

Description

MODULAR COMPUTER SYSTEM
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority of provisional patent application serial number 60/ entitled Split-Bridge Systems, Applications and Methods of
Use filed on April 19, 2000, as well as co-pending and commonly assigned patent applications serial number 09/130,057 filed June 6, 1998, serial number 09/130,058 filed June 6, 1998, and serial number 08/679,131 now issued as US Patent 5,941,965, the teachings of each incorporated herein by reference.
FIELD OF THE INVENTION
The present invention is generally related to computers and data processing systems, and more particularly to computer systems having at least one host processor and connectable to a plurality of peripherals, expansion devices, and /or other computers, including notebook and other portable and handheld computers, storage devices, displays, USB, IEEE 1394, audio, keyboards, mouse's and so forth.
BACKGROUND OF THE INVENTION
Computer systems today are powerful, but are rendered limited in their ability to be divided into modular components due to a variety of technical limitations of today's PCI bus technology. And in their ability to adapt to
101950-00057 changing computing environments. The PCI bus is pervasive in the industry, but as a parallel data bus is not easily extended over any distance or bridged to other remote PCI based devices due to loading and physical constraints, most notably the inability to extend the PCI bus more than a few inches. Full bridges are known, such as used in traditional laptop computer/docking stations. However, separating the laptop computer from the docking station a significant distance has not been possible. Moreover, the processing power of computer systems has been resident within the traditional computer used by the user because the microprocessor traditionally is directly connected to and resident on the PCI motherboard. Thus, upgrading processing power usually meant significant costs and/or replacing the computer or computer system.
PCI
The PCI bus is primarily a wide multiplexed address and data bus that provides support for everything from a single data word for every address to very long bursts of data words for a single address, with the implication being that burst data is intended for sequential addresses. Clearly the highest performance of the PCI bus comes from the bursts of data, however most PCI devices require reasonable performance for even the smallest single data word operations. Many PCI devices utilize only the single data mode for their transfers, i addition, starting with the implementation of the PCI 2.1 version of the specification, there has been at least pseudo isochronous behavior demanded from the bus placing limits on an individual device's utilization of the bus, thus virtually guaranteeing every device gets a dedicated segment of time on a very regular interval and within a relatively short time period. The fundamental reason behind such operation of the PCI bus is to enable such things as real time audio and video data
2
101950-00057 streams to be mixed with other operations on the bus without introducing major conflicts or interruption of data output. Imagine spoken words being broken into small unconnected pieces and you get the picture. Prior to PCI 2.1 these artifacts could and did occur because devices could get on the bus and hold it for indefinite periods of time. Before modification of the spec for version 2.1, there really was no way to guarantee performance of devices on the bus, or to guarantee time slot intervals when devices would get on the bus. Purists may argue that PCI is still theoretically not an isochronous bus, but as in most things in PC engineering, it is close enough.
Traditional High Speed Serial
Typical high speed serial bus operation on the other hand allows the possibility of all sizes of data transfers across the bus like PCI, but it certainly favors the very long bursts of data unlike PCI. The typical operation of a serial bus includes an extensive header of information for every data transaction on the bus much like Ethernet, which requires on the order of 68 bytes of header of information for every data transaction regardless of length. In other words, every data transaction on Ethernet would have to include 68 bytes of data along with the header information just to approach 50% utilization of the bus. As it turns out Ethernet also requires some guaranteed dead time between operations to "mostly" prevent collisions from other Ethernet devices on the widely disperse bus, and that dead time further reduces the average performance.
The typical protocol for a serial bus is much the same as Ethernet with often much longer header information. Virtually all existing serial bus protocol implementations are very general and every block of data comes with everything
3
101950-00057 needed to completely identify it. FiberChannel (FC) has such a robust protocol that virtually all other serial protocols can be transmitted across FC completely embedded within the FC protocol, sort of like including the complete family history along with object size, physical location within the room, room measurements, room number, street address, city, zip code, country, planet, galaxy, universe, ... etc. and of course all the same information about the destination location as well, even if all you want to do is move the object to the other side of the same room. Small transfers across many of these protocols, while possible, are extremely expensive from a bandwidth point of view and impractical in a bus applications where small transfers are common and would be disproportionally burdened with more high overhead than actual data transfer. Of course the possibility of isochronous operation on the more general serial bus is not very reasonable.
Recreating High Speed Serial for PCI
In creating the proprietary Split-Bridge ™ technology, Mobility electronics of Phoenix Arizona, the present applicant, actually had to go back to the drawing board and design a far simpler serial protocol to allow a marriage to the PCI bus, because none of the existing implementations could coexist without substantial loss of performance. For a detailed discussion of Applicant's proprietary Split-Bridge ™ technology, cross reference is made to Applicant's co- pending commonly assigned patent applications identified as serial number 09/130,057 and 09/130,058 both filed June 6, 1998, the teachings of each incorporated herein by reference. The Split-Bridge ™ technology approach is essentially custom fit for PCI and very extensible to all the other peripheral bus protocols under discussion like PCIx, and LDT™ set forth by AMD Corporation.
4
101950-00057 LDT requires a clock link in addition to its data links, and is intended primarily as a motherboard application, wherein Split-Bridge™ technology is primarily intended to enable remote bus recreation. As the speeds of motherboard buses continue to grow faster, Split-Bridge ™ can be readily adapted to support these by increasing the serial bus speed and adding multiple pipes. Split-Bridge ™ technology fundamentals are a natural for extending anything that exists within a computer. It basically uses a single-byte of overhead for 32 bits of data and address - actually less when you consider that byte enables, which are not really "overhead", are included as well.
Armed with the far simpler protocol, all of the attributes of the PCI bus are preserved and made transparent across a high speed serial link at much higher effective bandwidth than any existing serial protocol. The net result is the liberation of a widely used general purpose bus, and the new found ability to separate what were previously considered fundamental inseparable parts of a computer into separate locations. When the most technical reviewers grasp the magnitude of the invention, then the wheels start to turn and the discussions that follow open up a new wealth of opportunities. It now becomes reasonable to explore some of the old fundamentals, like peer-to-peer communication between computers that has been part of the basic PCI specification from the beginning, but never really feasible because of the physical limits of the bus prior to Split-Bridge ™ technology. The simplified single-byte overhead also enables very efficient high speed communication between two computers and could easily be extended beyond PCI.
The proprietary Split-Bridge ™ technology is clearly not "just another high speed link" and distinguishing features that make it different represent novel
5
101950-00057 approaches to solving some long troublesome system architecture issues.
First of all is the splitting of a PCI bridge into two separate and distinct pieces. Conceptually, a PCI bridge was never intended to be resident in two separate modules or chips and no mechanism existed to allow the sharing of setup information across two separate and distinct devices. A PCI bridge requires a number of programmable registers that supply information to both ports of a typical device. For the purpose of the following discussion, the two ports are defined into a north and south segment of the complete bridge.
The north segment is typically the configuration port of choice and the south side merely takes the information from the registers on the north side and operates accordingly. The problem exists when the north and south portions are physically and spatially separated and none of the register information is available to the south side because all the registers are in the north chip. A typical system solution conceived by the applicant prior to the invention of Split-Bridge ™ technology would have been to merely create a separate set of registers in the south chip for configuration of that port. However, merely creating a separate set of registers in the south port would still leave the set up of those registers to the initialization code of the operating system and hence would have required a change to the system software.
Split-Bridge ™ technology, on the other hand, chose to make the physical splitting of the bridge into two separate and spaced devices "transparent" to the system software (in other words, no knowledge to the system software that two devices were in fact behaving as one bridge chip). In order to make the operations transparent, all accesses to the configuration space were encoded, serialized, and
6
101950-00057 "echoed" across the serial link to a second set of relevant registers in the south side. Such transparent echo between halves of a PCI bridge or any other bus bridge is an innovation that significantly enhances the operation of the technology.
Secondly, the actual protocol in the Split-Bridge ™ technology is quite unique and different from the typical state of the art for serial bus operations. Typically transfers are "packetized" into block transfers of variable length. The problem as it relates to PCI is that the complete length of a given transfer must be known before a transfer can start so the proper packet header may be sent.
Earlier attempts to accomplish anything similar to Split-Bridge ™ technology failed because the PCI bus does not inherently know from one transaction to the next when, or if, a transfer will end or how long a block or burst of information will take, hi essence the protocol for the parallel PCI bus (and all other parallel, and or real time busses for that matter) is incompatible with existing protocols for serial buses.
An innovative solution to the problem was to invent a protocol for the serial bus that more or less mimics the protocol on the PCI. With such an invention it is now possible to substantially improve the performance and real time operation here to for not possible with any existing serial bus protocol.
The 8 bit to 10 bit encoding of the data on the bus is not new, but follows existing published works. However, the direct sending of 32 bits of information along with the 4 bits of control or byte enables, along with an additional 4 bits of extension represents a 40 bit for every 36 bits of existing PCI data, address, and control or a flat 10% overhead regardless of the transfer size or duration, and this
7
101950-00057 approach is new and revolutionary. Extending the 4 bit extension to 12 or more bits and including other functionality such as error correction or retransmit functionality is also within the scope of the Split-Bridge ™ technology.
New Applications of the Split-Bridge ™ Technology
Basic Split-Bridge ™ technology was created for the purpose of allowing a low cost, high speed serial data communications between a parallel system bus and remote devices. By taking advantage of the standard and pervasive nature of the PCI bus in many other applications in computing, dramatic improvements in the price performance for other machines is realized. The present invention comprises a revolutionary application rendered possible due to the attributes of applicant' s proprietary Split-Bridge ™ technology.
SUMMARY OF THE INVENTION
The present invention achieves technical advantages as a modular computer system having a universal connectivity station adapted to connect and route data via serial data links to a plurality of devices, these serial links and interfaces at each end thereof employing proprietary Split-Bridge ™ technology disclosed and claimed in co-pending and commonly assigned patent applications identified as serial number 09/130,057 and 09/130,058, the teachings of which are incorporated herein by reference.
The present invention derives technical advantages as a modular computer
8
101950-00057 system by separating into two or more spatially separate and distinct pieces, a computer core and a universal connectivity station (UCS). The core is the performance module of the modular computer system and may include some or all of the central processing unit (CPU), memory, AGP Graphics, and System Bus Chip adapted to communicably couple these three together or in combination with other items. The UCS communicably couples the processor module via high speed serial links based on the proprietary Split-Bridge ™ technology of Mobility Electronics of Phoenix Arizona, the applicant of the present invention, to other computers or to other individual modules such as storage modules including hard disk drives, a user interface module consisting of a keyboard, mouse, monitor and printer, as well as a LAN Module such as any Internet connection or another UCS, another UCS, audiovisual device, LAN storage just to name a few. In addition, the UCS is adapted to couple via a Split-Bridge ™ technology serial link with a portable or handheld computer or device remotely located from the UCS but still functionally coupled to the modular computer system via the UCS. The UCS and associated Split-Bridge ™ technology serial links are all transparent to the modules which can have parallel data busses including those based on PCI or Cardbus architectures.
The modular computer system of the present invention including the UCS is a novel approach to computer architecture and upgrade ability. Advantageously, the separate performance module may be selectively upgraded or modified as desired and as technology increases the performance of key components including microprocessor speed, standards, and architectures without necessitating the replacement or modification of the rest of the computer system. The UCS allows the performance module to be upgraded while the rest of the system devices coupled thereto does not need to be modified. Upgrading to single
101950-00057 or multiple processors in the performance module or modules is readily possible. Whole organizations can standardize to a single UCS regardless of the type of performance or portability required by the users, thus addressing for the first time the means of systems level support, hi security sensitivity environments, it is possible to separate the "stored media" or computer central processor, or any other component of the system and connectivity from the operators, and still maintain the speed element so important in today's businesses.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 illustrates prior art computer systems depicted as a traditional performance desk top computer shown at 10, and a portable computing device 12, such as a notebook or laptop computer, mechanically coupled to mechanical docking station 14;
Figure 2 is a block diagram of a prior art bridge 16 used to couple two system computing buses, such as used between the portable computing device 12 and the mechanical docking station 14 shown in Figure 1;
Figure 3 illustrates the proprietary Split-Bridge ™ technology serial communication technology of the applicant enabling high speed serial communications within the modular computer system of the present invention; and
Figure 4 is a block diagram of the modular computer system of the present invention utilizing a universal connectivity station (UCS) communicably coupled to a plurality of devices via serial links, such as the Split-Bridge ™ technology
10
101950-00057 serial links employed using fixed wire, optical, or wireless communication links.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring to Figure 3, there is depicted the proprietary Split-Bridge ™ technology serial communications technology of the present applicant, discussed in great detail in commonly assigned US patent applications serial number 09/130,057 filed June 6, 1998, and serial number 09/130,058 also filed June 6, 1998 the teachings of which are incorporated herein by reference.
Applicant Split-Bridge ™ technology revolutionizes the status quo for computer systems. The Split-Bridge ™ technology does not require the need for custom hardware or custom software to achieve full performance serial communication between devices, including devices having parallel data buses including the PCI bus. hi fact, for each device in a modular computer system, the Split-Bridge ™ technology appears just like a standard PCI bridge, and all software operating systems and device drivers already take such standard devices into consideration. By utilizing standard buses within each device operating within the modular computer system, each device does not require any additional support from the Operating System (OS) software. The modular computing system has simple elegance, allowing the PCI bus which is so pervasive in the computer industry, that possible applications of the initial PCI form of Split- Bridge ™ technology are all most limitless.
Originally implemented in PCI, there is nothing fundamental that ties the
Split-Bridge ™ technology to PCI, and thus, the Split-Bridge ™ technology can migrate as bus architectures grow and migrate. The 64 bit PCI is compatible with
11
101950-00057 the Split-Bridge ™ technology, as is future PCrx and/or LDT or other bus technologies that are currently under consideration in the industry and which are straight forward transitions of the Split-Bridge ™ technology. Implementations with other protocols or other possible and natural evolutions of the Split-Bridge 5 ™ technology, including digital video (DV) technology that can be streamed over the high-speed serial link.
Referring to Figure 4, there is depicted at 20 a modular computer system according to one illustrative embodiment of the present invention. The modular
10 computer system 20 is based around one or more universal connectivity stations generally shown at 22 each having a plurality of interface ports 24 which are preferably based on the proprietary Split-Bridge ™ technology of the present applicant, Mobility Electronics of Phoenix Arizona. Each UCS 22 provides input/output, or I/O, capability of the computer or computer system 20, as well as
15 modular expansion capability and features. USC 22 includes all possible variations and combinations of port replication and connectivity, including but not limited to the following ports: P/S2, mouse and keyboard, serial, parallel, audio, USB, IEEE 1394, or firewire, SCSI, and the like. Each USC 22 also includes the ability to expand the capability or features of the computer system 20 by adding
20 any type of drive bays, including EIDE, USB, and 1394 CD Roms, DVD's, hard drives, tape back up's, ZIP drives®, Jazz® drives, and the like.
A plurality of interconnecting and interactive devices are communicably coupled to each UCS 22 via respective high speed serial links generally shown at 25 26 based on the proprietary Split-Bridge ™ technology. In the hardwire embodiment, the serial links 26 comprise of a pair of simplex links forms a duplex link interconnecting each end of the Split-Bridge ™ technology interfaces
12
101950-00057 as shown. The serial links 26 may also employ optical fiber and optical transceivers if desired. The various modules making up modular computer system 20 may include, and a plurality of, but are not limited to, a memory/storage device 30, servers 32 having one or multiple processors arid possibly serving other UCS's 22, as shown, and modular computer systems, remote users and so forth, a display 34, a portable computing device 36, such as a notebook computer, a laptop computer, a portable digital assistant (PDA), and a remote wireless peripheral 38 which may interconnected via a wireless link shown at 40 and implementing the proprietary Split-Bridge ™ technology. Examples of remote wireless terminals 38 may include 3rd generation (3G) devices now being developed and employed, including wireless personal devices having capabilities for voice, data, video and other forms of information which can be unidirectionally or bidirectionally streamed between the remote peripheral 38 and UCS 22. An appropriate antenna resides at each of the remote peripheral 38 and UCS 22 which are interconnected to respective transceivers communicably coupled to the respective ends of the Split-Bridge ™ technology interfaces.
Moreover, multiple UCSs 22 can be integrated to communicate with each other via serially links 26, each UCS 22 locally serving multiple modules. Multiple computers can be connected to a common UCS, or to multiple UCS's. For example, a computer or server room can have rack's of computer processors or servers, each separately connected over a system of up to hundred's of feet, to one or many UCS's located throughout an office or other environment. This allows the desktop to have just a terminal or whatever capabilities the IT manager desires, enhancing security and control.
System 20 also provides the ability to simultaneously connect multiple
13
101950-00057 computers 36 and allows full peer-to-peer communications, allowing the processor module (CPU) 42 to communicate with the portable device computer 36 or to the computer room computers 32, allowing all of these computers to share information and processing capability. This also allows certain of the computers, such as the portable computer 36, to upgrade its processing capability when it is connected to the UCS 22 with other higher capability computers.
Still referring to Figure 4, the modular computer system 20 of the present invention further comprises a processor module 42, which may be remotely positioned from the UCS 22, but for purposes of inclusion, could internally reside with the UCS 22. The processor module 42, from a performance point of view, is the heart and sole of the modular computer system 20 and can be made up of one or more core parts including: the CPU, memory, APG Graphics, and a system bus interface to connect the other 3 together. The processor module 42 operates in conjunction with memory such as a hard disk drive, which can reside within the processor module 42, or be remotely located as shown at 30 if desired. The APG Graphics could be located separately within the system and interconnected via a serial link 26, or even located within UCS 22 if desired.
Advantageously, the processor module 42 which may comprise of a high speed microprocessor or microprocessors, digital signal processors (DSP's), and can be upgraded or interchanged from the systems 20 without effecting the other devices or operation of the system, thereby permitting increased performance at a very low cost. Computers today typically require the replacement or upgrading of other devices when the performance portion of the computer system is replaced. The modular computer system 20 of the present invention revolutionizes the computer architectures available by separating out the processor module 42 from
14
101950-00057 the rest of the computer system 20. Each of the modules 30, 32, 34, 36, and 38 all have functional access and use of the processor module 42 via the UCS 22 over the respective serial links 26 and 40, and from a performance point of view, appear to each of these devices to be hardwired to the processor module 42. That is, the Split-Bridge ™ technology links interconnecting each of the devices via the UCS 22 to the processor module 42 is transparent to each device, thus requiring no change to the OS of each device, the format of data transfer therebetween, or any other changes. This is rendered possible by the revolutionary Split-Bridge ™ technology.
Another advantage of computer system 20 is that the data module 30 may be customized, portable, and used only by one user. This allows the user to take the portable module 30 with them from location to location, system 20 to system 20. The data module 30 can store each users unique information, and can be accessed and used on any processor module 42 and UCS 22.
As discussed in considerable detail in the cross-referenced and commonly assigned patent applications, the Split-Bridge ™ technology provides that information from the parallel buses of each device be first loaded into first-in first-out (FIFO) registers before being serialized into frames for transmission over the high speed serial link. Received frames are deserialized and loaded into FIFO registers at the other end thereof, such as UCS 22, for being placed onto the destination bus of the opposing device. Interrupts, error signals and status signals are sent along the serial link. Briefly, the proprietary Split-Bridge ™ technology takes address and data from a bus, one transaction at a time, together with 4 bits that act either as control or byte enable signals. Two or more additional bits may be added to tag each transaction as either an addressing cycle, an acknowledging
15
101950-00057 of a non-posted write, a data burst, end of data burst or cycle. If these transactions are posted writes they can be rapidly stored in a FIFO register before being encoded into a number of frames that are sent serially over the link. When prefetched reads are allowed, the FIFO register can store pre-fetched data in case the initiator requests it. For single cycle writes or other transactions that must await a response, the bridge can immediately signal the initiator to retry the request, even before the request is passed to the target.
In the preferred embodiment of the modular computer system of the present invention, one or more of the busses in the plurality of devices, as well as in the UCS 22, employ the PCI or PCMCIA standard, although it is contemplated that other bus standards can be used as well. The preferred Split-Bridges ™ technology operate with a plurality of configuration registers that is loaded with information specified under the PCI standard. The Split-Bridges ™ technology transfer information between busses depending on whether the pending address falls within a range embraced by the configuration registers. This scheme works with devices on the other side of the Split-Bridge ™ technology, which can be given unique base addresses two avoid addressing conflicts.
As disclosed in great detail in the co-pending and cross-referenced commonly assigned patent applications, the Split-Bridges ™ technology may be formed as two separate application-specific integrated circuits (ASICs) joined by a duplex link formed as a pair of simplex links. Preferably, these two integrated ASICs have the same structure, but can act in two different modes in response to a control signal applied to one of its pins. Working with hierarchical busses (primary and secondary busses) these integrated circuits are placed in a mode appropriate for its associated bus. The ASIC associated with the secondary bus
16
101950-00057 preferably has an arbitrator that can grant masters control of the secondary bus. The ASIC can also supply a number of ports to support other devices such as a USB and generic configurable I/O ports, as well as parallel and serial ports.
Referring now to the schematic diagram of UCS 22 in Figure 5, the UCS preferably comprises a PCI bus having a plurality of PC card slots located with the UCS housing. Each PC card slot is provided with a Split-Bridge ™ technology interface, and preferably one of the ASICs assembled with a standardized serial connector comprising at least 4 pins, as depicted in the cross referenced commonly assigned patent applications, the teachings of which are incorporated herein by reference.
The modular computer system 20 of the present invention derives technical advantages in that the UCS station 22 with its associated interface cards and parallel data bus interconnecting each interface card, is truly functionally transparent to each of the interconnected modules including the memory storage device 30, the server 32, the display 34, the portable computing device 36, the remote wireless peripheral 38, and the processor module 42. This integration of devices into a modular computer system has truly enormous potential and uses depending on the desired needs and requirements of one's computing system. However, the physical location and proximity of each of the devices forming the modular computer system are no longer strictly limited due to the high speed serial interconnection links of the proprietary Split-Bridge ™ technology. Each of the devices can be remotely located, or located in proximity to one another as desired. For instance, the display 34 and portable computing device 36 may be resident within one's office, with the UCS 22 in another room, and with the memory storage device 30, server 32, and performance module 42 remotely
17
101950-00057 located in yet still another room or location. Moreover, a plurality of portable computing devices 36 can all be remotely located from UCS 22, and from each other, allowing networking to modular system 20 either through wireless serial links as depicted at 26, or wirelessly as depicted at 40.
The proprietary Split-Bridge ™ technology presently allows for extended communication distances of 5 meters, but through advancement in technology can continue to be extended. For instance, using optical communication links in place of copper wire simplex links, along with suitable optical transceivers, can yield links that are exceptionally long. Using wireless technology, as depicted at 40, allows a remote peripheral 38 to be located perhaps anywhere in the world, such as by implementing repeaters incorporating the proprietary Split-bridge ™ technology high speed serial communication technology. Additional techniques can be used by slowing the transfer rate, and increasing the number of pipes, to achieve link distances of hundreds of feet, and allowing the use of CAT5 cable.
Though the invention has been described with respect to a specific preferred embodiment, many variations and modifications will become apparent to those skilled in the art upon reading the present application. It is therefore the intention that the appended claims be interpreted as broadly as possible in view of the prior art to include all such variations and modifications.
18
101950-00057

Claims

WE CLAIM
1. A computer system, comprising: a first connectivity station having a plurality of interfaces including a first and a second interface, each said interface adapted to exchange serial data thereacross; a first module having an interface coupled to the first connectivity station first interface via a serial link; a computing module including a processor and a system bus coupled to a computing module interface, said computing module interface coupled to said first connectivity station second interface via a serial link; and wherein said first module and the computing module serially transfer data therebetween via said first connectivity station without handshaking or packetizing the serial data.
2. The modular computer system as specified in Claim 1 wherein said interfaces comprise Split-Bridge ™ technology interfaces.
3. The modular computer system as specified in Claim 1 wherein said computing module comprises a CPU, memory, AGP Graphics, and a system bus interface coupled thereto.
4. The modular computer system as specified in Claim 1 wherein said first connectivity station comprises a third said interface, further comprising a second module having an interface coupled to said first connectivity station third interface via a serial link and adapted to serially transfer data with said computing module or said first module.
19
101950-00057
5. The modular computer system as specified in Claim 1 wherein said first module comprises a computer.
6. The modular computer system as specified in Claim 5 wherein said second module also comprises a computer.
7. The modular computer system as specified in Claim 5 wherein both said first and second modules are each selected from a group comprising of: notebook computer, laptop computer, PDA, wireless accessory and storage device.
8. The modular computer system as specified in Claim 1 wherein said first connectivity station further comprises a third said interface adapted to exchange serial data with a said first module selected from a group comprising of: a disk drive, a keyboard, a mouse, a monitor, a printer, and an Internet connection.
9. The modular computer system as specified in Claim 1 wherein said computing module is separated from said first connectivity station by a distance of at least several meters.
10. The modular computer system as specified in Claim 1 further comprising a second connectivity station coupled to said first connectivity station and adapted to serially transfer data threrebetween without handshaking or packetizing the serial data.
20
101950-00057
11. The modular computer system as specified in Claim 10 further comprising a third module having an interface coupled to the second comiectivity station and adapted to serially transfer data therebetween without handshaking or packetizing the serial data.
12. The modular computer system as specified in Claim 11 wherein said third module is selected from the group comprising a notebook computer, a laptop computer, PDA, wireless accessory, and storage device.
13. A computer system, comprising: a connectivity station having a plurality of interfaces including a first and a second interface, each said mterface adapted to exchange serial data between other said interfaces; a first module having an interface coupled to the connectivity station first interface via a serial link; a computing module including a processor and a system bus coupled to a computing module interface, said computing module interface coupled to said connectivity station second interface via a serial link; and wherein said first module and the computing module serially communicate data therebetween via said connectivity station by streaming the serial data without first packetizing the serial data.
14. The modular computer system as specified in Claim 13 wherein said first module is based on a parallel data bus architecture.
15. The modular computer system as specified in Claim 14 wherein said parallel data bus is a PCI data bus.
21
101950-00057
16. The modular computer system as specified in Claim 14 wherein said parallel data bus is a Cardbus data bus.
17. The modular computer system as specified in Claim 13 wherein said 5 interfaces comprise Split-Bridge ™ technology interfaces.
18. The modular computer system as specified in Claim 13 wherein said computing module comprises a CPU, memory, AGP Graphics, and a system bus chip coupled thereto.
10
19. The modular computer system as specified in Claim 13 wherein said connectivity station comprises a third said interface, further comprising a second module having an interface coupled to said connectivity station third interface via a serial link and adapted to serially communicate with said computing module or
15 said first module.
20. The modular computer system as specified in Claim 13 wherein said first module comprises a computer.
20 21. The modular computer system as specified in Claim 20 wherein said second module also comprises a computer.
22. The modular computer system as specified in Claim 13 wherein both said first and second modules are each selected from a group comprising of: notebook 25 computer, laptop computer, PDA, wireless accessory and storage module.
22
101950-00057
23. The modular computer system as specified in Claim 13 wherein said connectivity station further comprises a third said interface adapted to exchange serial data with a module selected from a group comprising of: a disk drive, a keyboard, a mouse, a monitor, a printer, and an Internet 5 connection.
24. The modular computer system as specified in Claim 10 wherein said computing module is separated from said connectivity station by a distance of at least several meters.
10
25. A method of exchanging data in a modular computer system, comprising the steps of: a) converting parallel data at a first module to serial data without packetizing the serial data or requiring handshaking; 15 b) receiving said serial data at a connectivity station; and c) said connectivity station directing said serial data to a second module.
26. The method as specified in Claim 25 further comprising the step of said second module converting said received serial data to parallel data without
20 requiring handshaking with said first module.
27. The method as specified in Claim 25 further comprising the step of performing said step a) using Split-Bridge ™ technology.
25 28. The method as specified in Claim 25 further comprising the step of said first module comprising a portable computing device.
23
101950-00057
29. The method as specified in Claim 26 wherein said second module comprises a computing module including a processor and a system bus.
30. The method as specified in Claim 29 wherein said system bus comprises a 5 parallel data bus.
31. The method as specified in Claim 26 further comprising the step of using Split-Bridge ™ technology to communicate said parallel data from said first module to said computing module via said connectivity station.
10
32. The method as specified in Claim 31 wherein said connectivity station is functionally transparent to said first module.
33. The method as specified in Claim 32 wherein said connectivity station is 15 functionally transparent to said second module.
34. The method as specified in Claim 33 wherein said first module has a PCI data bus.
20 35. The method as specified in Claim 33 wherein said second module has a PCI data bus.
36. The method as specified in Claim 33 wherein said serial data is transferred via said connectivity station at a data rate of at least 1.0 GHZ.
25
37. The method as specified in Claim 25 wherein said serial data is transferred via a wireless link.
24
101950-00057
38. The method as specified in Claim 25 wherein said serial data is transferred via an optical link.
39. The method as specified in Claim 38 wherein said serial data is transferred via a simplex link.
40. A computer system, comprising: a first module having a first interface; and a second module having a second interface connected to said first interface and adapted to transfer serial data therebetween without handshaking or packetizing the serial data, wherein at least one said module comprises a computing module.
41. The computer system as specified in Claim 40, further comprising a third module coupled to said first interface and said second interface.
42. The computer system as specified in Claim 40 wherein both said first module and said second module comprise a computing module, said first and second modules each adapted to transfer serial data therebetween without handshaking or packetizing the serial data.
43. The computer system as specified in Claim 40 wherein said first module comprises a computing module and said second module comprises a common storage module.
25
101950-00057
44. The computer system as specified in Claim 40 further comprising a third module coupled to said second module adapted to serially access data stored therebetween without handshaking or packetizing the serial data.
26
101950-00057
PCT/US2001/012666 2000-04-19 2001-04-19 Modular computer system WO2001082089A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU2001257103A AU2001257103A1 (en) 2000-04-19 2001-04-19 Modular computer system
EP01930580.4A EP1275049B1 (en) 2000-04-19 2001-04-19 Modular computer system
CA2445711A CA2445711C (en) 2000-04-19 2001-04-19 Modular computer system

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US19831700P 2000-04-19 2000-04-19
US60/198,317 2000-04-19
US09/559,677 US6594719B1 (en) 2000-04-19 2000-04-27 Extended cardbus/pc card controller with split-bridge ™technology
US09/559,677 2000-04-27

Publications (2)

Publication Number Publication Date
WO2001082089A2 true WO2001082089A2 (en) 2001-11-01
WO2001082089A3 WO2001082089A3 (en) 2002-01-10

Family

ID=26893664

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2001/012666 WO2001082089A2 (en) 2000-04-19 2001-04-19 Modular computer system
PCT/US2001/012678 WO2001082090A2 (en) 2000-04-19 2001-04-19 Extended cardbus/pc card controller with split-bridge technology

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US2001/012678 WO2001082090A2 (en) 2000-04-19 2001-04-19 Extended cardbus/pc card controller with split-bridge technology

Country Status (7)

Country Link
US (2) US6594719B1 (en)
EP (3) EP1801704A3 (en)
AT (1) ATE352066T1 (en)
AU (2) AU2001257103A1 (en)
CA (2) CA2445716C (en)
DE (1) DE60126074T2 (en)
WO (2) WO2001082089A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7908623B2 (en) 2004-05-12 2011-03-15 Matrox Electronic Systems Ltd. Set top box for PC/HDTV multimedia center

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7734852B1 (en) * 1998-08-06 2010-06-08 Ahern Frank W Modular computer system
US6594719B1 (en) 2000-04-19 2003-07-15 Mobility Electronics Inc. Extended cardbus/pc card controller with split-bridge ™technology
US6748458B2 (en) * 2001-08-31 2004-06-08 Hewlett-Packard Development Company, L.P. Modular input/output expansion system for an external computer
US6813667B2 (en) * 2001-09-05 2004-11-02 Hewlett-Packard Development Company, L.P. Bus extender and formatter apparatus and methods
US6990549B2 (en) * 2001-11-09 2006-01-24 Texas Instruments Incorporated Low pin count (LPC) I/O bridge
TWI226552B (en) * 2003-11-20 2005-01-11 Rdc Semiconductor Co Ltd Bus integrating system
US20050125357A1 (en) * 2003-12-09 2005-06-09 Saadat Abbas S. Secure integrated media center
EP1659499A1 (en) * 2004-11-16 2006-05-24 RDC Semiconductor Co., Ltd. Bus integrating system
US7769939B2 (en) * 2006-06-26 2010-08-03 Thomson Licensing Apparatus and method for interfacing electronic devices
WO2009124069A1 (en) * 2008-04-02 2009-10-08 Marvell World Trade Ltd. Reduced power transmission
US9712459B1 (en) 2010-01-27 2017-07-18 Marvell International Ltd. Low-to-high speed cut-through communication
US10225290B2 (en) * 2016-07-15 2019-03-05 Genband Us Llc Systems and methods for extending DSP capability of existing computing devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009130057A1 (en) 2008-04-24 2009-10-29 Nuovo Pignone S.P.A. Packing cup for a reciprocating compressor
WO2009130058A1 (en) 2008-04-22 2009-10-29 Forschungsverbund Berlin E.V. Method for producing a semiconductor device with an insulating layer applied in situ

Family Cites Families (175)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800097A (en) 1972-09-15 1974-03-26 Gte Automatic Electric Lab Inc Bus system for interconnecting systems of a communication switching system
US4112369A (en) 1976-04-09 1978-09-05 Digital Data, Inc. Secure SCA broadcasting system including subscriber actuated portable receiving terminals
US4413319A (en) 1981-03-09 1983-11-01 Allen-Bradley Company Programmable controller for executing block transfer with remote I/O interface racks
US4504927A (en) 1982-09-08 1985-03-12 Allen-Bradley Company Programmable controller with expandable I/O interface circuitry
JPS59184903U (en) 1983-05-28 1984-12-08 ユニチカ株式会社 Rectifier net for settling tank
US4535421A (en) 1983-07-05 1985-08-13 Pitney Bowes Inc. Universal real time transparent asynchronous serial/echoplex converter
US4591660A (en) * 1983-10-25 1986-05-27 At&T Bell Laboratories Common control audio decryptor
US4882702A (en) 1986-03-31 1989-11-21 Allen-Bradley Company, Inc. Programmable controller with I/O expansion module located in one of I/O module positions for communication with outside I/O modules
US5134702A (en) 1986-04-21 1992-07-28 Ncr Corporation Serial-to-parallel and parallel-to-serial converter
US4787029A (en) 1986-09-29 1988-11-22 Gte Communication Systems Corporation Level converting bus extender with subsystem selection signal decoding enabling connection to microprocessor
US4901308A (en) 1986-12-08 1990-02-13 Dsc Communications Corporation Digital bridge for a time slot interchange digital switched matrix
US5038320A (en) 1987-03-13 1991-08-06 International Business Machines Corp. Computer system with automatic initialization of pluggable option cards
DD266436B3 (en) 1987-12-11 1993-02-04 Jenoptik Jena Gmbh SYSTEMBUSER EXPANSION FOR COUPLING MULTIMASTER-AFFORDABLE MULTI-SYSTEMS
US4954949A (en) 1988-02-05 1990-09-04 Commodore-Amiga, Inc. Universal connector device for bus networks in host computer/co-processor computer system
US5517623A (en) 1988-05-05 1996-05-14 International Business Machines Corporation Flexible entry level or advanced level computer system
US4961140A (en) 1988-06-29 1990-10-02 International Business Machines Corporation Apparatus and method for extending a parallel synchronous data and message bus
US5111423A (en) 1988-07-21 1992-05-05 Altera Corporation Programmable interface for computer system peripheral circuit card
JPH02140852A (en) 1988-11-22 1990-05-30 Hitachi Ltd Dma transfer controller
US5301349A (en) 1988-12-28 1994-04-05 Kabushiki Kaisha Toshiba Single chip computer having ground wire formed immediately parallel a data bus and drivers formed directly under the data bus for high speed data transfer
US4959833A (en) 1989-03-08 1990-09-25 Ics Electronics Corporation Data transmission method and bus extender
JPH031429A (en) 1989-05-29 1991-01-08 Mitsubishi Electric Corp Electron gun for color television picture tube
US4941845A (en) 1989-06-07 1990-07-17 Traveling Software, Inc. Data transfer cable
US4969830A (en) 1989-06-12 1990-11-13 Grid Systems Corporation Connection between portable computer components
US5191657A (en) 1989-11-09 1993-03-02 Ast Research, Inc. Microcomputer architecture utilizing an asynchronous bus between microprocessor and industry standard synchronous bus
US5274711A (en) 1989-11-14 1993-12-28 Rutledge Janet C Apparatus and method for modifying a speech waveform to compensate for recruitment of loudness
US5237690A (en) 1990-07-06 1993-08-17 International Business Machines Corporation System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options
US5357621A (en) 1990-09-04 1994-10-18 Hewlett-Packard Company Serial architecture for memory module control
CA2051029C (en) 1990-11-30 1996-11-05 Pradeep S. Sindhu Arbitration of packet switched busses, including busses for shared memory multiprocessors
US5191653A (en) 1990-12-28 1993-03-02 Apple Computer, Inc. Io adapter for system and io buses having different protocols and speeds
US5524252A (en) 1991-04-19 1996-06-04 International Business Machines Corporation Personal computer system combined with an adapter for networks having varying characteristics, and adapter for coupling a personal computer to such networks
JP2744865B2 (en) 1991-04-30 1998-04-28 インターナショナル・ビジネス・マシーンズ・コーポレイション Serial channel adapter
US5313589A (en) 1991-05-15 1994-05-17 Ibm Corporation Low level device interface for direct access storage device including minimum functions and enabling high data rate performance
US5187645A (en) 1991-06-07 1993-02-16 Ergo Computing, Inc. Portable computer with docking connector for peripheral devices
JP3253960B2 (en) 1991-07-18 2002-02-04 ワーナー−ランバート・カンパニー Razor head with variable shaving shape
US5335329A (en) 1991-07-18 1994-08-02 Texas Microsystems, Inc. Apparatus for providing DMA functionality to devices located in a bus expansion chassis
US5469545A (en) 1991-10-03 1995-11-21 Compaq Computer Corp. Expandable communication system with data flow control
EP0558770A1 (en) 1992-02-29 1993-09-08 International Business Machines Corporation A hot pluggable electrical circuit
US5377184A (en) 1992-03-02 1994-12-27 International Business Machines Corporation Method of controlling TWA link in a communications adapter by monitoring buffer fill levels
US5475818A (en) 1992-03-18 1995-12-12 Aeg Transportation Systems, Inc. Communications controller central processing unit board
US5506964A (en) 1992-04-16 1996-04-09 International Business Machines Corporation System with multiple interface logic circuits including arbitration logic for individually linking multiple processing systems to at least one remote sub-system
US5634080A (en) 1992-06-29 1997-05-27 Elonex Ip Holdings, Ltd. Hand-held portable computer having an electroluminescent flat-panel display with pixel elements at right angles to the plane of the display and an excitation direction parallel to the plane of the display
JPH0628307A (en) 1992-07-06 1994-02-04 Toshiba Corp Bus controller
WO1994002973A1 (en) 1992-07-24 1994-02-03 Berg Technology, Inc. Apparatus for connecting computer devices
EP0588030A3 (en) * 1992-09-17 1995-01-25 Ibm Master microchannel apparatus for converting to switch architecture.
US5335326A (en) 1992-10-01 1994-08-02 Xerox Corporation Multichannel FIFO device channel sequencer
US5430847A (en) 1992-10-22 1995-07-04 International Business Machines Corporation Method and system for extending system buses to external devices
US5497498A (en) 1992-11-05 1996-03-05 Giga Operations Corporation Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformation
US6157967A (en) 1992-12-17 2000-12-05 Tandem Computer Incorporated Method of data communication flow control in a data processing system using busy/ready commands
US5507002A (en) 1992-12-24 1996-04-09 At&T Global Information Solutions Company Peripheral component interconnect special cycle protocol using soft message IDS
US5373149A (en) 1993-02-01 1994-12-13 At&T Bell Laboratories Folding electronic card assembly
US5579489A (en) 1993-02-10 1996-11-26 Elonex I.P. Holdings, Ltd. Hand-held portable computer having capability for external expansion of an internal bus
US5457785A (en) 1993-02-10 1995-10-10 Elonex Technologies, Inc. CPU-independent and device-driver transparent system for translating a computer's internal bus signals onto an intermediate bus and further translating onto an expansion bus
US5530895A (en) 1993-02-25 1996-06-25 Microsoft Corporation System and method for computer interface board identification by serially comparing identification address bits and asserting complementary logic patterns for each match
US5325491A (en) 1993-04-13 1994-06-28 International Business Machines Corporation Method and apparatus for extending a computer bus
US5542055A (en) 1993-05-28 1996-07-30 International Business Machines Corp. System for counting the number of peripheral buses in each hierarch connected to primary bus for creating map of peripheral buses to locate peripheral devices
US5522050A (en) 1993-05-28 1996-05-28 International Business Machines Corporation Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus
US5452180A (en) 1993-07-15 1995-09-19 Dell Usa, L.P. Docking apparatus for a portable data processing unit including an arcuate support member with a card extension pivotally mounted on a base member
US5477415A (en) 1993-11-12 1995-12-19 Texas Instruments Incorporated Automatic computer docking station having a motorized tray, cammed side connectors, motorized side connectors, and locking and unlocking guide pins
JPH07210537A (en) 1993-12-10 1995-08-11 Advanced Micro Devicds Inc Computer system
US5540597A (en) 1993-12-15 1996-07-30 International Business Machines Corporation All flex PCMCIA-format cable
US5446869A (en) 1993-12-30 1995-08-29 International Business Machines Corporation Configuration and RAM/ROM control of PCI extension card residing on MCA adapter card
US5611053A (en) 1994-01-21 1997-03-11 Advanced Micro Devices, Inc. Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers
US5632020A (en) 1994-03-25 1997-05-20 Advanced Micro Devices, Inc. System for docking a portable computer to a host computer without suspending processor operation by a docking agent driving the bus inactive during docking
US5483020A (en) 1994-04-12 1996-01-09 W. L. Gore & Associates, Inc. Twin-ax cable
SE501984C2 (en) 1994-04-18 1995-07-03 Kvaser Consultant Ab Serial bus connection equipment eliminating functional interference - couples main transmitter and receiver units divided into sub-groups enabling high speed communication
US5579491A (en) 1994-07-07 1996-11-26 Dell U.S.A., L.P. Local proactive hot swap request/acknowledge system
US5555510A (en) 1994-08-02 1996-09-10 Intel Corporation Automatic computer card insertion and removal algorithm
US5548730A (en) 1994-09-20 1996-08-20 Intel Corporation Intelligent bus bridge for input/output subsystems in a computer system
US5572688A (en) 1994-09-30 1996-11-05 Tyan Computer Corporation Primary bus processing element with multifunction interconnection to secondary bus
US5671421A (en) 1994-12-07 1997-09-23 Intel Corporation Serial interrupt bus protocol
US5495569A (en) 1994-12-30 1996-02-27 Compaq Computer Corp. Circuit for ensuring that a local interrupt controller in a microprocessor is powered up active
US5736968A (en) 1995-02-03 1998-04-07 Mind Path Technologies, Inc. Computer controlled presentation system
AU707588B2 (en) 1995-03-07 1999-07-15 Mobility Electronics, Inc. System and method for expansion of a computer
US5799207A (en) 1995-03-28 1998-08-25 Industrial Technology Research Institute Non-blocking peripheral access architecture having a register configure to indicate a path selection for data transfer between a master, memory, and an I/O device
US5793996A (en) 1995-05-03 1998-08-11 Apple Computer, Inc. Bridge for interconnecting a computer system bus, an expansion bus and a video frame buffer
US5608884A (en) 1995-05-17 1997-03-04 Dell Usa, L.P. Commonly housed multiple processor type computing system and method of manufacturing the same
US5572525A (en) 1995-05-31 1996-11-05 National Instruments Corporation GPIB extender with find listener protocol capabilities
US5694556A (en) 1995-06-07 1997-12-02 International Business Machines Corporation Data processing system including buffering mechanism for inbound and outbound reads and posted writes
US5590377A (en) 1995-06-07 1996-12-31 Ast Research, Inc. Automatic control of distributed DMAs in a PCI bus system supporting dual ISA buses
US5832279A (en) 1995-06-07 1998-11-03 Lsi Logic Corporation Advanced programmable interrupt controller (APIC) with high speed serial data bus
WO1997000480A1 (en) 1995-06-15 1997-01-03 Intel Corporation Architecture for an i/o processor that integrates a pci to pci bridge
US5696949A (en) * 1995-06-15 1997-12-09 Intel Corporation System for PCI slots expansion using asynchronous PCI-to-PCI bridge with clock generator for providing clock signal to the expansion mother board and expansion side of bridge
US5761531A (en) 1995-06-30 1998-06-02 Fujitsu Limited Input/output control apparatus and method for transfering track data from cache module to channel unit during the staging of the data track from device adapter
DE69620062T2 (en) 1995-07-07 2002-11-14 Sun Microsystems Inc Data access implementation of device driver interface
JPH0954746A (en) 1995-08-11 1997-02-25 Toshiba Corp Computer system
US5764924A (en) 1995-08-24 1998-06-09 Ncr Corporation Method and apparatus for extending a local PCI bus to a remote I/O backplane
JP3386640B2 (en) 1995-09-29 2003-03-17 株式会社東芝 Computer system and expansion unit used in this system
US5781747A (en) * 1995-11-14 1998-07-14 Mesa Ridge Technologies, Inc. Method and apparatus for extending the signal path of a peripheral component interconnect bus to a remote location
US5724529A (en) 1995-11-22 1998-03-03 Cirrus Logic, Inc. Computer system with multiple PC card controllers and a method of controlling I/O transfers in the system
US5748921A (en) 1995-12-11 1998-05-05 Advanced Micro Devices, Inc. Computer system including a plurality of multimedia devices each having a high-speed memory data channel for accessing system memory
US6452927B1 (en) 1995-12-29 2002-09-17 Cypress Semiconductor Corporation Method and apparatus for providing a serial interface between an asynchronous transfer mode (ATM) layer and a physical (PHY) layer
US5802055A (en) 1996-04-22 1998-09-01 Apple Computer, Inc. Method and apparatus for dynamic buffer allocation in a bus bridge for pipelined reads
US5941965A (en) 1996-05-16 1999-08-24 Electronics Accessory Specialists International, Inc. Universal docking station
US5987539A (en) * 1996-06-05 1999-11-16 Compaq Computer Corporation Method and apparatus for flushing a bridge device read buffer
US5911055A (en) 1996-06-05 1999-06-08 Compaq Computer Corporation Using subordinate bus devices that are connected to a common bus
US5819053A (en) 1996-06-05 1998-10-06 Compaq Computer Corporation Computer system bus performance monitoring
US5968144A (en) 1996-06-27 1999-10-19 Vlsi Technology, Inc. System for supporting DMA I/O device using PCI bus and PCI-PCI bridge comprising programmable DMA controller for request arbitration and storing data transfer information
US5913037A (en) 1996-07-03 1999-06-15 Compaq Computer Corporation Dynamic management information base manager
US5864688A (en) 1996-07-19 1999-01-26 Compaq Computer Corporation Apparatus and method for positively and subtractively decoding addresses on a bus
US5793995A (en) 1996-07-19 1998-08-11 Compaq Computer Corporation Bus system for shadowing registers
JPH1049379A (en) 1996-08-05 1998-02-20 Toshiba Corp Interrupt control system for computer system
US5905870A (en) 1996-09-11 1999-05-18 Advanced Micro Devices, Inc Arrangement for initiating and maintaining flow control in shared-medium, full-duplex, and switched networks
JP3001429B2 (en) 1996-09-12 2000-01-24 日本電気アイシーマイコンシステム株式会社 Filter circuit
US5854908A (en) 1996-10-15 1998-12-29 International Business Machines Corporation Computer system generating a processor interrupt in response to receiving an interrupt/data synchronizing signal over a data bus
US6167120A (en) 1996-11-06 2000-12-26 Lextron Systems, Inc. Apparatus and methods for home networking
EP0844567A1 (en) 1996-11-21 1998-05-27 Hewlett-Packard Company Long haul PCI-to-PCI bridge
US5848279A (en) 1996-12-27 1998-12-08 Intel Corporation Mechanism for delivering interrupt messages
US5835741A (en) 1996-12-31 1998-11-10 Compaq Computer Corporation Bus-to-bus bridge in computer system, with fast burst memory range
US5815677A (en) 1996-12-31 1998-09-29 Compaq Computer Corporation Buffer reservation method for a bus bridge system
US6222825B1 (en) 1997-01-23 2001-04-24 Advanced Micro Devices, Inc. Arrangement for determining link latency for maintaining flow control in full-duplex networks
US6366951B1 (en) 1997-02-03 2002-04-02 Curt A. Schmidt Distributed processing system where a management computer automatically connects remote reduced-capability workstations with centralized computing modules
US6026075A (en) 1997-02-25 2000-02-15 International Business Machines Corporation Flow control mechanism
US6170048B1 (en) * 1997-03-24 2001-01-02 Texas Instruments Incorporated PC circuits, systems and methods
US5953511A (en) 1997-04-08 1999-09-14 National Instruments Corporation PCI bus to IEEE 1394 bus translator
US6247091B1 (en) 1997-04-28 2001-06-12 International Business Machines Corporation Method and system for communicating interrupts between nodes of a multinode computer system
US6418492B1 (en) 1997-05-13 2002-07-09 Micron Electronics Method for computer implemented hot-swap and hot-add
US6295281B1 (en) 1997-05-16 2001-09-25 3Com Corporation Symmetric flow control for ethernet full duplex buffered repeater
JP3116860B2 (en) 1997-06-05 2000-12-11 日本電気株式会社 Data processing device, data processing system, data processing method, information storage medium
US6425033B1 (en) 1997-06-20 2002-07-23 National Instruments Corporation System and method for connecting peripheral buses through a serial bus
US6098103A (en) 1997-08-11 2000-08-01 Lsi Logic Corporation Automatic MAC control frame generating apparatus for LAN flow control
US6031821A (en) 1997-08-19 2000-02-29 Advanced Micro Devices, Inc. Apparatus and method for generating a pause frame in a buffered distributor based on lengths of data packets distributed according to a round robin repeater arbitration
US6333929B1 (en) 1997-08-29 2001-12-25 Intel Corporation Packet format for a distributed system
US6263385B1 (en) 1997-10-20 2001-07-17 Advanced Micro Devices, Inc. PC parallel port structure partitioned between two integrated circuits interconnected by a serial bus
US6275888B1 (en) 1997-11-19 2001-08-14 Micron Technology, Inc. Method for configuring peer-to-peer bus bridges in a computer system using shadow configuration registers
US6035333A (en) 1997-11-24 2000-03-07 International Business Machines Corporation Method and system for providing congestion control in a data communications network
US6115356A (en) 1997-12-18 2000-09-05 Advanced Micro Devices, Inc. Apparatus and method for generating flow control frames in a workgroup switch based on traffic contribution from a network switch port
US6084856A (en) 1997-12-18 2000-07-04 Advanced Micro Devices, Inc. Method and apparatus for adjusting overflow buffers and flow control watermark levels
US5948076A (en) 1997-12-31 1999-09-07 Adaptec, Inc. Method and system for changing peripheral component interconnect configuration registers
US6456590B1 (en) 1998-02-13 2002-09-24 Texas Instruments Incorporated Static and dynamic flow control using virtual input queueing for shared memory ethernet switches
US5991304A (en) * 1998-02-13 1999-11-23 Intel Corporation Method and apparatus for minimizing asynchronous transmit FIFO under-run and receive FIFO over-run conditions
US6170022B1 (en) 1998-04-03 2001-01-02 International Business Machines Corporation Method and system for monitoring and controlling data flow in a network congestion state by changing each calculated pause time by a random amount
US6201829B1 (en) * 1998-04-03 2001-03-13 Adaptec, Inc. Serial/parallel GHZ transceiver with pseudo-random built in self test pattern generator
US6058144A (en) * 1998-04-03 2000-05-02 Nortel Networks Corporation Multi-GB/S data pulse receiver
US6345330B2 (en) 1998-05-01 2002-02-05 Acqis Technology, Inc. Communication channel and interface devices for bridging computer interface buses
US6216185B1 (en) 1998-05-01 2001-04-10 Acqis Technology, Inc. Personal computer peripheral console with attached computer module
US6101563A (en) 1998-05-15 2000-08-08 International Business Machines Corporation Configuration access system
US6085278A (en) 1998-06-02 2000-07-04 Adaptec, Inc. Communications interface adapter for a computer system including posting of system interrupt status
DE19829212A1 (en) 1998-06-30 2000-01-05 Siemens Nixdorf Inf Syst Coupling device for computer peripheral component interconnection buses
US7269680B1 (en) 1998-08-06 2007-09-11 Tao Logic Systems Llc System enabling device communication in an expanded computing device
US7734852B1 (en) 1998-08-06 2010-06-08 Ahern Frank W Modular computer system
US6070214A (en) 1998-08-06 2000-05-30 Mobility Electronics, Inc. Serially linked bus bridge for expanding access over a first bus to a second bus
US6260092B1 (en) 1998-09-24 2001-07-10 Philips Semiconductors, Inc. Point to point or ring connectable bus bridge and an interface with method for enhancing link performance in a point to point connectable bus bridge system using the fiber channel
US6473810B1 (en) * 1998-09-28 2002-10-29 Texas Instruments Incorporated Circuits, systems, and methods for efficient wake up of peripheral component interconnect controller
US6430635B1 (en) 1998-10-10 2002-08-06 Lg Electronics Inc Protocol interfacing method
US6167029A (en) 1998-10-13 2000-12-26 Xaqti Corporation System and method for integrated data flow control
US6418494B1 (en) 1998-10-30 2002-07-09 Cybex Computer Products Corporation Split computer architecture to separate user and processor while retaining original user interface
US6247086B1 (en) 1998-11-12 2001-06-12 Adaptec, Inc. PCI bridge for optimized command delivery
US6457081B1 (en) 1998-11-23 2002-09-24 Advanced Micro Devices, Inc. Packet protocol for reading an indeterminate number of data bytes across a computer interconnection bus
US6233639B1 (en) 1999-01-04 2001-05-15 International Business Machines Corporation Memory card utilizing two wire bus
FR2790892A1 (en) * 1999-03-12 2000-09-15 Canon Kk METHOD AND DEVICE FOR CONTROLLING THE SYNCHRONIZATION BETWEEN TWO SERIAL COMMUNICATION BUSES OF A NETWORK
JP3895071B2 (en) * 1999-03-12 2007-03-22 インターナショナル・ビジネス・マシーンズ・コーポレーション Bus / bridge circuit, information processing system, and card bus controller
US6950440B1 (en) * 1999-03-18 2005-09-27 National Instruments Corporation System and method for efficiently generating packets on a serial bus in response to parallel bus cycles
US6385671B1 (en) 1999-03-29 2002-05-07 Intel Corporation Method/apparatus for flushing DMA transmit packet in FIFO when self-ID code generated by counter after bus reset is different than FIFO message self-ID field
WO2000065781A1 (en) * 1999-04-23 2000-11-02 Sony Electronics Inc. Method of and apparatus for implementing and sending an asynchronous control mechanism packet
US6401157B1 (en) 1999-04-30 2002-06-04 Compaq Information Technologies Group, L.P. Hot-pluggable component detection logic
US6581125B1 (en) * 1999-05-14 2003-06-17 Koninklijke Philips Electronics N.V. PCI bridge having latency inducing serial bus
US6457091B1 (en) 1999-05-14 2002-09-24 Koninklijke Philips Electronics N.V. PCI bridge configuration having physically separate parts
US6381661B1 (en) 1999-05-28 2002-04-30 3Com Corporation High throughput UART to DSP interface having Dual transmit and receive FIFO buffers to support data transfer between a host computer and an attached modem
US6446192B1 (en) 1999-06-04 2002-09-03 Embrace Networks, Inc. Remote monitoring and control of equipment over computer networks using a single web interfacing chip
US6493745B1 (en) 1999-09-03 2002-12-10 Microsoft Corporation Message processing technique to improve client computer response to user input
US6671737B1 (en) 1999-09-24 2003-12-30 Xerox Corporation Decentralized network system
US6567876B1 (en) 1999-12-03 2003-05-20 Hewlett-Packard Development Company, L.P. Docking PCI to PCI bridge using IEEE 1394 link
AU751695B2 (en) 2000-02-14 2002-08-22 Mobility Electronics, Inc. Docking system and method
EP1161727B1 (en) * 2000-02-14 2006-06-07 Tao Logic Systems LLC Bus bridge
US6594719B1 (en) 2000-04-19 2003-07-15 Mobility Electronics Inc. Extended cardbus/pc card controller with split-bridge ™technology
EP1189141A3 (en) * 2000-09-13 2005-12-28 Texas Instruments Inc. Bus bridge
US6989801B2 (en) 2001-03-22 2006-01-24 Koninklijke Philips Electronics N.V. Two-way presentation display system
JP2003050661A (en) 2001-08-06 2003-02-21 Casio Comput Co Ltd Electronic equipment with communicating function and communication program
US7047326B1 (en) 2002-01-31 2006-05-16 Harman International Industries, Inc. Use of a remote control with a device having a built-in communication port
US20040083315A1 (en) 2002-10-25 2004-04-29 Aaron Grassian Integrated circuit for a multi-function handheld device
US20040088452A1 (en) 2002-11-06 2004-05-06 Bryan Scott Method for video data transmission between an external video device and a handheld personal computer system
US6788101B1 (en) * 2003-02-13 2004-09-07 Lattice Semiconductor Corporation Programmable interface circuit for differential and single-ended signals
US20050174488A1 (en) 2003-03-10 2005-08-11 Sandeep Chennakeshu Methods, devices, and systems for displaying information from a remote electronic device
US7434166B2 (en) 2003-06-03 2008-10-07 Harman International Industries Incorporated Wireless presentation system
US20050129385A1 (en) 2003-09-16 2005-06-16 Jmz Llc Intelligent portable memory device with display

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009130058A1 (en) 2008-04-22 2009-10-29 Forschungsverbund Berlin E.V. Method for producing a semiconductor device with an insulating layer applied in situ
WO2009130057A1 (en) 2008-04-24 2009-10-29 Nuovo Pignone S.P.A. Packing cup for a reciprocating compressor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7908623B2 (en) 2004-05-12 2011-03-15 Matrox Electronic Systems Ltd. Set top box for PC/HDTV multimedia center

Also Published As

Publication number Publication date
EP1801704A3 (en) 2008-10-29
DE60126074D1 (en) 2007-03-08
WO2001082090A3 (en) 2002-02-21
USRE41494E1 (en) 2010-08-10
WO2001082090A2 (en) 2001-11-01
CA2445711C (en) 2010-04-13
CA2445711A1 (en) 2001-11-01
DE60126074T2 (en) 2007-08-23
AU2001251674A1 (en) 2001-11-07
EP1801704A2 (en) 2007-06-27
EP1275048A2 (en) 2003-01-15
CA2445716A1 (en) 2001-11-01
CA2445716C (en) 2005-12-20
EP1275048B1 (en) 2007-01-17
EP1275049A2 (en) 2003-01-15
EP1275049B1 (en) 2016-02-17
AU2001257103A1 (en) 2001-11-07
US6594719B1 (en) 2003-07-15
WO2001082089A3 (en) 2002-01-10
ATE352066T1 (en) 2007-02-15

Similar Documents

Publication Publication Date Title
US20180196764A1 (en) Computing module with serial data connectivity
USRE41494E1 (en) Extended cardbus/PC card controller with split-bridge technology
US5430847A (en) Method and system for extending system buses to external devices
US5828865A (en) Dual mode bus bridge for interfacing a host bus and a personal computer interface bus
US6353867B1 (en) Virtual component on-chip interface
EP1721441A2 (en) Modular presentation device with network connection for use with pda's and smartphones
US6694392B1 (en) Transaction partitioning
US5761443A (en) Computer system employing a bus conversion bridge for interfacing a master device residing on a multiplexed peripheral bus to a slave device residing on a split-address, split-data multiplexed peripheral bus
JP2001014269A (en) Computer system
US7096290B2 (en) On-chip high speed data interface
US20040230668A1 (en) Modular presentation device for use with PDA's and Smartphones
US20030070014A1 (en) Data transfer in host expansion bridge
US20060288141A1 (en) Modular computer
CN112835834B (en) Data transmission system
CN101071406A (en) Interface configurable universal series bus controller
KR100757223B1 (en) Bus bridge
JP4956827B2 (en) 8-bit based data processing system
KR20010070407A (en) Storage device in an expansion slot of a computer input device
KR100757224B1 (en) Computer docking system and method
KR20050076527A (en) Interface apparatus using multi-input/output apparatus
JP2006323869A (en) Docking system and method

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
AK Designated states

Kind code of ref document: A3

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 2001930580

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 2001930580

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2445711

Country of ref document: CA

NENP Non-entry into the national phase

Ref country code: JP

DPE2 Request for preliminary examination filed before expiration of 19th month from priority date (pct application filed from 20040101)