WO2001079868A3 - System for measuring signal path resistance for an integrated circuit tester interconnect structure - Google Patents

System for measuring signal path resistance for an integrated circuit tester interconnect structure Download PDF

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Publication number
WO2001079868A3
WO2001079868A3 PCT/US2001/009205 US0109205W WO0179868A3 WO 2001079868 A3 WO2001079868 A3 WO 2001079868A3 US 0109205 W US0109205 W US 0109205W WO 0179868 A3 WO0179868 A3 WO 0179868A3
Authority
WO
WIPO (PCT)
Prior art keywords
ports
tester
interconnect structure
integrated circuit
signal paths
Prior art date
Application number
PCT/US2001/009205
Other languages
French (fr)
Other versions
WO2001079868A2 (en
Inventor
John M Long
Original Assignee
Formfactor Inc
John M Long
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Formfactor Inc, John M Long filed Critical Formfactor Inc
Priority to AU2001249350A priority Critical patent/AU2001249350A1/en
Publication of WO2001079868A2 publication Critical patent/WO2001079868A2/en
Publication of WO2001079868A3 publication Critical patent/WO2001079868A3/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/14—Measuring resistance by measuring current or voltage obtained from a reference source
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G01R31/31717—Interconnect testing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31924—Voltage or current aspects, e.g. driver, receiver

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are modified so that they may also either transmit a constant current through the I/O ports or link the I/O ports to ground or other reference potential. The tester then transmits known currents through the signal paths interconnecting the tester's I/O ports. Existing comparators within the tester normally used to monitor the state of an IC's digital output signals are employed to measure voltage drops between the I/O ports, thereby to provide data from which resistance of signal paths within the interconnect structure may be computed.
PCT/US2001/009205 2000-04-13 2001-03-23 System for measuring signal path resistance for an integrated circuit tester interconnect structure WO2001079868A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001249350A AU2001249350A1 (en) 2000-04-13 2001-03-23 System for measuring signal path resistance for an integrated circuit tester interconnect structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/548,886 US6677744B1 (en) 2000-04-13 2000-04-13 System for measuring signal path resistance for an integrated circuit tester interconnect structure
US09/548,886 2000-04-13

Publications (2)

Publication Number Publication Date
WO2001079868A2 WO2001079868A2 (en) 2001-10-25
WO2001079868A3 true WO2001079868A3 (en) 2002-02-28

Family

ID=24190786

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/009205 WO2001079868A2 (en) 2000-04-13 2001-03-23 System for measuring signal path resistance for an integrated circuit tester interconnect structure

Country Status (3)

Country Link
US (4) US6677744B1 (en)
AU (1) AU2001249350A1 (en)
WO (1) WO2001079868A2 (en)

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Also Published As

Publication number Publication date
WO2001079868A2 (en) 2001-10-25
US20070007989A1 (en) 2007-01-11
US20050035774A1 (en) 2005-02-17
US7486095B2 (en) 2009-02-03
AU2001249350A1 (en) 2001-10-30
US6677744B1 (en) 2004-01-13
US7109736B2 (en) 2006-09-19
US20090134905A1 (en) 2009-05-28
US7609082B2 (en) 2009-10-27

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