WO2001063963A2

WO2001063963A2 - Broadband telecommunications switch array

Info

Publication number: WO2001063963A2
Application number: PCT/US2001/005790
Authority: WO
Inventors: Jules D. Levine; Christopher W. Weller; Thomas W. Myers; Stanley Freske
Original assignee: Teraburst Networks, Inc.
Priority date: 2000-02-25
Filing date: 2001-02-23
Publication date: 2001-08-30
Also published as: EP1260104A2; AU2001266552A1; JP2003536289A; WO2001063963A3

Abstract

A broadband telecommunications switch array includes a microwave switch array with analog elements. Incoming optical signals are transferred to the microwave domain, and the microwave switch array provides the necessary switching functions. After switching has been achieved, the switched signals are then reconverted to the optical domain. In a preferred embodiment, the microwave switch array include an NxN array of broadband passthrough switches. Coupled to the input and the output of the NxN array are 1xN digital switches that perform error correcting functions. The error-correcting digital switches may include circuits for leveling, reshaping and retiming, and feed-forward error correction. By advantageously combining analog and digital technology, the present invention enables the design of a low-cost switch arrany with a low bit-rate error and a flat frequency response up to a high cutoff frequency. In the preferred embodiment the number of digital correction circuits is approximately equal to the square root of the number of analog switches.

Description

BROADBAND TELECOMMUNICATIONS SWITCH ARRAY

BACKGROUND OF THE INVENTION

1. Field of Invention

The present invention relates to a communications switch and more particularly to an inexpensive broadband telecommunications switch array with a large array size and a high bit rate for applications in fiber optic telecommunications..

2. Description of Related Art

Figure 1 illustrates a permutation switch element for use in the telecommunications industry. At each node there is the possibility of a connection between the input rows and the ouput columns. For example, Input r2 is connected to output s3 as shown in the diagram There are N! different configurations possible in a permutation switch of dimension N (e.g., N=6 in Figure 1). The important case where there are N inputs and N outputs is called an NxN switch or an NxN switch array, where an array may be made from a combination of switch elements.

A typical wavelength switch element used in the telecommunications industry is called an optical crossconnect switch (OXC). The OXC uses mirrors that can move a spot of light spot from one location to another. The OXC is a permutation switch; that is, any one input is connected to only one output and vice versa. The net result is that the light intensity is retained during its passage through the switch and not diluted by a multiplicity of connecting paths.

A major disadvantage of the OXC is that it is not possible to vary the wavelength between input and output. That is, the wavelength of input r2 and output s3 must be the same. Optical networks need the additional flexibility of assigning the output s3 a different wavelength from the input r2. This can be done in the network by adding much more complex and costly extra equipment that effectively adds considerable cost to the OXC.

In Figure 1, the array size is drawn for N = 6. However, the array size for a crossconnect application should be appreciably larger, perhaps large enough to accommodate - 100 fibers in each cable and ~ 20 wavelengths in each fiber. A typical crossconnect switch can therefore have N ~ 2,000 to best optimize the performance of the communication network. Since some of these inputs are transmitted without wavelength modification, it is possible to reduce the size of this crossconnect array to perhaps N ~ 1000. It is possible to use tiling to assemble a multiplicity of smaller mxm crossconnect arrays into a larger NxN array as shown in Figure 2. The system of 9 arrays or chips is shown in bold line. All interconnections can be made on a printed circuit board and carry the full bitrate. For example 100 68x68 chips can be arranged to form a larger array of 10*68x10*68 = 680x680. Tiling obviously requires appreciable cost, especially at the higher bitrates and larger array sizes. Alternative approaches to optical switching devices may include conversion of an optical signal to an electrical signal that can be manipulated using digital switching devices and then converted back to an optical signal. For example, a digital optical signal with bitrate B can be passed through a photodetector, in which case it is converted to an electronic signal with the same bitrate. The bit rate B of information flow in each optical stream at each wavelength can be any one of the standard values. For example, B = 2.5, 10, and 40 Gbps, for the industry standards OC-8, OC-192 and OC-768, respectively. The general trend in optical communications is for the higher bit rates.

For switching electrical signals, digital switches are often used to create crossconnect arrays with a structure similar to the switch shown in Figure 1. A digital switch can be located at each node of Figure 1. Digital switch arrays are composed of active digital switches that operate at the bitrate B. Each switch senses the digital electrical signal at the switch input and recreates the digital electrical signal at the switch output. The switches require power and this power increases with the bitrate. The switch operation is done electrically at microwave or millimeter wave frequencies. For example, at a bitrate of B=10 Gbps, the switch time to go from a "1" to a "0" is less than 1 B or less than 0.1 nanosecond. This is in contrast with the array switching time which is about 1 microsecond.

Digital switch arrays are characterized by their array size N and their bitrate B. A given array configuration of N inputs and N outputs can be switched to another configuration having inputs and outputs arranged in a different order within a time period of about one microsecond. Some actual values of B and N in the literature from discrete components are given in Figure 3. Optimal values of the data points take the general shape of a hyperbola, as shown in Figure 4.

These chips can be made of GaAs as on the left side of Figure 4 or Si as on the right side of Figure 4. Other materials are also possible. It is clear that large arrays have low bitrates and vice versa. The reason has to do with power consumption of the active devices and the yield of the active devices. The circle labeled R in Figure 4 represents the desired operating region of a switch having both high N and B. What is desired is a low cost version of a chip that operates in region R and satisfies the application requirements.

Digital switches convert each incoming digital stream of 0's and l's into another digital stream with the same amplitude and waveform shape. The digital switches are totally active and respond to the actual bit rate. For example, a switch which is designed for B = 10 Gbps must actively respond to this data rate. The time for this active switching operation is of the order of 1/B, which for this example is 0.1 nanosecond. Also, these chips can be used in more generalized configurations than the simple permutation configuration shown in Figure 1. With digital switches, one input can be sent to two or more outputs although this functionality is generally not critical for applications involving system reconfiguration and wavelength modification for optimal system utilization and protection. In general, the array switching time required to reconfigure a switch array in order to change the linkages and wavelengths need not be less than 1 ms., which is an acceptably small fraction of the ~50 ms time required for setup and confirming communication between linkages -100 km apart. Therefore, the ability of digital switches to change configurations in substantially less than one millisecond is generally not relevant in most applications.

SUMMARY OF THE INVENTION Accordingly, it is an object of this invention to provide an inexpensive telecommunications switch array having full wavelength conversion capability for the fiber optic telecommunications industry.

It is a further object to provide a telecommunications switch array with larger array sizes and bitrates than possible with the present technology involving digital switch arrays. It is a further object to provide a telecommunications switch array with a flat frequency response and a high cutoff frequency.

It is a further object to provide a telecommunications switch array with a low bitrate error. The above and related objects of the present invention are realized by an apparatus that receives an input optical signal and transforms the input optical signal to a microwave signal. The microwave signal is switched and then transformed to an output optical signal.

In a preferred embodiment of the present invention, an apparatus for switching optical signals includes an input transceiver, a microwave switch array, and an output transceiver. The microwave switch array includes analog switch elements and is connected to both the input transceiver and the output transceiver. The input transceiver and the output transceiver each can include reshaping and retiming elements. The input transceiver receives input optical signals and generates corresponding input microwave signals. The microwave switch array switches the input microwave signals thereby resulting in output microwave signals. The output transceiver receives the output microwave signals and generates corresponding output optical signals.

The analog switch elements of the microwave switch array may include broadband pass- through elements. The microwave switch array may include microwave input ports and microwave output ports, whereby the switch array switches a selected input signal corresponding to a selected input port to a selected output signal corresponding to a selected output port.

In addition to reshaping and retiming elements, other error correction elements including leveling elements and feedforward error correction elements may be included in either transceiver, preferably the output transceiver. The number of each type of error correction element is generally comparable to the dimension of the microwave switch array, that is, the number of input ports or output ports. Additionally, the functions of different types of error correction elements within a transceiver may be combined into elements with composite functions.

According to one aspect of the preferred embodiment, the microwave switch array is an NxN array (i.e., an N-dimensional array). Coupled to the input and the output of the microwave switch array are lxN digital switches that perform error correcting functions. The error correcting functions at the input of the microwave switch can include reshaping and retiming. The error correcting functions at the output of the microwave switch can include leveling, reshaping, retiming, and feedforward error correction. The present invention enables the reconfiguration of fiber linkages and wavelengths in order to optimize network capacity and to offer maximum backup capability in the case of fiber failure. By advantageously combining analog and digital technology, the present invention enables the design of a low-cost switch array with a low bit-rate error and a flat frequency response up to a high cutoff frequency. The number of digital error correction circuits is generally comparable to the square root of the number of analog switches .

BRIEF DESCRIPTION OF THE DRAWINGS

These and other objects and advantages of the invention will become more apparent and more readily appreciated from the following detailed description of the presently preferred exemplary embodiments of the invention taken in conjunction with the accompanying drawings, where: Figure 1 is a schematic diagram of an NxN telecommunications switch array;

Figure 2 is a tiling of 9 mxm arrays to create a single larger 3m x 3m array;

Figure 3 is a plot of digital microwave crosspoint switch arrays relating representative array sizes and bit rates;

Figure 4 is a schematic curve showing best values of bitrate B and array size N of individual digital chips as taken from the literature, where the circle labeled R indicates the desired operating region;

Figure 5 is a schematic diagram of a telecommunications switch array used to reconfigure a network according to the invention;

Figure 6 is a schematic diagram of a SPDT solid state switch according to the invention; Figure 7 is a schematic drawing of an octal switch with one input and 8 outputs;

Figure 8 is a schematic diagram of a SPDT solid state switch according to the invention;

Figure 9 is a schematic diagram of a single-DOF rocking MEMS deflecting mirror device;

Figures 10A-10C are schematic diagrams of a MEMS octal switch (SP8T) according to the invention; Figure 11 is a octal switch operated as an octal selector with one input and 8 outputs according to the invention;

Figure 12 is a octal switch operated as an octal combiner with eight inputs and one output according to the invention;

Figure 13 is an example of a three layer selector octal switch fanout design according to the invention; Figure 14 is a schematic diagram of fanout of the input on row 18 and inverse fanout to column 27 of a 256 x 256 switch array according to the invention;

Figure 15 is a circuit diagram of an 8x8 solid state array according to a preferred embodiment of the invention; Figure 16 is an embodiment of the present invention with reshaping/retiming circuits used at entrance and exit of NxN array;

Figure 17 is a systems-level diagram of the embodiment of the present invention shown in Figure 16;

Figure 18 is an embodiment of the present invention with reshaping circuits used at the entrance of the NxN array and with leveling circuits, reshaping/retiming circuits, and error corrections circuits used at the exit of the NxN array;

Figure 19 is a systems-level diagram of the embodiment of the present invention shown in Figure 18;

Figure 20 is a schematic diagram of the output of an ideal linear analog broadband passthrough switch which is flat for all frequencies from DC up to a cutoff frequency f_c;

Figure 21 is a schematic diagram of the output of a non-ideal passthrough switch array whose output generally falls with frequency;

Figure 22 is a schematic diagram of the output of a leveling circuit whose output generally rises with frequency; and Figure 23 is a schematic diagram of total response consisting of a nonlinear array together with a leveling circuit.

DETAILED DESCRIPTION OF PRESENTLY PREFERRED EXEMPLARY EMBODIMENTS

A preferred embodiment of a telecommunications switch array 40 according to the present invention is illustrated in Figure 5. A network input optical signal 42 from multiple optical fibers is passed through a demux device 44 that separates out the combined dense wave division multiplexing (DWDM) wavelengths into distinct multiple optical signals. A photodetector 46 converts each resulting optical signal into an electrical signal where the frequency of the electrical signal is in the microwave or millimeter wave region from (~1 GHz to -40 GHz). An NxN microwave switch array 48 receives the electrical signals and routes the signals based on external commands that may alter the configuration of the network and the wavelengths of the transmitted signals. Preferably, the switch array 48 is an analog device that transmits all frequencies from DC (direct current) to a relatively large maximum frequency f_B , related to the bitrate B, without distortion. That is, the switch array 48 is a broadband switch array. In the preferred embodiment the telecommunications switch array 40 is configured as a permutation switch array (cf. Figure 1) although modifications of this configuration (e.g., inactive channels) are possible. The electrical output from the switch array 48 is passed through a laser and modulator 50 that transforms electrical signals into optical signals. A mux device 52 combines the wavelengths and transmits the resulting optical signals in DWDM format along corresponding fibers to the newtork output 54. In the preferred embodiment, a microwave switch array 48 is used as the building block for the telecommunications switch array 40 instead of an active digital switch as described above. Additional switch functionality (e.g., add/drop capability) may be added to the embodiment. Traffic in the opposite direction is characterized by reversing the polarity of the arrows in Figure 4.

A first preferred embodiment of the switch array 48 relates to a solid state switch design based on PIN diodes. For example, a solid state switch 150 for the frequency range DC - 26.5 GHz has been manufactured for example by Amp, Inc., and its circuit diagram is shown schematically in Figure 6. PIN diodes 152a, 152b are connected in shunt. This embodiment has added benefits associated with low insertion loss and high isolation. For the PIN diodes 152a, 152b, the OFF state capacitance is very small (e.g., of the order of 4 E-15 Farads), and the ON state resistance is also very small (e.g., of the order of 4 ohms), so that the switching behavior works well, for example, at the nominal operational setting given by 110 GHz with 50 dB isolation and 0.4 dB insertion loss. Another advantage of PIN diodes is that the cross sectional area is typically very small with a radius as small as 30 microns so that many PIN devices can be packed closely together in a switch array.

The solid state switch 150 can be extended to higher-order designs. For example, Figure 7 illustrates a schematic drawing of a preferred embodiment of solid state octal switch 140 with one input 142 and eight outputs 144 (i.e., an SP8T switch). The control circuitry (not shown) is set so that only one of the eight outputs can be addressed at any one time. That is, the switching action of one output terminal to ON turns the other output terminals to OFF.

A second preferred embodiment of the switch array 48 is also made from solid state switches. For example, a solid state SPDT (single-pole-double-throw) switch 70 for the frequency range DC - 26.5 GHz has been manufactured for example by Agilent and its circuit diagram is shown schematically in Figure 8.

In each of the two branches of the SPDT switch 70 there are two FETs in series (72a-72b, 74a-74b), which increase the isolation, and two FETs in shunt (76a-76b, 78a-78b), which help flatten the frequency response. The rectangles 80, 82 are examples of transmission line tuning elements as opposed to discrete tuning elements, which help to flatten the frequency response at these higher frequencies. The voltages on the selector switches SEL1 and SEL2 determine whether the signal from RF IN goes to RF OUT 1 or RF OUT2. Frequencies higher than 26.5 GHz are possible using more FETs in series, smaller linewidths in lithography, higher mobility materials such as InP and SiGe, and solid state composite materials that offer higher isolation such as silicon-on-insulator or GaAs-on- quartz. Similarly as in the first preferred embodiment based on a solid state SPDT switch 150, the SPDT switch 70 of the second embodiment can be generalized to higher order designs as illustrated by the SP8T switch 140 of Figure 7.

A third preferred embodiment of the switch array 48 is based on a system of MEMS (micro- electro-mechanical systems) optical switches. Figure 9 illustrates a schematic of a MEMS unit 53 that is built by Texas Instruments. A rotatable mirror 54 is mounted on a horizontal pivot 56 onto a substrate 58. By controlling the angle at the pivot 56, incident light 59a and reflected light 59b can be controlled. These units 53 can be combined in systems of one million units. The mirrors 54 are fabricated directly on a silicon wafer (i.e, substrate 58) using standard silicon processing technology. The device 53 is digital in the sense that the mirrors are stable in either of two rocker positions. The device 53 is designed to reflect light. The mirror 54 is supported at the pivot 56 on a horizontal axis of silicon which points perpendicular to the page and which is produced by undercut etching. The mirror 54 is actuated to the full right and left positions like a seesaw by voltages applied to the rotatable and substrate parts (not shown). The mirror 54 is bistable and digital. There is direct electrical contact made in this device. The preferred embodiment of this MEMS Building Block is a modification of the above device with electrical connections and a vertical pivot as shown in Figures lOA-lOC. Figure IOC illustrates a top plan view of a switch 60 with aluminum contact pads labeled for dual control voltages (0,1), (1,1), (1,0), (1,-1), (0, -1), (-1,-1), (-1,0), (-l,l),and (0,1). The switch 60 consists of an octal- shaped three-dimensional rocker unit which is made of Si. This is Al coated on the edges. In contrast to the MEMS unit 53 of Figure 9, the switch 60 operates to make electrical (not optical) connections. The third preferred embodiment of the switch array 48 is based on the octal MEMS switch 60.

Figure 10A is an elevation view that also shows the aluminum contact pads 62, A center post 64 provides a mount for a flex support 66 with a rigid rim 68 above each contact pad 62. Figure 10B is a plan view complementary to Figure 10A where the flex support is deflected to provide contact between a contract pad 62 and a rigid rim 68.

The rocker unit 66 is thinned in the center region to allow for flexibility in the central region. It is thicker at the edges 68 to allow for rigidity so that the entire rocker unit deflects as an overall rigid unit, even though the central region has flexure. At the center of the switch, the post 64 supports the rocker unit and has metallic coating connected to the rim. Electrical continuity across the switch is provided by applying a voltage between the appropriate contact pad 62 and the post 64. Only two voltages are necessary to address the eight arms of the switch and the voltage combination is shown in Figure IOC. For example, applying a (1, -1) voltage implies that a positive voltage is applied in the x-direction and positive voltage is applied in the -y-direction. Vector addition of the voltages will deflect the rocker so that it is in contact with the Al contact pads in the ground plane only at the appropriate position labeled (1 -1) in Figure 10A. As a component of the switch array 48, each octal switch 60, 140 can switch between 1 of 8 states as shown by the switch schematics shown in Figures 11-12. The benefits of this configuration are clearly that an increased functionality is possible using solid state technology or MEMS technology. In addition, the octal switch can be operated as a combiner as shown below. The advantage of operating an octal switch as a octal combiner is that the impedance can be properly matched so that the microwave reflections are minimized. In both the selector and the combiner examples shown above, the input and output impedances are exactly the same, typically Z₀ = 50 ohms.

Each of the octal switch building blocks (i.e., the solid state unit of Figure 7 and the MEMS unit of Figures 10A-10C) has an unavoidable insertion loss G. In the case of solid state octal switches operating at GHz frequencies, it is in the range of 1-2 dB. For the desired NxN array, there will be S blocks in series, where S can be of the order of N, and the system can have an insertion loss of S*G, which must be minimized. For example, if S=100 and G=l dB, then the system loss can be 100 dB, which is typically unacceptable. In general, the goal is to have a large array size N>100, and for a given value of G, this requires designing a system architecture which minimizes the number S of passthrough switches in series with each other.

The optimal octal switch for a three layer selector octal switch architecture appropriate for a 512x512 wideband switch 48 is shown in schematic form in Figure 13. For the purposes of discussion, the input signal on row 18 will be connected through the 512x512 array to the output signal on column 27. In Figure 13 the input to row 18 is directed to a single output of a possible number of 8³ = 512 outputs. The output of layer 3 is directed to the actual column of the 512x512 array. In general, for n layers, the number of possible outputs are 8ⁿ, and likewise for m outputs the corresponding number of layers is loggm. The layout of these 512 switches is essentially hierarchical in a fanout pattern with coplanar noncrossing lines connecting each output with each input. The coplanar feature makes it easy to fabricate such a device on a chip using a minimal number of metallization layers.

Figure 13 only illustrates row 18 of the 512 rows each having a predetermined input. The remaining 511 rows are not shown in Figure 13. To collect the signal from column 27 it is preferable to reverse the process described above. This is because a wideband combiner is difficult to design in solid state at the required high bitrates. Therefore the reverse process is shown schematically in Figure 14. The horizontal triangle represents signal selection, and the vertical triangle represents signal collection.

As illustrated in Figure 14, the input to row 18 is sent through the fanout of Figure 13 so that the signal takes a route 112 shown by the dotted line to a point P 114. From P 114 another route 116 shown as a dotted arrow directs the signal to the output at column 27. The horizontal triangles represent the selector switches and the vertical triangles represent the combiner switches. For the 512x512 crosspoint switch shown schematically above, there are a total of 1+8+64 = 73 selector switches per row based on 1 mother octal switch, 8 daughter octal switches attached to the 8 outputs of the mother switch, and 8*8=64 granddaughter octal switches attached to the 8*8 outputs of the daughter switches. The 512 rows then correspond to a total of 37,376 selector switches (i.e., 37,376 =73*512), and similarly the 512 columns correspond to 37,376 combiner switches for a total of 74,752 switches. As a result, any possible configuration in the 512x512 switch matrix requires only 6 switches in series: 3 for selector octal switches and 3 for combiner octal switches. By limiting the number of switches used, the corresponding insertion loss is thereby limited. The combination of selector and combiner bandpass switches is an optimum way to minimize insertion loss for large arrays. A 512x512 switch array 48 according to the embodiment presented above includes 74,752 switches as compared with the number of switches required for a 512x512 crosspoint array (i.e., 262,144=512*512). Thus, the embodiment presented above requires only 29% of the number of switches required for a comparable crosspoint array (i.e., 74,752/262,144 - .29).

Figure 15 illustrates an 8x8 array 154 based on the second preferred embodiment (Figs. 7, 8) of the switch array 48. Solid state 1x8 arrays are connected using the technology of printed circuit boards to produce a composite 8x8 array 154. The 8x8 array 154 has eight input ports 155a — 155h and eight output ports 156a — 156h. The input ports 155a — 155h lead to a row 157 of eight selector switches, and the output ports 156a — 156h lead from a column 158 of eight selector switches. The switches 157, 158 are made of discrete semiconductors and the wiring is made on the printed circuit board.

Switches in the preferred embodiments are sometimes referred to as broadband (i.e., large bandwidth) passthrough switches or DC wideband switches. The digital waveform passing though the array also has some frequency components much higher than the fundamental bitrate. These can become inadvertently filtered or distorted in passing through the array. Also the amplitude of the signal will be reduced by the net effect of the insertion losses, even though they are minimized using the array architecture described above. To correct for both the frequency and amplitude imperfections caused by the microwave switch array 48, a commercial array of N digital switches is used at the entrance and exit of the array 48 as shown schematically in Figure 12. That is, N inputs from the demux 122 pass through N reshaping circuits in a transceiver card 24. The resulting N signals then are switched at an NxN array of passthrough switches 126, and the resulting N signals pass through N reshaping circuits in a transceiver card 128 that sends N outputs to the mux 130.

Transceiver cards suitable for the reshaping operations are available commercially. Typically these transceiver cards incorporate a multiplicity of both photodetectors and lasers. These transceiver cards provide the functionality of transforming input light signals into electrical signals using photodetectors 46 as shown in Figure 5. They also reshape the signal, in order to remove distortions and amplitude losses obtained after transport of the optical signal through the fiber en route to the array input. The reshaping function is provided by N digital reshaping circuits 124 which operate at the appropriate bitrate, as shown in Figure 16. The same transceiver cards provide the functionality of modulating a laser 50 using the output electrical signal as shown in Figure 5. These transceiver cards can also be specially configured to reshape the output signals in order to remove distortions generated inside the analog NxN switch 126, as shown by the reshaping circuits 128 of Figure 16.

For an NxN array 126 with roughly N² switches, the transceiver requires only 2N digital switches. Therefore the usage of digital switches is only a small fraction (roughly 2/N) of the total number of switches employed. As a result the cost and power dissipation in the proposed embodiment will be minimized. Figure 17 shows a systems overview of the embodiment shown in Figure 16. In Figure 17, an array of N input wavelengths 160 is transformed to an array of N signals from photo-detectors 162. These N signals from photo-detectors 162 are passed through a first array of N reshaping and retiming circuits 164, an NxN array of passthrough switches 166 (i.e., an N-dimensional switch array) and a second array of N reshaping and retiming circuits 168. The output from the second array of reshaping and retiming circuits 168 is transformed by an array of N modulated lasers 170 to give an array of N output wavelengths 172.

The embodiment of Figure 16 can be identified with the systems diagram of Figure 17. The N outputs from Demux 122 correspond to the array of N input wavelengths 160. The first transceiver card 124 corresponds to the block for photo-detector output 162 and the first block of reshaping/retiming circuits 164. The broadband switch array 126 corresponds to the broadband switch array 166. The second transceiver card 128 corresponds to the second block for the reshaping/retiming circuits 164 and the block for the modulated lasers 170. The N outputs to Mux 130 correspond to the Array of N output Wavelengths 172.

The elements of the systems diagram of Figure 17 also can be related to the components of Figure 5, where the blocks for reshaping and retiming circuits 164, 168 may be considered as pre- filters and post-filters for the switch array 48 shown in Figure 5.

In the embodiment shown in Figure 16, the transceiver cards 124, 128 each include reshaping and retiming circuits; however, other configurations are possible. The reshaping and retiming operations may be carried out by composite circuits or by separate circuits. Because of the relatively short transmission distances in the system, only one set of retiming operations (or retiming circuits) may be needed. For example, reshaping circuits may be used in both transceiver cards 124, 128, with retiming circuits used only in the transceiver card 128 at the output end of the NxN switch 126.

The present invention possesses a number of desirable features in the design of a telecommunications switch. Replacing active digital switches with passive bandpass switches (i.e, the solid state unit of

Figure 7 or the MEMS unit of Figures 10 A- 10C) increases the switch bandwidth, reduces the switch complexity and minimizes the power consumption. In addition, since the passive bandpass switches do not operate at the bitrate, this increases their reliability and chip manufacturing yield, and increases size of a switch array. Also, it is possible to minimize the number of switches in series by using an array of switches with multiple outputs. Finally it is possible to use an optimal architecture by arranging the switch layout in two planes with orthogonal wiring connected by a square array of vias.

The power in the electrical signal input to the array can be degraded by "broadcasting" the input signal into m parallel output paths as in the conventional design illustrated in Figure 1. This decreases the signal into each path by a factor m. For example, if m = 100, then the signal is decreased by lOOx in each path. By using a cascade of octal switches (instead of broadcast switches) as illustrated in Figure 13, the present invention maximizes signal power.

Further, this cascading of octal switches minimizes insertion loss. Each switch has a finite insertion loss which is similar to series resistance. This is a loss measured in dB that is partly internal to the device and partly due to the packaging. For example, suppose m = 100 and the loss is ldB per switch; then, the loss through m broadcast switches connected in series would be 100 dB, which is generally unacceptable.

Further, this cascading of octal switches minimizes reflections compared with the design based on broadcast switches. The electrical signal represents transport of a digital signal along a transmission line at constant velocity, and it is important that the transmission line contain no abrupt discontinuities of impedance. A transmission line with impedance Z₀ which is terminated with a impedance Zi has a power reflection coefficient given by Refl = ((Zo - Zι)/(Zo + Zi))². Only for Zo = Zi do the reflections vanish.

The present invention advantageously minimizes the layers of interconnect waveguides in a chip, since each waveguide is made of deposited and etched metal, and it is too costly and unreliable to have more than a few metallization layers, even for large arrays of the order of 512x512. The present invention provides a switch which is non-blocking. This means that one input is connected to each output and vice versa, and that reconfiguration of some switch settings can be accomplished without changing the other switch settings.

Additional circuits may be included in the transceiver cards 124, 128 of Figure 16 to further correct for processing errors. In the embodiment shown in Figure 18 there are, in correspondence to the embodiment of Figure 16, N inputs from Dumux 180, a first transceiver card 182, an NxN array of broadband passthrough switches 184, a second transceiver card 186, and N outputs to Mux 188. The second transceiver card 128 of Figure 16 includes N modulated lasers and N reshaping circuits. In addition to these components, the second transceiver card 186 of Figure 18 also includes N leveling circuits and N feedforward error correction circuits. Figure 19 gives a systems representation of the embodiment of Figure 18 that is analogous to the representation of the embodiment of Figure 16 provided by Figure 17. In Figure 19, an array of N input wavelengths 190 is transformed to an array of N signals from photo-detectors 192. These N signals from photo-detectors 192 are passed through a first array of N reshaping and retiming circuits 194, an NxN array of passthrough switches 196 (i.e., an N-dimensional switch array), an array of N leveling circuits 198, a second array of N reshaping and retiming circuits 200, and an array of N feedforward error correction circuits 202. The output from the array of N feedforward error correction circuits 202 is transformed by an array of N modulated lasers 204 to give an array of N output wavelengths 206.

The embodiment of Figure 18 can be identified with this systems diagram of Figure 19. The N outputs from Demux 180 correspond to the array of N input wavelengths 190. The first transceiver card 182 corresponds to the blocks for photo-detector output 192 and the first block of reshaping/retiming circuits 194. The broadband switch array 184 corresponds to the broadband switch array 196. The second transceiver card 186 corresponds to the block for the leveling circuits 198, the second block for the reshaping/retiming circuits 200, the block for the feedforward error correction circuits 202, and the modulated lasers 204. The N outputs to Mux 188 correspond to the array of N output wavelengths 206. Thus, the embodiments of Figure 16 and Figure 18 differ essentially in the inclusion of blocks for the N leveling circuits 198 and the N feedforward error correction circuits 202 in the second transceiver card 186.

Similarly as in Figure 17, the elements of the systems diagram of Figure 19 also can be related to the components of Figure 5, where the first block of reshaping/retiming circuits 194 is considered as part of a pre-filter for the wideband switch 48 shown in Figure 5. Likewise, the block for the leveling circuits 198, the second block of reshaping/retiming circuits 200 and the feedforward error correction circuits 202 are considered as part of a post filter for the wideband switch 48 of Figure 5.

As discussed above with reference to the embodiment shown in Figure 16, other configurations of circuits are possible. For example, for the embodiment shown in Figure 18, reshaping circuits may be used in both transceiver cards 182, 186 with retiming circuits used only in the transceiver card 186 at the output end of the NxN switch 184. Additionally, leveling circuits or feedforward correction circuits may be used in the transceiver card 182 at the input end of the NxN array 184. At the input to the system shown in Figure 19, there are N wavelengths 190. Each input wavelength has an imposed information stream of Is and 0s produced by amplitude-modulated light. This array of N light signals is detected with the array of N photodetectors 192, and the light signals are transformed into an array of N electrical signals at microwave frequencies. The electrical signals are processed in an array of N digital circuits 194 that reshape and retime the signals. Then the signals are passed into the NxN switch array 196. At the output of the array there are N leveling circuits 198 that level the frequency response of the imperfect switches and interconnects. The leveling circuits 198 are followed by N reshaping and retiming circuits 200. The reshaping and retiming circuits 200 are followed by N forward error correction circuits 202 that reduce the residual bit error rate. Finally, the electrical signal is transformed into light by a modulated laser 204.

The importance of error correction circuitry 194, 198, 200, 202 in combination with the broadband switch array 196 is illustrated with reference to Figure 20. An ideal wideband switch is an analog device that transmits all frequencies from DC (direct current) to a cutoff frequency f_c , without distortion. In other words, this is a flat frequency response up to a cutoff, as shown in Figure 20. In S- parameter terminology appropriate to analog circuits, the switch output for a single switch is denoted as S ι, which is the transmission coefficient for insertion loss in the case when the switch is open and the transmission coefficient for isolation loss in the case when the switch is closed.

At frequencies greater than 10 GHz, it becomes increasingly difficult and expensive to obtain ideal linear switch performance as shown in Figure 20. Ideal (or nearly ideal) linear performance must be achieved in the presence of system constraints including minimal static power consumption (i.e., power consumption in the quiescent non-switching state), minimal crosstalk, and minimal insertion loss. Linearity in the presence of these system constraints complicates the design and manufacture of an ideal stand-alone high frequency wideband passthrough switch, especially when high bitrates are required. Interconnecting transmission line waveguides that are needed to connect the above described switches in an array also generate a decreased response at higher frequency. This is the due to the "skin effect" which causes increased resistance of each transmission line at higher frequencies, and also increased inductance due to the presence of vias and other non-planar elements that may be present. The combined output of the switch response and the interconnect response is called a "switch array response" and is shown schematically in Figure 21, where the cutoff frequency f_c is again shown. This non-ideal response differs considerably from the ideal response shown in Figure 20 and has the effect of rounding off the corners of digital signals, which creates bit error rates that will be unacceptable, if left uncorrected. Qualitatively, bit error rate is sensitive to both frequency dependence of array response and to signal attenuation. The present invention counteracts these effects at the output of the switch 196 by first using leveling circuits 198 to decrease frequency dependence at the expense of increased signal attenuation. Secondly, reshaping and retiming circuits 200 are used to reduce signal attenuation by a combination of signal reshaping using a modulated laser and forward error correction at the edge of the array. Finally, feedforward error correction circuits 202 are used to reduce the bit error rate. In the preferred embodiment, the leveling circuits 198 are chosen so that the leveling circuit response is the inverse of the switch array 196 response. For example, Figure 22 shows a leveling circuit response that is the inverse of the switch array response shown in Figure 21. Then the combined effect of the array 196 and the leveling circuit 198 (i.e., the addition of the curves of Figures 21 and 22) is a flat response up to f_c as shown in Fig 23. Note that in Figure 23 the system response amplitude is decreased by x dB at low frequency due to the leveling circuit 198.

The reshaping and retiming circuits 200 are then used to increase this amplitude by laser modulation. In addition to reshaping the signal, and flattening the frequency response of the system, additional error correction may be needed as well in order to further reduce the bit error rate. There are many kinds of error correction circuits. Some have feedback components and some have feedforward components. The preferred embodiment for the present purposes is a feedforward error correction (FEC) circuit 202.

Typically, feedforward error correction systematically adds redundancy to a serial bit stream in order to correct bit errors. For example, in some telecommunications applications feedforward error correction requires an additional 16 bytes for every 256 bytes in the bitstream (i.e., -6% redundancy). Although this redundancy necessarily reduces bandwidth, the gain from error reduction is often substantial (e.g., orders of magnitude). ("Reference Manual for Telecommunications Engineering", second edition, Wiley Publications, NY (1994), Chapter 16)

The present invention advantageously combines a relatively large number of inexpensive non- ideal switch components, whose response generally falls with frequency. These components are assembled into a switch array 196 that includes inexpensive non-ideal interconnect structures consisting of transmission lines, vias, etc., whose response generally falls with frequency. A relatively small number of error-correcting circuits are included as pre-processing and post-processing for the array 196 including reshaping and retiming circuits 194, 202, leveling circuits 198 and feedforward error correction circuits 202.

The leveling circuits 198, whose frequency response generally increases with frequency, introduce signal attenuation of the output signal at lower frequencies. The reshaping and retiming circuits 194, 200 substantially increase the system amplitude up to 20 Db and substantially negate the above-cited problems associated with signal attenuation. The feedforward error correction circuits 202 also correct for errors. The net effect is a system built from an inexpensive set of components that meet the requirements of linearity and low bit error rate.

The number of switches included in the N-dimensional switch array 196 is of order N².

However, the number of digital error correction circuits 194, 198, 200, 202 is of order N. Thus, the ratio of error correction circuits to switches is of order 1/N, and so for large N (e.g., N=100), the cost of the error correction circuitry is minimal. Additionally it is possible to combine error correction circuits into equivalent circuits. For example, the post-processing circuitry for leveling 198, reshaping and retiming 200, and feedforward error correction 202 may be combined into a single array of digital circuits.

Although only certain exemplary embodiments of this invention have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the exemplary embodiments without materially departing from the novel teachings and advantages of this invention. Accordingly, all such modifications are intended to be included within the scope of this invention.

Claims

What is claimed is.

1 An apparatus for switching optical signals, compnsing: an input transceiver, the input transceiver including a first plurality of reshaping elements; a microwave switch array connected to the input transceiver, the microwave switch array including a plurality of analog switch elements; and an output transceiver connected to the microwave switch array, the output transceiver including a second plurality of reshaping elements, and at least one of the input transceiver and the output transceiver including a plurality of retiming elements, wherein the input transceiver receives input optical signals and generates input microwave signals corresponding thereto, the microwave switch array switches the input microwave signals thereby resulting in output microwave signals, and the output transceiver receives the output microwave signals and generates output optical signals corresponding thereto.

2. An apparatus according to claim 1, wherein the analog switch elements are broadband passthrough elements.

3. An apparatus according to claim 1, wherein the microwave switch array further compπses a plurality of microwave input ports and a plurality of microwave output ports; the input microwave signal includes a selected microwave input signal corresponding to a selected microwave input port; the output microwave signal includes a selected microwave output signal corresponding to a selected microwave output port; and the microwave switch array switches the selected microwave input signal to the selected microwave output signal.

4. An apparatus according to claim 1, wherein the number of reshaping elements in the input transceiver is approximately the dimension of the microwave switch array, and the number of reshaping elements in the output transceiver is approximately the dimension of the microwave switch array.

5. An apparatus according to claim 4, wherein the number of retiming elements in the input transceiver is approximately the dimension of the microwave switch array.

6. An apparatus according to claim 4, wherein the number of retiming elements in the output transceiver is approximately the dimension of the microwave switch array.

7. An apparatus according to claim 1, wherein the output transceiver further comprises a plurality of leveling elements and a plurality of feedforward error correction elements.

8. An apparatus according to claim 7, wherein the number of leveling elements in the output transceiver is approximately the dimension of the microwave switch array, and the number of feedforward error correction elements in the output transceiver is approximately the dimension of the microwave switch array.

9. An apparatus according to claim 1, wherein the output transceiver further comprises a plurality of leveling elements.

10. An apparatus according to claim 9, wherein the number of leveling elements in the output transceiver is approximately the dimension of the microwave switch array.

11. An apparatus according to claim 1, wherein the output transceiver further comprises a plurality of feedforward error correction elements.

12. An apparatus according to claim 11, wherein the number of feedforward error correction elements in the output transceiver is approximately the dimension of the microwave switch array.

13. An apparatus according to claim 1, wherein the apparatus is configured as a permutation switch array.

14. An apparatus for switching optical signals, comprising: an input transceiver, the input transceiver including a first plurality of reshaping elements; a microwave switch array, the microwave switch array including a plurality of input microwave elements, a plurality of output microwave elements, and a plurality of analog switch elements, the analog switch elements being arranged in a plurality of layers between the input microwave elements and the output microwave elements, the microwave switch array being adapted to switch each of the input microwave elements to each of the output microwave elements, and the input microwave elements being connected to the input transceiver; an output transceiver connected to the output microwave elements, the output transceiver including a second plurality of reshaping elements, and at least one of the input transceiver and the output transceiver including a plurality of retiming elements, wherein the input transceiver receives input optical signals and generates input microwave signals corresponding thereto, the microwave switch array switches input microwave signals thereby resulting in output microwave signals, and the output transceiver receives the output microwave signals and generates output optical signals corresponding thereto.

15. An apparatus as claimed in claim 14, wherein the layers are arranged hierarchically to minimize serial connectivity.

16. An apparatus as claimed in claim 14, wherein each of the layers includes a plurality of metalization input lines corresponding to microwave layer inputs, and a plurality of metalization output lines corresponding to microwave layer outputs; and connections between two adjacent layers are made by a plurality of vias that connect the metalization output lines of a first layer and the metalization input lines of a second layer.

17. An apparatus according to claim 14, wherein the analog switch elements are broadband passthrough elements.

18. An apparatus according to claim 14, wherein the output transceiver further comprises a plurality of leveling elements and a plurality of feedforward error correction elements.

19. An apparatus according to claim 18, wherein the number of leveling elements in the output transceiver is approximately the dimension of the microwave switch array; and the number of feedforward error correction elements in the output transceiver is approximately the dimension of the microwave switch array.

20. An apparatus according to claim 14, wherein the output transceiver further comprises a plurality of leveling elements.

21. An apparatus according to claim 20, wherein the number of leveling elements in the output transceiver is approximately the dimension of the microwave switch array.

22. An apparatus according to claim 14, wherein the output transceiver further comprises a plurality of feedforward error correction elements.

23. An apparatus according to claim 22, wherein the number of feedforward error correction elements in the output transceiver is approximately the dimension of the microwave switch array.

24. An apparatus according to claim 14, wherein the apparatus is configured as a permutation switch array.

25. A switch array, comprising: an optical-to-electrical converter, the optical-to-electrical converter including a first plurality of reshaping circuits; a wideband switch that is connected to the optical-to-electrical converter, the wideband switch including an array of electrical analog switches; and an electrical-to-optical converter that is connected to the wideband switch, the electrical-to- optical converter including a second plurality of reshaping circuits, and at least one of the optical-to- electrical converter and the electrical-to-optical converter including a plurality of retiming elements, wherein the optical-to-electrical converter converts input optical signals to input electrical signals, the wideband switch converts the input electrical signals to output electrical signals, and the electrical-to- optical converter converts the output electrical signals to output optical signals.

26. A switch array as claimed in claim 25, wherein the wideband switch comprises: a first hierarchical arrangement of the electrical analog switches for signal selection; and a second hierarchical arrangement of the electrical analog switches for signal collection.

27. A switch array as claimed in claim 26, wherein the first hierarchical arrangement and the second hierarchical arrangement are selected to minimize insertion loss.

28. A switch array as claimed in claim 26, wherein each electrical analog switch has eightfold outputs.

29. A switch array according to claim 25, wherein the output transceiver further comprises a plurality of leveling elements and a plurality of feedforward error correction elements.

30. A switch array according to claim 29, wherein the number of leveling elements in the output transceiver is approximately the dimension of the wideband switch; and the number of feedforward error correction elements in the output transceiver is approximately the dimension of the wideband switch.

31. A switch array according to claim 25, wherein the output transceiver further comprises a plurality of leveling elements.

32. A switch array according to claim 31, wherein the number of leveling elements in the output transceiver is approximately the dimension of the wideband switch.

33. A switch array according to claim 25, wherein the output transceiver further comprises a plurality of feedforward error correction elements.

34. A switch array according to claim 33, wherein the number of feedforward error correction elements in the output transceiver is approximately the dimension of the wideband switch.

35. A switch array according to claim 25, wherein the switch array is configured as a permutation switch array.

36. A method for switching optical signals, comprising: receiving an input optical signal; generating an input microwave signal from the input optical signal, wherein the act of generating the input microwave signal from the input optical signal includes generating an intermediate input microwave signal from the input optical signal and correcting the intermediate input microwave signal to determine the input microwave signal, and the act of correcting the intermediate input microwave signal includes performing reshaping operations; switching the input microwave signal to determine an output microwave signal; generating an output optical signal from the output microwave signal, wherein the act of generating the output optical signal from the output microwave signal includes correcting the output microwave signal to determine an intermediate output microwave signal and generating the output optical signal from the intermediate output microwave signal, and the act of correcting the output microwave signal includes performing reshaping operations; and transmitting the output optical signal, wherein at least one of the acts of correcting the intermediate input microwave signal and correcting the output microwave signal includes performing retiming operations.

37. A method as claimed in claim 36, wherein the act of switching the input microwave signal to determine the output microwave signal comprises switching a selected microwave input signal corresponding to a selected microwave input port to a selected microwave output port, the selected microwave input port being selected from a plurality of microwave input ports, and the selected microwave output port being selected from a plurality of microwave output ports.

38. A method according to claim 36, wherein the act of correcting the intermediate output microwave signal further comprises performing leveling operations and performing feedforward error correcting operations

39. A method according to claim 36, wherein the act of correcting the output microwave signal further comprises performing leveling operations.

40. A method according to claim 36, wherein the act of correcting the output microwave signal further comprises performing feedforward error correcting operations

41. A method according to claim 36, wherein the act of switching the input microwave signal to determine the output microwave signal is a permutation switching.

42. An apparatus for switching microwave signals, comprising: an input correction unit, the input correction unit including a first plurality of reshaping elements; a microwave switch array connected to the input correction unit, the microwave switch array including a plurality of analog switch elements; and an output correction unit connected to the microwave switch array, the output correction unit including a second plurality of reshaping elements, and at least one of the input correction unit and the output correction unit including a plurality of retiming elements, wherein the input correction unit receives incoming microwave signals and generates input microwave signals corresponding thereto, the microwave switch array switches the input microwave signals thereby resulting in output microwave signals, and the output correction unit receives the output microwave signals and generates outgoing microwave signals corresponding thereto.

43. An apparatus according to claim 42, wherein the analog switch elements are broadband passthrough elements.

44. An apparatus according to claim 42, wherein the microwave switch array further comprises a plurality of microwave input ports and a plurality of microwave output ports; the input microwave signal includes a selected microwave input signal corresponding to a selected microwave input port; the output microwave signal includes a selected microwave output signal corresponding to a selected microwave output port; and the microwave switch array switches the selected microwave input signal to the selected microwave output signal.

45. An apparatus according to claim 42, wherein the number of reshaping elements in the input correction unit is approximately the dimension of the microwave switch array, and the number of reshaping elements in the output correction unit is approximately the dimension of the microwave switch array.

46. An apparatus according to claim 45, wherein the number of retiming elements in the input correction unit is approximately the dimension of the microwave switch array.

47. An apparatus according to claim 45, wherein the number of retiming elements in the output correction unit is approximately the dimension of the microwave switch array.

48. An apparatus according to claim 42, wherein the output correction unit further comprises a plurality of leveling elements and a plurality of feedforward error correction elements.

49. An apparatus according to claim 48, wherein the number of leveling elements in the output correction unit is approximately the dimension of the microwave switch array, and the number of feedforward error correction elements in the output correction unit is approximately the dimension of the microwave switch array.

50. An apparatus according to claim 42, wherein the output correction unit further comprises a plurality of leveling elements.

51. An apparatus according to claim 50, wherein the number of leveling elements in the output correction unit is approximately the dimension of the microwave switch array.

52. An apparatus according to claim 42, wherein the output correction unit further comprises a plurality of feedforward error correction elements.

53. An apparatus according to claim 52, wherein the number of feedforward error correction elements in the output correction unit is approximately the dimension of the microwave switch array.

54. An apparatus according to claim 42, wherein the apparatus is configured as a permutation switch array.

55. An apparatus for switching microwave signals, comprising: an input correction unit, the input correction unit including a first plurality of reshaping elements; a microwave switch array, the microwave switch array including a plurality of input microwave elements, a plurality of output microwave elements, and a plurality of analog switch elements, the analog switch elements being arranged in a plurality of layers between the input microwave elements and the output microwave elements, the microwave switch array being adapted to switch each of the input microwave elements to each of the output microwave elements, and the input microwave elements being connected to the input correction unit; an output correction unit connected to the output microwave elements, the output correction unit including a second plurality of reshaping elements, and at least one of the input correction unit and the output correction unit including a plurality of retiming elements, wherein the input correction unit receives incoming microwave signals and generates input microwave signals corresponding thereto, the microwave switch array switches input microwave signals thereby resulting in output microwave signals, and the output correction unit receives the output microwave signals and generates outgoing microwave signals corresponding thereto.

56. An apparatus as claimed in claim 55, wherein the layers are arranged hierarchically to minimize serial connectivity.

57. An apparatus as claimed in claim 55, wherein each of the layers includes a plurality of metalization input lines corresponding to microwave layer inputs, and a plurality of metalization output lines corresponding to microwave layer outputs; and connections between two adjacent layers are made by a plurality of vias that connect the metalization output lines of a first layer and the metalization input lines of a second layer.

58. An apparatus according to claim 55, wherein the analog switch elements are broadband passthrough elements.

59. An apparatus according to claim 55, wherein the output correction unit further comprises a plurality of leveling elements and a plurality of feedforward error correction elements.

60. An apparatus according to claim 59, wherein the number of leveling elements in the output correction unit is approximately the dimension of the microwave switch array; and the number of feedforward error correction elements in the output correction unit is approximately the dimension of the microwave switch array.

61. An apparatus according to claim 55, wherein the output correction unit further comprises a plurality of leveling elements.

62. An apparatus according to claim 61, wherein the number of leveling elements in the output correction unit is approximately the dimension of the microwave switch array.

63. An apparatus according to claim 55, wherein the output correction unit further comprises a plurality of feedforward error correction elements.

64. An apparatus according to claim 63, wherein the number of feedforward error correction elements in the output correction unit is approximately the dimension of the microwave switch array.

65. An apparatus according to claim 55, wherein the apparatus is configured as a permutation switch array.

66. A switch array, comprising: an input correction unit, the input correction unit including a first plurality of reshaping circuits; a wideband switch that is connected to the input correction unit, the wideband switch including an array of electrical analog switches; and an output correction unit that is connected to the wideband switch, the output correction unit including a second plurality of reshaping circuits, and at least one of the input correction unit and the output correction unit including a plurality of retiming elements, wherein the input correction unit corrects incoming electrical signals to determine input electrical signals, the wideband switch converts the input electrical signals to output electrical signals, and the output correction unit converts the output electrical signals to outgoing electrical signals.

67. A switch array as claimed in claim 66, wherein the wideband switch comprises: a first hierarchical arrangement of the electrical analog switches for signal selection; and a second hierarchical arrangement of the electrical analog switches for signal collection.

68. A switch array as claimed in claim 67, wherein the first hierarchical arrangement and the second hierarchical arrangement are selected to minimize insertion loss.

69. A switch array as claimed in claim 67, wherein each electrical analog switch has eightfold outputs.

70. A switch array according to claim 66, wherein the output correction unit further comprises a plurality of leveling elements and a plurality of feedforward error correction elements.

71. A switch array according to claim 70, wherein the number of leveling elements in the output correction unit is approximately the dimension of the wideband switch; and the number of feedforward error correction elements in the output correction unit is approximately the dimension of the wideband switch.

72. A switch array according to claim 66, wherein the output correction unit further comprises a plurality of leveling elements.

73. A switch array according to claim 72, wherein the number of leveling elements in the output correction unit is approximately the dimension of the wideband switch.

74. A switch array according to claim 66, wherein the output correction unit further comprises a plurality of feedforward error correction elements.

75. A switch array according to claim 74, wherein the number of feedforward error correction elements in the output correction unit is approximately the dimension of the wideband switch.

76. A switch array according to claim 66, wherein the switch array is configured as a permutation switch array.

77. A method for switching microwave signals, comprising: receiving an incoming microwave signal; correcting the incoming microwave signal to determine an input microwave signal, wherein the act of correcting the incoming microwave signal includes performing reshaping operations; switching the input microwave signal to determine an output microwave signal; correcting the output microwave signal to determine an outgoing microwave signal, wherein the act of correcting the output microwave signal includes performing reshaping operations; and transmitting the outgoing microwave signal, wherein at least one of the acts of correcting the incoming microwave signal and correcting the output microwave signal includes performing retiming operations.

78. A method as claimed in claim 77, wherein the act of switching the input microwave signal to determine the output microwave signal comprises switching a selected microwave input signal corresponding to a selected microwave input port to a selected microwave output port, the selected microwave input port being selected from a plurality of microwave input ports, and the selected microwave output port being selected from a plurality of microwave output ports.

79. A method according to claim 77, wherein the act of correcting the output microwave signal further comprises performing leveling operations and performing feedforward error correcting operations

80. A method according to claim 77, wherein the act of correcting the output microwave signal further comprises performing leveling operations.

81. A method according to claim 77, wherein the act of correcting the output microwave signal further comprises performing feedforward error correcting operations

82. A method according to claim 77, wherein the act of switching the input microwave signal to determine the output microwave signal is a permutation switching.