WO2001063962A2

WO2001063962A2 - Crossconnect switch with large array size and high bitrate using wideband switch technology

Info

Publication number: WO2001063962A2
Application number: PCT/US2001/005789
Authority: WO
Inventors: Jules D. Levine; Christopher W. Weller; Thomas W. Myers; Stanley Freske
Original assignee: Teraburst Networks, Inc.
Priority date: 2000-02-25
Filing date: 2001-02-23
Publication date: 2001-08-30
Also published as: WO2001063962B1; WO2001063962A3; AU2001238658A1

Abstract

This invention provides a permutation switch array using analog pasthrough elements. Incoming optical signals are transferred to the microwave domain, and the permutation switch array provides the necessary switching functions. After switching has been achieved, the switched signals are then reconverted to the optical domain. In a preferred embodiment, the permutation switching array is an NxN array. Coupled to the input and the output of the permutation switching array are 1xN digital switches that perform error correcting functions.

Description

CROSSCONNECT SWITCH WITH LARGE ARRAY SIZE AND HIGH BITRATE USING WIDEBAND SWITCH TECHNOLOGY

BACKGROUND OF THE INVENTION

1. Field of Invention This invention relates to a communications switch and more particularly to an inexpensive crossconnect wideband switch array for the fiber optic telecommunications industry with larger array sizes and bitrates than possible with the present technology involving digital switch arrays or optical switch arrays.

2. Descπption of Related Art Figure 1 illustrates a permutation switching element for use in the telecommunications industry.

At each node there is the possibility of a connection between the input rows and the ouput columns For example, Input r2 is connected to output s3 as shown in the diagram There are N! different configurations possible in a permutation switch of dimension N (e.g., N=6 in Figure 1). . The important case where there are N inputs and N outputs is called an NxN switch or more generally an NxN array, where an array may be made from a combination of switching elements.

A typical wavelength switching element used in the telecommunications industry is called an optical crossconnect switch, OXC. The OXC uses mirrors that can move a spot of light spot from one location to another. The OXC is a permutation switch; that is, any one input is connected to only one output and vice versa. The net result is that the light intensity is retained during its passage through the switch and not diluted by a multiplicity of connecting paths.

A major disadvantage of the OXC is that it is not possible to vary the wavelength between input and output. That is, the wavelength of input r2 and output s3 must be the same. Optical networks need the additional flexibility of assigning the output s3 a different wavelength from the input r2. This can be done m the network by adding much more complex and costly extra equipment that effectively adds considerable cost to the OXC.

In Figure 1, the array size is drawn for N = 6. However, the array size for a crossconnect application should be appreciably larger, perhaps large enough to accommodate - 100 fibers in each cable and ~ 20 wavelengths in each fiber. A typical crossconnect switch can therefore have N ~ 2,000 to best optimize the performance of the communication network. Since some of these inputs are transmitted without wavelength modification, it is possible to reduce the size of this crossconnect array to perhaps N ~ 1000.

It is possible to use tiling to assemble a multiplicity of smaller mxm crosspomt arrays into a larger NxN array as shown in Figure 2. The system of 9 arrays or chips is shown in bold line. All interconnections can be made on a pπnted circuit board and carry the full bitrate. For example 100 68x68 chips can be arranged to form a larger array of 10*68x10*68 = 680x680. Tiling obviously requires appreciable cost, especially at the higher bitrates and larger array sizes. Alternative approaches to optical switching devices may include conversion of an optical signal to an electrical signal that can be manipulated using digital switching devices For example, a digital optical signal with bitrate B can be passed through a photodetector, in which case it is converted to an electronic signal with the same bitrate. The bit rate B of information flow in each optical stream at each wavelength can be any one of the standard values. For example, B = 2.5, 10, and 40 Gbps, for the industry standards OC-8, OC-192 and OC-768, respectively. The general trend in optical communications is for the higher bit rates.

Digital switches are often used to create crosspomt arrays with a structure similar to the switch shown in Figure 1. A digital switch can be located at each node of Figure 1. Digital switching arrays are composed of active digital switches that operate at the bitrate B. Each switch senses the digital electrical signal at the switch input and recreates the digital electrical signal at the switch output. The switches require power and this power increases with the bitrate. The switch operation is done electrically at microwave or millimeter wave frequencies. For example, at a bitrate of B=10 Gbps, the switch time to go from a "1" to a "0" is less than 1/B or less than 0.1 nanosecond. This is in contrast with the array switching time which is about 1 microsecond.

Digital switching arrays are characteπzed by their array size N and their bitrate B. A given array configuration of N inputs and N outputs can be switched to another configuration having inputs and outputs arranged in a different order withm a time peπod of about one microsecond. Some actual values of B and N in the hterature from discrete components are given in Figure 13. Optimal values of the data points take the general shape of a hyperbola, as shown in Figure 3.

These chips can be made of GaAs as on the left side of Figure 3 or Si as on the πght side of Figure 3. Other materials are also possible. It is clear that large arrays have low bitrates and vice versa. The reason has to do with power consumption of the active devices and the yield of the active devices. The circle labeled R in Figure 3 represents the desired operating region of a switch having both high N and B. What is desired is a low cost version of a chip that operates in region R and satisfies the application requirements.

Digital switches convert each incoming digital stream of 0's and l's into another digital stream with the same amplitude and waveform shape. The digital switches are totally active and respond to the actual bit rate. For example, a switch which is designed for B = 10 Gbps must actively respond to this data rate. The time for this active switching operation is of the order of 1/B which for this example is 0.1 nanosecond. Also, these chips can be used m more generalized configurations than the simple permutation configuration shown in Figure 1. With digital switches, one input can be sent to two or more outputs although this functionality is generally not cπtical for applications involving system reconfiguration and wavelength modification for optimal system utilization and protection. In general, the array switching time required to reconfigure the array in order to change the linkages and wavelengths need not be less than 1 ms., which is an acceptably small fraction of the -50 ms time required for setup and confirming communication between linkages ~100 km apart Therefore, the ability of digital switches to change configurations in substantially less than one millisecond is generally not relevant in most applications

SUMMARY OF THE INVENTION Accordingly, it is an object of this invention to provide an inexpensive crossconnect wideband switch array having full wavelength conversion capability for the fiber optic telecommunications industry

It is a further object to provide a crossconnect switch with larger array sizes and bitrates than possible with the present technology involving digital switch arrays The above and related objects of the present invention are realized by an apparatus for switching optical signals including an input transceiver, a permutation switch array , and an output transceiver. The input transceiver receives input optical signals and generates corresponding input microwave signals. The permutation switch array is coupled to the input transceiver and includes only analog switching elements The permutation switch array operates to switch input microwave signals thereby resulting in output microwave signals. The output transceiver receives the output microwave signals and generates corresponding output optical signals.

According to the present invention, incoming optical signals are transferred to the microwave domain and the permutation switch array provides the necessary switching functions. After switching has been achieved, the switched signals are then reconverted to the optical domain. In a preferred embodiment, the permutation switching array is an NxN array. Coupled to the input and the output of the permutation switching array are lxN digital switches that perform error correcting functions. The present invention enables the reconfiguration of fiber linkages and wavelengths in order to optimize network capacity and offer maximum backup capability in case of fiber failure.

BRIEF DESCRIPTION OF THE DRAWINGS These and other objects and advantages of the invention will become more apparent and more readily appreciated from the following detailed descπption of the presently preferred exemplary embodiments of the invention taken m conjunction with the accompanying drawings, where: Figure 1 is a Schematic Diagram of an NxN permutation crosspoint switch array, Figure 2 is a Tiling of 9 mxm arrays to create a single larger 3m x 3m array; Figure 3 is a Schematic curve showing best values of bitrate B and array size N of individual digital chips as taken from the literature. The circle labeled R indicates the desired operating region;

Figure 4 is a Schematic diagram of a wideband passthrough switch used to reconfigure a network according to the invention,

Figure 5 is a schematic diagram of a smgle-DOF rocking MEMS deflecting mirror device, Figure 6 is a schematic of a MEMS octal switch SP8T according to the invention,

Figure 7 is a schematic diagram of a SPDT solid state switch according to the invention, Figure 8 is a Octal switch operated as an octal selector with one input and 8 outputs according to the invention,

Figure 9 is a Octal switch operated as an octal combiner with eight intputs and one output according to the invention; Figure 10 is an example of a three level selector octal switch fanout design according to the invention;

Figure 11 is a Schematic diagram of fanout of the input on row 18 and inverse fanout to column 27 of a 256 x 256 switching array according to the invention;

Figure 12 is a reshaping circuit used at entrance and exit of NxN array according to the invention;

Figure 13 is a plot of digital microwave crosspomt switch arrays relating representative array sizes and bit rates;

Figure 14 is a schematic drawing of an octal switch with one input and 8 outputs;

Figure 15 is a schematic diagram of a SPDT solid state switch according to the invention; and Figure 16 is a circuit diagram of an 8x8 solid state array according to the invention.

DETAILED DESCRIPTION OF PRESENTLY PREFERRED EXEMPLARY EMBODIMENTS

A preferred embodiment of a crosspomt array 40 according to this invention is illustrated in Figure 4. A network input optical signal 42 from multiple optical fibers is passed through a demux device 44 that separates out the dense wave division multiplexing (DWDM) wavelengths into multiple optical signals. A photodetector 46 converts each resulting optical signal into an electπcal signal where the frequency of the electπcal signal is in the microwave or millimeter wave region from (~1 GHz to -40 GHz). An NxN crosspomt switch 48 receives the electπcal signals and routes the signals based on external commands that may alter the configuration of the network and the wavelengths of the transmitted signals. Preferably, the switch 48 is an analog device that transmits all frequencies from DC (direct current) to a maximum frequency f_B , related to the bitrate B, without distortion.

The electπcal output from the wideband switch 48 is passed through a laser and modulator 50 that transforms electπcal signals into optical signals. A mux device 52 combines the wavelengths and transmits the resulting optical signals along corresponding fibers to the network output 54. In the preferred embodiment, a wideband passthrough switch 48 is used as the building block for the crosspomt array 40 instead of an active digital switch as described above. Additional switch functionality (e.g., add/drop capability) may be added to the embodiment. Traffic in the opposite direction is characteπzed by reversing the polarity of the arrows in Figure 4.

A first preferred embodiment of the wideband switch 48 is based on a system of MEMS (micro- electromechanical systems) optical switches. Figure 5 illustrates a schematic of a one-DOF MEMS unit 53 that is built by Texas Instruments. A rotatable mirror 54 is mounted on a hoπzontal pivot 56 onto a substrate 58. By controlling the angle at the pivot 56, incident light 59a and reflected light 59b can be controlled These units 53 can be combined in systems of one million units The mirrors 54 are fabricated directly on a silicon wafer (I e, substrate 58) using standard silicon processing technology. The device 53 is digital in the sense that the mirrors are stable in either of two rocker positions.

The functionality of the device 53 is to deflect light. The mirror 54 is supported at the pivot 56 on a horizontal axis of silicon which points perpendicular to the page and which is produced by undercut etching. The mirror 54 is actuated to the full πght and left positions like a seesaw by voltages applied to the rotatable and substrate parts (not shown). The mirror 54 is bistable and digital. There is direct electπcal contact made in this device.

The preferred embodiment of this MEMS Building Block is a modification of the above device with electrical connections and a vertical pivot as shown m Figures 6A-6C. Figure 6C illustrates a top plan view of a switch 60 with aluminum contact pads labeled for dual control voltages (0,1), (1,1), (1,0), (1,-1), (0, -1), (-1,-1), (-1,0), (-l,l),and (0,1). The switch 60 consists of an octal-shaped three- dimensional rocker unit which is made of Si. This is Al coated on the edges. In contrast to the MEMS unit 53 of Figure 5, the switch 60 operates to make electπcal (not optical) connections.

Figure 6A is an elevation view that also shows the aluminum contact pads 62, A center post 64 provides a mount for a flex support 66 with a πgid πm 68 above each contact pad 62. Figure 6B is a plan view complementary to Figure 6A where the flex support is deflected to provide contact between a contract pad 62 and a πgid πm 68.

The rocker unit 66 is thinned in the center region to allow for flexibility in the central region. It is thicker at the edges 68 to allow for πgidity so that the entire rocker unit deflects as an overall πgid unit, even though the central region has flexure. At the center of the switch, the post 64 supports the rocker unit and has metallic coating connected to the πm. Electπcal continuity across the switch is provided by applying a voltage between the appropπate contact pad 62 and the post 64. Only two voltages are necessary to address the eight arms of the switch and the voltage combination is shown in Figure 6C. For example, applying a (1, -1) voltage implies that a positive voltage is applied m the x- direction and positive voltage is applied in the -y-direction. Vector addition of the voltages will deflect the rocker so that it is in contact with the Al contact pads m the ground plane only at the appropriate position labeled (1 -1) in Figure 6A.

A second preferred embodiment of the wideband switch is made from solid state switches. For example, a solid state SPDT (single-pole-double-throw) switch 70 for the frequency range DC - 26.5 GHz has been manufactured for example by Agilent and its circuit diagram is shown schematically in Figure 7 In each of the two branches of the SPDT switch there are two FETs m seπes (72a-72b, 74a-

74b), which increase the isolation, and two FETs in shunt (76a-76b, 78a-78b), which help flatten the frequency response The rectangles 80, 82 are examples of transmission line tuning elements as opposed to discrete tuning elements, which help to flatten the frequency response at these higher frequencies. The voltages on the selector switches SEL1 and SEL2 determine whether the signal from RF EN goes to RF OUT 1 or RF OUT2. Frequencies higher than 26.5 GHz are possible using more FETs in seπes, smaller hnewidths m lithography, higher mobility mateπals such as LnP and SiGe, and solid state composite mateπals that offer higher isolation such as sihcon-on-insulator or GaAs-on- quartz.

An alternative solid state switch design is based on PIN diodes. For example, a solid state SPDT (single-pole-double-throw) switch 150 for the frequency range DC - 26 5 GHz has been manufactured for example by Amp, Inc., and its circuit diagram is shown schematically m Figure 15. Two PIN diodes 152a, 152b are connected in seπes and in shunt. This embodiment has added benefits associated with low insertion loss and high isolation. For the PIN diodes 152a, 152b, the OFF state capacitance is very small (e.g., of the order of 4 E-15 Farads), and the ON state resistance is also very small (e.g., of the order of 4 ohms), so that the switching behavior works well, for example, at the nominal operational setting given by 110 GHz with 50 dB isolation and 0.4 dB insertion loss. Another advantage of PIN diodes is that the cross sectional area is typically very small with a radius as small as 30 microns so that many PIN devices can be packed closely together in a switching array.

The solid state SPDT switches 70, 150 can be extended to higher-order designs. For example, Figure 14 illustrates a schematic drawing of a preferred embodiment of solid state octal switch 140 with one input 142 and 8 outputs 144 (i.e., an SP8T switch). The control circuitry (not shown) is set so that only one of the eight outputs can be addressed at any one time. That is, the switching action of one output terminal to ON turns the other output terminals to OFF.

As a component of the wideband switch 48, each octal switch 60, 140 can switch between 1 of 8 states as shown by the switch schematics shown in Figures 8-9. The benefits of this configuration are clearly that an increased functionality is possible using MEMS technology or solid state technology. In addition, the octal switch can be operated as a combiner as shown below. The advantage of operating an octal switch as a octal combiner is that the impedance can be properly matched so that the microwave reflections are minimized. In both the selector and the combiner examples shown above, the input and output impedances are exactly the same, typically Zo = 50 ohms.

Each of the octal switch building blocks (i.e., MEMS unit of Figures 6A-6C, and solid state unit of Figure 14) has an unavoidable insertion loss G. In the case of solid state octal switches operating at GHz frequencies, it is in the range of 1-2 dB. For the desired NxN aπay, there will be S blocks m seπes, where S can be of the order of N, and the system can have an insertion loss of S*G, which must be minimized. For example, if S=100 and G=l dB, then the system loss can be 100 dB which is unacceptable. The goal is to have a large array size N>100, and for a given value of G, this requires designing a system architecture which minimizes the number S of passthrough switches in seπes with each other.

The optimal octal switch for a three level selector octal switch architecture appropriate for a 256x256 switching array is shown in schematic form in Figure 10. For the purposes of discussion, the input signal on row 18 will be connected through the N x N array to the output signal on column 27. In Figure 10 the input to row 18 is directed to a single output of a possible number of 8³ = 512 outputs. The output of level 3 is directed to the actual column of the 512x512 array. In general, for n levels, the number of possible outputs are 8". The layout of these 512 switches is essentially hierarchical in a fanout pattern with coplanar noncrossing lines connecting each output with each input. The coplanar feature makes it easy to fabricate such a device on a chip using a minimal number of metallization levels.

Figure 10 only illustrates row 18 of the 512 rows each having a predetermined input. The remaining 511 rows are not shown in Figure 10. To collect the signal from column 27 it is necessary to reverse the process described above. This is because a wideband combiner is difficult to design in solid state at the required high bitrates. Therefore the reverse process is shown schematically in Figure 11. The horizontal triangle represents signal selection, and the vertical triangle represents signal collection.

As illustrated in Figure 11 , the input to row 18 is sent through the fanout of Figure 10 so that the signal takes a route 112 shown by the dotted line to a point P 114. From P 114 another route 116 shown as a dotted aπow directs the signal to the output at column 27. The horizontal triangles represent the selector switches and the vertical triangles represent the combiner switches. For the 512x512 crosspomt switch shown schematically above, there are a total of 1+8+64 = 73 selector switches per row based on 1 mother octal switch, 8 daughter octal switches attached to the 8 outputs of the mother switch, and 8*8=64 granddaughter octal switches attached to the 8*8 outputs of the daughter switches. The 512 rows then correspond to a total of 37,376 selector switches (i.e., 37,376 =73*512), and similarly the 512 columns correspond to 37,376 combiner switches. As a result, any possible configuration in the 512x512 switching matrix requires only 6 switches in series: 3 for selector octal switches and 3 for combiner octal switches. By limiting the number of switches used, the corresponding insertion loss is thereby limited. The combination of selector and combiner bandpass switches is an optimum way to minimize insertion loss for large arrays.

Figure 16 illustrates a preferred embodiment of a solid state 8x8 array having eight input ports 162a — 162h and eight output ports 164a — 164h. The input ports 162a — 162h lead to -a row 166 of eight selector switches, and the output ports 164a — 164h lead from a column of eight output ports 168. Switches in the preferred embodiments are sometimes referred to as "DC wideband switches."

The digital waveform passing though the array also has some frequency components much higher than the fundamental bitrate. These can become inadvertently filtered or distorted in passing through the aπay. Also the amplitude of the signal will be reduced by the net effect of the insertion losses, even though they are minimized using the array architecture descπbed above To correct for both the frequency and amplitude imperfections caused by the array, a commercial aπay of N digital switches is used at the entrance and exit of the NxN Crosspomt array as shown schematically in Figure 12. That is, N inputs from the demux 122 pass through N reshaping circuits in a transceiver card 24 The resulting N signals then are switched at an NxN array of passthrough switches 126, and the resulting N signals pass through N reshaping circuits in a transceiver card 128 that sends N outputs to the mux 130. Transceiver cards suitable for the reshaping operations are available commercially. Typically these transceiver cards incorporate a multiplicity of both photodetectors and lasers. These transceiver cards provide the functionality of transforming input light signals into electπcal signals using photodetectors 46 as shown in Figure 4. They also reshape the signal, m order to remove distortions and amplitude losses obtained after transport of the optical signal through the fiber en route to the array input. The reshaping function is provided by N digital reshaping circuits 124 which operate at the appropπate bitrate, as shown in Figure 12. The same transceiver cards provide the functionality of modulating a laser 50 using the output electπcal signal as shown in Figure 4. These transceiver cards can also be specially configured to reshape the output signals in order to remove distortions generated inside the analog NxN switch, as shown by the reshaping circuits 128 of Figure 12. For an NxN array with - N² switches, the transceiver requires only 2N digital switches.

Therefore the usage of digital switches is only a small fraction (roughly 1/N) of the total number of switches employed. As a result the cost and power dissipation m the proposed embodiment will be minimized.

The invention possesses a number of desirable features in the design of a crossconnect switch. Replacing active digital switches with passive bandpass switches (i.e, MEMS unit of Figures

6A-6C, or solid state unit of Figure 14) increases the switch bandwidth, reduces the switch complexity and minimizes the power consumption. In addition, since the passive bandpass switches do not operate at the bitrate, this increases their reliability and chip manufactuπng yield, and increases size of a switch array. Also, it is possible to minimize the number of switches in seπes by using an array of switches with multiple outputs. Finally it is possible to use an optimal architecture by arranging the switch layout in two planes with orthogonal wiπng connected by a square aπay of vias.

The power in the electrical signal input to the aπay can be degraded by "broadcasting" the input signal into m parallel output paths as m the conventional design illustrated m Figure 1. This decreases the signal into each path by a factor m. For example, if m = 100, then the signal is decreased by lOOx in each path. By using a cascade of octal switches (instead of broadcast switches) as illustrated in Figure 10, the present invention maximize signal power. Further, this cascading of octal switches minimize insertion loss - Each switch has a finite insertion loss which is similar to seπes resistance. This is a loss measured in dB that is partly internal to the device and partly due to the packaging Suppose m = 100 and the loss is ldB per switch Then the loss through m broadcast switches connected in series would be 100 dB which is totally unacceptable

Further, this cascading of octal switches minimizes reflections compared with the design based on broadcast switches The electπcal signal represents transport of a digital signal along a transmission line at constant velocity, and it is important that the transmission line contain no abrupt discontinuities of impedance A transmission line with impedance Zo which is terminated with a impedance Zl has a power reflection coefficient given by Refl = ((Zo-Zl)/(Zo+Zl))2 Only for Zo = Zl do the reflections vanish

The present invention advantageously minimizes the levels of interconnect waveguides in a chip, since each waveguide is made of deposited and etched metal, and it is too costly and unreliable to have more than a few metallization levels, even for large aπays of the order of 512x512 The present invention has a switch which is non-blockmg. This means that one input is connected to each output and vice versa, and that reconfiguration of some switch settings can be accomplished without changing the other switch settings

The present invention maximizes bitrate. Present day solid state MEMS switches have limitations in bitrate B < 30 GHz To achieve B = 40 GHz m solid state, it is necessary to use smaller feature sizes and or to use newer mateπals with higher speed and isolation such as InP or SiGe or Si on insulator, or GaAs on quartz. The present invention enables achieving B = 40GHz by using an electronic version of a mechanical relay, since the mechanical motion good electπcal contact in the forward direction and good electπcal isolation m the reverse direction Additionally, the solid state unit can handle bitrates commensurate with the maximum operating frequency, and this is usually limited by falloff of insertion loss or of isolation with frequency

Although only certain exemplary embodiments of this invention have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the exemplary embodiments without materially departing from the novel teachings and advantages of this invention Accordingly, all such modifications are intended to be included within the scope of this invention.

Claims

What is claimed is:

1. An apparatus for switching optical signals comprising: an input transceiver that receives input optical signals and generates input microwave signals coπesponding thereto; a permutation switch aπay coupled to the input transceiver, the permutation switch aπay including only analog switching elements and operating to switch input microwave signals thereby resulting in output microwave signals; and an output transceiver that receives the output microwave signals and generates output optical signals coπesponding thereto.

2. An apparatus according to claim 1, wherein the analog switching elements are passive elements.

3. An apparatus according to claim 1, wherein the analog switching elements are large bandwidth passthrough elements.

4. An apparatus according to claim 1 , wherein the permutation switch aπay operates to switch a selected microwave input signal coπesponding to a selected microwave input port to a selected microwave output port, the selected microwave input port is selected from a plurality of microwave input ports, and the selected microwave output port is selected from a plurality of microwave output ports.

5. An apparatus for switching optical signals comprising: an input transceiver that receives input optical signals and generates input microwave signals coπesponding thereto; a permutation switch aπay coupled to the input transceiver, the permutation switch aπay including only analog switching elements and operating to switch input microwave signals thereby resulting in output microwave signals; and an output transceiver that receives the output microwave signals and generates output optical signals coπesponding thereto, wherein the permutation switch aπay operates to switch each of a plurality of input microwave elements to each of a plurality of output microwave elements, the permutation switch aπay being aπanged in a plurality of hierarchical layers.

6. An apparatus as claimed in claim 5, wherein the hierarchical layers are designed to minimize serial connectivity.

7. An apparatus as claimed in claim 5, wherein each of the hierarchical layers includes a plurality of metallization input lines coπesponding to microwave layer inputs; a plurality of metallization output lines coπesponding to microwave layer outputs; and a plurality of vias connecting each of the metallization input lines to each of the metallization output lines.

8. An apparatus according to claim 5, wherein the analog switching elements are passive elements.

9. An apparatus according to claim 5, wherein the analog switching elements are large bandwidth passthrough elements.

10. A permutation switch aπay comprising: a plurality of inputs; a plurality of outputs; a switching aπay coupled to the plurality of inputs and outputs, the switching aπay including a plurality of analog switching elements, each input having at most one analog switching element coupled thereto, and each output having at most one analog switching element coupled thereto.

11. An apparatus according to claim 10 wherein the analog switching elements are passive elements.

12. An apparatus according to claim 10 wherein the analog switching elements are large bandwidth passthrough elements.

13. A switch aπay comprising: an optical-to-electrical converter that converts input optical signals to input electrical signals, a wideband switch that converts input electrical signals to output electrical signals, the wideband switch including an aπay of electrical analog switches. an electrical-to-optical converter that converts output electrical signals to output optical converters.

14. A switch aπay as claimed in claim 13, wherein the wideband switch comprises: a first hierarchical aπangement of the electrical analog switches for signal selection, and a second hierarchical aπangement of the electrical analog switches for signal collection.

15. A switch aπay as claimed in claim 14, wherein the pattern of electrical analog switches in the first hierarchical aπangement and the second hierarchical aπangement is selected to minimize insertion loss.

16. A switch as claimed in claim 14, wherein each electrical analog switch has eightfold outputs.

17. A switch as claimed in claim 14, wherein the optical-to-electrical converter includes a first digital signal reshaping function, and the electrical-to-optical converter includes a second digital signal reshaping function.

18. An analog switching element comprising: an input line; a plurality of output lines, a substrate surface; a rocker plate having polygonal shape defined by a plurality of circumferentially aπanged polygonal edges, the rocker plate including a plurality of conductive pads aπanged along the polygonal edges; a substantially rigid post that supports the rocker plate above the substrate surface at a horizontal pivot, the rocker plate being thinned in a region beyond the post to allow for flexibility in deformation, wherein the rocker plate operates to tilt by the application of applied voltages to the polygonal edges so that the plate makes an electrical connection between the input line and a selected output line.

19. An analog switching element as claimed in claim 18, wherein the rocker plate is octagonal.

20. An aπay of electrical analog switches with multiple outlets comprising: a plurality of electrical analog switches are aπanged in a fanout pattern for optimal signal selection followed by a reverse fanout signal pattern for optimal signal collection, wherein the number of switches in series and the coπesponding insertion loss is minimized.

21. An aπay of electrical analog switches with multiple outlets, comprising: a plurality of field effect transistors aπanged in series in order to obtain higher isolation and higher frequency performance, wherein the electrical analog switches are aπanged in a fanout pattern for optimal signal selection followed by a reverse fanout signal pattern for optimal signal collection.

22. An aπay of electrical analog switches as claimed in claim 21, wherein the number of switches in series and the coπesponding insertion loss is minimized.