WO2000068781A3 - Switching method in a multi-threaded processor - Google Patents

Switching method in a multi-threaded processor Download PDF

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Publication number
WO2000068781A3
WO2000068781A3 PCT/US2000/013094 US0013094W WO0068781A3 WO 2000068781 A3 WO2000068781 A3 WO 2000068781A3 US 0013094 W US0013094 W US 0013094W WO 0068781 A3 WO0068781 A3 WO 0068781A3
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WO
WIPO (PCT)
Prior art keywords
exception
thread
processor
logic
switch
Prior art date
Application number
PCT/US2000/013094
Other languages
French (fr)
Other versions
WO2000068781B1 (en
WO2000068781A2 (en
WO2000068781A9 (en
Inventor
William N Joy
Marc Tremblay
Gary Lauterbach
Joseph I Chamdani
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Priority to EP00932370A priority Critical patent/EP1185929B1/en
Priority to DE60002200T priority patent/DE60002200T2/en
Publication of WO2000068781A2 publication Critical patent/WO2000068781A2/en
Publication of WO2000068781A3 publication Critical patent/WO2000068781A3/en
Publication of WO2000068781B1 publication Critical patent/WO2000068781B1/en
Publication of WO2000068781A9 publication Critical patent/WO2000068781A9/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling

Abstract

A processor (300) includes logic for attaining a very fast exception handling functionality while executing non-threaded programs by invoking a multithreaded-type functionality in response to an exception condition. The procesor, while operating in multithreaded conditions or while executing non-threaded programs, progresses through multiple machine states during execution. The very fast exception handling logic includes connection of an exception signal line to thread select logic, causing an exception signal to evoke a switch in thread and machine state. The switch in thread and machine state causes the processor to enter and to exit the exception handler immediately, without waiting to drain the pipeline or queues and without the inherent timing penalty of the operating system's software saving and restoring of registers.
PCT/US2000/013094 1999-05-11 2000-05-10 Switching method in a multi-threaded processor WO2000068781A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP00932370A EP1185929B1 (en) 1999-05-11 2000-05-10 Switching method in a multi-threaded processor
DE60002200T DE60002200T2 (en) 1999-05-11 2000-05-10 SWITCHING METHOD IN A MULTITHREAD PROCESSOR

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/309,735 1999-05-11
US09/309,735 US6507862B1 (en) 1999-05-11 1999-05-11 Switching method in a multi-threaded processor

Publications (4)

Publication Number Publication Date
WO2000068781A2 WO2000068781A2 (en) 2000-11-16
WO2000068781A3 true WO2000068781A3 (en) 2001-07-19
WO2000068781B1 WO2000068781B1 (en) 2002-04-18
WO2000068781A9 WO2000068781A9 (en) 2002-05-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/013094 WO2000068781A2 (en) 1999-05-11 2000-05-10 Switching method in a multi-threaded processor

Country Status (4)

Country Link
US (3) US6507862B1 (en)
EP (1) EP1185929B1 (en)
DE (1) DE60002200T2 (en)
WO (1) WO2000068781A2 (en)

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