WO2000036652A3 - Method of manufacturing a gate electrode - Google Patents
Method of manufacturing a gate electrode Download PDFInfo
- Publication number
- WO2000036652A3 WO2000036652A3 PCT/US1999/027382 US9927382W WO0036652A3 WO 2000036652 A3 WO2000036652 A3 WO 2000036652A3 US 9927382 W US9927382 W US 9927382W WO 0036652 A3 WO0036652 A3 WO 0036652A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- titanium nitride
- titanium dioxide
- insulator
- manufacturing
- semiconductor device
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 abstract 6
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 abstract 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 abstract 3
- 239000004408 titanium dioxide Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 239000012212 insulator Substances 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 abstract 2
- 238000000151 deposition Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 230000001590 oxidative effect Effects 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
- H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
- H01L21/02326—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen into a nitride layer, e.g. changing SiN to SiON
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
Abstract
A semiconductor device includes an insulator between an electrode and a substrate. For example, the semiconductor device may include an insulated gate component, such as a MOSFET. The insulator is comprised of a material having a relatively high dielectric constant compared to silicon dioxide, such as titanium dioxide. The titanium dioxide is suitably formed by initially depositing titanium nitride. The titanium nitride may be exposed to an oxidizing ambient, such as nitric oxide ambient. The titanium nitride reacts with nitric oxide to form titanium dioxide.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US21140598A | 1998-12-15 | 1998-12-15 | |
US09/211,405 | 1998-12-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2000036652A2 WO2000036652A2 (en) | 2000-06-22 |
WO2000036652A3 true WO2000036652A3 (en) | 2001-03-29 |
Family
ID=22786793
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/027382 WO2000036652A2 (en) | 1998-12-15 | 1999-11-18 | Method of manufacturing a gate electrode |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2000036652A2 (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4335391A (en) * | 1978-12-11 | 1982-06-15 | Texas Instruments Incorporated | Non-volatile semiconductor memory elements and methods of making |
US5134451A (en) * | 1989-04-17 | 1992-07-28 | Oki Electric Industry Co., Ltd. | MOS semiconductive device |
US5292673A (en) * | 1989-08-16 | 1994-03-08 | Hitachi, Ltd | Method of manufacturing a semiconductor device |
US5834353A (en) * | 1997-10-20 | 1998-11-10 | Texas Instruments-Acer Incorporated | Method of making deep sub-micron meter MOSFET with a high permitivity gate dielectric |
EP0973189A2 (en) * | 1998-07-15 | 2000-01-19 | Texas Instruments Incorporated | A method for gate-stack formation including a high-K dielectric |
-
1999
- 1999-11-18 WO PCT/US1999/027382 patent/WO2000036652A2/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4335391A (en) * | 1978-12-11 | 1982-06-15 | Texas Instruments Incorporated | Non-volatile semiconductor memory elements and methods of making |
US5134451A (en) * | 1989-04-17 | 1992-07-28 | Oki Electric Industry Co., Ltd. | MOS semiconductive device |
US5292673A (en) * | 1989-08-16 | 1994-03-08 | Hitachi, Ltd | Method of manufacturing a semiconductor device |
US5834353A (en) * | 1997-10-20 | 1998-11-10 | Texas Instruments-Acer Incorporated | Method of making deep sub-micron meter MOSFET with a high permitivity gate dielectric |
EP0973189A2 (en) * | 1998-07-15 | 2000-01-19 | Texas Instruments Incorporated | A method for gate-stack formation including a high-K dielectric |
Non-Patent Citations (2)
Title |
---|
HOBBS, C. ET AL: "Sub-Quarter Micron CMOS Process for TiN-Gate MOSFET's with TiO2 Gate Dielectric formed by Titanium Oxidation", 1999 VLSI SYMPOSIUM ON VLSI TECHNOLOGY DIGEST OF TECHNICAL PAPERS, 14 June 1999 (1999-06-14), Tokyo, Japan, pages 133 - 134, XP002151688 * |
LUAN H F ET AL: "ULTRATHIN TIO2 GATE DIELECTRIC FORMATION BY ANNEALING OF SPUTTERED TI ON NITROGEN PASSIVATED SI SUBSTRATES IN NITRIC OXIDE AMBIENT", MATERIALS RESEARCH SOCIETY SYMPOSIUM PROCEEDINGS. VOL. 567,US,WARRENDALE, PA: MRS, 5 April 1999 (1999-04-05), pages 481 - 487, XP000897865, ISBN: 0-55899-474-2 * |
Also Published As
Publication number | Publication date |
---|---|
WO2000036652A2 (en) | 2000-06-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2003103032A3 (en) | A method for making a semiconductor device having a high-k gate dielectric | |
WO2003041124A3 (en) | Method of fabricating a gate stack at low temperature | |
WO2000013236A3 (en) | Layered dielectric on silicon carbide semiconductor structures | |
WO2006023026A3 (en) | Method of forming a semiconductor device and structure thereof | |
WO2002097889A3 (en) | Semiconductor device and a method therefor | |
EP1463121A4 (en) | Semiconductor device and production method therefor | |
IE831223L (en) | Fabricating a semiconductor device with a base region having¹a deep portion | |
WO2006055226A3 (en) | Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide | |
MY127799A (en) | Soi device with reduced junction capacitance. | |
KR940006212A (en) | High dielectric constant oxide on semiconductor using germanium buffer layer and method for manufacturing same | |
EP0915522A3 (en) | Semiconductor device comprising a capacitor and method of manufacturing the same | |
EP1235279A3 (en) | Semiconductor device using nitride compound and method for fabricating the same | |
IE57207B1 (en) | A process for forming nitrided silicon dioxide layers for semiconductor integrated circuits | |
KR20020059447A (en) | Method for establishing ultra-thin gate insulator using anneal in ammonia | |
Rosenberg et al. | Self-aligned germanium MOSFETs using a nitrided native oxide gate insulator | |
EP1434272A4 (en) | Production method for semiconductor device | |
WO2002071448A3 (en) | Single transistor ferroelectric memory cell | |
US5254506A (en) | Method for the production of silicon oxynitride film where the nitrogen concentration at the wafer-oxynitride interface is 8 atomic precent or less | |
EP1049172A3 (en) | A SOI structure semiconductor device and a fabrication method thereof | |
US6207542B1 (en) | Method for establishing ultra-thin gate insulator using oxidized nitride film | |
EP0821405A3 (en) | MOSFET gate insulation and process for production thereof | |
WO2000036652A3 (en) | Method of manufacturing a gate electrode | |
EP1150354A4 (en) | Capacitor and method of its manufacture | |
US6399519B1 (en) | Method for establishing ultra-thin gate insulator having annealed oxide and oxidized nitride | |
WO2003009374A1 (en) | Production method of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): JP |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
AK | Designated states |
Kind code of ref document: A3 Designated state(s): JP |
|
AL | Designated countries for regional patents |
Kind code of ref document: A3 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE |
|
122 | Ep: pct application non-entry in european phase |