WO2000025210A1 - Integrated software development and debug environment - Google Patents

Integrated software development and debug environment Download PDF

Info

Publication number
WO2000025210A1
WO2000025210A1 PCT/US1999/025002 US9925002W WO0025210A1 WO 2000025210 A1 WO2000025210 A1 WO 2000025210A1 US 9925002 W US9925002 W US 9925002W WO 0025210 A1 WO0025210 A1 WO 0025210A1
Authority
WO
WIPO (PCT)
Prior art keywords
interface
workstation
target
based device
processor based
Prior art date
Application number
PCT/US1999/025002
Other languages
French (fr)
Other versions
WO2000025210A9 (en
Inventor
Yogendra Champaklal Shah
Original Assignee
Algorex, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Algorex, Inc. filed Critical Algorex, Inc.
Priority to KR1020007007037A priority Critical patent/KR20010015893A/en
Priority to DE19982342T priority patent/DE19982342T1/en
Priority to AU21434/00A priority patent/AU2143400A/en
Publication of WO2000025210A1 publication Critical patent/WO2000025210A1/en
Publication of WO2000025210A9 publication Critical patent/WO2000025210A9/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3664—Environments for testing or debugging software
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/20—Software design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/2733—Test interface between tester and unit under test

Definitions

  • the present invention relates to microprocessor-based products. More specifically, the present invention relates to products such as Mobile Terminals, where the system design employs a microprocessor performing software based functions for development and debugging.
  • a set of software development tools is currently available to aid the development of complex software systems. These software tools, which run on a host Development and Debug Workstation, are based upon an object oriented design methodology. This allows software to be debugged from a higher level functional point of view, rather than by analyzing memory based variables, and inferring higher layer software information.
  • MSC Message Sequence Charts
  • FSM Finite State Machines
  • the current method of communication is based upon a variety of communication links, including Ethernet connections and serial ports. These communication link requirements dictate a need for dedicated hardware in the product. However, the product design may not include these peripherals, or it may not be possible to provide these peripherals on the final manufactured product. In these situations, therefore, the above described new generation of software development tools could not be used for product development.
  • ICE (In-Circuit Emulation) port It is an object of the present invention to eliminate the need for Ethernet links, serial ports, or other specifically engineered communication hardware for software development and debugging.
  • a method for interfacing a development and debugging workstation with a microprocessor based device having preexisting diagnostic software comprises the following steps:
  • identifying the type of interface associated with the preexisting diagnostic software in the microprocessor based device such as JTAG
  • FIG 1 shows a block diagram of a development environment, in accordance with the invention.
  • FIG 2 shows a block diagram of an alternative development environment, in accordance with the invention.
  • FIG. 1 a diagram of a development environment is shown in Figure 1.
  • the product under development 100 includes a microprocessor with a JTAG based serial interface. This type of interface can be used to connect a host development platform with a target microprocessor.
  • a JTAG interface cable 105 is connected from product 100 to an interface board 1 10 on a development workstation 120.
  • Interface board 1 10 also includes a JTAG interface, which provides workstation development tool 120 with a mechanism for communicating directly with target microprocessor 100.
  • this interface 1 10 eliminates the need for Ethernet links, serial ports, or any other specifically engineered communication hardware for the software development and debugging process.
  • the software running on target microprocessor 100 allows data to be passed between target microprocessor 100 and development workstation 120.
  • Workstation 120 interprets this data and displays and animates the resultant information visually, by way of Message Sequencing Charts (MSC) and Finite State
  • FSM Machine transitions
  • the present invention is clearly applicable to any form of product in which a microprocessor or digital signal processor (DSP) implements software based instructions.
  • DSP digital signal processor
  • any form of communication mechanism may be employed which allows the capability of transferring data between a development workstation and a product under development.
  • workstation 120 can still communicate with a JTAG interface device even when workstation 120 has a typical Ethernet or serial port interface 130.
  • an interface translator device 140 is added at the input to target hardware 100. This converter device 140 translates data between the workstation Ethernet or serial interface 130 and the target microprocessor 100 JTAG interface.
  • a method and apparatus which enables communication between a development and debugging workstation and a target microprocessor product having a JTAG serial interface. That is, the workstation-to- product communication does not require any dedicated product communication links, such as Ethernet connections or serial ports, to be included in the product.
  • the development and debugging of the product is made more versatile and efficient.
  • the debugging and analysis process is enhanced from the initial prototype stage through final product development.
  • the present invention also enables software to be debugged and analyzed more efficiently, using the new generation of development tools.

Abstract

A development environment includes a development workstation (120) and a target microprocessor (100) based product, such as a Mobile Terminal. Diagnostic messages are communicated between the workstation and the microprocessor by means of a serial interface, which takes advantage of preexisting diagnostic software capabilities in the target microprocessor product. Typically, the preexisting software includes a JTAG or ICE interface port. This software interface port eliminates the need for Ethernet links, serial ports, or other specifically engineered communication hardware when the workstation also has a JTAG interface. If, on the other hand, the workstation has an Ethernet or serial port interface (130), an interface translator device (140) is connected between the microprocessor based product and the workstation interface.

Description

INTEGRATED SOFTWARE DEVELOPMENT AND DEBUG ENVIRONMENT
CROSS REFERENCE TO RELATED APPLICATION
This application claims the benefit of U.S. Provisional Application No. 60/105,596, filed October 26, 1998, which is hereby incorporated by reference in its entirety.
FIELD OF THE INVENTION
The present invention relates to microprocessor-based products. More specifically, the present invention relates to products such as Mobile Terminals, where the system design employs a microprocessor performing software based functions for development and debugging.
BACKGROUND OF THE INVENTION
A set of software development tools is currently available to aid the development of complex software systems. These software tools, which run on a host Development and Debug Workstation, are based upon an object oriented design methodology. This allows software to be debugged from a higher level functional point of view, rather than by analyzing memory based variables, and inferring higher layer software information.
Many software products are typically described by Message Sequence Charts (MSC) and Finite State Machines (FSM). These tools allow a developer to view, animate, and analyze messages and state machines running in the software. As a result, functional tracing of the software is enhanced, and software development and debugging efficiency is increased. The above described software tools make use of features which are available in most operating systems used in developing real-time software. These systems enable the software tools to communicate with a target product processor by sending diagnostic messages back and forth between the target product processor and the host development workstation.
The current method of communication is based upon a variety of communication links, including Ethernet connections and serial ports. These communication link requirements dictate a need for dedicated hardware in the product. However, the product design may not include these peripherals, or it may not be possible to provide these peripherals on the final manufactured product. In these situations, therefore, the above described new generation of software development tools could not be used for product development.
Accordingly, it is an object of the present invention to overcome the disadvantages of the prior art by utilizing the diagnostic capabilities preexisting in most microprocessors, which are known as the JTAG (Joint Test Action Group) or
ICE (In-Circuit Emulation) port. That is, it is an object of the present invention to eliminate the need for Ethernet links, serial ports, or other specifically engineered communication hardware for software development and debugging.
BRIEF SUMMARY OF THE INVENTION
In accordance with an illustrative embodiment of the present invention, a method for interfacing a development and debugging workstation with a microprocessor based device having preexisting diagnostic software, comprises the following steps:
a) identifying the type of interface associated with the preexisting diagnostic software in the microprocessor based device, such as JTAG, b) identifying the type of interface incorporated into the workstations, such as JTAG or Ethernet, etc.,
c) when preexisting software interface and the workstation interface are of the same type (e.g., both JTAG), connecting the microprocessor based device directly to the workstation interface, and
d) when the preexisting software interface and the workstation interface are not of the same type (e.g., JTAG to Ethernet), interjecting an interface translator device (e.g., Ethernet to JTAG) between the microprocessor based device and the workstation interface.
Thus, the need for Ethernet, or another type of special hardware communication link within the microprocessor based product is eliminated.
An illustrative embodiment of the present invention is more fully described below in conjunction with the following drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG 1 shows a block diagram of a development environment, in accordance with the invention; and
FIG 2 shows a block diagram of an alternative development environment, in accordance with the invention.
DETAILED DESCRIPTION OF THE INVENTION
In accordance with an embodiment of the present invention, a diagram of a development environment is shown in Figure 1. The product under development 100 includes a microprocessor with a JTAG based serial interface. This type of interface can be used to connect a host development platform with a target microprocessor. A JTAG interface cable 105 is connected from product 100 to an interface board 1 10 on a development workstation 120. Interface board 1 10 also includes a JTAG interface, which provides workstation development tool 120 with a mechanism for communicating directly with target microprocessor 100. Importantly, this interface 1 10 eliminates the need for Ethernet links, serial ports, or any other specifically engineered communication hardware for the software development and debugging process.
The software running on target microprocessor 100 allows data to be passed between target microprocessor 100 and development workstation 120.
Workstation 120 interprets this data and displays and animates the resultant information visually, by way of Message Sequencing Charts (MSC) and Finite State
Machine transitions (FSM).
The present invention is clearly applicable to any form of product in which a microprocessor or digital signal processor (DSP) implements software based instructions. For example, instead of a JTAG or ICE Interface, any form of communication mechanism may be employed which allows the capability of transferring data between a development workstation and a product under development.
As shown in the Figure 2 example, workstation 120 can still communicate with a JTAG interface device even when workstation 120 has a typical Ethernet or serial port interface 130. To achieve communication, an interface translator device 140 is added at the input to target hardware 100. This converter device 140 translates data between the workstation Ethernet or serial interface 130 and the target microprocessor 100 JTAG interface.
In short, a method and apparatus is disclosed herein which enables communication between a development and debugging workstation and a target microprocessor product having a JTAG serial interface. That is, the workstation-to- product communication does not require any dedicated product communication links, such as Ethernet connections or serial ports, to be included in the product.
As a result of eliminating the need for extra interface hardware in a product, the development and debugging of the product is made more versatile and efficient. Moreover, the debugging and analysis process is enhanced from the initial prototype stage through final product development. In addition, the present invention also enables software to be debugged and analyzed more efficiently, using the new generation of development tools.
The above described embodiments of the invention are intended to be illustrative only. For example, the invention is applicable to various types of processors, of which microprocessors and DSPs are but two examples. Numerous alternative embodiments may be devised by those skilled in the art without departing from the spirit and scope of the following claims.

Claims

WHAT IS CLAIMED IS:
1. A method for interfacing a development and debugging workstation having a workstation interface with a target processor based device having a target interface, the processor based device and target interface being configured for development and debugging of the processor based device in conjunction with a workstation, said method comprising the steps of:
identifying a type of target interface;
identifying a type of the workstation interface; and
establishing a communications path between the target interface and the workstation interface.
2. The method of Claim 1 wherein said step of establishing a communications path between the target interface and the workstation interface comprises the step of connecting the target interface directly to the workstation interface when the target interface and the workstation interface are of the same type.
3. The method of Claim 1 wherein said step of establishing a communications path between the target interface and the workstation interface incorporated into the workstation comprises the step of connecting an interface translator device between the target interface and the workstation interface when the target interface and the workstation interface are not of the same type.
4. The method of claim 1 wherein the target interface is an in circuit emulation (ICE) port.
5. The method of claim 4 wherein the target interface is a JTAG port.
6. The method of claim 1 wherein the workstation interface includes an interface to an in circuit emulation (ICE) port.
7. The method of claim 6 wherein the workstation interface includes a
JTAG interface.
8. The method of claim 1 wherein the workstation interface includes a bidirectional interface.
9. The method of claim 1 wherein the workstation interface includes an Ethernet interface.
10. The method of claim 1 wherein the workstation interface includes a serial interface.
1 1. A method for developing and debugging software for a processor based device, the processor based device including a preexisting target interface and preexisting diagnostic software comprising the steps of:
interfacing the processor based device with a development and debugging workstation via the preexisting target interface; and
passing data between the processor based device and the development and debugging workstation utilizing the preexisting target interface.
12. A method according to Claim 11 further comprising the step of:
interpreting the data passed from the processor based device to the workstation.
13. A method according to Claim 1 1 further comprising the step of:
displaying the data passed from the processor based device to the workstation.
14. A method according to Claim 1 1 further comprising the step of:
animating the data passed from the processor based device to the workstation utilizing message sequencing charts (MSC).
15. A method according to Claim 11 further comprising the step of: animating the data passed from the processor based device to the workstation utilizing finite state machine (FSM) transitions.
16. A method according to Claim 11 further comprising the step of:
animating the data passed from the processor based device to the workstation utilizing message sequencing charts (MSC) and finite state machine (FSM) transitions.
17. A method according to Claim 11 where the target interface is a JTAG port.
18. An apparatus for developing and debugging a target processor based device having a target interface, said apparatus comprising:
a development and debugging workstation including a workstation interface; and
an interconnection interface between the target interface and the workstation interface.
19. An apparatus according to Claim 18 wherein said target interface and said workstation interface are not of the same type, and said interconnection interface further comprises an interface translator device.
20. An apparatus according to Claim 18 wherein said development and debugging workstation is configured to utilize message sequencing charts (MSC) to animate data passed from the target processor based device to said workstation.
21. An apparatus according to Claim 20 wherein the target interface is a JTAG port.
22. An apparatus according to Claim 18 wherein said development and debugging workstation is configured to utilize finite state machine (FSM) transitions to animate data passed from the target processor based device to said workstation.
23. An apparatus according to Claim 22 wherein the target interface is a JTAG port.
24. An apparatus according to Claim 18 wherein said development and debugging workstation is configured to utilize message sequencing charts (MSC) and finite state machine (FSM) transitions to animate data passed from the target processor based device to said workstation.
25. An apparatus according to Claim 24 wherein the target interface is a JTAG port.
26. An apparatus according to Claim 18 wherein the target interface is an in circuit emulation (ICE) port.
27. An apparatus according to Claim 26 wherein the target interface is a JTAG port.
28. An apparatus according to Claim 18 wherein the workstation interface is a bi-directional interface.
29. An apparatus according to Claim 18 wherein the workstation interface is an Ethernet interface.
30. An apparatus according to Claim 18 wherein said workstation interface is a serial interface.
PCT/US1999/025002 1998-10-26 1999-10-25 Integrated software development and debug environment WO2000025210A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020007007037A KR20010015893A (en) 1998-10-26 1999-10-25 Integrated software development and debug environment
DE19982342T DE19982342T1 (en) 1998-10-26 1999-10-25 Integrated software development and debugging environment
AU21434/00A AU2143400A (en) 1998-10-26 1999-10-25 Integrated software development and debug environment

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10559698P 1998-10-26 1998-10-26
US60/105,596 1998-10-26

Publications (2)

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WO2000025210A1 true WO2000025210A1 (en) 2000-05-04
WO2000025210A9 WO2000025210A9 (en) 2000-09-28

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AU (1) AU2143400A (en)
DE (1) DE19982342T1 (en)
WO (1) WO2000025210A1 (en)

Cited By (5)

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EP1659754A1 (en) * 2004-11-22 2006-05-24 LG Electronics Inc. System and method for remotely controlling a debugging unit
CN100365994C (en) * 2004-06-17 2008-01-30 国际商业机器公司 Method and system for regulating ethernet
DE102006030607A1 (en) * 2006-07-03 2008-01-31 Segger Microcontroller Systeme Gmbh Embedded system testing device, has emulator adjusted for testing different systems, and memory storing instructions and data for operating emulator, where instructions and data are adjusted and extended by user of computer over interface
WO2009118759A2 (en) 2008-03-26 2009-10-01 Advinus Therapeutics Pvt. Ltd., Heterocyclic compounds as adenosine receptor antagonist
WO2011055391A1 (en) 2009-11-09 2011-05-12 Advinus Therapeutics Private Limited Substituted fused pyrimidine compounds, its preparation and uses thereof

Families Citing this family (1)

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JP2008033849A (en) * 2006-08-01 2008-02-14 Hitachi Ltd Fault analysis system

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100365994C (en) * 2004-06-17 2008-01-30 国际商业机器公司 Method and system for regulating ethernet
EP1659754A1 (en) * 2004-11-22 2006-05-24 LG Electronics Inc. System and method for remotely controlling a debugging unit
US7475287B2 (en) 2004-11-22 2009-01-06 Lg Electronics Inc. System and method for remotely controlling a debugging unit
DE102006030607A1 (en) * 2006-07-03 2008-01-31 Segger Microcontroller Systeme Gmbh Embedded system testing device, has emulator adjusted for testing different systems, and memory storing instructions and data for operating emulator, where instructions and data are adjusted and extended by user of computer over interface
WO2009118759A2 (en) 2008-03-26 2009-10-01 Advinus Therapeutics Pvt. Ltd., Heterocyclic compounds as adenosine receptor antagonist
WO2011055391A1 (en) 2009-11-09 2011-05-12 Advinus Therapeutics Private Limited Substituted fused pyrimidine compounds, its preparation and uses thereof

Also Published As

Publication number Publication date
DE19982342T1 (en) 2001-03-22
AU2143400A (en) 2000-05-15
KR20010015893A (en) 2001-02-26
WO2000025210A9 (en) 2000-09-28

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