WO2000021027A1 - Method for producing a supporting element for an integrated circuit module for placement in chip cards - Google Patents

Method for producing a supporting element for an integrated circuit module for placement in chip cards Download PDF

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Publication number
WO2000021027A1
WO2000021027A1 PCT/DE1999/003150 DE9903150W WO0021027A1 WO 2000021027 A1 WO2000021027 A1 WO 2000021027A1 DE 9903150 W DE9903150 W DE 9903150W WO 0021027 A1 WO0021027 A1 WO 0021027A1
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WO
WIPO (PCT)
Prior art keywords
plastic substrate
connection points
module
contact surfaces
carrier element
Prior art date
Application number
PCT/DE1999/003150
Other languages
German (de)
French (fr)
Inventor
Gerd Mederski
Lothar Fannasch
Original Assignee
Orga Kartensysteme Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=7883345&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2000021027(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Orga Kartensysteme Gmbh filed Critical Orga Kartensysteme Gmbh
Priority to EP99955820A priority Critical patent/EP1034510A1/en
Priority to JP2000575078A priority patent/JP2002526869A/en
Priority to AU12624/00A priority patent/AU1262400A/en
Publication of WO2000021027A1 publication Critical patent/WO2000021027A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Definitions

  • the invention relates to methods for producing a carrier element for an IC chip for installation in chip cards.
  • Chip cards usually have a separate carrier element in which the IC component (semiconductor chip) is accommodated.
  • This carrier element also called chip module
  • This carrier element on which there are electrically conductive contact surfaces, is inserted into a blind hole-like cavity of the card body.
  • the contact surfaces located on the carrier element which are connected to connection points of the IC module, serve for energy supply and communication with corresponding data exchange devices (chip card reader).
  • Such a carrier element is known from DE 30 29 667 C2.
  • a plastic substrate is used, on which metal coatings serving as contact surfaces are arranged on one side, which are applied galvanically.
  • the IC chip is fixed on the plastic substrate or in a window of the plastic substrate directly on the metal coating; with the side that does not have the connection points, ie the connection points are arranged facing away from the plastic substrate and the contact surfaces.
  • the electrically conductive connection between the contact surfaces and the connection points is made using fine gold wires in the so-called wirebonding process.
  • the plastic substrate has access windows so that the rear sides of the metallic contact surfaces for contacting the gold wires are partially exposed. To protect the fragile gold wire and the IC chip, it and the gold wire are then surrounded with a protective casting compound.
  • Such carrier element according to DE 30 29 667 C2 have some disadvantages.
  • the metal coating must first be applied to the plastic substrate in several deposition and etching steps.
  • the electroplating baths used represent a major environmental problem in their disposal.
  • the height of such support elements is relatively large due to the design, because the gold wires between the connection points of the IC module and the contact surfaces are guided in a large loop since a certain radius of curvature must not be undercut.
  • a carrier element with a large overall height requires a correspondingly deep cavity in the card body, which in turn has the consequence that the remaining thickness of the card body in the region of the cavity is very thin.
  • a thin remaining card thickness in the area of the cavity again leads to problems when printing on the card body, since these are easily deformable in the area of the blind hole-like cavity.
  • the object of the invention is to provide a method with which carrier elements for IC components for use in chip cards can be produced simply and inexpensively, with this method also intended to achieve a low overall height of the carrier element.
  • a plastic substrate without metal coating is provided, which has cutouts that correspond to the connection points of the IC chip.
  • the IC module is then fixed with its side having the connection points on the plastic substrate in such a way that the connection points are arranged precisely in relation to the cutouts in the plastic substrate.
  • the electrically conductive contact surfaces are then formed using a mask by depositing a metal from the gas phase (vapor deposition) on the areas of the plastic substrate that are not covered by the mask. At the same time through the recesses in the Plastic substrate through it also made the conductive connections to the connection points of the IC chip (claim 1).
  • the methods according to the invention for producing a carrier element for IC components for use in chip cards have the advantage, on the one hand, that the production of the contact areas and the production of the conductive connection between them and the connection points of the IC component take place in one step.
  • the expensive and environmentally damaging electroplating for producing the contact surfaces on the plastic substrate is no longer necessary.
  • the complex wirebonding is not necessary.
  • the conductive connection produced in this way according to the invention between the contact surfaces and the connection points of the IC module is very much less sensitive to mechanical loads than the gold wires previously used.
  • 1 is a plan view of a chip card
  • Fig. 7 shows a schematic representation of the plastic substrate with IC- fixed on it
  • FIG. 8 a section through a carrier element
  • FIG 9 shows a section through a carrier element, which is additionally provided with a protective
  • Cast housing is surrounded, Figure 10 shows a section through a further support element.
  • FIG. 1 shows a top view of a chip card (1).
  • the electrical contact surfaces (5) of the carrier element (4) can be seen.
  • the chip card readers have corresponding contacting units via which the contact surfaces (5) are electrically connected to the electronics in the chip card reader.
  • FIG. 2 shows a section through the chip card (1) in the region of the carrier element (4).
  • the carrier element (4) which is only shown schematically, is located in a two-stage blind hole-like cavity (3) of the card body (2).
  • the schematically illustrated carrier element (4) consists of only two parts for those who implant it into a card body: a first part on which the contact surfaces (5) are arranged and a second part in the form of a cast housing (6) which the IC module (7) is housed.
  • FIG. 3 shows a top view of an IC module (monolithic semiconductor module, 7) with its connection points (8).
  • the connection points (8) are mostly flat elements made of aluminum or copper.
  • connection points (8) can be flush with the dielectric protective layer (9) - cf. Fig. 5 - or protrude beyond it - cf. Fig. 6 - or lower than the dielectric protective layer
  • FIG. 4 shows the plastic substrate (10) on which the contact surfaces (6) are to be applied according to the invention.
  • the plastic substrate (10) has cutouts (11) which correspond to the connection points (8) of the IC module (7), i.e. the number and arrangement of the cutouts (11) in the plastic substrate (10) corresponds to the number and arrangement of the connection points (8) on the IC module (7).
  • the diameter of the recesses (11) and the geometry can correspond to the diameter and the geometry of the connection points (8). However, it is also provided that the diameter of the recesses (11) is larger or smaller than the diameter of the connection points (8). Both circular and rectangular cutouts (11) can be considered.
  • These recesses (11) are preferably produced by stamping the plastic substrate (10).
  • the mask (12) for applying the contact surfaces (5) to the plastic substrate (10) is located on the plastic substrate
  • the carrier elements (4) it is preferable not to use a single, separate plastic substrate (10) with cutouts (11), but rather to use a plastic substrate tape on which there are cutouts (11) for a large number of carrier elements (4). After the carrier elements (4) have been produced, there is a carrier element band from which the individual carrier elements (4) are then separated by punching out.
  • the IC component (7) is preferably fixed on the plastic substrate (10) by means of an adhesive (14) in such a way that the connection points (8) are positioned exactly in relation to the cutouts (11) in the Plastic substrate (10) are arranged.
  • the adhesive (14) for example in the form of an adhesive drop - is previously applied to the IC module (7) and / or to the plastic substrate (10).
  • the amount of adhesive is dosed so that a thin adhesive film forms when the IC module (7) is fixed on the plastic substrate (10), but does not reach the connection points (8) on the IC module (7).
  • the IC module (7) is fixed precisely on the plastic substrate (10) with the aid of an optical detection system, for example a digital camera.
  • the IC component (7) is then fixed only when the cutouts (11) in the plastic substrate (10) and the connection points (8) lie one on top of the other.
  • individual plastic substrates (10) are not used in production, but rather a plastic substrate tape that is unwound from a roll by motor.
  • the IC components (7) are preferably fed to the plastic substrate strip via a vacuum suction device which engages on the side of the IC component (7) facing away from the connection points (8).
  • the mechanical transport of the plastic substrate tape and the mechanical feeding of the IC module (7) are monitored and controlled by the optical detection station in order to fix the IC module (7) precisely in position.
  • the intermediate product (15) obtained is a plastic substrate tape on which a multiplicity of IC components (7) are each fixed with their connection points (8) to the recesses (11) of the plastic substrate (12).
  • a vapor deposition system (16) is shown in which the intermediate product (15) for forming the contact surfaces (5) and the conductive connection (20) between them and the connection points (8) of the IC chip (7) by metal deposition is introduced from the gas phase.
  • a correspondingly high vapor pressure of the metal to be applied (here gold, Au) is generated in the vacuum evaporation system by heating the metal. This can be done directly or indirectly in a known manner, e.g. by electron bombardment of the material to be deposited.
  • the metal deposition from the gas phase can also take place in a so-called sputtering system, where the metal to be deposited on the plastic substrate (10) is better bombarded with ions in order to knock out material in the direction of the plastic substrate (10), which can then be deposited.
  • sputtering are physical deposition processes for metals from the gas phase. Both methods are summarized under the English technical term "Physical Vapor Deposition" (PVD).
  • a continuous metal coating is obtained as an electrically conductive connection (20) from the contact surfaces (5, 19) via the inner wall of the cutouts (11) in the plastic substrate (10) to the connection points (8) of the IC component (7).
  • the cutouts (11) in the plastic substrate (10) can also be completely filled with the deposited metal.
  • the gaseous metal particles can also pass through the cutouts (11) into areas adjacent to the connection points (8) and be deposited there. This advantageously ensures that the connection points (8) are at least completely covered with the “contacting metal”.
  • the plastic substrate can, for example, be subjected to a surface treatment beforehand in a plasma furnace. It is also provided that this surface treatment is carried out in the vapor deposition or sputtering system itself before the actual metal deposition.
  • FIG. 8 shows the finished carrier element (4) produced according to the invention using the PVD method.
  • the area (21) - a wafer-thin layer - between the plastic substrate (10) and the IC component (7) is filled with a curable dielectric liquid (17) - a so-called underfiller - which, due to capillary forces, is uniform in the area (21) between the plastic substrate (10) and the IC component (7 ) distributed.
  • the IC component (7) is additionally mechanically fixed on the plastic substrate (10). In addition, this seals the surface of the IC chip.
  • it is preferably coated with a casting compound to form a cast housing (6).
  • the invention provides for the intermediate product (15) consisting of the plastic substrate tape with the IC components (7) fixed thereon to be further processed to form the electrical contact surfaces (5) on the plastic substrate (10) so that an electrical Conductive paste or liquid (18) is applied to the areas (13) of the plastic substrate (10) that are not covered by the cover film (12).
  • an electrical Conductive paste or liquid (18) is applied to the areas (13) of the plastic substrate (10) that are not covered by the cover film (12).
  • this can be done with a squeegee.
  • the electrically conductive paste or liquid (18) penetrates into the recesses (11) of the plastic substrate (10) and through them to the connection points (8) of the IC module (7) to form the conductive connection (20).
  • the recesses (11) are completely filled with the conductive paste or liquid (18).
  • a thermally curable paste or liquid (18) is preferably used.
  • the area (21) between the plastic substrate (10) and the IC module (7) is then filled with a curable dielectric liquid (17) for sealing.
  • a combination of PVD processes and the application of a conductive paste or liquid is also provided (not shown).
  • a thin metal layer is deposited in the PVD process to form the contact areas and to connect these contact areas to the connection points, and then the conductive paste / liquid is applied to the metal layer thus deposited.
  • a cover mask is dispensed with.
  • the plastic substrate is coated over its entire surface with metal, the insulating spaces between the contact surfaces then being created by local removal of the metal by means of laser radiation (independent claim 4).

Abstract

The invention relates to a method for producing a supporting element (4) for an integrated circuit module (7) for placement in chip cards (1), whereby the supporting element (4) comprises conductive contact surfaces (5) situated on an electrically insulating plastic substrate (10). Said contact surfaces are connected in a conductive manner to corresponding connecting points (8) of the integrated circuit module (7). In a first step, a plastic substrate (10) is provided with recesses (11) which correspond to the connecting points (8) of the integrated circuit module (7). In a second step, the integrated circuit module (7) is fixed with the side thereof comprising the connecting points (8) on the plastic substrate (10) in such a way that the connecting points (8) are arranged (10) in a positionally accurate manner with regard to the recesses (11) in the plastic substrate (10). In a third step, the electrically conductive contact surfaces (5) are produced via the recesses (11) in the plastic substrate (10) while forming electrically conductive connections (20) to the connecting points (8) of the integrated circuit module (7). This is achieved, while using a diffusion mask (12) and by depositing a metal (19) from the gas phase or by applying a conductive paste/liquid onto the regions (13) of the plastic substrate (10) which are not covered by the diffusion mask (12).

Description

Titel : Verfahren zur Herstellung eines Trägerelements für einen IC-Baustein zum Einbau in ChipkartenTitle: Method for producing a carrier element for an IC chip for installation in chip cards
Die Erfindung bezieht sich auf Verfahren zur Herstellung eines Trägerelements für einen IC- Baustein zum Einbau in Chipkarten.The invention relates to methods for producing a carrier element for an IC chip for installation in chip cards.
Chipkarten verfügen üblicherweise über ein separates Trägerelement, in dem der IC -Baustein (Halbleiterchip) untergebracht ist. Dieses Trägerelement (auch Chipmodul genannt), auf dem sich elektrisch leitfähige Kontaktflächen befinden, wird in eine sacklochartige Kavität des Kartenkörpers eingesetzt.Chip cards usually have a separate carrier element in which the IC component (semiconductor chip) is accommodated. This carrier element (also called chip module), on which there are electrically conductive contact surfaces, is inserted into a blind hole-like cavity of the card body.
Die sich auf dem Trägerelement befindenden Kontaktflächen, die mit Anschlußstellen des IC- Bausteins verbunden sind, dienen der Energieversorgung und der Kommunikation mit entspsrechenden Datenaustauschgeräten (Chipkartenlesegerät).The contact surfaces located on the carrier element, which are connected to connection points of the IC module, serve for energy supply and communication with corresponding data exchange devices (chip card reader).
Ein derartiges Trägerelement ist aus der DE 30 29 667 C2 bekannt. Bei der Herstellung dieses Trägerelements wird ein Kunststoffsubstrat verwendet, auf dem einseitig als Kontaktflächen dienende Metallbeschichtungen angeordnet sind, die galvanisch aufgebracht werden. Der IC-Baustein wird auf dem Kunststoffsubstrat oder in einem Fenster des Kunststoffsubstrats direkt auf der Metallbeschichtung fixiert; und zwar mit der Seite, die nicht die Anschlußstellen aufweist, d.h. die Anschlußstellen sind dem Kunststoffsubstrat und den Kontaktflächen abgewandt angeordnet. Die elektrisch leitende Verbindung zwischen den Kontaktflächen und den Anschlußstellen erfolgt über feine Golddrähtchen im sogenannten Wirebonding- Verfahren. Hierzu weist das Kunststoffsubstrat Zugangsfenster auf, so daß die Rückseiten der metallischen Kontaktflächen für die Kontaktierung der Golddrähtchen teilweise freiliegen. Zum Schutz der zerbrechlichen Golddrähtchen und des IC-Bausteins wird dieser und die Golddrähtchen anschließend mit einer schützenden Vergußmasse umgeben. Derartige Trägerelement gemäß der DE 30 29 667 C2 haben jedoch einige Nachteile.Such a carrier element is known from DE 30 29 667 C2. In the production of this carrier element, a plastic substrate is used, on which metal coatings serving as contact surfaces are arranged on one side, which are applied galvanically. The IC chip is fixed on the plastic substrate or in a window of the plastic substrate directly on the metal coating; with the side that does not have the connection points, ie the connection points are arranged facing away from the plastic substrate and the contact surfaces. The electrically conductive connection between the contact surfaces and the connection points is made using fine gold wires in the so-called wirebonding process. For this purpose, the plastic substrate has access windows so that the rear sides of the metallic contact surfaces for contacting the gold wires are partially exposed. To protect the fragile gold wire and the IC chip, it and the gold wire are then surrounded with a protective casting compound. Such carrier element according to DE 30 29 667 C2, however, have some disadvantages.
So muß zur Ausbildung der Kontaktflächen zunächst auf das Kunststoffsubstrat galvanisch in mehreren Abscheidungs- und Ätzschritten die Metallbeschichtung aufgebracht werden. Die dabei verwendeten Galvanikbäder stellen bei ihrer Entsorgung ein großes Umweltproblem dar.To form the contact surfaces, the metal coating must first be applied to the plastic substrate in several deposition and etching steps. The electroplating baths used represent a major environmental problem in their disposal.
Darüber hinaus ist der Prozeß des Wirebonding sehr aufwendig und zeitintensiv und dementsprechend teuer.In addition, the wirebonding process is very complex and time-consuming and accordingly expensive.
Außerdem ist die Höhe derartiger Trägerelemente bauartbedingt relativ groß, denn die Golddrähtchen zwischen den Anschlußstellen des IC-Baustein und den Kontaktflächen sind in einer großen Schleife geführt, da ein bestimmter Krümmungsradius nicht unterschritten werden darf. Dies ist ein Nachteil, da die Dicke der Kartenkörper, in die die Trägerelemente eingebaut werden, mit 0,76 mm relativ klein ist. Ein Trägerelement mit einer großen Bauhöhe erfordert eine entsprechend tiefe Kavität im Kartenkörper, was wiederum zur Folge hat, daß die Restdicke des Kartenkörpers im Bereich der Kavität sehr dünn ist. Eine dünne Restkartendicke im Bereich der Kavität führt nun wieder zu Problemen bei der Bedruckung der Kartenköper, da diese im Bereich der sacklochartigen Kavität leicht verformbar sind.In addition, the height of such support elements is relatively large due to the design, because the gold wires between the connection points of the IC module and the contact surfaces are guided in a large loop since a certain radius of curvature must not be undercut. This is a disadvantage since the thickness of the card body into which the carrier elements are installed is relatively small at 0.76 mm. A carrier element with a large overall height requires a correspondingly deep cavity in the card body, which in turn has the consequence that the remaining thickness of the card body in the region of the cavity is very thin. A thin remaining card thickness in the area of the cavity again leads to problems when printing on the card body, since these are easily deformable in the area of the blind hole-like cavity.
Aufgabe der Erfindung ist es, ein Verfahren zu schaffen, mit dem Trägerelemente für IC- Bausteine zur Verwendung in Chipkarten einfach und kostengünsitg herzustellen sind, wobei mit diesem Verfahren außerdem eine geringe Bauhöhe des Trägerelements erreicht werden soll.The object of the invention is to provide a method with which carrier elements for IC components for use in chip cards can be produced simply and inexpensively, with this method also intended to achieve a low overall height of the carrier element.
Diese Aufgabe wird erfindungsgemäß dadurch erreicht, daß in einem ersten Schritt ein Kunststoff Substrat ohne Metallbeschichtung bereitgestellt wird, das Aussparungen aufweist, die zu den Anschlußstellen des IC-Bausteins korrespondieren. In einem zweiten Schritt wird dann der IC-Baustein mit seiner die Anschlußstellen aufweisenden Seite auf dem Kunststoffsubstrat so fixiert, daß die Anschlußstellen positionsgenau zu den Aussparungen im Kunststoffsubstrat angeordnet sind. In einem dritten Schritt werden dann unter Verwendung einer Abdeckmaske durch Abscheidung eines Metalls aus der Gasphase (Aufdampfen) auf die von der Abdeckmaske unverdeckten Bereiche des Kunststoffsubstrats die elektrisch leitfähigen Kontaktflächen gebildet. Gleichzeitig werden durch die Aussparungen im Kunststoffsubstrat hindurch auch auch die leitenden Verbindungen zu den Anschlußstellen des IC-Bausteins hergestellt (Patentanspruch 1).This object is achieved in that in a first step a plastic substrate without metal coating is provided, which has cutouts that correspond to the connection points of the IC chip. In a second step, the IC module is then fixed with its side having the connection points on the plastic substrate in such a way that the connection points are arranged precisely in relation to the cutouts in the plastic substrate. In a third step, the electrically conductive contact surfaces are then formed using a mask by depositing a metal from the gas phase (vapor deposition) on the areas of the plastic substrate that are not covered by the mask. At the same time through the recesses in the Plastic substrate through it also made the conductive connections to the connection points of the IC chip (claim 1).
Alternativ zum Aufdampfen von Metall ist es erfindungsgemäß vorgesehen (unabhängiger Patentanspruch 2), die elektrisch leitfähigen Kontaktflächen und die Verbindung zwischen diesen und den Anschlußstellen unter Verwendung einer Abdeckmaske durch Aufbringen einer elektrisch leitenden Paste oder Flüssigkeit auf die von der Abdeckmaske unverdeckten Bereiche des Kunststoff Substrats herzustellen. Die Paste oder Flüssigkeit wird dann nach-dem Aufbringen ausgehärtet. Derartige Pasten oder Flüssigkeiten sind dem Fachmann bekannt.As an alternative to the vapor deposition of metal, it is provided according to the invention (independent claim 2) to produce the electrically conductive contact surfaces and the connection between these and the connection points using a mask by applying an electrically conductive paste or liquid to the areas of the plastic substrate that are not covered by the mask . The paste or liquid is then cured after application. Such pastes or liquids are known to the person skilled in the art.
Die erfindungsgemäßen Verfahren zur Herstellung eines Trägerelements für IC-Bausteine zur Verwendung in Chipkarten haben einerseits den Vorteil, daß die Herstellung der Kontaktlächen und die Herstellung der leitenden Verbindung zwischen diesen und den Anschlußstellen des IC-Bausteins in einem Schritt erfolgt. Die teuere und umweltbelastende Galvanisierung zur Herstellung der Kontatkflächen auf dem Kunststoffsubstrat ist nicht mehr notwendig. Außerdem entfällt das aufwendige Wirebonding. Dies hat weiterhin den Vorteil, daß die Bauhöhe des Trägerelements insgesamt geringer ist. Darüber hinaus ist die auf diese Weise erfindungsgemäß hergestelle leitende Verbindung zwischen den Kontaktflächen und den Anschlußstellen des IC-Bausteins gegenüber mechanischen Belastungen sehr viel unempfindlicher als die bisher verwendeten Golddrähtchen. The methods according to the invention for producing a carrier element for IC components for use in chip cards have the advantage, on the one hand, that the production of the contact areas and the production of the conductive connection between them and the connection points of the IC component take place in one step. The expensive and environmentally damaging electroplating for producing the contact surfaces on the plastic substrate is no longer necessary. In addition, the complex wirebonding is not necessary. This has the further advantage that the overall height of the support element is lower overall. In addition, the conductive connection produced in this way according to the invention between the contact surfaces and the connection points of the IC module is very much less sensitive to mechanical loads than the gold wires previously used.
Anhand der beigefügten Zeichnungen soll die Erfindung näher erläutert werden. Es zeigt:The invention will be explained in more detail with reference to the accompanying drawings. It shows:
Fig. 1 eine Draufsicht auf eine Chipkarte,1 is a plan view of a chip card,
Fig.2 einen Schnitt durch die Chipkarte im Bereich des Trägerelements,2 shows a section through the chip card in the region of the carrier element,
Fig.3 eine Draufsicht auf den IC-Baustein mit seinen Anschlußstellen,3 shows a plan view of the IC module with its connection points,
Fig.4 einen Schnitt durch das Kunststoffsubstrat mit einer darauf angeordneten Folie als4 shows a section through the plastic substrate with a film arranged thereon as
Abdeckmaske, Fig.5/6 Schnitte durch unterschiedlich ausgebildete IC -Bausteine, Fig.7 eine schematische Darstellung des Kunststoffsubstrats mit darauf fixiertem IC-Cover mask, Fig. 5/6 sections through differently designed IC modules, Fig. 7 shows a schematic representation of the plastic substrate with IC- fixed on it
Baustein in einer Aufdampfanlage, Fig.8 einen Schnitt durch ein Trägerelement,Building block in a vapor deposition system, FIG. 8 a section through a carrier element,
Fig.9 einen Schnitt durch ein Trägerelement, das zusätzlich mit einem schützenden9 shows a section through a carrier element, which is additionally provided with a protective
Gußgehäuse umgeben ist, Fig.10 einen Schnitt durch ein weiteres Trägerelement.Cast housing is surrounded, Figure 10 shows a section through a further support element.
In Figur 1 ist eine Draufsicht auf eine Chipkarte (1) gezeigt. Man erkennt die elektrischen Kontaktflächen (5) des Trägerelements (4). Die Chipkartenlesegeräte verfügen über entsprechende Kontaktiereinheiten über die die Kontaktflächen (5) elektrisch mit der Elektonik im Chipkartenlesegerät verbunden werden. In Figur 2 ist ein Schnitt durch die Chipkarte (1) im Bereich des Trägerelements (4) gezeigt. Das nur schematisch dargestellte Trägerelement (4) befindet sich in einer zweistufigen sacklochartigen Kavität (3) des Kartenkörpers (2). Das schematisch dargestellte Trägerelement (4) besteht für denjenigen, der es in einen Kartenköörper implantiert, nur aus zwei Teilen: einem ersten Teil, auf dem die Kontaktflächen (5) angeordnet sind, und einem zweiten Teil in Form eines Gußgehäuses (6), in dem der IC -Baustein (7) untergebracht ist. Dabei ragt das erste Teil, das von dem Kunststoffsubstrat (10) und den daraufbefindlichen Kontaktflächen (5) gebildet wird, über das zweite Teil zu beiden Seiten hinaus, wobei das Trägerelement (4) mit den Bereichen des ersten Teils, die über das zweite Teil hinausragen, auf einer Auflageschulter in der Kavität (3) des Kartenkörper mittels eines Klebers fixiert wird. Das den IC-Baustein (7) schützend umgebende Gußgehäuse (6) ist für das erfindungsgemäß hergestellte Trägerelement (4) vorteilhaft, aber nicht zwingend notwendig, da keine leicht zerbrechlichen Golddrähtchen zu schützen sind. In Figur 3 ist eine Draufsicht auf einen IC -Baustein (Monolithischer Halbleiterbaustein, 7) mit seinen Anschlußstellen (8) gezeigt. Die Anschlußstellen (8) sind meistens Flächenelemente aus Aluminium oder Kupfer. Ansonsten ist die Oberfläche des IC-Baustein (7) bis auf die Anschlußstellen (8) mit einer dielektrischen Schutzschicht (9) versehen. Dabei können die Anschlußstellen (8) bündig mit der dielektrischen Schutzschicht (9) abschließen - vgl. Fig. 5 - oder über diese hinausragen - vgl. Fig.6 - oder tiefer liegen als die dielektrische SchutzschichtFIG. 1 shows a top view of a chip card (1). The electrical contact surfaces (5) of the carrier element (4) can be seen. The chip card readers have corresponding contacting units via which the contact surfaces (5) are electrically connected to the electronics in the chip card reader. FIG. 2 shows a section through the chip card (1) in the region of the carrier element (4). The carrier element (4), which is only shown schematically, is located in a two-stage blind hole-like cavity (3) of the card body (2). The schematically illustrated carrier element (4) consists of only two parts for those who implant it into a card body: a first part on which the contact surfaces (5) are arranged and a second part in the form of a cast housing (6) which the IC module (7) is housed. The first part, which is formed by the plastic substrate (10) and the contact surfaces (5) located thereon, projects beyond the second part on both sides, the carrier element (4) with the regions of the first part which extend over the second part protrude, is fixed on a support shoulder in the cavity (3) of the card body by means of an adhesive. The cast housing (6) which protects the IC module (7) is advantageous for the carrier element (4) produced according to the invention, but is not absolutely necessary since no easily breakable gold wires need to be protected. FIG. 3 shows a top view of an IC module (monolithic semiconductor module, 7) with its connection points (8). The connection points (8) are mostly flat elements made of aluminum or copper. Otherwise, the surface of the IC module (7) is provided with a dielectric protective layer (9) except for the connection points (8). The connection points (8) can be flush with the dielectric protective layer (9) - cf. Fig. 5 - or protrude beyond it - cf. Fig. 6 - or lower than the dielectric protective layer
(9) - nicht dargestellt.(9) - not shown.
In Figur 4 ist das Kunststoffsubstrat (10), auf dem die Kontaktflächen (6) erfmdungsgemäß aufzubringen sind, gezeigt. Das Kunststoffsubstrat (10) weist Aussparungen (11) auf, die zu den Anschlußstellen (8) des IC-Bausteins (7) korrespondieren, d.h. die Anzahl und die Anordnung der Aussparungen (11) in dem Kunststoffsubstrat (10) entspricht der Anzahl und der Anordnung der Anschlußstellen (8) auf dem IC -Baustein (7). Der Durchmesser der Aussparungen (11) sowie die Geometrie kann dem Durchmesser und der Geometrie der Anschlußstellen (8) entsprechen. Es ist jedoch auch vorgesehen, den Durchmesser der Ausparungen (11) größer oder kleiner als den Durchmesser der Anschlußstellen (8) auszubilden. So kommen sowohl kreisrunde als auch rechteckige Aussparungen (11) in Betracht. Diese Aussparungen (11) werden vorzugsweise durch Stanzen des Kunststoffsubstrats (10) hergestellt. Als Abdeckmaske (12) für das Aufbringen der Kontatkflächen (5) auf das Kunststoffsubstrat (10) befindet sich auf dem KunststoffsubstratFIG. 4 shows the plastic substrate (10) on which the contact surfaces (6) are to be applied according to the invention. The plastic substrate (10) has cutouts (11) which correspond to the connection points (8) of the IC module (7), i.e. the number and arrangement of the cutouts (11) in the plastic substrate (10) corresponds to the number and arrangement of the connection points (8) on the IC module (7). The diameter of the recesses (11) and the geometry can correspond to the diameter and the geometry of the connection points (8). However, it is also provided that the diameter of the recesses (11) is larger or smaller than the diameter of the connection points (8). Both circular and rectangular cutouts (11) can be considered. These recesses (11) are preferably produced by stamping the plastic substrate (10). The mask (12) for applying the contact surfaces (5) to the plastic substrate (10) is located on the plastic substrate
(10) vorzugsweise eine Folie (12), die Öffnungen (13) für die Ausbildung der Kontaktflächen (5) aufweist. Nach dem erfindungsgemäßen Aufbringen der Kontaktflächen (5) wird diese dann wieder entfernt.(10) preferably a film (12) which has openings (13) for the formation of the contact surfaces (5). After the contact surfaces (5) have been applied according to the invention, these are then removed again.
Zur Herstellung der Trägerelemente (4) wird vorzugsweise nicht jeweils ein einzelnes, separates Kunststoffsubstrat (10) mit Aussparungen (11) verwendet, sondern ein Kunststoffsubstrat-Band, auf dem sich für eine Vielzahl von Trägerelementen (4) Aussparungen (11) befinden. Nach der Herstellung der Trägerelemente (4) hat man ein Trägerelement-Band, aus dem dann die einzelnen Trägerelemente (4) durch Ausstanzen herausgetrennt werden.To produce the carrier elements (4), it is preferable not to use a single, separate plastic substrate (10) with cutouts (11), but rather to use a plastic substrate tape on which there are cutouts (11) for a large number of carrier elements (4). After the carrier elements (4) have been produced, there is a carrier element band from which the individual carrier elements (4) are then separated by punching out.
Der IC -Baustein (7) wird vorzugsweise mittels eines Klebers (14) auf dem Kunststoffsubstrat (10) so fixiert, daß die Anschlußstellen (8) positionsgenau zu den Aussparungen (11) im Kunststoffsubstrat (10) angeordnet sind. Der Kleber (14) - z.B. in Form eines Klebetropfens - wird zuvor auf den IC -Baustein (7) und/oder auf das Kunststoffsubstrat (10) aufgebracht. Dabei ist die Klebermenge so dosiert, daß sich bei der Fixierung des IC-Bausteins (7) auf dem Kunststoffsubstrat (10) ein dünner Klebefilm bildet, der jedoch nicht bis zu den Anschlußstellen (8) auf dem IC-Baustein (7) reicht. Die positionsgenaue Fixierung des IC- Bausteins (7) auf dem Kunststoffsubstrat (10) erfolgt vorzugsweise unter zur Hilfenahme eines optischen Erkennungssystems, z.B. eine digitale Kamera. Dabei erfolgt die Fixierung des IC-Bausteins (7) erst dann, wenn die Aussparungen (11) im Kunststoffsubstrat (10) und die Anschlußstellen (8) deckunsgleich übereinander liegen. Dabei werden in der Produkktion - wie bereits oben erwähnt - nicht einzelne Kunststoffsubstrate (10) verwendet, sonderen ein Kunststoffsubstratband, das motorisch von einer Rolle abgewickelt wird. Die Zuführung der IC -Bausteine (7) zum Kunststoffsubstratband erfolgt vorzugsweise über einen Vakuumsauger, der an der den Anschlußstellen (8) abgewandeten Seite des IC-Bausteines (7) angreift. Zur postionsgenauen Fixierung des IC-Bausteins (7) wird der mechanische Transport des Kunststoffsubstratbandes sowie die mechanische Zuführung der IC-Baustein (7) von der optischen Erkennungsstation überwacht und gesteuert.The IC component (7) is preferably fixed on the plastic substrate (10) by means of an adhesive (14) in such a way that the connection points (8) are positioned exactly in relation to the cutouts (11) in the Plastic substrate (10) are arranged. The adhesive (14) - for example in the form of an adhesive drop - is previously applied to the IC module (7) and / or to the plastic substrate (10). The amount of adhesive is dosed so that a thin adhesive film forms when the IC module (7) is fixed on the plastic substrate (10), but does not reach the connection points (8) on the IC module (7). The IC module (7) is fixed precisely on the plastic substrate (10) with the aid of an optical detection system, for example a digital camera. The IC component (7) is then fixed only when the cutouts (11) in the plastic substrate (10) and the connection points (8) lie one on top of the other. As already mentioned above, individual plastic substrates (10) are not used in production, but rather a plastic substrate tape that is unwound from a roll by motor. The IC components (7) are preferably fed to the plastic substrate strip via a vacuum suction device which engages on the side of the IC component (7) facing away from the connection points (8). The mechanical transport of the plastic substrate tape and the mechanical feeding of the IC module (7) are monitored and controlled by the optical detection station in order to fix the IC module (7) precisely in position.
Als Zwischenerzeugnis (15) erhält man bei dem erfindungsgemäßen Verfahren ein Kunststoffsubstratband, auf dem eine Vielzahl von IC-Bausteinen (7) jeweils mit ihren Anschlußstellen (8) positionsgenau zu den Aussparungen (11) des Kunststoffsubstrats (12) fixiert sind. Als Abdeckmaske (12) befindet sich auf dem Kunststoffsubstratband - wie vorstehend bereits erwähnt - eine Folie (12) mit Öffnungen (13).In the process according to the invention, the intermediate product (15) obtained is a plastic substrate tape on which a multiplicity of IC components (7) are each fixed with their connection points (8) to the recesses (11) of the plastic substrate (12). As a mask (12) there is - as already mentioned above - a film (12) with openings (13) on the plastic substrate tape.
In Fig. 7 ist eine Aufdampfanlage (16) gezeigt, in der das Zwischenerzeugnis (15) zur Ausbildung der Kontaktflächen (5) und der leitenden Verbindung (20) zwischen diesen und den Anschlußstellen (8) des IC-Bausteins (7) durch Metallabscheidung aus der Gasphase eingebracht wird. In der Vakuumaufdampfanlage wird ein entsprechend hoher Dampfdruck des aufzubringenden Metalls (hier Gold , Au) erzeugt, indem das Metall aufgeheizt wird. Dies kann in bekannter Weise direkt oder indirekt, z.B. durch Elektronenbeschuß des Aufdampfgutes, erfolgen.In Fig. 7, a vapor deposition system (16) is shown in which the intermediate product (15) for forming the contact surfaces (5) and the conductive connection (20) between them and the connection points (8) of the IC chip (7) by metal deposition is introduced from the gas phase. A correspondingly high vapor pressure of the metal to be applied (here gold, Au) is generated in the vacuum evaporation system by heating the metal. This can be done directly or indirectly in a known manner, e.g. by electron bombardment of the material to be deposited.
Die Metallabscheidung aus der Gasphase kann auch in einer sogenannten Sputteranlage erfolgen, wo das auf das Kunststoffsubstrat (10) abzuscheidende Metall mit Ionen besschoßen wird, um Material in Richtung auf das Kunststoffsubstrat (10) herauszuschlagen, das dann abgeschieden werden kann. Sowohl beim Aufdampfen als auch beim Sputtern handelt es sich um physikalische Abscheideverfahren von Metallen aus der Gasphase. Beide Verfahren werden unter dem englischen Fachbegriff „Physical Vapor Deposition" (PVD) zusammengefaßt.The metal deposition from the gas phase can also take place in a so-called sputtering system, where the metal to be deposited on the plastic substrate (10) is better bombarded with ions in order to knock out material in the direction of the plastic substrate (10), which can then be deposited. Both vapor deposition and sputtering are physical deposition processes for metals from the gas phase. Both methods are summarized under the English technical term "Physical Vapor Deposition" (PVD).
Beim PVD-Verfahren werden durch Abscheidung eines Metalls (19) aus der Gasphase auf die von der Abdeckmaske (12) - hier eine Folie (12) mit Öffnungen (13) auf dem Kunststoffsubstrat (10) - unverdeckten Bereiche (13) des Kunststoffsubstrats- (10) die elektrisch leitfähigen Kontaktflächen (5) gebildet. Gleichzeitig gelangen die gasförmigen Metallteilchen/ Atome durch die Aussparungen (11) in dem Kunststoffsubstrat (10) hindurch bis zu den Anschlußstellen (8) des IC -Bausteins (7). Dabei scheidet sich das Metall auch auf den Anschlußstellen (8) des IC -Bausteins (7) und auf der Innenwandung der Aussparungen (11) im Kunststoffsubstrat (10) ab. Schließlich erhält man eine durchgehende Metallbeschichtung als elektrisch leitende Verbindung (20) von den Kontaktflächen (5,19) über die Innenwandung der Aussparungen (11) im Kunststoffsubstrat (10) hin zu den Anschlußstellen (8) des IC-Bausteins (7). Je nach Aufdampf- bzw. Sputterrate (abgeschiedene Schichtdicke pro Sekunde) und Zeitdauer können die Aussparungen (11) im Kunststoffsubstrat (10) auch vollständig mit dem abgeschiedenen Metall aufgefüllt werden. Durch Diffusion können die gasförmigen Metallteilchen auch durch die Aussparungen (11) hindurch in zu den Anschlußstellen (8) benachbarte Bereiche gelangen und sich dort niederschlagen. Damit wird in vorteilhafter Weise gewährleistet, daß die Anschlußstellen (8) zumindest vollständig mit dem „Kontaktierungsmetali" überzogen sind.In the PVD process, by depositing a metal (19) from the gas phase onto the uncovered areas (13) of the plastic substrate from the mask (12) - here a film (12) with openings (13) on the plastic substrate (10). (10) the electrically conductive contact surfaces (5) are formed. At the same time, the gaseous metal particles / atoms pass through the cutouts (11) in the plastic substrate (10) to the connection points (8) of the IC module (7). The metal also deposits on the connection points (8) of the IC module (7) and on the inner wall of the cutouts (11) in the plastic substrate (10). Finally, a continuous metal coating is obtained as an electrically conductive connection (20) from the contact surfaces (5, 19) via the inner wall of the cutouts (11) in the plastic substrate (10) to the connection points (8) of the IC component (7). Depending on the vapor deposition or sputtering rate (deposited layer thickness per second) and the duration, the cutouts (11) in the plastic substrate (10) can also be completely filled with the deposited metal. By diffusion, the gaseous metal particles can also pass through the cutouts (11) into areas adjacent to the connection points (8) and be deposited there. This advantageously ensures that the connection points (8) are at least completely covered with the “contacting metal”.
Um eine gute Metallabscheidung und Haftung des abgeschiedenen Metalls auf dem Kunststoffsubstrat zu gewährleisten, kann das Kunststoffsubstrat beispeilsweise zuvor in einem Plasmaofen einer Oberflächenbehandlung unterzogen werden. Dabei ist es auch vorgesehen, diese Oberflächenbehandlung in der Aufdampf-oder Sputteranlage selbst vor der eigentlichen Metallabscheidung durchzuführen.In order to ensure good metal deposition and adhesion of the deposited metal to the plastic substrate, the plastic substrate can, for example, be subjected to a surface treatment beforehand in a plasma furnace. It is also provided that this surface treatment is carried out in the vapor deposition or sputtering system itself before the actual metal deposition.
In einer Ausführungsform zur erfindungsgemäßen Anwendung des PVD-Verfahrens ist es vorgesehen, nacheinander zwei oder mehrere verschiedene Metalle abzuscheiden.In one embodiment for the application of the PVD method according to the invention, it is provided that two or more different metals are deposited in succession.
In Figur 8 ist das fertige, erfindungsgemäß mit dem PVD-Verfahren hergestellte Trägerelement (4) gezeigt. Dabei wurde der Bereich (21) - eine hauchdünne Schicht - zwischen Kunststoffsubstrat (10) und IC -Baustein (7) mit einer aushärtbaren dielektrischen Flüssigkeit (17) - einem sogenannten Underfiller - ausgefüllt, der sich aufgrund von Kappilarkräften gleichmäßig in dem Bereich (21) zwischen Kunststoffsubstrat (10) und IC- Baustein (7) verteilt. Hierdurch wird der IC -Baustein (7) zusätzlich mechanisch auf dem Kunststoffsubstrat (10) fixiert. Außerdem wird dadurch eine Versiegelung der IC-Baustein- Oberfläche erzielt. Um den IC-Baustein zusätzlich zu schützen, wird dieser vorzugsweise mit einer Vergußmasse zur Ausbildung eines Gußgehäuses (6) überzogen.FIG. 8 shows the finished carrier element (4) produced according to the invention using the PVD method. The area (21) - a wafer-thin layer - between the plastic substrate (10) and the IC component (7) is filled with a curable dielectric liquid (17) - a so-called underfiller - which, due to capillary forces, is uniform in the area (21) between the plastic substrate (10) and the IC component (7 ) distributed. As a result, the IC component (7) is additionally mechanically fixed on the plastic substrate (10). In addition, this seals the surface of the IC chip. In order to additionally protect the IC module, it is preferably coated with a casting compound to form a cast housing (6).
Als Alternative zum PVD-Verfahren ist es erfindungsgemäß vorgesehen, das Zwischenerzeugnis (15) bestehend aus dem Kunststoffsubstratband mit den darauf fixierten IC-Bausteinen (7) zur Ausbildung der elektrischen Kontaktflächen (5) auf dem Kunststoffsubstrat (10) so weiterzubearbeiten, daß eine elektrisch leitfähige Paste oder Flüssigkeit (18) auf die von der Abdeckfolie (12) unverdeckten Bereiche (13) des Kunststoffsubstrats (10) aufgebracht wird. Dies kann, wie im Sieb- oder Schablonendruck, mit einem Rakel erfolgen. Auch dabei dringt die elektrisch leitfähige Paste oder Flüssigkeit (18) in die Aussparungen (11) des Kunststoffsubstrats (10) und durch diese hindurch bis zu den Anschlußstellen (8) des IC-Bausteins (7) zur Ausbildung der leitenden Verbindung (20). Dabei werden die Aussparungen (11) vollständig mit der leitfähigen Paste oder Flüssigkeit (18) gefüllt. Hierzu wird vorzugsweise eine thermisch aushärtbare Paste oder Flüssigkeit (18) verwendet. Auch hier wird anschließend der Bereich (21) zwischen Kunststoffsubstrat (10) und IC-Baustein (7) mit einer aushärtbaren dielektrischen Flüssigkeit (17) zur Versiegelung ausgefüllt.As an alternative to the PVD process, the invention provides for the intermediate product (15) consisting of the plastic substrate tape with the IC components (7) fixed thereon to be further processed to form the electrical contact surfaces (5) on the plastic substrate (10) so that an electrical Conductive paste or liquid (18) is applied to the areas (13) of the plastic substrate (10) that are not covered by the cover film (12). As in screen or stencil printing, this can be done with a squeegee. Here, too, the electrically conductive paste or liquid (18) penetrates into the recesses (11) of the plastic substrate (10) and through them to the connection points (8) of the IC module (7) to form the conductive connection (20). The recesses (11) are completely filled with the conductive paste or liquid (18). For this purpose, a thermally curable paste or liquid (18) is preferably used. Here, too, the area (21) between the plastic substrate (10) and the IC module (7) is then filled with a curable dielectric liquid (17) for sealing.
Auch eine Kombination von PVD-Verfahren und dem Auftragen einer leitfähigen Paste oder Flüssigkeit ist vorgesehen (nicht dargestellt). Dabei wird zunächst im PVD-Verfahren eine dünne Metallschicht zur Ausbildung der Kontaktflächen und zur Verbindung dieser Kontaktflächen an die Anschlußstellen abgeschieden und im Anschluß daran auf die so abgeschiedene Metallschicht die leitfähige Paste/Flüssigkeit aufgebracht.A combination of PVD processes and the application of a conductive paste or liquid is also provided (not shown). First, a thin metal layer is deposited in the PVD process to form the contact areas and to connect these contact areas to the connection points, and then the conductive paste / liquid is applied to the metal layer thus deposited.
Ferner wird bei einer Ausführungsform des PVD-Verfahrens auf eine Abdeckmaske verzichtet. Dabei wird das Kunststoffsubstrat vollflächig mit Metall beschichtet, wobei anschließend die isolierenden Zwischenräume zwischen den Kontaktflächen durch lokalen Abtrag des Metalls mittels Laserstrahlung geschaffen werden (unabhängiger Patentanspruch 4). Furthermore, in one embodiment of the PVD method, a cover mask is dispensed with. The plastic substrate is coated over its entire surface with metal, the insulating spaces between the contact surfaces then being created by local removal of the metal by means of laser radiation (independent claim 4).

Claims

Patentansprücheclaims
1) Verfahren zur Herstellung eines Trägerelements (4) für einen IC -Baustein (.7) zum Einbau in Chipkarten (1), wobei das Trägerelement (4) auf einem elektrisch isolierenden Kunststoffsubstrat (10) leitfähige Kontaktflächen (5) aufweist, die mit entsprechenden Anschlußstellen (8) des IC-Bausteins (7) leitend verbunden sind, dadurch gekennzeichnet, daß in einem ersten Schritt ein Kunststoffsubstrat (10) mit zu den Anschlußstellen (8) des IC -Bausteins (7) korrespondierenden Aussparungen (11) bereitgestellt wird, in einem zweiten Schritt der IC-Baustein (7) mit seiner die Anschlußstellen (8) aufweisenden Seite auf dem Kunststoffsubstrat (10) so fixiert wird, daß die Anschlußstellen (8) positionsgenau zu den Aussparungen (11) im Kunststoffsubstrat (10) angeordnet sind, in einem dritten Schritt unter Verwendung einer Abdeckmaske (12) durch Abscheidung eines Metalls (19) aus der Gasphase auf die von der Abdeckmaske (12) unverdeckten Bereiche (13) des Kunststoffsubstrats (10) die elektrisch leitfähigen Kontaktflächen (5) unter Ausbildung von elektrisch leitenden Verbindungen (20) zu den Anschlußstellen (8) des IC-Bausteins (7) über die Aussparungen (11) im Kunststoffsubstrat (10) hergestellt werden. 1) Method for producing a carrier element (4) for an IC module (.7) for installation in chip cards (1), the carrier element (4) having conductive contact surfaces (5) on an electrically insulating plastic substrate (10) which are connected to corresponding connection points (8) of the IC component (7) are conductively connected, characterized in that in a first step a plastic substrate (10) with recesses (11) corresponding to the connection points (8) of the IC component (7) is provided , in a second step the IC component (7) is fixed with its side having the connection points (8) on the plastic substrate (10) in such a way that the connection points (8) are arranged in the exact position relative to the cutouts (11) in the plastic substrate (10) are, in a third step using a mask (12) by depositing a metal (19) from the gas phase onto the areas (13) of the plastic substrate (10) which are not covered by the mask (12) electrically conductive contact surfaces (5) with the formation of electrically conductive connections (20) to the connection points (8) of the IC module (7) via the recesses (11) in the plastic substrate (10).
2) Verfahren zur Herstellung eines Trägerelements (4) für einen IC-Baustein (7) zum Einbau in Chipkarten (1), wobei das Trägerelement (4) auf einem elektrisch isolierenden Kunststoffsubstrat (10) leitfähige Kontaktflächen (5) aufweist, die mit entsprechenden Anschlußstellen (8) des IC -Bausteins (7) leitend verbunden sind, dadurch gekennzeichnet, daß in einem ersten Schritt ein Kunststoffsubstrat (10) mit zu den Anschlußstellen (11) des IC -Bausteins (7) korrespondierenden Aussparungen (11) bereitgestellt wird, in einem zweiten Schritt der IC -Baustein (7) mit seiner die Anschlußstellen (8) aufweisenden Seite auf dem Kunststoffsubstrat (10) so fixiert wird, daß die Anschlußstellen (8) positionsgenau zu den Aussparungen (11) im Kunststoffsubstrat (10) angeordnet sind, in einem dritten Schritt unter Verwendung einer Abdeckmaske (12) durch Aufbringen einer elektrisch leitfähigen Paste oder Flüssigkeit (18) auf die von der Abdeckmaske (12) unverdeckten Bereiche (13) des Kunststoffsubstrats (10) die elektrisch leitfähigen Kontaktflächen (5) unter Ausbildung von elektrisch leitenden Verbindungen (20) zu den Anschlußstellen (8) des IC -Bausteins (7) durch die Aussparungen (11) im Kunststoffsubstrat (10) hindurch hergestellt werden.2) Method for producing a carrier element (4) for an IC component (7) for installation in chip cards (1), the carrier element (4) having conductive contact surfaces (5) on an electrically insulating plastic substrate (10) which correspond with corresponding Connection points (8) of the IC module (7) are conductively connected, characterized in that in a first step a plastic substrate (10) is provided with recesses (11) corresponding to the connection points (11) of the IC module (7), in a second step, the IC module (7) with its side having the connection points (8) is fixed on the plastic substrate (10) in such a way that the connection points (8) are arranged precisely in relation to the cutouts (11) in the plastic substrate (10) , in a third step using a mask (12) by applying an electrically conductive paste or liquid (18) to the areas (13) of the art that are not covered by the mask (12) tofsubstrats (10), the electrically conductive contact surfaces (5) with the formation of electrically conductive connections (20) to the connection points (8) of the IC module (7) through the recesses (11) in the plastic substrate (10) through.
3) Verfahren nach einem der vorstehenden Ansprüche, dadurch gekennzeichnet, daß die Abdeckmaske (12) von einer auf dem Kunststoffsubstrat (10) angeordneten Folie gebildet ist, die Öffnungen (13) für die Ausbildung der Kontaktflächen (5) aufweist, wobei diese Folie nach Fertigstellung der Kontaktflächen (5) wieder entfernt wird. 3) Method according to one of the preceding claims, characterized in that the cover mask (12) is formed by a film arranged on the plastic substrate (10), which has openings (13) for the formation of the contact surfaces (5), this film after Completion of the contact surfaces (5) is removed again.
4) Verfahren zur Herstellung eines Trägerelements (4) für einen IC-Baustein (7) zum Einbau in Chipkarten (1), wobei das Trägerelement (4) auf einem elektrisch isolierenden Kunststoffsubstrat (10) leitfähige Kontaktflächen (5) aufweist, die mit entsprechenden Anschlußstellen (8) des IC -Bausteins (7) leitend verbunden sind, dadurch gekennzeichnet, daß in einem ersten Schritt ein Kunststoffsubstrat (10) mit zu den Anschlußstellen (8) des IC -Bausteins (7) korrespondierenden Aussparungen (11) bereitgestellt wird, in einem zweiten Schritt der IC-Baustein (7) mit seiner die Anschlußstellen (8) aufweisenden Seite auf dem Kunststoffsubstrat (10) so fixiert wird, daß die Anschlußstellen (8) positionsgenau zu den Aussparungen (11) im Kunststoffsubstrat (10) angeordnet sind, in einem dritten Schritt durch Abscheidung eines Metalls (19) aus der Gasphase auf das Kunststoffsubstrat (10) eine Metallbeschichtung (19) für die elektrisch leitfähigen Kontaktflächen (5) unter Ausbildung von elektrisch leitenden Verbindungen (20) zu den Anschlußstellen (8) des IC-Bausteins (7) über die Aussparungen (11) im Kunststoffsubstrat (10) hergestellt werden, in einem vierten Schritt die Metallbeschichtung (19) lokal zum Abtrag des Metalls mit Laserstrahlung beaufschlagt wrid, wodurch die isolierenden Zwischenräume zwischen den Kontaktflächen (5) geschafften werden.4) Method for producing a carrier element (4) for an IC component (7) for installation in chip cards (1), the carrier element (4) having conductive contact surfaces (5) on an electrically insulating plastic substrate (10) which correspond with corresponding Connection points (8) of the IC module (7) are conductively connected, characterized in that in a first step a plastic substrate (10) is provided with recesses (11) corresponding to the connection points (8) of the IC module (7), in a second step the IC module (7) is fixed with its side having the connection points (8) on the plastic substrate (10) in such a way that the connection points (8) are arranged in the exact position relative to the cutouts (11) in the plastic substrate (10) , in a third step by depositing a metal (19) from the gas phase onto the plastic substrate (10), a metal coating (19) for the electrically conductive contact surfaces (5) with the formation of electrically conductive connections (20) to the connection points (8) of the IC component (7) are made via the cutouts (11) in the plastic substrate (10), in a fourth step the metal coating (19) is applied locally to remove the metal with laser radiation wrid, whereby the insulating spaces between the contact surfaces (5) are created.
5) Verfahren nach einem der vorstehenden Ansprüche, dadurch gekennzeichnet, daß der IC -Baustein (7) mittels eines Klebers (14) auf dem Kunststoffstubstrat (10) fixiert wird.5) Method according to one of the preceding claims, characterized in that the IC component (7) is fixed on the plastic substrate (10) by means of an adhesive (14).
6) Verfahren nach einem der vorstehenden Ansprüche, dadurch gekennzeichnet, daß der Bereich (21) zwischen Kunststoffsubstrat (10) und IC -Baustein (7) mit einer aushärtbaren dielektrischen Flüssigkeit (17) ausgefüllt wird. 7) Verfahren nach einem der vorstehenden Ansprüche, dadurch gekennzeichnet, daß der IC-Baustein (7) mit einer Vergußmasse zur Ausbildung eines schützenden Gehäuses (6) überzogen wird. 6) Method according to one of the preceding claims, characterized in that the area (21) between the plastic substrate (10) and IC module (7) is filled with a curable dielectric liquid (17). 7) Method according to one of the preceding claims, characterized in that the IC module (7) is coated with a casting compound to form a protective housing (6).
PCT/DE1999/003150 1998-10-05 1999-09-30 Method for producing a supporting element for an integrated circuit module for placement in chip cards WO2000021027A1 (en)

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EP99955820A EP1034510A1 (en) 1998-10-05 1999-09-30 Method for producing a supporting element for an integrated circuit module for placement in chip cards
JP2000575078A JP2002526869A (en) 1998-10-05 1999-09-30 Method of manufacturing a transport element for an IC module for mounting in a chip card
AU12624/00A AU1262400A (en) 1998-10-05 1999-09-30 Method for producing a supporting element for an integrated circuit module for placement in chip cards

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DE19845665A DE19845665C2 (en) 1998-10-05 1998-10-05 Method for producing a carrier element for an IC chip for installation in chip cards
DE19845665.4 1998-10-05

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DE19845665C2 (en) 2000-08-17

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