WO2000004484A3 - Wide instruction word graphics processor - Google Patents

Wide instruction word graphics processor Download PDF

Info

Publication number
WO2000004484A3
WO2000004484A3 PCT/US1999/016193 US9916193W WO0004484A3 WO 2000004484 A3 WO2000004484 A3 WO 2000004484A3 US 9916193 W US9916193 W US 9916193W WO 0004484 A3 WO0004484 A3 WO 0004484A3
Authority
WO
WIPO (PCT)
Prior art keywords
vertex
graphics processor
instruction word
input
wide instruction
Prior art date
Application number
PCT/US1999/016193
Other languages
French (fr)
Other versions
WO2000004484A2 (en
Inventor
Vernon Brethour
Dale Kirkland
William Lazenby
Gary Shelton
Original Assignee
Intergraph Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intergraph Corp filed Critical Intergraph Corp
Publication of WO2000004484A2 publication Critical patent/WO2000004484A2/en
Publication of WO2000004484A3 publication Critical patent/WO2000004484A3/en

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators

Abstract

A graphics accelerator includes a vertex input for receiving vertex data, an output for forwarding processed data, and a processor coupled with the vertex input and output. The graphics accelerator also includes an instruction input that receives instructions for processing the vertex data received from the vertex input. The processor is responsive to wide word instructions.
PCT/US1999/016193 1998-07-17 1999-07-15 Wide instruction word graphics processor WO2000004484A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US9316598P 1998-07-17 1998-07-17
US60/093,165 1998-07-17

Publications (2)

Publication Number Publication Date
WO2000004484A2 WO2000004484A2 (en) 2000-01-27
WO2000004484A3 true WO2000004484A3 (en) 2000-07-06

Family

ID=22237520

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/016193 WO2000004484A2 (en) 1998-07-17 1999-07-15 Wide instruction word graphics processor

Country Status (2)

Country Link
US (2) US6577316B2 (en)
WO (1) WO2000004484A2 (en)

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Also Published As

Publication number Publication date
US20020030685A1 (en) 2002-03-14
US20030221137A1 (en) 2003-11-27
US6577316B2 (en) 2003-06-10
US6948087B2 (en) 2005-09-20
WO2000004484A2 (en) 2000-01-27

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