WO1999044752A3 - Circuit and method for specifying performance parameters in integrated circuits - Google Patents

Circuit and method for specifying performance parameters in integrated circuits Download PDF

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Publication number
WO1999044752A3
WO1999044752A3 PCT/US1999/004903 US9904903W WO9944752A3 WO 1999044752 A3 WO1999044752 A3 WO 1999044752A3 US 9904903 W US9904903 W US 9904903W WO 9944752 A3 WO9944752 A3 WO 9944752A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
integrated circuit
speed
performance parameters
integrated circuits
Prior art date
Application number
PCT/US1999/004903
Other languages
French (fr)
Other versions
WO1999044752A2 (en
Inventor
Troy A Manning
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to AT99911154T priority Critical patent/ATE224242T1/en
Priority to EP99911154A priority patent/EP1060027B1/en
Priority to DE69903005T priority patent/DE69903005T2/en
Priority to JP2000534342A priority patent/JP3823026B2/en
Priority to AU29864/99A priority patent/AU2986499A/en
Publication of WO1999044752A2 publication Critical patent/WO1999044752A2/en
Publication of WO1999044752A3 publication Critical patent/WO1999044752A3/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/006Identification
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44Indication or identification of errors, e.g. for repair
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing

Abstract

A method and circuit for recording the performance parameters in an integrated circuit. A speed grade register is programmed by the manufacturer with an indication of the speed capability of the integrated circuit. The integrated circuit also includes a clock speed register that is programmed by the user with an indication of the frequency of a clock signal that will be used to synchronize the operation of the integrated circuit. The speed grade and clock speed indications are used to select a set of performance data from a performance data register to provide an indication of the performance of the integrated circuit at the indicated speed grade and clock speed.
PCT/US1999/004903 1998-03-06 1999-03-05 Circuit and method for specifying performance parameters in integrated circuits WO1999044752A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AT99911154T ATE224242T1 (en) 1998-03-06 1999-03-05 CIRCUIT AND DEVICE FOR CHARACTERIZING THE PERFORMANCE CHARACTERISTICS OF INTEGRATED CIRCUITS
EP99911154A EP1060027B1 (en) 1998-03-06 1999-03-05 Circuit and method for specifying performance parameters in integrated circuits
DE69903005T DE69903005T2 (en) 1998-03-06 1999-03-05 CIRCUIT AND DEVICE FOR CARACTERIZING THE PERFORMANCE CHARACTERISTICS OF INTEGRATED CIRCUITS
JP2000534342A JP3823026B2 (en) 1998-03-06 1999-03-05 Circuit and method for specifying performance parameters in integrated circuits
AU29864/99A AU2986499A (en) 1998-03-06 1999-03-05 Circuit and method for specifying performance parameters in integrated circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/036,700 1998-03-06
US09/036,700 US6212482B1 (en) 1998-03-06 1998-03-06 Circuit and method for specifying performance parameters in integrated circuits

Publications (2)

Publication Number Publication Date
WO1999044752A2 WO1999044752A2 (en) 1999-09-10
WO1999044752A3 true WO1999044752A3 (en) 1999-10-21

Family

ID=21890124

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/004903 WO1999044752A2 (en) 1998-03-06 1999-03-05 Circuit and method for specifying performance parameters in integrated circuits

Country Status (8)

Country Link
US (2) US6212482B1 (en)
EP (1) EP1060027B1 (en)
JP (1) JP3823026B2 (en)
KR (1) KR100597826B1 (en)
AT (1) ATE224242T1 (en)
AU (1) AU2986499A (en)
DE (1) DE69903005T2 (en)
WO (1) WO1999044752A2 (en)

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Also Published As

Publication number Publication date
KR20010041678A (en) 2001-05-25
US6393378B2 (en) 2002-05-21
DE69903005T2 (en) 2003-04-17
US20010002461A1 (en) 2001-05-31
DE69903005D1 (en) 2002-10-24
AU2986499A (en) 1999-09-20
EP1060027A2 (en) 2000-12-20
JP3823026B2 (en) 2006-09-20
ATE224242T1 (en) 2002-10-15
EP1060027B1 (en) 2002-09-18
JP2002505497A (en) 2002-02-19
WO1999044752A2 (en) 1999-09-10
US6212482B1 (en) 2001-04-03
KR100597826B1 (en) 2006-07-10

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