WO1999021326A3 - Resource optimization in a multiprocessor system for a packet network - Google Patents

Resource optimization in a multiprocessor system for a packet network Download PDF

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Publication number
WO1999021326A3
WO1999021326A3 PCT/FI1998/000816 FI9800816W WO9921326A3 WO 1999021326 A3 WO1999021326 A3 WO 1999021326A3 FI 9800816 W FI9800816 W FI 9800816W WO 9921326 A3 WO9921326 A3 WO 9921326A3
Authority
WO
WIPO (PCT)
Prior art keywords
queue
packet network
procn
proc1
multiprocessor system
Prior art date
Application number
PCT/FI1998/000816
Other languages
Finnish (fi)
French (fr)
Other versions
WO1999021326A2 (en
Inventor
Jari Korhonen
Jyri Suvanen
Matti Lehtimaeki
Original Assignee
Nokia Telecommunications Oy
Jari Korhonen
Jyri Suvanen
Matti Lehtimaeki
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy, Jari Korhonen, Jyri Suvanen, Matti Lehtimaeki filed Critical Nokia Telecommunications Oy
Priority to AU95439/98A priority Critical patent/AU9543998A/en
Publication of WO1999021326A2 publication Critical patent/WO1999021326A2/en
Publication of WO1999021326A3 publication Critical patent/WO1999021326A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly

Abstract

A method, an arrangement and an SAR circuit for serving several packet switched telecommunication connections (CA to CE) by several processors (PROC1 to PROCn). One processor is selected from among several processors (PROC1 to PROCn) for each telecommunication connection (CA to CE) to be served. On each telecommunication connection (CA to CE) information is transmitted in packets from which are formed elements (A to E) of at least one queue (Q1 to Qn). A separate queue (Q1 to Qn) is formed for each telecommunication connection (CA to CE) to be served. The SAR circuit conveys only queue elements (A to E) formed from the packets of the respective telecommunication connection (CA to CE) via each queue to a corresponding processor (PROC1 to PROCn).
PCT/FI1998/000816 1997-10-21 1998-10-20 Resource optimization in a multiprocessor system for a packet network WO1999021326A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU95439/98A AU9543998A (en) 1997-10-21 1998-10-20 Resource optimization in a multiprocessor system for a packet network

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI974020A FI974020A0 (en) 1997-10-21 1997-10-21 Optimization of the resource and the packet processor system
FI974020 1997-10-21

Publications (2)

Publication Number Publication Date
WO1999021326A2 WO1999021326A2 (en) 1999-04-29
WO1999021326A3 true WO1999021326A3 (en) 1999-07-29

Family

ID=8549773

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FI1998/000816 WO1999021326A2 (en) 1997-10-21 1998-10-20 Resource optimization in a multiprocessor system for a packet network

Country Status (3)

Country Link
AU (1) AU9543998A (en)
FI (1) FI974020A0 (en)
WO (1) WO1999021326A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8782287B2 (en) * 2001-12-21 2014-07-15 Agere Systems Llc Methods and apparatus for using multiple reassembly memories for performing multiple functions

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414702A (en) * 1992-10-20 1995-05-09 Kabushiki Kaisha Toshiba Packet disassembler for use in a control unit of an asynchronous switching system
US5428609A (en) * 1994-01-03 1995-06-27 At&T Corp. STM-to-ATM converters
EP0763915A2 (en) * 1995-09-18 1997-03-19 Kabushiki Kaisha Toshiba Packet transfer device and method adaptive to a large number of input ports
WO1997025803A1 (en) * 1996-01-11 1997-07-17 Cisco Systems, Inc. Method and apparatus for the dynamic allocation of buffers in a digital communications network
WO1997025831A1 (en) * 1996-01-11 1997-07-17 Cisco Systems, Inc. Per channel frame queuing and servicing in the egress direction of a communications network

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414702A (en) * 1992-10-20 1995-05-09 Kabushiki Kaisha Toshiba Packet disassembler for use in a control unit of an asynchronous switching system
US5428609A (en) * 1994-01-03 1995-06-27 At&T Corp. STM-to-ATM converters
EP0763915A2 (en) * 1995-09-18 1997-03-19 Kabushiki Kaisha Toshiba Packet transfer device and method adaptive to a large number of input ports
WO1997025803A1 (en) * 1996-01-11 1997-07-17 Cisco Systems, Inc. Method and apparatus for the dynamic allocation of buffers in a digital communications network
WO1997025831A1 (en) * 1996-01-11 1997-07-17 Cisco Systems, Inc. Per channel frame queuing and servicing in the egress direction of a communications network

Also Published As

Publication number Publication date
AU9543998A (en) 1999-05-10
FI974020A0 (en) 1997-10-21
WO1999021326A2 (en) 1999-04-29

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