WO1998039846A3 - Delay-locked loop with binary-coupled capacitor - Google Patents
Delay-locked loop with binary-coupled capacitor Download PDFInfo
- Publication number
- WO1998039846A3 WO1998039846A3 PCT/US1998/004346 US9804346W WO9839846A3 WO 1998039846 A3 WO1998039846 A3 WO 1998039846A3 US 9804346 W US9804346 W US 9804346W WO 9839846 A3 WO9839846 A3 WO 9839846A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- clock signal
- delay
- variable
- capacitance
- delay line
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53881698A JP3778946B2 (en) | 1997-03-05 | 1998-03-05 | Delay locked loop with binary coupled capacitors |
AU65433/98A AU6543398A (en) | 1997-03-05 | 1998-03-05 | Delay-locked loop with binary-coupled capacitor |
KR1019997008090A KR100662221B1 (en) | 1997-03-05 | 1998-03-05 | Delay-locked loop with binary-coupled capacitor |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/811,918 | 1997-03-05 | ||
US08/811,918 US5946244A (en) | 1997-03-05 | 1997-03-05 | Delay-locked loop with binary-coupled capacitor |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1998039846A2 WO1998039846A2 (en) | 1998-09-11 |
WO1998039846A3 true WO1998039846A3 (en) | 1998-12-03 |
Family
ID=25207946
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1998/004346 WO1998039846A2 (en) | 1997-03-05 | 1998-03-05 | Delay-locked loop with binary-coupled capacitor |
Country Status (5)
Country | Link |
---|---|
US (7) | US5946244A (en) |
JP (1) | JP3778946B2 (en) |
KR (1) | KR100662221B1 (en) |
AU (1) | AU6543398A (en) |
WO (1) | WO1998039846A2 (en) |
Families Citing this family (109)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5748542A (en) * | 1996-12-13 | 1998-05-05 | Micron Technology, Inc. | Circuit and method for providing a substantially constant time delay over a range of supply voltages |
US5940608A (en) | 1997-02-11 | 1999-08-17 | Micron Technology, Inc. | Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal |
US6175894B1 (en) | 1997-03-05 | 2001-01-16 | Micron Technology, Inc. | Memory device command buffer apparatus and method and memory devices and computer systems using same |
US5946244A (en) | 1997-03-05 | 1999-08-31 | Micron Technology, Inc. | Delay-locked loop with binary-coupled capacitor |
JP2993463B2 (en) * | 1997-05-08 | 1999-12-20 | 日本電気株式会社 | Synchronous circuit controller |
US6173432B1 (en) | 1997-06-20 | 2001-01-09 | Micron Technology, Inc. | Method and apparatus for generating a sequence of clock signals |
US6269451B1 (en) | 1998-02-27 | 2001-07-31 | Micron Technology, Inc. | Method and apparatus for adjusting data timing by delaying clock signal |
KR100323254B1 (en) * | 1998-04-24 | 2002-02-04 | 아끼구사 나오유끼 | Semiconductor integrated circuit |
KR100348219B1 (en) * | 1998-07-15 | 2003-01-15 | 주식회사 하이닉스반도체 | Clock synchronous memory with fine delay adjustment circuit |
US6338127B1 (en) | 1998-08-28 | 2002-01-08 | Micron Technology, Inc. | Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same |
US6349399B1 (en) | 1998-09-03 | 2002-02-19 | Micron Technology, Inc. | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same |
US6279090B1 (en) | 1998-09-03 | 2001-08-21 | Micron Technology, Inc. | Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device |
KR100304195B1 (en) * | 1998-09-18 | 2001-11-22 | 윤종용 | Synchronous Semiconductor Memory Device with External Clock Signal |
US6430696B1 (en) | 1998-11-30 | 2002-08-06 | Micron Technology, Inc. | Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same |
US6374360B1 (en) | 1998-12-11 | 2002-04-16 | Micron Technology, Inc. | Method and apparatus for bit-to-bit timing correction of a high speed memory bus |
US6058068A (en) * | 1999-02-25 | 2000-05-02 | Micron Technology, Inc. | Write driver with locally generated reset pulse |
US6470060B1 (en) | 1999-03-01 | 2002-10-22 | Micron Technology, Inc. | Method and apparatus for generating a phase dependent control signal |
DE19934501C1 (en) * | 1999-07-22 | 2000-11-09 | Siemens Ag | Synchronous integrated memory e.g. dynamic random-access memory |
US6388480B1 (en) | 1999-08-30 | 2002-05-14 | Micron Technology, Inc. | Method and apparatus for reducing the lock time of DLL |
US7051130B1 (en) | 1999-10-19 | 2006-05-23 | Rambus Inc. | Integrated circuit device that stores a value representative of a drive strength setting |
US6321282B1 (en) | 1999-10-19 | 2001-11-20 | Rambus Inc. | Apparatus and method for topography dependent signaling |
US6646953B1 (en) * | 2000-07-06 | 2003-11-11 | Rambus Inc. | Single-clock, strobeless signaling system |
US6643787B1 (en) | 1999-10-19 | 2003-11-04 | Rambus Inc. | Bus system optimization |
US6959062B1 (en) | 2000-01-28 | 2005-10-25 | Micron Technology, Inc. | Variable delay line |
EP1122921B1 (en) | 2000-02-02 | 2005-11-30 | Telefonaktiebolaget LM Ericsson (publ) | Circuit and method for providing a digital data signal with pre-distortion |
DE10006236C2 (en) * | 2000-02-11 | 2001-12-20 | Infineon Technologies Ag | Arrangement for generating signal pulses with defined pulse lengths in a module with a BIST function |
KR100366627B1 (en) * | 2000-08-23 | 2003-01-09 | 삼성전자 주식회사 | Digital-to-time conversion based flip-flop circuit and comparator |
US6877100B1 (en) * | 2000-08-25 | 2005-04-05 | Micron Technology, Inc. | Adjustable timing circuit of an integrated circuit by selecting and moving clock edges based on a signal propagation time stored in a programmable non-volatile fuse circuit |
US7079775B2 (en) | 2001-02-05 | 2006-07-18 | Finisar Corporation | Integrated memory mapped controller circuit for fiber optics transceiver |
US6445330B1 (en) * | 2001-04-16 | 2002-09-03 | Cirrus Logic, Inc. | Capacitively coupled references for isolated analog-to-digital converter systems |
US6570813B2 (en) | 2001-05-25 | 2003-05-27 | Micron Technology, Inc. | Synchronous mirror delay with reduced delay line taps |
US6801989B2 (en) | 2001-06-28 | 2004-10-05 | Micron Technology, Inc. | Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same |
KR100399941B1 (en) * | 2001-06-30 | 2003-09-29 | 주식회사 하이닉스반도체 | Register controlled delay locked loop in ddr sdram |
US6504408B1 (en) * | 2001-07-09 | 2003-01-07 | Broadcom Corporation | Method and apparatus to ensure DLL locking at minimum delay |
US6876239B2 (en) * | 2001-07-11 | 2005-04-05 | Micron Technology, Inc. | Delay locked loop “ACTIVE command” reactor |
US6618283B2 (en) * | 2001-08-29 | 2003-09-09 | Micron Technology, Inc. | System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal |
US6930524B2 (en) * | 2001-10-09 | 2005-08-16 | Micron Technology, Inc. | Dual-phase delay-locked loop circuit and method |
US6920540B2 (en) | 2001-10-22 | 2005-07-19 | Rambus Inc. | Timing calibration apparatus and method for a memory device signaling system |
US6759911B2 (en) | 2001-11-19 | 2004-07-06 | Mcron Technology, Inc. | Delay-locked loop circuit and method using a ring oscillator and counter-based delay |
JP3847150B2 (en) * | 2001-11-28 | 2006-11-15 | 沖電気工業株式会社 | Semiconductor integrated circuit and jitter measurement method thereof |
JP2003188720A (en) * | 2001-12-21 | 2003-07-04 | Mitsubishi Electric Corp | Pll circuit |
US6774687B2 (en) * | 2002-03-11 | 2004-08-10 | Micron Technology, Inc. | Method and apparatus for characterizing a delay locked loop |
US6759881B2 (en) * | 2002-03-22 | 2004-07-06 | Rambus Inc. | System with phase jumping locked loop circuit |
US6952123B2 (en) | 2002-03-22 | 2005-10-04 | Rambus Inc. | System with dual rail regulated locked loop |
US6922091B2 (en) | 2002-09-03 | 2005-07-26 | Rambus Inc. | Locked loop circuit with clock hold function |
US6911853B2 (en) * | 2002-03-22 | 2005-06-28 | Rambus Inc. | Locked loop with dual rail regulation |
US7135903B2 (en) * | 2002-09-03 | 2006-11-14 | Rambus Inc. | Phase jumping locked loop circuit |
US6900685B2 (en) * | 2002-05-16 | 2005-05-31 | Micron Technology | Tunable delay circuit |
US6801070B2 (en) * | 2002-05-16 | 2004-10-05 | Micron Technology, Inc. | Measure-controlled circuit with frequency control |
US7319728B2 (en) | 2002-05-16 | 2008-01-15 | Micron Technology, Inc. | Delay locked loop with frequency control |
US6621316B1 (en) | 2002-06-20 | 2003-09-16 | Micron Technology, Inc. | Synchronous mirror delay (SMD) circuit and method including a counter and reduced size bi-directional delay line |
US7019734B2 (en) * | 2002-07-17 | 2006-03-28 | 3M Innovative Properties Company | Resistive touch sensor having microstructured conductive layer |
US6727740B2 (en) | 2002-08-29 | 2004-04-27 | Micron Technology, Inc. | Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals |
US6980041B2 (en) * | 2002-10-04 | 2005-12-27 | Hewlett-Packard Development Company, L.P. | Non-iterative introduction of phase delay into signal without feedback |
KR100500925B1 (en) * | 2002-11-27 | 2005-07-14 | 주식회사 하이닉스반도체 | Low jitter dll using 2 coarse half delay line with digital phase mixer |
US6865135B2 (en) * | 2003-03-12 | 2005-03-08 | Micron Technology, Inc. | Multi-frequency synchronizing clock signal generator |
US6995583B2 (en) * | 2003-05-30 | 2006-02-07 | Hewlett-Packard Development Company, L.P. | Structure and method for dynamic control of output driver voltage |
US6937076B2 (en) * | 2003-06-11 | 2005-08-30 | Micron Technology, Inc. | Clock synchronizing apparatus and method using frequency dependent variable delay |
US7168027B2 (en) | 2003-06-12 | 2007-01-23 | Micron Technology, Inc. | Dynamic synchronization of data capture on an optical or other high speed communications link |
KR100543925B1 (en) * | 2003-06-27 | 2006-01-23 | 주식회사 하이닉스반도체 | Delay Locked Loop and its method for delaying locked a clock |
KR101005265B1 (en) * | 2004-01-28 | 2011-01-04 | 삼성전자주식회사 | Digital circuit tolerant of race condition problem |
US7009407B2 (en) * | 2004-02-19 | 2006-03-07 | Micron Technology, Inc. | Delay lock circuit having self-calibrating loop |
US7103492B2 (en) * | 2004-06-18 | 2006-09-05 | Macronix International Co., Ltd. | Process independent delay chain |
US7218161B2 (en) * | 2004-08-20 | 2007-05-15 | Macronix International Co., Ltd. | Substantially temperature independent delay chain |
TWI258908B (en) * | 2004-05-28 | 2006-07-21 | Novatek Microelectronics Corp | Transient voltage detection circuit |
US7664216B2 (en) | 2004-08-05 | 2010-02-16 | Micron Technology, Inc. | Digital frequency locked delay line |
US7134225B2 (en) * | 2004-09-28 | 2006-11-14 | Lucy Ashton | Pedicure shoe |
US9809278B2 (en) * | 2004-09-28 | 2017-11-07 | Shimano, Inc. | Apparatus for reducing an engaging force of an engaging member |
US7361958B2 (en) * | 2004-09-30 | 2008-04-22 | Intel Corporation | Nonplanar transistors with metal gate electrodes |
US7102933B2 (en) * | 2004-10-15 | 2006-09-05 | Infineon Technologies Ag | Combined receiver and latch |
US7130226B2 (en) * | 2005-02-09 | 2006-10-31 | Micron Technology, Inc. | Clock generating circuit with multiple modes of operation |
US7471130B2 (en) * | 2005-05-19 | 2008-12-30 | Micron Technology, Inc. | Graduated delay line for increased clock skew correction circuit operating range |
US7215586B2 (en) * | 2005-06-29 | 2007-05-08 | Micron Technology, Inc. | Apparatus and method for repairing a semiconductor memory |
KR100615700B1 (en) * | 2005-08-23 | 2006-08-28 | 삼성전자주식회사 | Memory controller and memory control method thereof |
US7616036B1 (en) | 2005-09-12 | 2009-11-10 | Virage Logic Corporation | Programmable strobe and clock generator |
US7519888B2 (en) * | 2005-09-12 | 2009-04-14 | Virage Logic Corporation | Input-output device testing |
US7199625B1 (en) * | 2005-09-20 | 2007-04-03 | Infineon Technologies Ag | Delay locked loop structure providing first and second locked clock signals |
JP2007122807A (en) * | 2005-10-27 | 2007-05-17 | Elpida Memory Inc | Semiconductor storage device and its adjustment method |
KR100891327B1 (en) * | 2006-12-05 | 2009-03-31 | 삼성전자주식회사 | Semiconductor memory device having low jitter source synchronous interface and clocking method thereof |
US7716510B2 (en) | 2006-12-19 | 2010-05-11 | Micron Technology, Inc. | Timing synchronization circuit with loop counter |
US7499342B2 (en) * | 2007-01-05 | 2009-03-03 | Freescale Semiconductor, Inc. | Dynamic module output device and method thereof |
US7656745B2 (en) * | 2007-03-15 | 2010-02-02 | Micron Technology, Inc. | Circuit, system and method for controlling read latency |
JP4890369B2 (en) * | 2007-07-10 | 2012-03-07 | エルピーダメモリ株式会社 | Duty detection circuit, DLL circuit using the same, semiconductor memory device, and data processing system |
JP4551431B2 (en) * | 2007-09-18 | 2010-09-29 | 富士通株式会社 | Variable delay circuit, delay time control method, and unit circuit |
US8610474B2 (en) * | 2009-10-15 | 2013-12-17 | Rambus Inc. | Signal distribution networks and related methods |
KR101086877B1 (en) * | 2010-02-25 | 2011-11-25 | 주식회사 하이닉스반도체 | Semiconductor apparatus |
JP5608436B2 (en) * | 2010-06-22 | 2014-10-15 | ルネサスエレクトロニクス株式会社 | Variable capacitance element |
US8294502B2 (en) | 2011-03-04 | 2012-10-23 | Altera Corporation | Delay circuitry |
US8984320B2 (en) | 2011-03-29 | 2015-03-17 | Micron Technology, Inc. | Command paths, apparatuses and methods for providing a command to a data block |
JP5842264B2 (en) * | 2011-06-08 | 2016-01-13 | 株式会社Joled | Display device and electronic device |
US8552776B2 (en) | 2012-02-01 | 2013-10-08 | Micron Technology, Inc. | Apparatuses and methods for altering a forward path delay of a signal path |
US9166579B2 (en) | 2012-06-01 | 2015-10-20 | Micron Technology, Inc. | Methods and apparatuses for shifting data signals to match command signal delay |
US9054675B2 (en) | 2012-06-22 | 2015-06-09 | Micron Technology, Inc. | Apparatuses and methods for adjusting a minimum forward path delay of a signal path |
US9001594B2 (en) | 2012-07-06 | 2015-04-07 | Micron Technology, Inc. | Apparatuses and methods for adjusting a path delay of a command path |
US9329623B2 (en) | 2012-08-22 | 2016-05-03 | Micron Technology, Inc. | Apparatuses, integrated circuits, and methods for synchronizing data signals with a command signal |
US8913448B2 (en) | 2012-10-25 | 2014-12-16 | Micron Technology, Inc. | Apparatuses and methods for capturing data in a memory |
US9225322B2 (en) | 2013-12-17 | 2015-12-29 | Micron Technology, Inc. | Apparatuses and methods for providing clock signals |
US9508417B2 (en) | 2014-02-20 | 2016-11-29 | Micron Technology, Inc. | Methods and apparatuses for controlling timing paths and latency based on a loop delay |
US9530473B2 (en) | 2014-05-22 | 2016-12-27 | Micron Technology, Inc. | Apparatuses and methods for timing provision of a command to input circuitry |
US9531363B2 (en) | 2015-04-28 | 2016-12-27 | Micron Technology, Inc. | Methods and apparatuses including command latency control circuit |
US9813067B2 (en) | 2015-06-10 | 2017-11-07 | Micron Technology, Inc. | Clock signal and supply voltage variation tracking |
CN106611986A (en) | 2015-10-26 | 2017-05-03 | 通用电气公司 | System and method for pre-charging capacitor bank |
US9735679B2 (en) * | 2015-12-03 | 2017-08-15 | Nuvoton Technology Corporation | Method and apparatus for a delay locked power supply regulator |
US9601170B1 (en) | 2016-04-26 | 2017-03-21 | Micron Technology, Inc. | Apparatuses and methods for adjusting a delay of a command signal path |
US9865317B2 (en) | 2016-04-26 | 2018-01-09 | Micron Technology, Inc. | Methods and apparatuses including command delay adjustment circuit |
US9997220B2 (en) | 2016-08-22 | 2018-06-12 | Micron Technology, Inc. | Apparatuses and methods for adjusting delay of command signal path |
US10224938B2 (en) | 2017-07-26 | 2019-03-05 | Micron Technology, Inc. | Apparatuses and methods for indirectly detecting phase variations |
WO2019199609A1 (en) * | 2018-04-09 | 2019-10-17 | The Regents Of The University Of California | Quarter-rate serial-link receiver with low-aperture-delay samplers |
WO2020024149A1 (en) | 2018-08-01 | 2020-02-06 | Micron Technology, Inc. | Semiconductor device, delay circuit, and related method |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61237512A (en) * | 1985-04-12 | 1986-10-22 | Nec Ic Microcomput Syst Ltd | Semiconductor integrated circuit |
US5283631A (en) * | 1991-11-01 | 1994-02-01 | Hewlett-Packard Co. | Programmable capacitance delay element having inverters controlled by adjustable voltage to offset temperature and voltage supply variations |
US5416436A (en) * | 1992-09-22 | 1995-05-16 | Francen Telecom | Method for time delaying a signal and corresponding delay circuit |
EP0655834A1 (en) * | 1993-11-25 | 1995-05-31 | Nec Corporation | Delay circuit using capacitor and transistor |
US5440514A (en) * | 1994-03-08 | 1995-08-08 | Motorola Inc. | Write control for a memory using a delay locked loop |
EP0703663A1 (en) * | 1994-09-21 | 1996-03-27 | STMicroelectronics S.r.l. | Programmable digital delay unit |
EP0704975A1 (en) * | 1994-09-29 | 1996-04-03 | Nec Corporation | Digital phase locked loop having coarse and fine stepsize variable delay lines |
US5594690A (en) * | 1995-12-15 | 1997-01-14 | Unisys Corporation | Integrated circuit memory having high speed and low power by selectively coupling compensation components to a pulse generator |
Family Cites Families (209)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3633174A (en) * | 1970-04-14 | 1972-01-04 | Us Navy | Memory system having self-adjusting strobe timing |
JPS5518085B2 (en) | 1974-08-14 | 1980-05-16 | ||
US4096402A (en) * | 1975-12-29 | 1978-06-20 | Mostek Corporation | MOSFET buffer for TTL logic input and method of operation |
US4077016A (en) * | 1977-02-22 | 1978-02-28 | Ncr Corporation | Apparatus and method for inhibiting false locking of a phase-locked loop |
DE2945331C2 (en) | 1979-11-09 | 1984-05-30 | Nixdorf Computer Ag, 4790 Paderborn | Device in a signal or data processing system for setting a signal processing circuit |
US4404474A (en) * | 1981-02-06 | 1983-09-13 | Rca Corporation | Active load pulse generating circuit |
US4481625A (en) | 1981-10-21 | 1984-11-06 | Elxsi | High speed data bus system |
US4511846A (en) * | 1982-05-24 | 1985-04-16 | Fairchild Camera And Instrument Corporation | Deskewing time-critical signals in automatic test equipment |
US4508983A (en) | 1983-02-10 | 1985-04-02 | Motorola, Inc. | MOS Analog switch driven by complementary, minimally skewed clock signals |
US4603320A (en) | 1983-04-13 | 1986-07-29 | Anico Research, Ltd. Inc. | Connector interface |
US4638451A (en) | 1983-05-03 | 1987-01-20 | Texas Instruments Incorporated | Microprocessor system with programmable interface |
US4514647A (en) * | 1983-08-01 | 1985-04-30 | At&T Bell Laboratories | Chipset synchronization arrangement |
US4573017A (en) | 1984-01-03 | 1986-02-25 | Motorola, Inc. | Unitary phase and frequency adjust network for a multiple frequency digital phase locked loop |
JPS6143015A (en) | 1984-08-07 | 1986-03-01 | Toshiba Corp | Data delay storage circuit |
US4687951A (en) * | 1984-10-29 | 1987-08-18 | Texas Instruments Incorporated | Fuse link for varying chip operating parameters |
JPS61135243A (en) | 1984-12-06 | 1986-06-23 | Fujitsu Ltd | Multiplex transmission method |
US4600895A (en) * | 1985-04-26 | 1986-07-15 | Minnesota Mining And Manufacturing Company | Precision phase synchronization of free-running oscillator output signal to reference signal |
US4638187A (en) * | 1985-10-01 | 1987-01-20 | Vtc Incorporated | CMOS output buffer providing high drive current with minimum output signal distortion |
GB2184622B (en) * | 1985-12-23 | 1989-10-18 | Philips Nv | Outputbuffer and control circuit providing limited current rate at the output |
JPH07105818B2 (en) | 1986-05-19 | 1995-11-13 | 株式会社日立製作所 | Parallel transmission method |
JPS6337894A (en) * | 1986-07-30 | 1988-02-18 | Mitsubishi Electric Corp | Random access memory |
JPS63276795A (en) | 1986-12-16 | 1988-11-15 | Mitsubishi Electric Corp | Variable length shift register |
JPS63304721A (en) | 1987-06-05 | 1988-12-13 | Anritsu Corp | Signal generator |
US4773085A (en) * | 1987-06-12 | 1988-09-20 | Bell Communications Research, Inc. | Phase and frequency detector circuits |
US4972470A (en) | 1987-08-06 | 1990-11-20 | Steven Farago | Programmable connector |
US5086500A (en) * | 1987-08-07 | 1992-02-04 | Tektronix, Inc. | Synchronized system by adjusting independently clock signals arriving at a plurality of integrated circuits |
US4893087A (en) * | 1988-01-07 | 1990-01-09 | Motorola, Inc. | Low voltage and low power frequency synthesizer |
KR0141494B1 (en) * | 1988-01-28 | 1998-07-15 | 미다 가쓰시게 | High speed sensor system using a level shift circuit |
US5367649A (en) | 1988-05-20 | 1994-11-22 | Waferscale Integration, Inc. | Programmable controller |
US5419909A (en) | 1988-06-15 | 1995-05-30 | May & Baker Ltd. | Packaging for liquid products |
US4885554A (en) | 1988-12-16 | 1989-12-05 | Tektronix, Inc. | Phase-offset signal generator |
US4902986B1 (en) * | 1989-01-30 | 1998-09-01 | Credence Systems Corp | Phased locked loop to provide precise frequency and phase tracking of two signals |
US5020023A (en) * | 1989-02-23 | 1991-05-28 | International Business Machines Corporation | Automatic vernier synchronization of skewed data streams |
US5475631A (en) | 1989-03-09 | 1995-12-12 | Micron Technology, Inc. | Multiport RAM based multiprocessor |
US5075569A (en) | 1989-03-17 | 1991-12-24 | Tektronix, Inc. | Output device circuit and method to minimize impedance fluctuations during crossover |
US4958088A (en) * | 1989-06-19 | 1990-09-18 | Micron Technology, Inc. | Low power three-stage CMOS input buffer with controlled switching |
IT1236578B (en) | 1989-07-04 | 1993-03-16 | Ind Face Standard S P A Milano | Type D flip=flop to type B flip=flop converter circuit |
US5165046A (en) * | 1989-11-06 | 1992-11-17 | Micron Technology, Inc. | High speed CMOS driver circuit |
JP2671538B2 (en) * | 1990-01-17 | 1997-10-29 | 松下電器産業株式会社 | Input buffer circuit |
JP2787725B2 (en) * | 1990-02-14 | 1998-08-20 | 第一電子工業株式会社 | Data clock timing adjustment circuit |
US5408640A (en) * | 1990-02-21 | 1995-04-18 | Digital Equipment Corporation | Phase delay compensator using gating signal generated by a synchronizer for loading and shifting of bit pattern to produce clock phases corresponding to frequency changes |
US5239206A (en) * | 1990-03-06 | 1993-08-24 | Advanced Micro Devices, Inc. | Synchronous circuit with clock skew compensating function and circuits utilizing same |
US5023488A (en) | 1990-03-30 | 1991-06-11 | Xerox Corporation | Drivers and receivers for interfacing VLSI CMOS circuits to transmission lines |
JP3426608B2 (en) * | 1990-04-04 | 2003-07-14 | ユニシス コーポレイシヨン | Clock deskew circuit |
IL96808A (en) * | 1990-04-18 | 1996-03-31 | Rambus Inc | Integrated circuit i/o using a high performance bus interface |
US5243703A (en) * | 1990-04-18 | 1993-09-07 | Rambus, Inc. | Apparatus for synchronously generating clock signals in a data processing system |
US5038115A (en) * | 1990-05-29 | 1991-08-06 | Myers Glen A | Method and apparatus for frequency independent phase tracking of input signals in receiving systems and the like |
US5134311A (en) * | 1990-06-07 | 1992-07-28 | International Business Machines Corporation | Self-adjusting impedance matching driver |
DE69116230T2 (en) | 1990-06-08 | 1996-07-04 | Toshiba Kawasaki Kk | Semiconductor memory with error handling circuit |
KR930006622B1 (en) * | 1990-09-04 | 1993-07-21 | 삼성전자 주식회사 | Semiconductor memory |
US5416909A (en) | 1990-09-14 | 1995-05-16 | Vlsi Technology, Inc. | Input/output controller circuit using a single transceiver to serve multiple input/output ports and method therefor |
EP0476585B1 (en) | 1990-09-18 | 1998-08-26 | Fujitsu Limited | Electronic device using a reference delay generator |
JP2740063B2 (en) | 1990-10-15 | 1998-04-15 | 株式会社東芝 | Semiconductor storage device |
US5122690A (en) * | 1990-10-16 | 1992-06-16 | General Electric Company | Interface circuits including driver circuits with switching noise reduction |
US5257294A (en) * | 1990-11-13 | 1993-10-26 | National Semiconductor Corporation | Phase-locked loop circuit and method |
TW198135B (en) | 1990-11-20 | 1993-01-11 | Oki Electric Ind Co Ltd | |
US5281865A (en) * | 1990-11-28 | 1994-01-25 | Hitachi, Ltd. | Flip-flop circuit |
US5128563A (en) * | 1990-11-28 | 1992-07-07 | Micron Technology, Inc. | CMOS bootstrapped output driver method and circuit |
US5223755A (en) | 1990-12-26 | 1993-06-29 | Xerox Corporation | Extended frequency range variable delay locked loop for clock synchronization |
US5500808A (en) | 1991-01-24 | 1996-03-19 | Synopsys, Inc. | Apparatus and method for estimating time delays using unmapped combinational logic networks |
US5150186A (en) * | 1991-03-06 | 1992-09-22 | Micron Technology, Inc. | CMOS output pull-up driver |
US5128560A (en) * | 1991-03-22 | 1992-07-07 | Micron Technology, Inc. | Boosted supply output driver circuit for driving an all N-channel output stage |
US5220208A (en) * | 1991-04-29 | 1993-06-15 | Texas Instruments Incorporated | Circuitry and method for controlling current in an electronic circuit |
US5256989A (en) * | 1991-05-03 | 1993-10-26 | Motorola, Inc. | Lock detection for a phase lock loop |
US5212601A (en) * | 1991-05-03 | 1993-05-18 | Western Digital Corporation | Disk drive data synchronizer with window shift synthesis |
US5289580A (en) | 1991-05-10 | 1994-02-22 | Unisys Corporation | Programmable multiple I/O interface controller |
US5341405A (en) | 1991-06-11 | 1994-08-23 | Digital Equipment Corporation | Data recovery apparatus and methods |
US5194765A (en) * | 1991-06-28 | 1993-03-16 | At&T Bell Laboratories | Digitally controlled element sizing |
US5276642A (en) * | 1991-07-15 | 1994-01-04 | Micron Technology, Inc. | Method for performing a split read/write operation in a dynamic random access memory |
KR970005124B1 (en) * | 1991-08-14 | 1997-04-12 | 가부시끼가이샤 아드반테스트 | Variable delayed circuit |
US5272729A (en) | 1991-09-20 | 1993-12-21 | International Business Machines Corporation | Clock signal latency elimination network |
US5465076A (en) | 1991-10-04 | 1995-11-07 | Nippondenso Co., Ltd. | Programmable delay line programmable delay circuit and digital controlled oscillator |
US5165045A (en) | 1991-10-10 | 1992-11-17 | Eselun Steven A | Method and apparatus for measuring displacement having parallel grating lines perpendicular to a displacement direction for diffracting a light beam |
US5498990A (en) * | 1991-11-05 | 1996-03-12 | Monolithic System Technology, Inc. | Reduced CMOS-swing clamping circuit for bus lines |
US5315388A (en) | 1991-11-19 | 1994-05-24 | General Instrument Corporation | Multiple serial access memory for use in feedback systems such as motion compensated television |
US5295164A (en) * | 1991-12-23 | 1994-03-15 | Apple Computer, Inc. | Apparatus for providing a system clock locked to an external clock over a wide range of frequencies |
JPH05225774A (en) | 1992-02-13 | 1993-09-03 | Mitsubishi Electric Corp | Multiport semiconductor memory device |
DE4206082C1 (en) * | 1992-02-27 | 1993-04-08 | Siemens Ag, 8000 Muenchen, De | |
DE4345604B3 (en) * | 1992-03-06 | 2012-07-12 | Rambus Inc. | Device for communication with a DRAM |
US5355391A (en) * | 1992-03-06 | 1994-10-11 | Rambus, Inc. | High speed bus system |
US5233314A (en) * | 1992-03-27 | 1993-08-03 | Cyrix Corporation | Integrated charge-pump phase-locked loop circuit |
US5278460A (en) * | 1992-04-07 | 1994-01-11 | Micron Technology, Inc. | Voltage compensating CMOS input buffer |
US5390308A (en) * | 1992-04-15 | 1995-02-14 | Rambus, Inc. | Method and apparatus for address mapping of dynamic random access memory |
US5379299A (en) | 1992-04-16 | 1995-01-03 | The Johns Hopkins University | High speed propagation delay compensation network |
US5254883A (en) * | 1992-04-22 | 1993-10-19 | Rambus, Inc. | Electrical current source circuitry for a bus |
US5615358A (en) | 1992-05-28 | 1997-03-25 | Texas Instruments Incorporated | Time skewing arrangement for operating memory in synchronism with a data processor |
US5317202A (en) * | 1992-05-28 | 1994-05-31 | Intel Corporation | Delay line loop for 1X on-chip clock generation with zero skew and 50% duty cycle |
US5485490A (en) * | 1992-05-28 | 1996-01-16 | Rambus, Inc. | Method and circuitry for clock synchronization |
US5268639A (en) * | 1992-06-05 | 1993-12-07 | Rambus, Inc. | Testing timing parameters of high speed integrated circuit devices |
US5274276A (en) * | 1992-06-26 | 1993-12-28 | Micron Technology, Inc. | Output driver circuit comprising a programmable circuit for determining the potential at the output node and the method of implementing the circuit |
AU4597393A (en) | 1992-07-22 | 1994-02-14 | Allen Testproducts Division, Allen Group Inc. | Method and apparatus for combining video images |
US5473274A (en) * | 1992-09-14 | 1995-12-05 | Nec America, Inc. | Local clock generator |
EP0596657A3 (en) * | 1992-11-05 | 1994-12-07 | American Telephone & Telegraph | Normalization of apparent propagation delay. |
US5482490A (en) | 1992-12-04 | 1996-01-09 | Weldon-Ming; Richard S. | Collapsible doll's house |
US5311481A (en) * | 1992-12-17 | 1994-05-10 | Micron Technology, Inc. | Wordline driver circuit having a directly gated pull-down device |
JP2792801B2 (en) * | 1992-12-28 | 1998-09-03 | 三菱電機株式会社 | Semiconductor integrated circuit, design method and manufacturing method thereof |
US5347559A (en) * | 1992-12-30 | 1994-09-13 | Digital Equipment Corporation | Apparatus and method of data transfer between systems using different clocks |
US5347177A (en) * | 1993-01-14 | 1994-09-13 | Lipp Robert J | System for interconnecting VLSI circuits with transmission line characteristics |
US5544203A (en) | 1993-02-17 | 1996-08-06 | Texas Instruments Incorporated | Fine resolution digital delay line with coarse and fine adjustment stages |
US5430408A (en) | 1993-03-08 | 1995-07-04 | Texas Instruments Incorporated | Transmission gate circuit |
JP2605576B2 (en) | 1993-04-02 | 1997-04-30 | 日本電気株式会社 | Synchronous semiconductor memory |
US5488321A (en) * | 1993-04-07 | 1996-01-30 | Rambus, Inc. | Static high speed comparator |
US5347179A (en) * | 1993-04-15 | 1994-09-13 | Micron Semiconductor, Inc. | Inverting output driver circuit for reducing electron injection into the substrate |
US5304952A (en) | 1993-05-10 | 1994-04-19 | National Semiconductor Corporation | Lock sensor circuit and method for phase lock loop circuits |
US5337285A (en) * | 1993-05-21 | 1994-08-09 | Rambus, Inc. | Method and apparatus for power control in devices |
AU6988494A (en) * | 1993-05-28 | 1994-12-20 | Rambus Inc. | Method and apparatus for implementing refresh in a synchronous dram system |
US5506814A (en) * | 1993-05-28 | 1996-04-09 | Micron Technology, Inc. | Video random access memory device and method implementing independent two WE nibble control |
JP2636677B2 (en) * | 1993-06-02 | 1997-07-30 | 日本電気株式会社 | Semiconductor integrated circuit |
US5511024A (en) * | 1993-06-02 | 1996-04-23 | Rambus, Inc. | Dynamic random access memory system |
US5428311A (en) * | 1993-06-30 | 1995-06-27 | Sgs-Thomson Microelectronics, Inc. | Fuse circuitry to control the propagation delay of an IC |
US5557781A (en) | 1993-07-15 | 1996-09-17 | Vlsi Technology Inc. | Combination asynchronous cache system and automatic clock tuning device and method therefor |
US5473639A (en) * | 1993-07-26 | 1995-12-05 | Hewlett-Packard Company | Clock recovery apparatus with means for sensing an out of lock condition |
JP2727921B2 (en) | 1993-08-13 | 1998-03-18 | 日本電気株式会社 | Semiconductor integrated circuit device |
JPH0795166A (en) | 1993-09-20 | 1995-04-07 | Fujitsu Ltd | Test equipment for transmission system |
JP3232351B2 (en) * | 1993-10-06 | 2001-11-26 | 三菱電機株式会社 | Digital circuit device |
US5451898A (en) * | 1993-11-12 | 1995-09-19 | Rambus, Inc. | Bias circuit and differential amplifier having stabilized output swing |
JP3547466B2 (en) | 1993-11-29 | 2004-07-28 | 株式会社東芝 | Memory device, serial-parallel data conversion circuit, method for writing data to memory device, and serial-parallel data conversion method |
JPH07153286A (en) * | 1993-11-30 | 1995-06-16 | Sony Corp | Non-volatile semiconductor memory |
US5400283A (en) * | 1993-12-13 | 1995-03-21 | Micron Semiconductor, Inc. | RAM row decode circuitry that utilizes a precharge circuit that is deactivated by a feedback from an activated word line driver |
KR0132504B1 (en) * | 1993-12-21 | 1998-10-01 | 문정환 | Data output buffer |
US5579326A (en) * | 1994-01-31 | 1996-11-26 | Sgs-Thomson Microelectronics, Inc. | Method and apparatus for programming signal timing |
KR960013858B1 (en) * | 1994-02-03 | 1996-10-10 | 현대전자산업 주식회사 | Data output buffer control circuit |
KR100393317B1 (en) * | 1994-02-15 | 2003-10-23 | 람버스 인코포레이티드 | Delayed synchronization loop |
EP0668592B1 (en) | 1994-02-18 | 2000-05-17 | STMicroelectronics S.r.l. | Internal timing method and circuit for programmable memories |
US5424672A (en) * | 1994-02-24 | 1995-06-13 | Micron Semiconductor, Inc. | Low current redundancy fuse assembly |
US5440515A (en) * | 1994-03-08 | 1995-08-08 | Motorola Inc. | Delay locked loop for detecting the phase difference of two signals having different frequencies |
US5402389A (en) * | 1994-03-08 | 1995-03-28 | Motorola, Inc. | Synchronous memory having parallel output data paths |
US5554946A (en) | 1994-04-08 | 1996-09-10 | International Business Machines Corporation | Timing signal generator |
US5557224A (en) | 1994-04-15 | 1996-09-17 | International Business Machines Corporation | Apparatus and method for generating a phase-controlled clock signal |
US5497115A (en) | 1994-04-29 | 1996-03-05 | Mosaid Technologies Incorporated | Flip-flop circuit having low standby power for driving synchronous dynamic random access memory |
JP3553639B2 (en) * | 1994-05-12 | 2004-08-11 | アジレント・テクノロジーズ・インク | Timing adjustment circuit |
US5457407A (en) * | 1994-07-06 | 1995-10-10 | Sony Electronics Inc. | Binary weighted reference circuit for a variable impedance output buffer |
JP3537500B2 (en) | 1994-08-16 | 2004-06-14 | バー−ブラウン・コーポレーション | Inverter device |
JP3176228B2 (en) * | 1994-08-23 | 2001-06-11 | シャープ株式会社 | Semiconductor storage device |
GB9417266D0 (en) * | 1994-08-26 | 1994-10-19 | Inmos Ltd | Testing a non-volatile memory |
US5428317A (en) | 1994-09-06 | 1995-06-27 | Motorola, Inc. | Phase locked loop with low power feedback path and method of operation |
JP3013714B2 (en) | 1994-09-28 | 2000-02-28 | 日本電気株式会社 | Semiconductor storage device |
JPH08123717A (en) | 1994-10-25 | 1996-05-17 | Oki Electric Ind Co Ltd | Semiconductor storage device |
JPH08139572A (en) * | 1994-11-07 | 1996-05-31 | Mitsubishi Electric Corp | Latch circuit |
JP3592386B2 (en) | 1994-11-22 | 2004-11-24 | 株式会社ルネサステクノロジ | Synchronous semiconductor memory device |
JP3233801B2 (en) | 1994-12-09 | 2001-12-04 | 沖電気工業株式会社 | Bit phase synchronization circuit |
JP3260048B2 (en) | 1994-12-13 | 2002-02-25 | 株式会社東芝 | Clock signal generation circuit and semiconductor device |
US5497127A (en) * | 1994-12-14 | 1996-03-05 | David Sarnoff Research Center, Inc. | Wide frequency range CMOS relaxation oscillator with variable hysteresis |
US5577236A (en) * | 1994-12-30 | 1996-11-19 | International Business Machines Corporation | Memory controller for reading data from synchronous RAM |
US5489864A (en) | 1995-02-24 | 1996-02-06 | Intel Corporation | Delay interpolation circuitry |
US5544124A (en) | 1995-03-13 | 1996-08-06 | Micron Technology, Inc. | Optimization circuitry and control for a synchronous memory device with programmable latency period |
US5578940A (en) * | 1995-04-04 | 1996-11-26 | Rambus, Inc. | Modular bus with single or double parallel termination |
US5621690A (en) * | 1995-04-28 | 1997-04-15 | Intel Corporation | Nonvolatile memory blocking architecture and redundancy |
JPH08315567A (en) * | 1995-05-22 | 1996-11-29 | Mitsubishi Electric Corp | Semiconductor memory |
JP3386924B2 (en) | 1995-05-22 | 2003-03-17 | 株式会社日立製作所 | Semiconductor device |
US6023489A (en) | 1995-05-24 | 2000-02-08 | Leica Geosystems Inc. | Method and apparatus for code synchronization in a global positioning system receiver |
US5581197A (en) * | 1995-05-31 | 1996-12-03 | Hewlett-Packard Co. | Method of programming a desired source resistance for a driver stage |
GB2301734B (en) | 1995-05-31 | 1999-10-20 | Motorola Ltd | Communications system and method of operation |
US5576645A (en) * | 1995-06-05 | 1996-11-19 | Hughes Aircraft Company | Sample and hold flip-flop for CMOS logic |
US5636173A (en) * | 1995-06-07 | 1997-06-03 | Micron Technology, Inc. | Auto-precharge during bank selection |
JPH098796A (en) | 1995-06-16 | 1997-01-10 | Hitachi Ltd | Data transfer device |
US5573645A (en) | 1995-06-29 | 1996-11-12 | Mobil Oil Corporation | Process and apparatus for the separation of aromatic hydrocarbons |
JPH0916282A (en) | 1995-07-04 | 1997-01-17 | Toshiba Corp | Clock control system |
JP3403551B2 (en) | 1995-07-14 | 2003-05-06 | 沖電気工業株式会社 | Clock distribution circuit |
US5621340A (en) * | 1995-08-02 | 1997-04-15 | Rambus Inc. | Differential comparator for amplifying small swing signals to a full swing output |
JP3252666B2 (en) * | 1995-08-14 | 2002-02-04 | 日本電気株式会社 | Semiconductor storage device |
US5578941A (en) * | 1995-08-23 | 1996-11-26 | Micron Technology, Inc. | Voltage compensating CMOS input buffer circuit |
US5657289A (en) | 1995-08-30 | 1997-08-12 | Micron Technology, Inc. | Expandable data width SAM for a multiport RAM |
US5692165A (en) | 1995-09-12 | 1997-11-25 | Micron Electronics Inc. | Memory controller with low skew control signal |
US5666322A (en) | 1995-09-21 | 1997-09-09 | Nec Electronics, Inc. | Phase-locked loop timing controller in an integrated circuit memory |
JP3408030B2 (en) | 1995-09-21 | 2003-05-19 | 日本プレシジョン・サーキッツ株式会社 | Phase comparator |
US5652530A (en) | 1995-09-29 | 1997-07-29 | Intel Corporation | Method and apparatus for reducing clock-data skew by clock shifting |
US5767715A (en) | 1995-09-29 | 1998-06-16 | Siemens Medical Systems, Inc. | Method and apparatus for generating timing pulses accurately skewed relative to clock |
SE505090C2 (en) | 1995-10-05 | 1997-06-23 | Ericsson Telefon Ab L M | Method and apparatus for generating a signal |
JP3183321B2 (en) | 1995-11-10 | 2001-07-09 | 日本電気株式会社 | Semiconductor storage device |
US5898674A (en) | 1995-11-14 | 1999-04-27 | Paradyne Corporation | System and method for performing non-disruptive diagnostics through a frame relay circuit |
US5841707A (en) | 1995-11-29 | 1998-11-24 | Texas Instruments Incorporated | Apparatus and method for a programmable interval timing generator in a semiconductor memory |
US5636174A (en) * | 1996-01-11 | 1997-06-03 | Cirrus Logic, Inc. | Fast cycle time-low latency dynamic random access memories and systems and methods using the same |
US5719508A (en) | 1996-02-01 | 1998-02-17 | Northern Telecom, Ltd. | Loss of lock detector for master timing generator |
US5805931A (en) | 1996-02-09 | 1998-09-08 | Micron Technology, Inc. | Programmable bandwidth I/O port and a communication interface using the same port having a plurality of serial access memories capable of being configured for a variety of protocols |
US5712580A (en) | 1996-02-14 | 1998-01-27 | International Business Machines Corporation | Linear phase detector for half-speed quadrature clocking architecture |
US5627791A (en) * | 1996-02-16 | 1997-05-06 | Micron Technology, Inc. | Multiple bank memory with auto refresh to specified bank |
US5668763A (en) | 1996-02-26 | 1997-09-16 | Fujitsu Limited | Semiconductor memory for increasing the number of half good memories by selecting and using good memory blocks |
US5812619A (en) | 1996-02-28 | 1998-09-22 | Advanced Micro Devices, Inc. | Digital phase lock loop and system for digital clock recovery |
US5790612A (en) | 1996-02-29 | 1998-08-04 | Silicon Graphics, Inc. | System and method to reduce jitter in digital delay-locked loops |
US5621739A (en) * | 1996-05-07 | 1997-04-15 | Intel Corporation | Method and apparatus for buffer self-test and characterization |
JPH09304484A (en) | 1996-05-13 | 1997-11-28 | Nec Corp | Semiconductor memory apparatus |
US5737342A (en) | 1996-05-31 | 1998-04-07 | Quantum Corporation | Method for in-chip testing of digital circuits of a synchronously sampled data detection channel |
US5784422A (en) | 1996-08-05 | 1998-07-21 | Transcrypt International, Inc. | Apparatus and method for accurate synchronization with inbound data packets at relatively low sampling rates |
JPH1069769A (en) | 1996-08-29 | 1998-03-10 | Fujitsu Ltd | Semiconductor integrated circuit |
US5872959A (en) | 1996-09-10 | 1999-02-16 | Lsi Logic Corporation | Method and apparatus for parallel high speed data transfer |
US5917760A (en) | 1996-09-20 | 1999-06-29 | Sldram, Inc. | De-skewing data signals in a memory system |
US5964884A (en) | 1996-09-30 | 1999-10-12 | Advanced Micro Devices, Inc. | Self-timed pulse control circuit |
US6038219A (en) | 1996-12-31 | 2000-03-14 | Paradyne Corporation | User-configurable frame relay network |
US5889829A (en) | 1997-01-07 | 1999-03-30 | Microchip Technology Incorporated | Phase locked loop with improved lock time and stability |
US5920518A (en) | 1997-02-11 | 1999-07-06 | Micron Technology, Inc. | Synchronous clock generator including delay-locked loop |
US5852378A (en) | 1997-02-11 | 1998-12-22 | Micron Technology, Inc. | Low-skew differential signal converter |
US5940608A (en) | 1997-02-11 | 1999-08-17 | Micron Technology, Inc. | Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal |
US5946244A (en) | 1997-03-05 | 1999-08-31 | Micron Technology, Inc. | Delay-locked loop with binary-coupled capacitor |
US5765715A (en) | 1997-03-19 | 1998-06-16 | The First Years Inc. | Drinking cup and cup holder |
US5831929A (en) | 1997-04-04 | 1998-11-03 | Micron Technology, Inc. | Memory device with staggered data paths |
US6005823A (en) | 1997-06-20 | 1999-12-21 | Micron Technology, Inc. | Memory device with pipelined column address path |
US5953284A (en) | 1997-07-09 | 1999-09-14 | Micron Technology, Inc. | Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same |
US6011732A (en) | 1997-08-20 | 2000-01-04 | Micron Technology, Inc. | Synchronous clock generator including a compound delay-locked loop |
US5940609A (en) | 1997-08-29 | 1999-08-17 | Micorn Technology, Inc. | Synchronous clock generator including a false lock detector |
US5926047A (en) | 1997-08-29 | 1999-07-20 | Micron Technology, Inc. | Synchronous clock generator including a delay-locked loop signal loss detector |
US6101197A (en) | 1997-09-18 | 2000-08-08 | Micron Technology, Inc. | Method and apparatus for adjusting the timing of signals over fine and coarse ranges |
US5990719A (en) | 1997-10-07 | 1999-11-23 | Intel Corporation | Adaptive filtering scheme for sampling phase relations of clock networks |
US6105157A (en) | 1998-01-30 | 2000-08-15 | Credence Systems Corporation | Salphasic timing calibration system for an integrated circuit tester |
US6160423A (en) | 1998-03-16 | 2000-12-12 | Jazio, Inc. | High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines |
US6016282A (en) | 1998-05-28 | 2000-01-18 | Micron Technology, Inc. | Clock vernier adjustment |
JP2000048586A (en) | 1998-07-30 | 2000-02-18 | Fujitsu Ltd | Nonvolatile semiconductor storage device |
US6029250A (en) | 1998-09-09 | 2000-02-22 | Micron Technology, Inc. | Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same |
JP3913377B2 (en) | 1998-11-04 | 2007-05-09 | 富士通株式会社 | Semiconductor memory device |
-
1997
- 1997-03-05 US US08/811,918 patent/US5946244A/en not_active Expired - Lifetime
-
1998
- 1998-03-05 KR KR1019997008090A patent/KR100662221B1/en not_active IP Right Cessation
- 1998-03-05 AU AU65433/98A patent/AU6543398A/en not_active Abandoned
- 1998-03-05 WO PCT/US1998/004346 patent/WO1998039846A2/en not_active Application Discontinuation
- 1998-03-05 JP JP53881698A patent/JP3778946B2/en not_active Expired - Fee Related
-
1999
- 1999-07-15 US US09/353,571 patent/US6400641B1/en not_active Expired - Lifetime
-
2000
- 2000-05-12 US US09/570,242 patent/US6256259B1/en not_active Expired - Lifetime
- 2000-05-12 US US09/570,241 patent/US6262921B1/en not_active Expired - Lifetime
-
2001
- 2001-06-29 US US09/895,503 patent/US6483757B2/en not_active Expired - Lifetime
- 2001-07-16 US US09/907,316 patent/US6490224B2/en not_active Expired - Lifetime
- 2001-11-02 US US10/033,574 patent/US6490207B2/en not_active Expired - Lifetime
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61237512A (en) * | 1985-04-12 | 1986-10-22 | Nec Ic Microcomput Syst Ltd | Semiconductor integrated circuit |
US5283631A (en) * | 1991-11-01 | 1994-02-01 | Hewlett-Packard Co. | Programmable capacitance delay element having inverters controlled by adjustable voltage to offset temperature and voltage supply variations |
US5416436A (en) * | 1992-09-22 | 1995-05-16 | Francen Telecom | Method for time delaying a signal and corresponding delay circuit |
EP0655834A1 (en) * | 1993-11-25 | 1995-05-31 | Nec Corporation | Delay circuit using capacitor and transistor |
US5440514A (en) * | 1994-03-08 | 1995-08-08 | Motorola Inc. | Write control for a memory using a delay locked loop |
EP0703663A1 (en) * | 1994-09-21 | 1996-03-27 | STMicroelectronics S.r.l. | Programmable digital delay unit |
EP0704975A1 (en) * | 1994-09-29 | 1996-04-03 | Nec Corporation | Digital phase locked loop having coarse and fine stepsize variable delay lines |
US5594690A (en) * | 1995-12-15 | 1997-01-14 | Unisys Corporation | Integrated circuit memory having high speed and low power by selectively coupling compensation components to a pulse generator |
Non-Patent Citations (2)
Title |
---|
"VARIABLE DELAY DIGITAL CIRCUIT", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 35, no. 4A, 1 September 1992 (1992-09-01), pages 365 - 366, XP000314796 * |
PATENT ABSTRACTS OF JAPAN vol. 011, no. 083 (E - 489) 13 March 1987 (1987-03-13) * |
Also Published As
Publication number | Publication date |
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US6490224B2 (en) | 2002-12-03 |
US6490207B2 (en) | 2002-12-03 |
KR100662221B1 (en) | 2007-01-02 |
JP2001514812A (en) | 2001-09-11 |
US20020008556A1 (en) | 2002-01-24 |
US20010053100A1 (en) | 2001-12-20 |
AU6543398A (en) | 1998-09-22 |
US6400641B1 (en) | 2002-06-04 |
US20020057624A1 (en) | 2002-05-16 |
US6262921B1 (en) | 2001-07-17 |
US5946244A (en) | 1999-08-31 |
US6256259B1 (en) | 2001-07-03 |
KR20000076004A (en) | 2000-12-26 |
WO1998039846A2 (en) | 1998-09-11 |
US6483757B2 (en) | 2002-11-19 |
JP3778946B2 (en) | 2006-05-24 |
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