WO1998037586A1 - Method for fabricating low-resistance contacts on nitride semiconductor devices - Google Patents

Method for fabricating low-resistance contacts on nitride semiconductor devices Download PDF

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Publication number
WO1998037586A1
WO1998037586A1 PCT/US1998/003146 US9803146W WO9837586A1 WO 1998037586 A1 WO1998037586 A1 WO 1998037586A1 US 9803146 W US9803146 W US 9803146W WO 9837586 A1 WO9837586 A1 WO 9837586A1
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WO
WIPO (PCT)
Prior art keywords
layer
semiconductor
contact
gan
metallic layer
Prior art date
Application number
PCT/US1998/003146
Other languages
French (fr)
Inventor
Norihide Yamada
Yoshifumi Yamaoka
Tetsuya Takeuchi
Yawara Kaneko
Original Assignee
Hewlett-Packard Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett-Packard Company filed Critical Hewlett-Packard Company
Priority to EP98906549A priority Critical patent/EP0972310A1/en
Publication of WO1998037586A1 publication Critical patent/WO1998037586A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Definitions

  • the present invention relates to methods for fabricating electrical contacts on semiconductor devices, and more particularly, to a method for fabricating an electrical contact with reduced contact resistance on group Ill-nitride semiconductor surfaces.
  • III-N semiconductor is a semiconductor having a Group III element and nitrogen.
  • III-N semiconductors such as GaN are useful in fabricating light emitting elements that emit in ⁇ e blue and violet regions of the optical spectrum. These elements include light emitting diodes and laser diodes.
  • III-N semiconductors can be used to construct metal semiconductor field-effect transistors (MESFETs).
  • laser diodes that use semiconductor material based on GaN that emit in the blue and violet regions of the spectrum hold the promise of substantially improving the amount of information that can be stored on an optical disk.
  • the laser diode must operate in an essentially continuous mode while maintaining a lifetime consistent with a consumer product.
  • Prior art GaN based laser diodes do not satisfy these constraints.
  • prior art GaN-based laser diodes require high driving voltages and have low electrical efficiency.
  • Light emitting elements based on HI-N semiconductors are typically fabricated by creating a p-n diode structure having a light generating region between the p-type and n-type layers.
  • the diode is constructed from layers of ILI-N semiconducting materials. After the appropriate layers are grown, electrodes are formed on the p-type and n-type layers to provide the electrical connections for driving the light-emitting element.
  • III-N laser diodes are primarily due to the large contact resistance between the metal that becomes the electrode and the GaN material. This contact resistance is particularly high at the p-type electrode.
  • the contact resistivity between the metal electrode and the p-GaN layer of a typical device provided with Au/Ni electrodes is about 2 x 10 "l ⁇ cm 2 .
  • the contact resistance is above 200 ⁇ .
  • the power dissipated in the contact generates a significant amount of heat. The heat prevents the devices from running in a continuous mode at the light output levels needed to read and/or write optical disks. In addition, the heat shortens the lifetime of the devices. Accordingly, a significant improvement in III-N laser diodes would be obtained if this contact resistance could be reduced.
  • the present invention is a method for fabricating an electrical contact on a surface of a semiconductor comprising a group III element and nitrogen.
  • the contact is formed by depositing a metallic layer on the semiconductor surface and then annealing the layer at a temperature greater than 400 °C for at least 4 hours.
  • the method can be used to construct a Au/Ni contact on GaN semiconductor surface with substantially less resistivity than that obtained by conventional methods.
  • Figure 1 is a cross-sectional view of a typical edge-emitting laser diode constructed from III-N semiconductor layers.
  • FIG. 1 is a cross-sectional view of a IU.-N vertical cavity surface emitting laser 1.
  • the laser is formed by depositing by depositing a number of layers on a sapphire substrate 2 and then etching back the layers to provide contacts to the n-type and p-type layers.
  • the layers shown in the figure are a GaN buffer layer 3, an n-type GaN contact layer 4, an n-type AlGaN cladding layer 6, an n-type GaN optical waveguide layer 7, an InGaN multi-quantum well layer 8 for generating light, a p-type GaN optical waveguide layer 9, a p-type AlGaN cladding layer 10, and a p-type GaN contact layer 11.
  • the n-type electrode 5 and the p-type electrode 12 are formed on the n-type GaN contact layer 4 and the p-type GaN contact layer 11, respectively.
  • a SiO2 layer 13 covers the outer surface of the etched area.
  • the conventional method for fabricating the metal contacts involves depositing a metal, such as gold (Au), platinum (Pt), nickel (Ni), or iridium (Ir) on the semiconductor, and then annealing the device at a high temperature for a relatively short time, typically, 1 to 2 minutes.
  • a metal such as gold (Au), platinum (Pt), nickel (Ni), or iridium (Ir) on the semiconductor, and then annealing the device at a high temperature for a relatively short time, typically, 1 to 2 minutes.
  • a metal-semiconductor alloy forms at the interface of the semiconductor and deposited metal layer, and a stable ohmic contact is obtained.
  • the contact resistance obtained by this method is too high.
  • the present invention is based on the observation that the contact resistance decreases with annealing time. If very long annealing times are utilized, a reduction in the contact resistance of more than a factor of 30 has been observed.
  • GaN is used as the nitride semiconductor, and a Ni/Au electrode is utilized for the p-GaN contact.
  • the metals are deposited on the outermost p-type GaN layer utilizing vacuum deposition techniques based on conventional electron beam heating of an appropriate target. For example, a Ni layer is deposited on the GaN layer to a thickness of approximately 1.4 nm. Then, a Au layer is deposited to a thickness of approximately 200 nm on the Ni layer.
  • the device is then annealed for at least 4 hours at a temperature between 400-600 ° C, typically 500° C. In the preferred embodiment of the present invention, the annealing operation is carried out at 500 ° C in a nitrogen atmosphere.
  • the resistivity of the contact is found to decrease monotonically with annealing time for annealing times between 4 and 16 hours.
  • a device having a contact as described above was found to have a contact resistivity of 6 x 10 "2 ⁇ cm 2 before annealing. After annealing for 4 hours, the resistivity decreased to 1.3 x 10 *2 ⁇ cm 2 . After annealing for 9 hours, the resistivity decreased to 6.9 x 10 "3 ⁇ cm 2 . After 16 hours of annealing, the resistivity decreased to 1.6 x 10 "3 ⁇ cm 2 . This represents an approximately 35-fold decrease in the resistivity of the contact. It should be noted that the resistivity begins to increase again if the annealing time is greater than 16 hours. The decrease in the contact resistance with annealing time is believed to result from the diffusion of the Ni into GaN.
  • the teachings of the present invention can be applied to other semiconductors and electrode structures.
  • the present invention may be applied to other devices than light emitting diodes.

Abstract

A method for fabricating an electrical contact (12) on a surface (11) of a semiconductor comprising a group III element and nitrogen. The contact (12) is formed by depositing a metallic layer on the semiconductor surface and then annealing the layer at a tempeature greater than 400 °C for at least 4 hours. The method can be used to construct a Au/Ni contact on GaN semiconductor surface with substantially less resistivity than that obtained by conventional methods.

Description

METHOD FOR FABRICATING LOW-RESISTANCE CONTACTS ON NITRIDE
SEMICONDUCTOR DEVICES
Field of the Invention
The present invention relates to methods for fabricating electrical contacts on semiconductor devices, and more particularly, to a method for fabricating an electrical contact with reduced contact resistance on group Ill-nitride semiconductor surfaces.
Background of the Invention
In the following discussion a III-N semiconductor is a semiconductor having a Group III element and nitrogen. III-N semiconductors such as GaN are useful in fabricating light emitting elements that emit in ώe blue and violet regions of the optical spectrum. These elements include light emitting diodes and laser diodes. In addition, III-N semiconductors can be used to construct metal semiconductor field-effect transistors (MESFETs).
In particular, laser diodes that use semiconductor material based on GaN that emit in the blue and violet regions of the spectrum hold the promise of substantially improving the amount of information that can be stored on an optical disk. However, to provide this improvement, the laser diode must operate in an essentially continuous mode while maintaining a lifetime consistent with a consumer product. Prior art GaN based laser diodes do not satisfy these constraints. In addition, prior art GaN-based laser diodes require high driving voltages and have low electrical efficiency.
Light emitting elements based on HI-N semiconductors are typically fabricated by creating a p-n diode structure having a light generating region between the p-type and n-type layers. The diode is constructed from layers of ILI-N semiconducting materials. After the appropriate layers are grown, electrodes are formed on the p-type and n-type layers to provide the electrical connections for driving the light-emitting element. The problems discussed above with III-N laser diodes are primarily due to the large contact resistance between the metal that becomes the electrode and the GaN material. This contact resistance is particularly high at the p-type electrode. For example, the contact resistivity between the metal electrode and the p-GaN layer of a typical device provided with Au/Ni electrodes is about 2 x 10 "l Ωcm2. If the electrode contact area is 300 μm x 300μm, the contact resistance is above 200 Ω. At a drive current of 0.1A, more than 2 watts of power are consumed by the contact. The high contact resistance requires a larger driving voltage to overcome. In addition, the power dissipated in the contact generates a significant amount of heat. The heat prevents the devices from running in a continuous mode at the light output levels needed to read and/or write optical disks. In addition, the heat shortens the lifetime of the devices. Accordingly, a significant improvement in III-N laser diodes would be obtained if this contact resistance could be reduced.
Broadly, it is the object of the present invention to provide an improved method for constructing an electrical contact on III-N semiconductors.
It is a further object of the present invention to provide a method for constructing an electrical contact on III-N semiconductors with lower contact resistance.
These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention and the accompanying drawings.
Summary of the Invention
The present invention is a method for fabricating an electrical contact on a surface of a semiconductor comprising a group III element and nitrogen. The contact is formed by depositing a metallic layer on the semiconductor surface and then annealing the layer at a temperature greater than 400 °C for at least 4 hours. The method can be used to construct a Au/Ni contact on GaN semiconductor surface with substantially less resistivity than that obtained by conventional methods. Brief Description of the Drawings
Figure 1 is a cross-sectional view of a typical edge-emitting laser diode constructed from III-N semiconductor layers.
Detailed Description of the Invention
The present invention may be more easily understood with reference to a specific III- N light-emitting device. Refer now to Figure 1, which is a cross-sectional view of a IU.-N vertical cavity surface emitting laser 1. The laser is formed by depositing by depositing a number of layers on a sapphire substrate 2 and then etching back the layers to provide contacts to the n-type and p-type layers. The layers shown in the figure are a GaN buffer layer 3, an n-type GaN contact layer 4, an n-type AlGaN cladding layer 6, an n-type GaN optical waveguide layer 7, an InGaN multi-quantum well layer 8 for generating light, a p-type GaN optical waveguide layer 9, a p-type AlGaN cladding layer 10, and a p-type GaN contact layer 11. The n-type electrode 5 and the p-type electrode 12 are formed on the n-type GaN contact layer 4 and the p-type GaN contact layer 11, respectively. A SiO2 layer 13 covers the outer surface of the etched area. The construction of these layers and the etching processes used to provide access to the contact layers are conventional in the art, and hence, will not be discussed in detail here.
The conventional method for fabricating the metal contacts involves depositing a metal, such as gold (Au), platinum (Pt), nickel (Ni), or iridium (Ir) on the semiconductor, and then annealing the device at a high temperature for a relatively short time, typically, 1 to 2 minutes. A metal-semiconductor alloy forms at the interface of the semiconductor and deposited metal layer, and a stable ohmic contact is obtained. Unfortunately, the contact resistance obtained by this method is too high.
The present invention is based on the observation that the contact resistance decreases with annealing time. If very long annealing times are utilized, a reduction in the contact resistance of more than a factor of 30 has been observed. In the preferred embodiment of the present invention, GaN is used as the nitride semiconductor, and a Ni/Au electrode is utilized for the p-GaN contact. The metals are deposited on the outermost p-type GaN layer utilizing vacuum deposition techniques based on conventional electron beam heating of an appropriate target. For example, a Ni layer is deposited on the GaN layer to a thickness of approximately 1.4 nm. Then, a Au layer is deposited to a thickness of approximately 200 nm on the Ni layer. The device is then annealed for at least 4 hours at a temperature between 400-600 ° C, typically 500° C. In the preferred embodiment of the present invention, the annealing operation is carried out at 500 ° C in a nitrogen atmosphere.
The resistivity of the contact is found to decrease monotonically with annealing time for annealing times between 4 and 16 hours. For example, a device having a contact as described above was found to have a contact resistivity of 6 x 10"2 Ωcm2 before annealing. After annealing for 4 hours, the resistivity decreased to 1.3 x 10*2 Ωcm2. After annealing for 9 hours, the resistivity decreased to 6.9 x 10"3 Ωcm2. After 16 hours of annealing, the resistivity decreased to 1.6 x 10"3 Ωcm2. This represents an approximately 35-fold decrease in the resistivity of the contact. It should be noted that the resistivity begins to increase again if the annealing time is greater than 16 hours. The decrease in the contact resistance with annealing time is believed to result from the diffusion of the Ni into GaN.
While the above example has utilized a specific III-N semiconductor and electrode structure, the teachings of the present invention can be applied to other semiconductors and electrode structures. In addition, the present invention may be applied to other devices than light emitting diodes.
Various modifications to the present invention will become apparent to those skilled in the art from the foregoing description and accompanying drawings. Accordingly, the present invention is to be limited solely by the scope of the following claims.

Claims

WHAT IS CLAIMED IS:
1. A method for fabricating an electrical contact[12] on a surface of a semiconductor[l 1] comprising a group III element and nitrogen, said method comprising the steps of: depositing a metallic layer on said semiconductor surface; and annealing said layer at a temperature greater than 400 ┬░C for at least 4 hours.
2. The method of claim 1 wherein said semiconductor surface comprises GaN.
3. The method of claim 1 wherein said metallic layer comprises an element chosen from the group consisting of Au, Pt, Ni, and Ir.
4. The method of claim 1 wherein said metallic layer comprises a layer of Ni adjacent to said semiconductor surface and a layer of Au deposited on said layer of Ni.
5. In a circuitfl] having an electrical contact[12] comprising a metallic layer in contact with a p-type semiconductor layerf 11] comprising a Group III element and nitrogen, the improvement comprising providing a metallic diffusion region in said semiconductor layer, said diffusion region having metal diffused therein and being in contact with said metallic layer, the concentration of metal in said diffused region being sufficient to lower the resistance of said electrical contact relative to the resistance of said electrical contact in the absence of said diffusion region.
6. The circuitfl] of Claim 5 wherein said p-type semiconductor layerfl 1] comprises GaN.
7. The circuitfl] of Claim 5 wherein said metal diffused into said semiconductor layerfl 1] comprises Ni.
8. The circuitfl] of Claim 5 wherein said metallic layer comprises an element chosen from the group consisting of Au, Pt, Ni, and Ir.
PCT/US1998/003146 1997-02-21 1998-02-18 Method for fabricating low-resistance contacts on nitride semiconductor devices WO1998037586A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP98906549A EP0972310A1 (en) 1997-02-21 1998-02-18 Method for fabricating low-resistance contacts on nitride semiconductor devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9/37705 1997-02-21
JP3770597A JPH10242074A (en) 1997-02-21 1997-02-21 Manufacturing method of nitride semiconductor element

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WO1998037586A1 true WO1998037586A1 (en) 1998-08-27

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003097532A1 (en) * 2002-05-17 2003-11-27 Macquarie University Process for manufacturing a gallium rich gallium nitride film
US6711191B1 (en) 1999-03-04 2004-03-23 Nichia Corporation Nitride semiconductor laser device
US6835956B1 (en) 1999-02-09 2004-12-28 Nichia Corporation Nitride semiconductor device and manufacturing method thereof
US7977687B2 (en) 2008-05-09 2011-07-12 National Chiao Tung University Light emitter device
US8592841B2 (en) 1997-07-25 2013-11-26 Nichia Corporation Nitride semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100356594C (en) * 2004-12-08 2007-12-19 深圳市方大国科光电技术有限公司 Method for improving ohmic contact alloy of gallium nitrate based semiconductor LED

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0622858A2 (en) * 1993-04-28 1994-11-02 Nichia Chemical Industries, Ltd. Gallium nitride-based III-V group compound semiconductor device and method of producing the same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0622858A2 (en) * 1993-04-28 1994-11-02 Nichia Chemical Industries, Ltd. Gallium nitride-based III-V group compound semiconductor device and method of producing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ISHIKAWA H ET AL: "EFFECTS OF SURFACE TREATMENT AND METAL WORK FUNCTIONS ON ELECTRICALPROPERTIES AT P-GAN/METAL INTERFACES", JOURNAL OF APPLIED PHYSICS, vol. 81, no. 3, 1 February 1997 (1997-02-01), pages 1315 - 1322, XP000659459 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8592841B2 (en) 1997-07-25 2013-11-26 Nichia Corporation Nitride semiconductor device
US6835956B1 (en) 1999-02-09 2004-12-28 Nichia Corporation Nitride semiconductor device and manufacturing method thereof
US6711191B1 (en) 1999-03-04 2004-03-23 Nichia Corporation Nitride semiconductor laser device
WO2003097532A1 (en) * 2002-05-17 2003-11-27 Macquarie University Process for manufacturing a gallium rich gallium nitride film
US7553368B2 (en) 2002-05-17 2009-06-30 Gallium Enterprises Pty Ltd. Process for manufacturing a gallium rich gallium nitride film
US7977687B2 (en) 2008-05-09 2011-07-12 National Chiao Tung University Light emitter device

Also Published As

Publication number Publication date
EP0972310A1 (en) 2000-01-19
JPH10242074A (en) 1998-09-11

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