WO1998015012A1 - Capacitor with an oxygen barrier layer and a first base metal electrode - Google Patents

Capacitor with an oxygen barrier layer and a first base metal electrode Download PDF

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Publication number
WO1998015012A1
WO1998015012A1 PCT/DE1997/002132 DE9702132W WO9815012A1 WO 1998015012 A1 WO1998015012 A1 WO 1998015012A1 DE 9702132 W DE9702132 W DE 9702132W WO 9815012 A1 WO9815012 A1 WO 9815012A1
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WIPO (PCT)
Prior art keywords
capacitor
electrode
barrier layer
dielectric
metal electrode
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PCT/DE1997/002132
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German (de)
French (fr)
Inventor
Walter Hartner
Günther SCHINDLER
Carlos Mazure-Espejo
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Siemens Aktiengesellschaft
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Publication of WO1998015012A1 publication Critical patent/WO1998015012A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material

Definitions

  • the invention relates to a capacitor in an integrated circuit, in particular in an integrated semiconductor memory.
  • capacitors In integrated semiconductor circuits, increasing the integration density is a primary goal. In the case of capacitors, the space requirement can be reduced by using a ferroelectric or high- ⁇ dielectric as the capacitor dielectric, so that a smaller capacitor area is required for a given capacitance value. Such capacitors are used, for example, in integrated memories as so-called “stacked” capacitors (the capacitor of a memory cell is arranged above an associated selection transistor).
  • BST strontium titanate
  • PZT lead zirconium titanate
  • the object of the present invention is to provide a capacitor in an integrated semiconductor circuit in which a material known in semiconductor technology is used as the first electrode and a high- ⁇ dielectric or ferroelectric is used as the capacitor dielectric. This object is achieved by a capacitor with the features of claim 1. Further training is the subject of subclaims.
  • a barrier layer is arranged on the first electrode, which sufficiently suppresses the diffusion of oxygen and thus protects the first electrode from oxidation.
  • a known material such as polysilicon, can thus be used as the lower electrode.
  • a ferroelectric or a high ⁇ dielectric such as BST is then applied directly to this barrier using a known process.
  • the barrier layer must effectively prevent all diffusion paths existing during the high-temperature process mentioned. S13N4, for example, can be used as the oxygen barrier layer.
  • Another possibility is to use a T1O2 barrier layer on a first electrode made of Ti
  • the barrier layer can be electrically conductive or insulating. In the first case it has to be structured if neighboring capacitors have to be separated from each other. In the latter case it must be taken into account that the barrier layer generally has a much lower dielectric constant ⁇ than z. B. BST, so that the capacitor effectively consists of a series connection of two capacitors with a total capacitance that is less than that of the BST capacitor. This loss of capacity can be minimized by reducing the thickness of the camera layer. If the capacitor dielectric consists of a ferroelectric, the voltage drop at the barrier layer must be taken into account. This means that a higher voltage must be applied in order to run through a given hysteresis loop. This does not affect the polarization per area in the saturation range.
  • the barrier layer can be produced in particular by nitriding or oxidizing. Furthermore, the barrier layer can be formed by a reaction between the capacitor dielectric and the first electrode. This reaction can take place during the deposition of the dielectric (or ferroelectric) or during one of the subsequent anneals.
  • WN reacts as an electrode material with BST at the interface to W (Ba, Sr) O x , which is non-stoichiometric and conductive.
  • the invention can also be used with a capacitor arranged in a trench. Both capacitor electrodes are arranged predominantly within the trench, with each memory cell having its own trench or the capacitors of adjacent cells being accommodated in a common trench.
  • FIG. 1 shows an exemplary embodiment of a memory cell of an integrated semiconductor circuit with a capacitor according to the invention.
  • the figure shows a substrate 1 with a MOS transistor arranged therein, which comprises two S / D regions 3, 4 and a gate 5 insulated on the substrate. Inactive areas of the circuit are covered with insulation 2.
  • An insulation layer 6 covers the transistor and has contact holes to the S / D regions to be contacted. The contact hole to the S / D area 4 lies outside the drawing plane.
  • the S / D area 3 is about that
  • This first electrode 7 consists of a semiconductor technology Usually used conductive material, such as tungsten, suicides, eptactically grown silicon, polysilicon, nitrides (WN; TiN etc.) or a combination of such materials. It can also have a barrier layer on its underside (ie at the interface with the S / D region 3) or can be connected to the doped region 3 via a specially produced connection structure (plug), which may be made of a different material. All of these materials do not consist essentially of a noble metal and are referred to below as essentially noble metal-free conductive materials.
  • conductive material such as tungsten, suicides, eptactically grown silicon, polysilicon, nitrides (WN; TiN etc.) or a combination of such materials. It can also have a barrier layer on its underside (ie at the interface with the S / D region 3) or can be connected to the doped region 3 via a specially produced connection structure (plug), which may be made of a different material. All of
  • Silicon nitride is then applied to the suitably structured first electrode 7 as a barrier layer 8 in a thickness of ⁇ 5 nm (for example 2 nm) so that all exposed surfaces of the first electrode are covered by it, then barium is deposited using a known method Strontium titanate 9 in a layer thickness of about 50 nm.
  • the advantage of the thin dielectric layer between the electrode 7 and the capacitor dielectric 9 is the reduction of the leakage current of the capacitor.
  • the non-conductive barrier layer 8 can remain on the integrated circuit over the entire area.
  • the capacitor is completed by a second electrode 10, which is produced on the capacitor dielectric 9.

Abstract

A capacitor with a high ε dialectric or ferroelectric layer as a capacitor dialectric and a first electrode, substantially made out of conductive material free from noble metal. A barrier layer to suppress oxygen diffusion is placed between the capacitor dialectric and the first electrode. Known materials such as polysilicon or aluminium can thus be integrated as electrode material with high ε dielectric or ferrorelectric properties.

Description

Beschreibungdescription
Kondensator mit einer Sauerstoff-Barriereschicht und einer ersten Elektrode aus einem NichtedelmetallCapacitor with an oxygen barrier layer and a first electrode made of a non-noble metal
Die Erfindung betrifft einen Kondensator in einer integrierten Schaltung, insbesondere in einem integrierten Halbleiterspeicher .The invention relates to a capacitor in an integrated circuit, in particular in an integrated semiconductor memory.
In integrierten Halbleiterschaltungen ist die Erhöhung der Integrationsdichte ein vorrangiges Ziel. Bei Kondensatoren kann der Platzbedarf dadurch verringert werden, daß als Kondensatordielektrikum ein Ferroelektrikum oder Hoch-ε-Dielek- trikum verwendet wird, so daß für einen vorgegebenen Kapazi- tätswert eine geringere Kondensatorfläche benötigt wird. Solche Kondensatoren werden beispielsweise in integrierten Speichern als sogenannte "Stacked" -Kondensatoren (der Kondensator einer Speicherzelle ist oberhalb eines zugehörigen Auswahl- transistors angeordnet) eingesetzt.In integrated semiconductor circuits, increasing the integration density is a primary goal. In the case of capacitors, the space requirement can be reduced by using a ferroelectric or high-ε dielectric as the capacitor dielectric, so that a smaller capacitor area is required for a given capacitance value. Such capacitors are used, for example, in integrated memories as so-called “stacked” capacitors (the capacitor of a memory cell is arranged above an associated selection transistor).
Verschiedene Paraelektrika mit hoher Permittivität (Hoch-ε-Different paraelectrics with high permittivity (high-ε-
Dielektrika) und Ferroelektrika sind aus der Literatur bekannt, Beispiele sind Barium-Strontiu -Titanat , (Ba, Sr) TiC>3Dielectrics) and ferroelectrics are known from the literature, examples are barium strontium titanate, (Ba, Sr) TiC> 3
(BST) , Strontium-Titanat (ST) oder Blei-Zirkonoium-Titanat (PZT) . Die Herstellung dieser Materialien erfolgt durch einen Sputter-, Spin-on- oder Abscheideprozeß , der hohe Temperaturen in einer sauerstoffhaltigen Atmosphäre benötigt. Dies hat zur Folge, daß die in der Halbleitertechnologie als Elektrodenmaterial verwendeten leitfähigen Materialien (z. B. Poly- silizium, Aluminium oder Wolfram) ungeeignet sind, da sie unter diesen Bedingungen oxidieren. Daher wird zumindest die erste Elektrode üblicherweise im wesentlichen aus einem Edelmetall wie Pt oder Ru hergestellt . Diese neuen Elektrodenmaterialien sind jedoch für die Halbleitertechnologie relativ unbekannte Substanzen. Sie sind schwierig aufzubringen und nur bei geringer Schichtdicke befriedigend strukturierbar . Aufgabe der vorliegenden Erfindung ist es, einen Kondensator in einer integrierten Halbleiterschaltung anzugeben, bei dem ein m der Halbleitertechnologie bekanntes Material als erste Elektrode und ein Hoch-ε-Dielektnkum oder Ferroelektrikum als Kondensatordielektnkum eingesetzt wird. Diese Aufgabe wird durch einen Kondensator mit den Merkmalen des Patentanspruches 1 gelost. Weiterbildungen sind Gegenstand von Un- teranspruchen .(BST), strontium titanate (ST) or lead zirconium titanate (PZT). These materials are produced by a sputtering, spin-on or deposition process which requires high temperatures in an oxygen-containing atmosphere. The consequence of this is that the conductive materials (eg polysilicon, aluminum or tungsten) used as the electrode material in semiconductor technology are unsuitable since they oxidize under these conditions. Therefore, at least the first electrode is usually made essentially of a noble metal such as Pt or Ru. However, these new electrode materials are relatively unknown substances for semiconductor technology. They are difficult to apply and can only be structured satisfactorily with a small layer thickness. The object of the present invention is to provide a capacitor in an integrated semiconductor circuit in which a material known in semiconductor technology is used as the first electrode and a high-ε dielectric or ferroelectric is used as the capacitor dielectric. This object is achieved by a capacitor with the features of claim 1. Further training is the subject of subclaims.
Bei der Erfindung ist auf der ersten Elektrode eine Barriereschicht angeordnet, die die Diffusion von Sauerstoff m ausreichendem Maße unterdruckt und so die erste Elektrode vor einer Oxidation schützt. Damit kann ein bekanntes Material wie beispielsweise Polysilizium als untere Elektrode verwen- det werden. Auf diese Barriere wird dann direkt ein Ferroelektrikum oder ein Hoch-ε-Dielektrikum wie beispielsweise BST mit einem bekannten Prozeß aufgetragen. Die Barriereschicht muß dabei alle wahrend des erwähnten Hochtemperaturprozesses existierenden Diffusionspfade wirksam unterbinden. Als Sauerstoff-Barriereschicht kann beispielsweise S13N4 verwendet werden. Eine weitere Möglichkeit ist die Verwendung einer T1O2 -Barriereschicht auf einer ersten Elektrode aus Ti-In the invention, a barrier layer is arranged on the first electrode, which sufficiently suppresses the diffusion of oxygen and thus protects the first electrode from oxidation. A known material, such as polysilicon, can thus be used as the lower electrode. A ferroelectric or a high ε dielectric such as BST is then applied directly to this barrier using a known process. The barrier layer must effectively prevent all diffusion paths existing during the high-temperature process mentioned. S13N4, for example, can be used as the oxygen barrier layer. Another possibility is to use a T1O2 barrier layer on a first electrode made of Ti
Sιx. Eine weitere Möglichkeit ist das Einbinden von Sauerstoff durch eine begrenzte Oxidation der darunterliegenden Schicht (z.B. von Polysilizium in einer Dicke von weniger als 5 ran) .Sι x . Another possibility is the incorporation of oxygen through a limited oxidation of the layer below (eg polysilicon with a thickness of less than 5 ran).
Die Barriereschicht kann elektrisch leitend oder isolierend sein. Im ersten Fall muß sie strukturiert werden, wenn be- nachbarte Kondensatoren voneinander getrennt werden müssen. Im letzteren Fall ist zu berücksichtigen, daß die Barriereschicht im allgemeinen eine weit niedrigere Dielektrizit tskonstante ε als z. B. BST aufweist, so daß der Kondensator effektiv aus einer Reihenschaltung von zwei Kondensatoren be- steht mit einer Gesamtkapazität, die geringer ist als die des BST-Kondensators . Dieser Kapazitatsverlust kann durch Verringerung der Bamerenschichtdicke minimiert werden. Besteht das Kondensatordielektrikum aus einem Ferroelektrikum, ist der Spannungsabfall an der Barriereschicht zu berücksichtigen. Dies bedeutet, daß eine höhere Spannung ange- legt werden muß, um eine vorgegebene Hystereseschleife zu durchfahren. Die Polarisation pro Fläche irn Sättigungsbereich wird dadurch allerdings nicht beeinträchtigt.The barrier layer can be electrically conductive or insulating. In the first case it has to be structured if neighboring capacitors have to be separated from each other. In the latter case it must be taken into account that the barrier layer generally has a much lower dielectric constant ε than z. B. BST, so that the capacitor effectively consists of a series connection of two capacitors with a total capacitance that is less than that of the BST capacitor. This loss of capacity can be minimized by reducing the thickness of the camera layer. If the capacitor dielectric consists of a ferroelectric, the voltage drop at the barrier layer must be taken into account. This means that a higher voltage must be applied in order to run through a given hysteresis loop. This does not affect the polarization per area in the saturation range.
Die Barriereschicht kann insbesondere durch eine Nitridierung oder eine Oxidierung hergestellt werden. Ferner kann die Barriereschicht durch eine Reaktion zwischen dem Kondensatordielektrikum und der ersten Elektrode gebildet werden. Diese Reaktion kann während der Abscheidung des Dielektrikums (oder Ferroelektrikums) oder einer der darauffolgenden Temperungen stattfinden. Beispielsweise reagiert WN als Elektrodenmaterial mit BST an der Grenzfläche zu W(Ba,Sr)Ox, das nichtstöchiometrisch und leitfähig ist.The barrier layer can be produced in particular by nitriding or oxidizing. Furthermore, the barrier layer can be formed by a reaction between the capacitor dielectric and the first electrode. This reaction can take place during the deposition of the dielectric (or ferroelectric) or during one of the subsequent anneals. For example, WN reacts as an electrode material with BST at the interface to W (Ba, Sr) O x , which is non-stoichiometric and conductive.
Die Erfindung ist auch einsetzbar bei einem in einem Graben angeordnetetn Kondensator. Dabei sind beide Kondensatorelektroden überwiegend innerhalb des Grabens angeordnet , wobwi jede Speicherzelle einen eigenen Graben besitzt oder die Kondensatoren benachbarter Zellen in einem gemeinsamen Graben untergebracht sind.The invention can also be used with a capacitor arranged in a trench. Both capacitor electrodes are arranged predominantly within the trench, with each memory cell having its own trench or the capacitors of adjacent cells being accommodated in a common trench.
Figur 1 zeigt als Ausführungsbeispiel eine Speicherzelle einer integrierten Halbleiterschaltung mit einem erfindungsgemäßen Kondensator. Die Figur zeigt ein Substrat 1 mit einem darin angeordneten MOS-Transistor, der zwei S/D-Gebiete 3, 4 und ein isoliert auf dem Substrat aufgebrachtes Gate 5 umfaßt. Nicht aktive Bereiche der Schaltung sind mit einer Isolation 2 bedeckt. Eine Isolationsschicht 6 bedeckt den Transistor und weist Kontaktlöcher zu den zu kontaktierenden S/D- Gebieten auf. Das Kontaktloch zum S/D-Gebiet 4 liegt dabei außerhalb der Zeichenebene. Das S/D-Gebiet 3 ist über dasFIG. 1 shows an exemplary embodiment of a memory cell of an integrated semiconductor circuit with a capacitor according to the invention. The figure shows a substrate 1 with a MOS transistor arranged therein, which comprises two S / D regions 3, 4 and a gate 5 insulated on the substrate. Inactive areas of the circuit are covered with insulation 2. An insulation layer 6 covers the transistor and has contact holes to the S / D regions to be contacted. The contact hole to the S / D area 4 lies outside the drawing plane. The S / D area 3 is about that
Kontaktloch mit einer ersten Elektrode 7 verbunden. Diese erste Elektrode 7 besteht aus einem in der Halbleitertechnolo- gie üblicherweise verwendeten leitfähigen Material, wie beispielsweise Wolfram, Suizide, eptaktisch aufgewachsenes Silizium, Polysilizium, Nitride (WN; TiN etc.) oder einer Kombination derartiger Materialien. Sie kann auch an ihrer Un- terseite (d.h. an der Grenzfläche zum S/D-Gebiet 3) eine Barriereschicht aufweisen oder über eine eigens hergestellte Anschlußstruktur (Plug), die evtl. aus einem anderen Materialbesteht, mit dem dotierten Gebiet 3 verbunden sein. Diese Materialien bestehen alle nicht im wesentlichen aus einem Edel- metall und werden im folgenden als im wesentlichen edelmetallfreie leitfähige Materialien bezeichnet. Auf die geeignet strukturierte erste Elektrode 7 wird dann als Barriereschicht 8 Siliziumnitrid in einer Dicke < 5 nm (bspw. 2 nm) aufgebracht, so daß alle freiliegenden Oberflächen der ersten Elektrode von ihr bedeckt sind, dann erfolgt mit einem bekannten Verfahren die Abscheidung von Barium-Strontium- Titanat 9 in einer Schichtdicke von etwa 50 nm. Die Kombination aus 2 nm Si3N4 (ε = 8) und 50 nm BST (ε = 300) ergibt eine Gesamtkapazität, die 40 % der reinen BST-Kapazität ent- spricht. Der Vorteil der dünnen dielektrischen Schicht zwischen Elektrode 7 und dem Kondensatordielektrikum 9 ist die Reduzierung des Leckstroms des Kondensators. Die nicht leitende Barriereschicht 8 kann ganzflächig auf der integrierten Schaltung verbleiben. Der Kondensator wird durch eine zweite Elektrode 10, die auf dem Kondensatordielektrikum 9 hergestellt wird, vervollständigt. Contact hole connected to a first electrode 7. This first electrode 7 consists of a semiconductor technology Usually used conductive material, such as tungsten, suicides, eptactically grown silicon, polysilicon, nitrides (WN; TiN etc.) or a combination of such materials. It can also have a barrier layer on its underside (ie at the interface with the S / D region 3) or can be connected to the doped region 3 via a specially produced connection structure (plug), which may be made of a different material. All of these materials do not consist essentially of a noble metal and are referred to below as essentially noble metal-free conductive materials. Silicon nitride is then applied to the suitably structured first electrode 7 as a barrier layer 8 in a thickness of <5 nm (for example 2 nm) so that all exposed surfaces of the first electrode are covered by it, then barium is deposited using a known method Strontium titanate 9 in a layer thickness of about 50 nm. The combination of 2 nm Si3N4 (ε = 8) and 50 nm BST (ε = 300) results in a total capacity which corresponds to 40% of the pure BST capacity. The advantage of the thin dielectric layer between the electrode 7 and the capacitor dielectric 9 is the reduction of the leakage current of the capacitor. The non-conductive barrier layer 8 can remain on the integrated circuit over the entire area. The capacitor is completed by a second electrode 10, which is produced on the capacitor dielectric 9.

Claims

Patentansprüche claims
1. Kondensator in einer integrierten Halbleiterschaltung1. Capacitor in a semiconductor integrated circuit
- mit einer ersten Elektrode (7) die aus einem im wesentli- chen edelmetallfreien leitfähigen Material besteht,- With a first electrode (7) which consists of a substantially noble metal-free conductive material,
- mit einer zweiten Elektrode (10),- With a second electrode (10),
- mit einem Kondensatordielektrikum (9), daß die erste (7) und zweite Elektrode (10) voneinander isoliert und aus einem Hoch-ε-Dielektrikum oder Ferroelektrikum besteht, und - mit einer Barriereschicht zur Verringerung der Sauerstoffdiffusion, die auf der ersten Elektrode (7) angeordnet ist und die gesamte Grenzfläche zwischen erster Elektrode (7) und Kondensatordielektrikum (9) bedeckt.- With a capacitor dielectric (9) that insulates the first (7) and second electrode (10) from each other and consists of a high-ε dielectric or ferroelectric, and - With a barrier layer to reduce oxygen diffusion, which is on the first electrode ( 7) is arranged and covers the entire interface between the first electrode (7) and the capacitor dielectric (9).
2. Kondensator nach Anspruch 1, bei dem die Barriereschicht (8) eine elektrisch isolierende Schicht ist.2. The capacitor of claim 1, wherein the barrier layer (8) is an electrically insulating layer.
3. Kondensator nach einem der Ansprüche 1 bis 2, bei dem die Barriereschicht (8) aus Siliziumnitrid oder -oxid besteht .3. Capacitor according to one of claims 1 to 2, wherein the barrier layer (8) consists of silicon nitride or oxide.
4. Kondensator nach einem der Ansprüche 1 bis 3, bei dem die erste Elektrode (7) im wesentlichen aus Polysili- zium, einem leitfähigen Nitrid, Wolfram oder einem Silizid besteht .4. A capacitor according to any one of claims 1 to 3, wherein the first electrode (7) consists essentially of polysilicon, a conductive nitride, tungsten or a silicide.
5. Kondensator nach einem der Ansprüche 1 bis 2, bei dem die erste Elektrode (7) im wesentlichen aus Titansi- lizid und die Barriereschicht (8) im wesentlichen aus Titanoxid besteht . 5. A capacitor according to any one of claims 1 to 2, wherein the first electrode (7) consists essentially of titanium silicide and the barrier layer (8) consists essentially of titanium oxide.
PCT/DE1997/002132 1996-09-30 1997-09-19 Capacitor with an oxygen barrier layer and a first base metal electrode WO1998015012A1 (en)

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DE1996140243 DE19640243A1 (en) 1996-09-30 1996-09-30 Capacitor with an oxygen barrier layer and a first electrode made of a non-noble metal
DE19640243.3 1996-09-30

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Cited By (2)

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DE19851167A1 (en) * 1998-11-06 2000-05-18 Herbert Kliem Planar capacitor for storing electrical charge has electrode with special geometric shape, made of specific material
DE10114406A1 (en) * 2001-03-23 2002-10-02 Infineon Technologies Ag Process for the production of ferroelectric memory cells

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US5187638A (en) * 1992-07-27 1993-02-16 Micron Technology, Inc. Barrier layers for ferroelectric and pzt dielectric on silicon
WO1996010845A2 (en) * 1994-10-04 1996-04-11 Philips Electronics N.V. Semiconductor device comprising a ferroelectric memory element with a lower electrode provided with an oxygen barrier

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US5406447A (en) * 1992-01-06 1995-04-11 Nec Corporation Capacitor used in an integrated circuit and comprising opposing electrodes having barrier metal films in contact with a dielectric film

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US5187638A (en) * 1992-07-27 1993-02-16 Micron Technology, Inc. Barrier layers for ferroelectric and pzt dielectric on silicon
WO1996010845A2 (en) * 1994-10-04 1996-04-11 Philips Electronics N.V. Semiconductor device comprising a ferroelectric memory element with a lower electrode provided with an oxygen barrier

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19851167A1 (en) * 1998-11-06 2000-05-18 Herbert Kliem Planar capacitor for storing electrical charge has electrode with special geometric shape, made of specific material
DE19851167B4 (en) * 1998-11-06 2005-10-20 Herbert Kliem Electric capacitor
DE10114406A1 (en) * 2001-03-23 2002-10-02 Infineon Technologies Ag Process for the production of ferroelectric memory cells
US6806097B2 (en) 2001-03-23 2004-10-19 Infineon Technologies Ag Method for fabricating ferroelectric memory cells

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DE19640243A1 (en) 1998-04-09

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