WO1997045871A1 - Solder alloy or tin contact bump structure for unencapsulated microcircuits as well as a process for the production thereof - Google Patents

Solder alloy or tin contact bump structure for unencapsulated microcircuits as well as a process for the production thereof Download PDF

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Publication number
WO1997045871A1
WO1997045871A1 PCT/FI1997/000331 FI9700331W WO9745871A1 WO 1997045871 A1 WO1997045871 A1 WO 1997045871A1 FI 9700331 W FI9700331 W FI 9700331W WO 9745871 A1 WO9745871 A1 WO 9745871A1
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WIPO (PCT)
Prior art keywords
layer
tiw
solder
contact bump
bump structure
Prior art date
Application number
PCT/FI1997/000331
Other languages
French (fr)
Inventor
Jorma Kivilahti
Petteri Palm
Original Assignee
Elcoteq Network Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elcoteq Network Oy filed Critical Elcoteq Network Oy
Priority to AU29642/97A priority Critical patent/AU2964297A/en
Priority to EP97924046A priority patent/EP0958606A1/en
Priority to JP09541692A priority patent/JP2000511001A/en
Publication of WO1997045871A1 publication Critical patent/WO1997045871A1/en

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Definitions

  • the invention relates to a solder or tin contact bump structure according to the preamble of claim 1 for unencapsulated microcircuits.
  • the invention also relates to a process for producing the solder bump structure.
  • One interesting bonding method is the so called flip-chip method which comprises bonding a microcircuit directly to its mounting substrate in exposed, unencapsulated form.
  • the method is based on depositing a solder contact bump on the aluminium contact areas of the microcircuit and then melting the bump to bond the circuit to its substrate.
  • the benefits of the method include the small size of the bonding footprint and the lightness of the structure. The method has, however, been hampered by the inadequate reliability of the bonding structure.
  • Japanese Patent Specification No. 07321114 discloses a contact bump structure where a titanium-tungsten layer is first formed on the contact substrate followed by a gold layer formed in two steps, whereafter a nickel layer is formed. The actual tin contact bump is deposited on this multilayer structure. The deposition of the gold layer in two steps complicates the process, and the titanium-tungsten thin film is, in the manner described, left with weaker diffusion-barrier properties, thus impairing the reliability of the structure.
  • the present invention aims at eliminating the drawbacks of the above-described techniques and at obtaining an entirely novel type of solder contact bump structure for unencapsulated microcircuits.
  • the invention is achieved by forming the gold layer of the contact bump structure in one step only, and by processing the titanium-tungsten thin film in a nitrogen- argon environment and subjecting it to oxygen treatment. More specifically, the solder or tin contact bump structure is characterized by what is stated in the characterizing part of claim 1.
  • the invention provides considerable benefits.
  • the compatible metal layers have improved the reliability of the structure.
  • the TiW thin film has good adhesion to aluminium and offers good diffusion-barrier properties.
  • an Au thin-film layer has been used as the adhesion-fo ⁇ ning film in combination with a gold bump.
  • electrolytically deposited nickel provides good adhesion to a gold layer. Having both an exceptionally low stable and metastable solubility in most tin-based alloys when these are in their molten state, nickel is most suitable for use as an adhesion layer for tin-based solders. Primarily for this reason, nickel has a clearly lower rate of dissolution in a eutectic Sn37Pb solder than, e.g., copper which is conventionally used as an adhesion layer in solder bump structures. Particularly for this reason nickel forms clearly thinner intermetallic compound layers than copper. What is more, the oxidation and nitrogen treatment of the titanium-tungsten essentially improve the diffusion barrier properties of the titanium-tungsten layer.
  • Fig. 1 is a longitudinally sectioned side view of the UMB structure in a solder bump made using conventional techniques.
  • Fig. 2 is a graph of the dissolution rate of different metals into eutectic Sn37Pb solder as a function of temperature (ref. Klean Wassink, Soldering in Electronics, 2nd
  • Fig. 3 is a longitudinally sectioned side view of a contact bump structure according to the invention.
  • Fig. 4 is a detail of the structure shown in Fig. 3.
  • Figure 5 is a more detailed view of the structure shown in Fig. 3.
  • Figures 6a to 6c are longitudinally sectioned side views of alternative contact bump geometries according to the invention.
  • FIGS 7a to 7i are process steps of the process according to the invention.
  • both the TAB and flip-chip techniques conventionally used for bonding components are based on depositing contact bumps 6 typically having a height of 10 to 100 ⁇ m on the electric bonding pad areas 3 of a microcircuit 15, after which the microcircuit 15 itself is bonded on a desired bonding substrate (e.g., a TAB film, FR4, or a so called flexible substrate).
  • a desired bonding substrate e.g., a TAB film, FR4, or a so called flexible substrate.
  • a required number of different thin metal or metal alloy layers must be processed between the bump 6 and the electric contact pad area 3.
  • the structure formed by these metallization layers is generally termed UBM (Under Bump Metallurgy) or BLM (Ball Limiting Metallurgy) and serves to improve adhesion and retard or even prevent diffusion therethrough.
  • UBM Under Bump Metallurgy
  • BLM Bit Limiting Metallurgy
  • the metal layers may be two or more in number, with a typical thickness of 0.1 to 5 ⁇ m.
  • UBM structure is formed from TiW and Au thin-film layers.
  • the most widely known UBM structure is the Cr-Cu-Au used by IBM Corp.
  • each of the layers serves for the above-mentioned purposes to improve the reliability of the structure.
  • the metals used and their layer thicknesses must be selected such that they will also meet the basic metallurgic requirements. Furthermore, they need to retain their properties under normal operating and processing conditions and temperatures, meaning that the structure must not exhibit any undesirable reactions or changes in its properties.
  • the purpose of the first intermediate metal layer 11 is to provide good adherence to the silicon- alloyed contact pad area 3 of aluirjinium. When required, it also functions as a diffusion barrier layer serving to prevent intermetallic reactions between the aluminium 3 and other metals in the structure. Furthermore, the layer acts to protect the contact pad areas 3 of the microcircuit 15 against possible corrosion.
  • the purpose of the second intermediate metal layer 10 is to provide good adhesion between the adherence layer 9 of the bump 6 and the metallized contact pad area 3.
  • the adherence layer 9 of the contact bump 6 forms the actual base layer for the solder bump 6 itself.
  • the adherence layer 9 must be metallurgically compatible with the solder used.
  • Fig. 2 shows the dissolution rate of metals commonly used in electronics into eutectic Sn37Pb solder as a function of temperature.
  • the structure according to the invention is selected such that all metallizations are metallurgically more compatible with each other than those used in the prior art, and what is more, the layer structure obtained is stable and easy to manufacture.
  • the substrate of the microcircuit 15 is formed by alu ⁇ iinium contact pad areas 3 on the surface of a substrate wafer 1 and a passivation layer 2 which partly covers the contact pad areas and which entirely covers the wafer 1.
  • the tJam-film layer 7 is formed on the surface of the contact pad area 3 of the microcircuit 15 from a thin film 7 of TiW (10/90) alloy sputtered in the presence of oxygen and nitrogen, whereby the alloying ratio is typically 10/90 (Ti/W).
  • the alloying ratio may typically be varied in the range 1/99 - 50/50.
  • the thickness of the thin film 7 is typically approximately 100 to 350 nm, most appropriately about 140 nm.
  • the TiW ⁇ in-film layer 7 acts as an adhesion layer thus providing good adherence to the contact pad area 3 of the microcircuit 15.
  • the layer also acts as a diffusion barrier layer preventing undesirable reactions between the aluminium metallization and the gold layer of the contact bump.
  • Another function of the Au thin-film layer 4 is to protect the TiW thin-film layer 7 against oxidation prior to the electrolytic deposition of the contact bumps.
  • the nickel layer 5 serves as the base metallization layer of the actual contact bump 6.
  • the height of the contact blimp 6 is typically 10 to 100 ⁇ m.
  • the height is typically in the range from 10 to 60 ⁇ m, and correspondingly, for a solder bump it is typically in the range from 20 to 100 ⁇ m
  • the contact bump 6 may be either straight-walled as in Fig. 6b, mushroom-shaped as in
  • the height ratios of the composite metal structures are, e.g., 1: 1:20 (TiW: Au:Ni).
  • the contact bump 6 can be made from different compositions of tin-lead alloys, tin or other electrolytically depositable tin-based solder alloys.
  • the wafers are RF etched at a slightly elevated temperature.
  • the structure then consists of a substrate 1, an insulation layer 20 on the substrate, and a passivation layer 2.
  • the TiW layer 7 is DC sputtered in two parts.
  • the total thickness is typically 1400 ⁇ 10 ⁇ A.
  • the first TiWN (700 A) is sputtered in a N 2 (1 part)/Ar (three parts) atmosphere and the second TiW layer in a pure Ar atmosphere.
  • the total thickness of the layer is controlled periodically.
  • the TiWN/T ⁇ W layer 7 is oxidized in an oxygen chamber in order to improve its diffusion barrier properties. During this treatment, the oxygen is dissolved into the TiWN/TiW structure. Before etching the next layer, the wafers are RF etched.
  • the second intermediate metal layer U (the Au thin film) is RF sputtered into a thickness of 1200 ⁇ 10 ⁇ A in an Ar atmosphere.
  • the thickness of the layer is controlled periodically.
  • the photoresist of Fig. 7d is made by conventional methods using a thick photoresist layer 21.
  • the thickness is typically 23 mm
  • the pre-light exposure baking is carried out on the line at a temperature of about 100 °C.
  • the mask is aligned and the exposure is carried out by means of commercially available apparatuses.
  • the wafers are exposed to UV light.
  • the exposed areas are dissolved by means of a developing phase carried out either by the spray or the immersion method.
  • the thickness of the photoresist is measured and registered.
  • the after-baking of the wafers takes place in the oven.
  • the exposed areas are purified by oxygen plasma just before the electrolytic deposition of the bumps.
  • an Ni layer 5 is electrolytically deposited into the openings in the photoresist
  • the nickel bath is periodically monitored and the deposition parameters are registered.
  • a tin solder bump 6 is electrolytically deposited onto the thin nickel bump 5. Even this bath is monitored and the parameters are registered.
  • the photoresist is removed using wet chemistry, and rinsed with ion-exchanged (DI) water.
  • DI ion-exchanged
  • the removal of the photoresist is checked on one wafer.
  • the height of the bumps is measured by means of a Profilometer at five points on a wafer, and at least two wafers in one production lot are subjected to such measurement.
  • the Au layer is removed by wet etching from the areas outside the contact bumps. The etching times are registered and the wafers are rinsed and examined.
  • the wafers are reflow heat treated in glycerol at a temperature of 210 °C in order to obtain the final shape and structure of the tin bumps 6. After this treatment the wafers are rinsed and the end result is examined.

Abstract

The invention relates to a solder or tin contact bump structure and a method for the production thereof for unencapsulated microcircuits (15) comprising a substrate (15), contact pad areas (3) of aluminium formed on said substrate (15), a composite metal structure formed on the contact pad areas (3), formed of a TiW layer (7), an Au layer (4) formed thereon, and an Ni layer (5) formed on said Au layer, and a solder contact bump (6) formed on the composite metal structure (7, 4, 5). According to the invention the TiW layer (7) is sputtered in the presence of nitrogen and argon in connection with the layering, whereafter it is subject to oxygen treatment, and the Au layer (4) is formed by one deposition process only.

Description

SOLDER ALLOY OR TIN CONTACT BUMP STRUCTURE FOR UNENCAPSULATED MICROCIR- CUΓTS AS WELL AS A PROCESS FOR THE PRODUCTION THEREOF
The invention relates to a solder or tin contact bump structure according to the preamble of claim 1 for unencapsulated microcircuits.
The invention also relates to a process for producing the solder bump structure.
With the increasing packaging density of electronics, new reliable bonding methods are needed for bonding components to different kinds of circuit boards. One interesting bonding method is the so called flip-chip method which comprises bonding a microcircuit directly to its mounting substrate in exposed, unencapsulated form. The method is based on depositing a solder contact bump on the aluminium contact areas of the microcircuit and then melting the bump to bond the circuit to its substrate. The benefits of the method include the small size of the bonding footprint and the lightness of the structure. The method has, however, been hampered by the inadequate reliability of the bonding structure.
Japanese Patent Specification No. 07321114 discloses a contact bump structure where a titanium-tungsten layer is first formed on the contact substrate followed by a gold layer formed in two steps, whereafter a nickel layer is formed. The actual tin contact bump is deposited on this multilayer structure. The deposition of the gold layer in two steps complicates the process, and the titanium-tungsten thin film is, in the manner described, left with weaker diffusion-barrier properties, thus impairing the reliability of the structure. The present invention aims at eliminating the drawbacks of the above-described techniques and at obtaining an entirely novel type of solder contact bump structure for unencapsulated microcircuits.
The invention is achieved by forming the gold layer of the contact bump structure in one step only, and by processing the titanium-tungsten thin film in a nitrogen- argon environment and subjecting it to oxygen treatment. More specifically, the solder or tin contact bump structure is characterized by what is stated in the characterizing part of claim 1.
The process according to the invention, then, is characterized by what is stated in the characterizing part of claim 10.
The invention provides considerable benefits.
The compatible metal layers have improved the reliability of the structure. The TiW thin film has good adhesion to aluminium and offers good diffusion-barrier properties.
Conventionally, an Au thin-film layer has been used as the adhesion-foπning film in combination with a gold bump. Furthermore, electrolytically deposited nickel provides good adhesion to a gold layer. Having both an exceptionally low stable and metastable solubility in most tin-based alloys when these are in their molten state, nickel is most suitable for use as an adhesion layer for tin-based solders. Primarily for this reason, nickel has a clearly lower rate of dissolution in a eutectic Sn37Pb solder than, e.g., copper which is conventionally used as an adhesion layer in solder bump structures. Particularly for this reason nickel forms clearly thinner intermetallic compound layers than copper. What is more, the oxidation and nitrogen treatment of the titanium-tungsten essentially improve the diffusion barrier properties of the titanium-tungsten layer.
In the following, the invention is examined in closer detail with reference to the exerrφlifying embodiments illustrated in the appended drawings.
Fig. 1 is a longitudinally sectioned side view of the UMB structure in a solder bump made using conventional techniques.
Fig. 2 is a graph of the dissolution rate of different metals into eutectic Sn37Pb solder as a function of temperature (ref. Klean Wassink, Soldering in Electronics, 2nd
Edition). Fig. 3 is a longitudinally sectioned side view of a contact bump structure according to the invention.
Fig. 4 is a detail of the structure shown in Fig. 3.
Figure 5 is a more detailed view of the structure shown in Fig. 3.
Figures 6a to 6c are longitudinally sectioned side views of alternative contact bump geometries according to the invention.
Figures 7a to 7i are process steps of the process according to the invention.
Referring to Fig. 1, both the TAB and flip-chip techniques conventionally used for bonding components are based on depositing contact bumps 6 typically having a height of 10 to 100 μm on the electric bonding pad areas 3 of a microcircuit 15, after which the microcircuit 15 itself is bonded on a desired bonding substrate (e.g., a TAB film, FR4, or a so called flexible substrate). In order to provide a reliable contact between the bump 6 itself and the contact pad area 3 of the microcircuit 15, a required number of different thin metal or metal alloy layers must be processed between the bump 6 and the electric contact pad area 3. The structure formed by these metallization layers is generally termed UBM (Under Bump Metallurgy) or BLM (Ball Limiting Metallurgy) and serves to improve adhesion and retard or even prevent diffusion therethrough. The metal layers may be two or more in number, with a typical thickness of 0.1 to 5 μm.
In assembly work utilizing the TAB technique, for instance, microcircuits produced with gold bump contact pads are conventionally used, whereby the UBM structure is formed from TiW and Au thin-film layers. In flip-chip bonding applications based on solder bump contact pads, the most widely known UBM structure is the Cr-Cu-Au used by IBM Corp. In both cases, each of the layers serves for the above-mentioned purposes to improve the reliability of the structure. The metals used and their layer thicknesses must be selected such that they will also meet the basic metallurgic requirements. Furthermore, they need to retain their properties under normal operating and processing conditions and temperatures, meaning that the structure must not exhibit any undesirable reactions or changes in its properties.
In Fig. 1, the purpose of the first intermediate metal layer 11 is to provide good adherence to the silicon- alloyed contact pad area 3 of aluirjinium. When required, it also functions as a diffusion barrier layer serving to prevent intermetallic reactions between the aluminium 3 and other metals in the structure. Furthermore, the layer acts to protect the contact pad areas 3 of the microcircuit 15 against possible corrosion. The purpose of the second intermediate metal layer 10 is to provide good adhesion between the adherence layer 9 of the bump 6 and the metallized contact pad area 3. The adherence layer 9 of the contact bump 6 forms the actual base layer for the solder bump 6 itself. The adherence layer 9 must be metallurgically compatible with the solder used. On the other hand, it should not have excessively fast dissolution into the solder used, nor form too thick intermetallic compound layers. The required thickness of the adherence layer 9 is primarily dictated by the above-discussed requirements. Fig. 2 shows the dissolution rate of metals commonly used in electronics into eutectic Sn37Pb solder as a function of temperature.
It will emerge from Fig. 2 that, with the exception of tin, gold has the highest dissolution rate into molten eutectic Sn37Pb solder, while nickel and platinum have the lowest dissolution rate.
The structure according to the invention, described below in greater detail, is selected such that all metallizations are metallurgically more compatible with each other than those used in the prior art, and what is more, the layer structure obtained is stable and easy to manufacture.
With reference to Figs. 3 to 5, the substrate of the microcircuit 15 is formed by aluπiinium contact pad areas 3 on the surface of a substrate wafer 1 and a passivation layer 2 which partly covers the contact pad areas and which entirely covers the wafer 1. The tJam-film layer 7 is formed on the surface of the contact pad area 3 of the microcircuit 15 from a thin film 7 of TiW (10/90) alloy sputtered in the presence of oxygen and nitrogen, whereby the alloying ratio is typically 10/90 (Ti/W). The alloying ratio may typically be varied in the range 1/99 - 50/50. The thickness of the thin film 7 is typically approximately 100 to 350 nm, most appropriately about 140 nm. The TiW Λin-film layer 7 acts as an adhesion layer thus providing good adherence to the contact pad area 3 of the microcircuit 15. The layer also acts as a diffusion barrier layer preventing undesirable reactions between the aluminium metallization and the gold layer of the contact bump. An Au thin film 4 of a thickness of typically 50 to 200 nm, preferably about 120 nm, is deposited on the TiW thin film 7 by sputtering, said Au thin film acting as an adhesion layer between the TiW layer 7 and the base layer 5 of the contact bump 6. Another function of the Au thin-film layer 4 is to protect the TiW thin-film layer 7 against oxidation prior to the electrolytic deposition of the contact bumps. Using a patterned photoresist, a thin nickel layer 5 having a thickness of typically 0.5 to 5 μm, preferably 1 to 2 μm, is grown on the contact pad areas 3 of the microcircuit 15. The nickel layer 5 serves as the base metallization layer of the actual contact bump 6. Depending on the application and the contact bump type, the height of the contact blimp 6 is typically 10 to 100 μm. For a tin contact bump 6, the height is typically in the range from 10 to 60 μm, and correspondingly, for a solder bump it is typically in the range from 20 to 100 μm The contact bump 6 may be either straight-walled as in Fig. 6b, mushroom-shaped as in
Fig. 6c, or ball-shaped after reflow melting, as in Fig. 6a.
According to the invention, the height ratios of the composite metal structures are, e.g., 1: 1:20 (TiW: Au:Ni).
The contact bump 6 can be made from different compositions of tin-lead alloys, tin or other electrolytically depositable tin-based solder alloys.
In Figs. 7a to 7j, the progress of one process according to the invention is described in more detail.
In accordance with Fig. 7a, the wafers are RF etched at a slightly elevated temperature. The structure then consists of a substrate 1, an insulation layer 20 on the substrate, and a passivation layer 2.
As shown in Fig. 7b, the TiW layer 7 is DC sputtered in two parts. The total thickness is typically 1400±10θA. The first TiWN (700 A) is sputtered in a N2 (1 part)/Ar (three parts) atmosphere and the second TiW layer in a pure Ar atmosphere. The total thickness of the layer is controlled periodically. The TiWN/TϊW layer 7 is oxidized in an oxygen chamber in order to improve its diffusion barrier properties. During this treatment, the oxygen is dissolved into the TiWN/TiW structure. Before etching the next layer, the wafers are RF etched.
In accordance with Fig. 7c the second intermediate metal layer U (the Au thin film) is RF sputtered into a thickness of 1200±10θA in an Ar atmosphere. The thickness of the layer is controlled periodically.
The photoresist of Fig. 7d is made by conventional methods using a thick photoresist layer 21. The thickness is typically 23 mm The pre-light exposure baking is carried out on the line at a temperature of about 100 °C. The mask is aligned and the exposure is carried out by means of commercially available apparatuses. The wafers are exposed to UV light. The exposed areas are dissolved by means of a developing phase carried out either by the spray or the immersion method. The thickness of the photoresist is measured and registered. Next, the after-baking of the wafers takes place in the oven. The exposed areas are purified by oxygen plasma just before the electrolytic deposition of the bumps. In accordance with Fig. 7d, an Ni layer 5 (thickness 1 to 3 μm) is electrolytically deposited into the openings in the photoresist
21. The nickel bath is periodically monitored and the deposition parameters are registered.
In accordance with Fig. 7e, a tin solder bump 6 is electrolytically deposited onto the thin nickel bump 5. Even this bath is monitored and the parameters are registered.
As seen in Fig. 7f, after bump deposition, the photoresist is removed using wet chemistry, and rinsed with ion-exchanged (DI) water. The removal of the photoresist is checked on one wafer. The height of the bumps is measured by means of a Profilometer at five points on a wafer, and at least two wafers in one production lot are subjected to such measurement.
In accordance with Fig. 7g, the Au layer is removed by wet etching from the areas outside the contact bumps. The etching times are registered and the wafers are rinsed and examined.
In accordance with Fig. 7h, even the TiW layer 7 is removed from the area outside the contact bumps by wet etching. The etching is monitored and the results are registered, and in addition, the wafers are rinsed and examined.
As seen in Fig. 7i, the wafers are reflow heat treated in glycerol at a temperature of 210 °C in order to obtain the final shape and structure of the tin bumps 6. After this treatment the wafers are rinsed and the end result is examined.

Claims

Claims:
1. A solder or tin contact bump structure for unencapsulated microcircuits (15) which comprise
- a substrate (15),
- contact pad areas (3) of aluminium formed on said substrate (15),
- a composite metal structure formed on said contact pad areas (3), the structure consisting of a TiW thin film layer (7), an Au thin film layer (4) formed on top of the TiW layer, and an Ni layer (5) formed on the Au layer (4), and
- a solder contact bump (6) formed on said composite metal structure
(7, 4, 5),
characterized in that
- the TiW layer (7) is sputtered in the presence of nitrogen and argon in connection with layering, whereafter it is oxygen treated, and
- the Au layer (4) is formed in one deposition process only.
2. A solder contact bump structure as defined in claim 1, characterized in that the
TiW layer (7) typically has a thickness of approximately 100 to 350 run, preferably about 140 nm
3. A solder contact bump structure as defined in claim 1, characterized in that the Au layer (4) typically has a thickness of about 100 to 200 nm, preferably about 120 nm.
4. A solder contact bump structure as defined in claim 1, characterized in that the Ni layer (5) typically has a thickness of about 0.5 to 5 μm, preferably 1 to 2 μm
5. A solder contact bump structure as defined in claim 1, characterized in that the TiW layer (7) is a thin film sputtered in the presence of oxygen and nitrogen.
6. A solder contact bump structure as defined in claim 1, characterized in that the height ratios of the composite metal structures (7, 4, 5) are 1: 1:20 (TiW:Au:Ni).
7. A solder contact bump structure as defined in claim 1, characterized in that the height of the tin bump (6) is approximately 10 to 60 μm.
8. A solder contact bump structure as defined in claim 1, characterized in that the height of the solder bump (6) is approximately 20 to 30 μm
9. A solder contact bump structure as defined in claim 1, characterized in that the alloying ratio of the TiW layer is 10/90.
10. A method for producing a solder contact bump structure for unencapsulated microcircuits (15) comprising a substrate (15) and contact pad areas (3) of aluminium formed on the substrate, whereby
- a TiW thin film layer (7) is deposited on the contact pad areas (3), an Au thin film layer (4) is deposited thereon and an Ni layer (5) is deposited on the Au layer (4), and
- a solder contact bump is formed on the composite metal structure (7, 4, 5),
characterized in that - the TiW layer (7) is sputtered in the presence of nitrogen and argon in connection with layering whereafter it is oxygen treated,
- the Au layer (4) is formed by means of one deposition process only.
11. A method as defined in claim 10, characterized in that the TiW layer (7) is formed to have a thickness of about 100 to 200 nm, preferably about 140 nm.
12. A method as defined in claim 7, characterized in that the Au layer (7) is typically formed to have a thickness of 100 to 200 nm, preferably about 120 nm.
13. A method as defined in claim 7, characterized in that the Ni layer (7) is typically formed to have a thickness of about 2 to 4 μm.
14. A method as defined in claim 1, characterized in that the height ratios of the composite metal structures (7, 4, 5) are selected to be 1 : 1:20 (TiW:Au:Ni).
PCT/FI1997/000331 1996-05-31 1997-05-30 Solder alloy or tin contact bump structure for unencapsulated microcircuits as well as a process for the production thereof WO1997045871A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU29642/97A AU2964297A (en) 1996-05-31 1997-05-30 Solder alloy or tin contact bump structure for unencapsulated microcircuits as well as a process for the production thereof
EP97924046A EP0958606A1 (en) 1996-05-31 1997-05-30 Solder alloy or tin contact bump structure for unencapsulated microcircuits as well as a process for the production thereof
JP09541692A JP2000511001A (en) 1996-05-31 1997-05-30 Procedures for producing solder alloy or tin contact bump structures for non-encapsulated microcircuits simultaneously

Applications Claiming Priority (2)

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FI962277 1996-05-31
FI962277A FI962277A0 (en) 1996-05-31 1996-05-31 Loed- eller tennknoelstruktur Foer oinkapslade microcret

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Publication number Priority date Publication date Assignee Title
FR2799578A1 (en) * 1999-10-08 2001-04-13 St Microelectronics Sa Integrated circuit container electrical connection method having upper protection layer gap revealing metallic pad and metallic deposition shape covering protection walls/holding solder blob connection.
EP1267398A2 (en) * 2001-06-12 2002-12-18 Advanced Interconnect Technology Ltd. Barrier cap for under bump metal
WO2004075265A2 (en) * 2003-02-18 2004-09-02 Unitive Electronics, Inc. Methods for selectively bumping integrated circuit substrates and related structures

Citations (4)

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US4782380A (en) * 1987-01-22 1988-11-01 Advanced Micro Devices, Inc. Multilayer interconnection for integrated circuit structure having two or more conductive metal layers
US4880708A (en) * 1988-07-05 1989-11-14 Motorola, Inc. Metallization scheme providing adhesion and barrier properties
JPH07321114A (en) * 1994-05-23 1995-12-08 Sharp Corp Method of formation and structure of solder bump for semiconductor device
US5587336A (en) * 1994-12-09 1996-12-24 Vlsi Technology Bump formation on yielded semiconductor dies

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
US4782380A (en) * 1987-01-22 1988-11-01 Advanced Micro Devices, Inc. Multilayer interconnection for integrated circuit structure having two or more conductive metal layers
US4880708A (en) * 1988-07-05 1989-11-14 Motorola, Inc. Metallization scheme providing adhesion and barrier properties
JPH07321114A (en) * 1994-05-23 1995-12-08 Sharp Corp Method of formation and structure of solder bump for semiconductor device
US5587336A (en) * 1994-12-09 1996-12-24 Vlsi Technology Bump formation on yielded semiconductor dies

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2799578A1 (en) * 1999-10-08 2001-04-13 St Microelectronics Sa Integrated circuit container electrical connection method having upper protection layer gap revealing metallic pad and metallic deposition shape covering protection walls/holding solder blob connection.
US6528407B1 (en) 1999-10-08 2003-03-04 Stmicroelectronics S.A. Process for producing electrical-connections on a semiconductor package, and semiconductor package
EP1267398A2 (en) * 2001-06-12 2002-12-18 Advanced Interconnect Technology Ltd. Barrier cap for under bump metal
EP1267398A3 (en) * 2001-06-12 2003-07-02 Advanced Interconnect Technology Ltd. Barrier cap for under bump metal
WO2004075265A2 (en) * 2003-02-18 2004-09-02 Unitive Electronics, Inc. Methods for selectively bumping integrated circuit substrates and related structures
WO2004075265A3 (en) * 2003-02-18 2004-11-04 Unitive Electronics Inc Methods for selectively bumping integrated circuit substrates and related structures

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EP0958606A1 (en) 1999-11-24
FI962277A0 (en) 1996-05-31
JP2000511001A (en) 2000-08-22
AU2964297A (en) 1998-01-05

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