WO1997039481A1 - An integrated complex-transition metal oxide device and a method of fabricating such a device - Google Patents

An integrated complex-transition metal oxide device and a method of fabricating such a device Download PDF

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Publication number
WO1997039481A1
WO1997039481A1 PCT/US1997/005961 US9705961W WO9739481A1 WO 1997039481 A1 WO1997039481 A1 WO 1997039481A1 US 9705961 W US9705961 W US 9705961W WO 9739481 A1 WO9739481 A1 WO 9739481A1
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substrate
film
complex
transition metal
metal oxide
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PCT/US1997/005961
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French (fr)
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Steven A. Oliver
Paul Zavracky
Nicol E. Mcgruer
Carmine Vittoria
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Northeastern University
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Priority claimed from US08/818,106 external-priority patent/US6114188A/en
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Publication of WO1997039481A1 publication Critical patent/WO1997039481A1/en

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    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C03C17/36Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
    • C03C17/3602Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
    • C03C17/3642Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the multilayer coating containing a metal layer
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C03C17/36Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C03C17/36Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
    • C03C17/3602Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
    • C03C17/3652Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the coating stack containing at least one sacrificial layer to protect the metal from oxidation
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    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/622Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/62222Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products obtaining ceramic coatings
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    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
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    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
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    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
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Definitions

  • Complex-transition metal oxides comprise a large group of materials that show an extremely diverse and useful range of characteristics.
  • Examples of but a few technologically useful complex-transition metal oxide materials include fer ⁇ magnetic materials having the spinel, garnet, or hexaferrite crystallographic structures, ferroelectric materials having the perovskite crystallographic structure, and perovskites that display superconducting behavior at liquid nitrogen temperatures. All of these examples are of note because they are both of great technological interest as well as manifestations for the presence of long range cooperative order in the materials.
  • MEMS microelectromechanical systems
  • the complex-transition metal oxides described in this document do not incorporate the simple oxide mate ⁇ als, such as SiO,, A1 2 0 3 or the many glasses that are commonly used in semiconductor processing for insulating or passivatmg layers Nor does it refer to simple transition metal oxide mate ⁇ als, such as the conductors ZnO and RuO, which can be deposited on wafers using temperatures and processes compatible with standard semiconductor fabrication techniques
  • the complex-transition metal oxides refer to materials having large chemical formula units and complex unit cells, and are possessed of long-ranged cooperative phenomenon such as fer ⁇ magnetic.
  • ferroelectric, or superconducting properties are of value for integrated devices because of the unique properties that arise from the long- ranged cooperative phenomenon, for example nonreciprocal wave propagation in fer ⁇ magnets, very high controllable pola ⁇ zabihties in ferroelect ⁇ cs, and very high conductivities in superconductors
  • the presence of long-range cooperative phenomenon, and the quality of the resulting effects requires the oxide film to have high structural and chemical ordering at the atomic level
  • the process requuements needed for growing high quality complex-transition metal oxide films typically conflicts with the requirements used for producing integrated devices
  • the resulting complex-transition metal oxide films do not necessarily possess optimal matenal properties since they are polyciystalline, and not structurally highly-oriented or single-crystal
  • devices made with polycrystalline films have reduced performance or increased losses compared to single-crystal films.
  • devices made from polycrystalline fer ⁇ magnetic films will have higher magnetic loss compared to the same device made from a single-crystal film, while any imperfections in a high-temperature superconducting film will reduce its current carrying capacity
  • the highest performance integrated complex-transition metal oxide devices will be produced using single-crystal oxide films.
  • the method developed for the present invention intrinsically avoids the difficulties encountered by direct film deposition technique by separating the complex- transition metal oxide (CTMO) film growth process from the CTMO-film/substrate integration process.
  • CTMO complex- transition metal oxide
  • the basis of this process is the recognition that the CTMO-film can be transferred from the o ⁇ ginal, or native, growth substrate to a final, or transfer, substrate for fabrication into devices
  • this final substrate is formed of a semiconductor, dielectric, ceramic or plastic material, and may already have metallization, oxide layers, passivating layers, devices, bonding layers, or combinations of these already in place.
  • the CTMO-film is grown onto a native substrate under growth conditions that are chosen to provide a CTMO-film having optimal properties and thickness No restrictions are placed upon the native substrate used, the growth method used, or on the growth conditions that are required, as long as the resulting CTMO-film has optimal parameters for the resulting device.
  • the CTMO-film having optimal parameters it is then removed from the native substrate and is bonded, or joined, to the final substrate to provide the basis for an integrated electronics, photonics, or MEMS device
  • CTMO/semiconductor or CTMO/dielect ⁇ c device A number of specific metnods are available for the bonding process that produces an integrated CTMO/semiconductor or CTMO/dielect ⁇ c device, all of which were originally developed for standard semiconductor processing Conside ⁇ ng, for brev ⁇ t ⁇ reasons only, that the CTMO film was to be used in an integrated CTMO/semiconductor device, the CTMO film, while still attached to its native substrate, could be bonded to the semiconductor substrate using either eutectic alloy bonding, solid state interdiffusion bonding, adhesives, van der Waal forces, anodic bonding, or other techniques known to practitioners of the art
  • the native substrate could then be removed by mechanical g ⁇ nding or polishing, by chemical-mechanical planarization techniques, through the use of selective etches, or by a combination of these techniques with others known to practitioners After removal of the native substrate, the CTMO film is firmly joined to the semiconductor wafer, and techniques fully compatible with semiconductor processing can be used to fabricat
  • Fig 1 shows the mating of a CTMO-film on its native substrate to a transfer wafer with bond layers on opposing faces according to the present invention
  • Fig 2 shows a cross section of the bonded CTMO-film/native wafer and transfer wafer of Fig 1 ,
  • Fig 3 shows the cross section of Fig 2 after removal of the native substrate
  • Fig 4 shows the cross section of Fig 2 after top layer metallization of the CTMO-film
  • Fig 5 shows the cross section of Fig 2 after the CTMO-film has been patterned and etched, and then had ⁇ to P - ⁇ ayer metallization coating deposited to yield a monohthically integrated device
  • Fig 6 shows scatte ⁇ ng parameter data for an integrated single-crystal yttrium iron garnet film/ metallized silicon circulator fab ⁇ cated by the process desc ⁇ bed in Example 1 herein,
  • Figs 7A-7F shows an exemplary process available to fabricate an integrated CTMO- film/transfer wafer device using a two transfer method
  • Fig 8 shows a self-biased monolithic circulator with a patterned bond layer, fabricated using a two transfer method
  • Fig 1 the simplest integrated CTMO-film/semiconductor or dielect ⁇ c substrate device can be fab ⁇ cated by bonding an optimal CTMO-film 10, while still attached to its native substrate 12, to a wafer 14 using a bonding layer 16
  • CTMO-film 10 Because the properties of the CTMO-film 10 are of decisive importance in the resulting integrated film/substrate device, and because there are numerous CTMO candidates for technologically important devices, a discussion of a few prototypical fer ⁇ magnetic, ferroelectric, and superconducting films and substrates is prudent For most applications it is expected that the best device performance will be obtained if optimal single-crystal CTMO films are used. It is thus important to choose the native substrate 12 such that its lattice constants, crystallographic orientation, thermal expansion coefficients, and other relevant parameters well known to practitioneis in the art, are approp ⁇ ate for growing a CTMO-film having the specific parameters desired for the device In addition, the choice of a growth method used for growing the single-crystal
  • CTMO film whether a melt-based technique such as liquid phased epitaxy, or physical vapor deposition techniques such as pulsed laser ablation deposition or sputtering, or chemical vapor techniques such as metal-organic chemical vapor deposition, or film growth techniques from solution such as sol-gel, spin- spraying, plating or hydrothermal epitaxy, is also chosen appropriately to yield the desired film characte ⁇ stics, as is well known to practitioners of the art Tne film growth conditions can also be freely chosen to yield films having optimal desired properties
  • CTMO films having less crystallographical pure orientations such as highly- onented or polycrystalline films
  • Highly-oriented CTMO films may be interchangeable with single crystal films for most applications that use fer ⁇ magnetic or ferroelectric CTMO materials
  • Polycrystalline CTMO films may prove a better choice for integrated device fabrication where cost considerations predominate, or where the device performance is insensitive to the film crystallographic orientation, or if the anisotropy int ⁇ nsic to many CTMO single-crystal films is actually det ⁇ mental to the device performance
  • the methods described here will most likely be applied with CTMO films that have sufficient, but not optimal, mate ⁇ al properties for the integrated device Indeed, it is the nature of the methods described here that they are independent of the nature of the CTMO film
  • Nonreciprocal passive microwave devices such as circulators
  • CTMO- film/native substrate pairs 10, 12 are fabricated from fer ⁇ magnetic materials that a/e members of the garnet, spinel, and hexaferrite families, with the approp ⁇ ate material being chosen according to the device's desired operating wavelength, bandwidth, and performance level
  • Appropriate CTMO- film/native substrate pairs 10, 12 for these three types of materials have a yttrium iron garnet fer ⁇ magnetic film grown on a gadolinium gallium garnet substrate, a nickel-zinc femte spinel film grown on a magnesium oxide substrate, or a ba ⁇ um hexaferrite film grown on an alumina, or sapphire, substrate
  • a similar range of CTMO-film/substrate pairs 10, 12 also exist for technologically useful ferroelectric and perovskite-based superconducting films
  • One example is the use of lanthanum aluminate substrate for the growth of epitaxial or
  • the film 10 provided on a native substrate 12 be limited to one layer of uniform composition, or even that the film 10 itself is fixed at a single composition.
  • the CTMO-film 10 in a further embodiment is comprised of multiple films having different compositions.
  • the conductive oxide (La,Sr)CoO 3 often denoted as LSC, has a sufficient lattice match with both lanthanum aluminate and PZT films to allow growth of high quality LSC/PZT/LSC film-sandwiches on lanthanum aluminate substrates.
  • the CTMO- film/native substrate 10, 12 is bonded to the wafer 14, or surface, to which the CTMO- film is to be transferred.
  • This bonding procedure is effected using either eutectic alloy bonding, solid-state interdiffusion bonding, adhesives, van der Waal forces, anodic bonding, or other techniques known to practitioners in the art.
  • adhesives, eutectic alloy bonding, or solid state interdiffusion bonding techniques are used a bond layer 16 will be present between the CTMO-film/native substrate and transfer substrate. This bond layer 16 can be placed upon either or both of the mating surfaces using standard techniques known to practitioners.
  • the constraints on the bonding process are limited only by the desire to not damage either the transfer wafer 14 or the CTMO-film 10 by either thermal, mechanical, or chemical effects, as well as cost / time considerations.
  • the wafer surface may already have undergone considerable previous processing. and may already have integrated circuit components such as metal, insulating, or semiconducting layers and devices present.
  • the native substrate 12 is removed by one or more of the following: g ⁇ nding, lapping, use of selective etching, or other techniques common to chemical- mechanical planarization processes that are well known to practitioners in the art Since these processes are destructive of the native substrate 12, which may have a significant cost, it may be advantageous to remove the native substrate 12 without destroying it m the process This result is obtained by breaking the bond between the CTMO-film 10 and the native substrate 12, allowing the substrate to be detached Methods to inco ⁇ orate a relatively weak bond at the film/substrate interface can be applied either du ⁇ ng the film growth process, or by special preparation of the native substrate 12 before undertaking the CTMO-film 10 growth.
  • CTMO-film 10 Another method for providing a weak bond between film 10 and the native substrate 12 is obtained by depositing a sacrificial layer that has weak mechanical strength onto the native substrate 12 before growing the CTMO-film 10
  • a sacrificial layer that has weak mechanical strength onto the native substrate 12 before growing the CTMO-film 10
  • CLEFT cleaved layer epitaxy for transfer
  • the CTMO-film 10 is available for surface modification or patterning into devices. Refer ⁇ ng to Fig 4, this includes in a first embodinu... of the exposed surface, followed by one oi more layers of metallization 18 Or, as shown in Fig 5, the CTMO-film 10 may be patterned using standard processes well known to those in the art to yield one, or mam . devices on the transfer wafer surface 14
  • the bonded CTMO-film/transfer wafer system 10, 14 is provided in a further embodiment with yet another film transferred to it, again using one of the processes listed above, to yield a complex multilayered film stack 10.
  • EXAMPLE 1 One example for the use of the present invention involves the fabrication of integrated single-crystal yttrium iron garnet circulators on a metallized silicon substrate 14 at low temperatures.
  • GGG gadolinium gallium garnet
  • integrated polycrystalline garnet/semiconductor circulators have been produced through the direct fabrication method at using processing temperatures above 700°C.
  • integrated single-crystal garnet circulators have performance benefits over integrated polycrystalline garnet circulators, and there is a greatly reduced risk of degrading the device characteristics if the integration is done at low temperatures.
  • An integrated single-crystal YIG / silicon circulator was fab ⁇ cated by bonding a YIG film on its native GGG substrate to metallized silicon, followed by removal of the GGG native substrate by grinding. This was done at a chip, or die, level. Before bonding the garnet and silicon chips, the YIG surface had a 2 micrometer-thick copper layer deposited on it for use as a high-conductivity ground plane. Over this copper layer, a barrier layer of titanium-tungsten was deposited.
  • Both chips then had layers of elemental gold and indium deposited on their mating surfaces.
  • the relative thicknesses of the gold and indium layers were chosen such that their relative atomic fraction was approximately nine indium atoms to one gold atom.
  • the chips were then mated, and heated in vacuum uncer slight compression to hold the mated faces steady. During the heating process, at a temperature of 195°C, the indium layer melts and strongly reacts with the gold layer via fast solid-liquid interdiffusion processes to yield islands of an indium-gold alloy in an indium matrix. This eutectic bonding process provided a strong bonding layer between -l i ⁇ the chips, as the indium-gold alloy has good mechanical strength, while still retaining some compliancy to stress through the indium matrix
  • the native GGG substrate was removed by mechanical grinding
  • the now-exposed YIG film top surface was then polished, and metallized by depositing a 2 micrometer-thick layer of copper on the top surface
  • the Y-junction circulator structure was then fab ⁇ cated through standard semiconductor-based photolithographic and etching processes. Tests results from one of the first integrated single-crystal YIG ' silicon circulators is provided in Fig. 6 The results for both the insertion loss and isolation of this circulator show noteworthy performance levels for this nonoptimized circuit
  • Fig 6 shows the forward (S, 2 ) and reverse (S 21 ) scattering parameters for microwave propagation across the circulator circuit and connectors as a function of frequency, where the third port of the Y-junction circulator was terminated by a 50 ⁇ load
  • the different transmitted power for the forward and reverse directions in the frequency range from 8 GHz to 12 GHz shows the nonreciprocal circulator action for this device.
  • an isolation of over 20 dB is seen over a 1 GHz bandwidth centered near 9 GHz, with a minimum measured insertion loss of 1.2 dB
  • a two-step transfer process is shown where the CTMO- film 20 disposed on a native substrate 22 is first patterned, etched, and metallized to the device specifications (Fig 7A), and then the modified CTMO-film is bonded to a host wafer 24 (Fig. 7B), or surface, via a weak binding layer 26, before removing the native substrate 22 using any of the methods described above (Fig 7C)
  • the film 20 may be further modified by patterning and etching processes, by single or multilaver metallization, or by having another film bonded to it to yield a multi-film stack.
  • One modification may have the CTMO-film divided into discrete sub-components, where each sub-component may be bonded to different transfer substrates, or different areas of the same transfer wafer.
  • the CTMO-film 20, or CTMO-film sub- component is bonded to its final attachment site on the transfer wafer 28 via a bonding layer 30 (Fig. 7D), and the host wafer 24 is removed (Fig. 7E).
  • the now- exposed surface of the modified CTMO-film 20, or multi-film stack is further processed to yield a working device (Fig. 7F), which may be comprised of many complex film 20 and metallization 32 layers.
  • a working device Fig. 7F
  • the bond layer 16 has been shown as continuous, there is no need for this layer to be contiguous other than for mechanical strength.
  • FIG. 8 shows a cross-section schematic for one embodiment of this invention that can use both a patterned bond layer and a CTMO-film subcomponent fabricated by multiple transfer steps: a monolithic integrated self-biased circulator on a multicomponent transfer substrate 34.
  • This device has great advantages over conventional circulators because the intrinsic properties of the c-axis oriented hexaferrite CTMO-film act to self-bias the circulator, such that no external magnetic field is required for circulator operation.
  • the transfer substrate 34 may be procured as a GLASS MICROWAVE INTEGRATED CIRCUIT substrate, a trade-marked product of the M/A- COM Co..
  • This substrate 34 consists of a semiconductor wafer 36, such as silicon, a metallization layer 38 that serves as the microwave device ground plane, and a low-loss dielectric filling material 40 that provides for planarity over the substrate surface.
  • This embodiment of a monolithic integrated self-biased circulator entails bonding a c-axis oriented hexaferrite CTMO-film subcomponent 42, having thickness of from 20 micrometers to 100 micrometers, onto a raised silicon pedestal portion of the substrate 34 using a patterned bonding layer 44.
  • the hexaferrite film sub-component 42 may have undergone patterning, etching, and transfer to a host wafer before bonding to the transfer substrate 34, as was shown in Fig 7
  • the hexaferrite film sub-component 42 may have originally been grown, or procured as a continuous film on a 75 millimeter diameter substrate, and then patterned and etched using standard processes to yield a large number of subcomponents 42, each with bevelled film edges
  • These individual subcomponents 42 may have triangular, rectagonal, or hexagonal shapes, and range in edge-length from 1 mm to 2 cm depending upon the particular hexafer ⁇ te material parameters, the device frequency range, and the circuit design
  • the hexafemte film sub-components 42 are weakly bonded to a host substrate before attachment to the transfer substrate
  • the hexaferrite subcomponent 42 ma ⁇ be precisely aligned on the transfer substrate using pick-and-place techniques
  • Fig 8 The bonding process of Fig 8 may be conducted using any of the previously named methods, depending upon thermal, mechanical, time and cost considerations
  • a bond layer that is conductive for example an indium-gold alloy formed by solid state interdiffusion of elemental layers
  • This bond layer pattern consists of several isolated bond layer pads 44a. 44b, 44c that are spaced to provide electrical isolation between the substrate ground plane metallization 38 and the device top surface metallization 46
  • the bond layer pads 44 must also be designed to minimize detrimental capacitance effects in the circuit
  • Dielectric materials such as glass
  • CTMO-films are routinely inco ⁇ orated into electronic circuits either as substrates, or as layers on top of the semiconductor substrate
  • such glasses comprise some, or all, of the transfer wafer 14, 28 upon which the CTMO-film 10.
  • This glass wafer may have one or more optical waveguides internal to the wafer, to provide an integrated magneto-optic sensing element Moreover, instead of glass the transfer wafer can also be comprised of an electrooptic mate ⁇ al
  • films of barium hexafer ⁇ te are heteroepitaxially grown on a native substrate such as single-crystal alumina, or sapphire, and moved using the processes desc ⁇ bed above to a glass, ceramic, or metallic platen for use as a high density magnetic storage medium for hard dnves
  • the underlying platen may already have a layer of, for example MnFe, to provide a magnetic flux closure path to yield small domain sizes in the overlying, transferred, barium hexaferrite film
  • exemplary materials include ceramic or plastic substrates, depending upon the application

Abstract

A method for the fabrication of complex-transition metal oxide (CTMO)/semiconductor or dielectric substrate integrated devices includes the separation of the CTMO film growth process from the CTMO-film/semiconductor or dielectric substrate integration process. The CTMO-film (10) is transferred from the native substrate (12) to the final substrate (14) for fabrication into devices. The CTMO-film (10) is grown onto a native substrate (12) under growth conditions chosen to provide a CTMO-film having desirable properties and thickness. No restrictions are placed upon the native substrate used, the growth method used, or on the growth conditions required. The CTMO-film (10) is then joined to the semiconductor or dielectric substrate (14) and the native substrate (12) is removed, providing the basis for an integrated electronics, photonics, or MEMS device. Techniques fully compatible with semiconductor processing can be used to fabricate monolithically integrated CTMO/semiconductor devices in first embodiment.

Description

AN INTEGRATED COMPLEX-TRANSITION METAL OXIDE DEVICE AND METHOD OF FABRICATING SUCH A DEVICE
BACKGROUND OF THE INVENTION
Complex-transition metal oxides comprise a large group of materials that show an extremely diverse and useful range of characteristics. Examples of but a few technologically useful complex-transition metal oxide materials include ferπmagnetic materials having the spinel, garnet, or hexaferrite crystallographic structures, ferroelectric materials having the perovskite crystallographic structure, and perovskites that display superconducting behavior at liquid nitrogen temperatures. All of these examples are of note because they are both of great technological interest as well as manifestations for the presence of long range cooperative order in the materials. Because of their potential impact on modern electronics, photonic and microelectromechanical systems (MEMS) applications they are being intensively researched. However, their novel properties derive from complex crystallographic structures that heretofore have been difficult to integrate with the standard processing techniques used by the electronics, photonics and MEMS communities.
The basis of present and future trends in electronics, photonics, and MEMS involves the extension of large-scale batch fabrication of devices on semiconductor oi dielectric wafer materials. Clearly, the effects of such large scale integration has vielded ubiquitous, useful devices Unfortunately, it has thus far been difficult to integrate complex-transition metal oxide devices with current processes, where here integration is denoted as being able to fabπcate both complex-transition metal oxide devices and semiconductor-based devices on the same substrate mateπal using methods compatible with semiconductor batch processing techniques There are many reasons why complex- transition metal oxide mateπals have not been integrated with semiconductor mateπals using standard processing techniques, including the large thermal expansion mismatches between mateπals, and the need to grow the complex-transition metal oxides in oxygen atmospheres at temperatures much higher than those allowable to avoid diffusion or degradation of either the wafer mateπal or metallization layers
It should be recognized here that the complex-transition metal oxides described in this document do not incorporate the simple oxide mateπals, such as SiO,, A1203 or the many glasses that are commonly used in semiconductor processing for insulating or passivatmg layers Nor does it refer to simple transition metal oxide mateπals, such as the conductors ZnO and RuO,, which can be deposited on wafers using temperatures and processes compatible with standard semiconductor fabrication techniques Here, the complex-transition metal oxides refer to materials having large chemical formula units and complex unit cells, and are possessed of long-ranged cooperative phenomenon such as ferπmagnetic. ferroelectric, or superconducting properties These materials are of value for integrated devices because of the unique properties that arise from the long- ranged cooperative phenomenon, for example nonreciprocal wave propagation in ferπmagnets, very high controllable polaπzabihties in ferroelectπcs, and very high conductivities in superconductors In turn, the presence of long-range cooperative phenomenon, and the quality of the resulting effects, requires the oxide film to have high structural and chemical ordering at the atomic level Unfortunately, the process requuements needed for growing high quality complex-transition metal oxide films typically conflicts with the requirements used for producing integrated devices
Moreover, the problems that beset integrating complex-transition metal oxide films with standard semiconductor fabπcation techniques also hold for some intermetalhc alloy systems that also have large chemical formulas and complex unit cells, and possess long ranged cooperative phenomenon It would be very technological 1\ useful to integrate intermetallics such as the rare earth-containing ternary or quarternar> boπdes, which have very high magnetic energy products and hence are very good permanent magnets, routinely into electronics or MEMS applications
One example of the difficulty of integrating complex-transition metal oxides and semiconductors is shown by the requirements for producing integrated ferπmagnetic garnet devices, such as circulators or phase-shifters, on semiconductor wafers for monolithic microwave integrated circuit (MMIC) applications The performance advantages of fabncating devices such as integrated garnet/silicon circulators has been asserted for almost two decades In using the present direct deposition method to meet this goal, high quality garnet films must be deposited at temperatures compatible with the other materials present on the wafer, I e below 500°C Moreover, the garnet films must be up to 200 micrometers thick, several hundred-times thicker than most film depositions used in fabricating MMIC devices Unfortunately, garnet films deposited at temperatures of 500°C are structurally amoφhous, and show no useful ferπmagnetic properties It is only by growing these films at temperatures above 700°C, or by post- annealing the wafers at these high temperatures, that the garnet films become polycrystalline and thus possess useful ferπmagnetic properties This procedure can still degrade the properties of other materials on the wafer unless great care is taken in the ordering of the total wafer fabπcation process Thus, only recently has a direct film deposition process been developed that overcomes this substantial mateπals problem, and others, to yield high quality integrated polycrystalline garnet/silicon circulators
Despite the hard-won successes of the direct film deposition technique, the resulting complex-transition metal oxide films do not necessarily possess optimal matenal properties since they are polyciystalline, and not structurally highly-oriented or single-crystal For most applications involving complex transition-metal oxide films, devices made with polycrystalline films have reduced performance or increased losses compared to single-crystal films. For example, devices made from polycrystalline ferπmagnetic films will have higher magnetic loss compared to the same device made from a single-crystal film, while any imperfections in a high-temperature superconducting film will reduce its current carrying capacity Thus, in general the highest performance integrated complex-transition metal oxide devices will be produced using single-crystal oxide films.
BRIEF SUMMARY OF THE INVENTION
The method developed for the present invention intrinsically avoids the difficulties encountered by direct film deposition technique by separating the complex- transition metal oxide (CTMO) film growth process from the CTMO-film/substrate integration process. The basis of this process is the recognition that the CTMO-film can be transferred from the oπginal, or native, growth substrate to a final, or transfer, substrate for fabrication into devices In exemplary embodiments, this final substrate is formed of a semiconductor, dielectric, ceramic or plastic material, and may already have metallization, oxide layers, passivating layers, devices, bonding layers, or combinations of these already in place. Thus, instead of attempting to directly deposit a CTMO-film having specific material properties and thickness onto the final substrate, the CTMO-film is grown onto a native substrate under growth conditions that are chosen to provide a CTMO-film having optimal properties and thickness No restrictions are placed upon the native substrate used, the growth method used, or on the growth conditions that are required, as long as the resulting CTMO-film has optimal parameters for the resulting device. After growing, or procuπng, the CTMO-film having optimal parameters, it is then removed from the native substrate and is bonded, or joined, to the final substrate to provide the basis for an integrated electronics, photonics, or MEMS device
A number of specific metnods are available for the bonding process that produces an integrated CTMO/semiconductor or CTMO/dielectπc device, all of which were originally developed for standard semiconductor processing Consideπng, for brevιt\ reasons only, that the CTMO film was to be used in an integrated CTMO/semiconductor device, the CTMO film, while still attached to its native substrate, could be bonded to the semiconductor substrate using either eutectic alloy bonding, solid state interdiffusion bonding, adhesives, van der Waal forces, anodic bonding, or other techniques known to practitioners of the art The native substrate could then be removed by mechanical gπnding or polishing, by chemical-mechanical planarization techniques, through the use of selective etches, or by a combination of these techniques with others known to practitioners After removal of the native substrate, the CTMO film is firmly joined to the semiconductor wafer, and techniques fully compatible with semiconductor processing can be used to fabricate monohthically integrated CTMO/semiconductor devices
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will be more fully understood from the following detailed descπption taken in conjunction with the accompanying drawings in which
Fig 1 shows the mating of a CTMO-film on its native substrate to a transfer wafer with bond layers on opposing faces according to the present invention, Fig 2 shows a cross section of the bonded CTMO-film/native wafer and transfer wafer of Fig 1 ,
Fig 3 shows the cross section of Fig 2 after removal of the native substrate,
Fig 4 shows the cross section of Fig 2 after top layer metallization of the CTMO-film, Fig 5 shows the cross section of Fig 2 after the CTMO-film has been patterned and etched, and then had α toP-ιayer metallization coating deposited to yield a monohthically integrated device,
Fig 6 shows scatteπng parameter data for an integrated single-crystal yttrium iron garnet film/ metallized silicon circulator fabπcated by the process descπbed in Example 1 herein,
Figs 7A-7F shows an exemplary process available to fabricate an integrated CTMO- film/transfer wafer device using a two transfer method, and
Fig 8 shows a self-biased monolithic circulator with a patterned bond layer, fabricated using a two transfer method
DETAILED DESCRIPTION Referring now to Fig 1 , the simplest integrated CTMO-film/semiconductor or dielectπc substrate device can be fabπcated by bonding an optimal CTMO-film 10, while still attached to its native substrate 12, to a wafer 14 using a bonding layer 16
Because the properties of the CTMO-film 10 are of decisive importance in the resulting integrated film/substrate device, and because there are numerous CTMO candidates for technologically important devices, a discussion of a few prototypical ferπmagnetic, ferroelectric, and superconducting films and substrates is prudent For most applications it is expected that the best device performance will be obtained if optimal single-crystal CTMO films are used. It is thus important to choose the native substrate 12 such that its lattice constants, crystallographic orientation, thermal expansion coefficients, and other relevant parameters well known to practitioneis in the art, are appropπate for growing a CTMO-film having the specific parameters desired for the device In addition, the choice of a growth method used for growing the single-crystal
CTMO film, whether a melt-based technique such as liquid phased epitaxy, or physical vapor deposition techniques such as pulsed laser ablation deposition or sputtering, or chemical vapor techniques such as metal-organic chemical vapor deposition, or film growth techniques from solution such as sol-gel, spin- spraying, plating or hydrothermal epitaxy, is also chosen appropriately to yield the desired film characteπstics, as is well known to practitioners of the art Tne film growth conditions can also be freely chosen to yield films having optimal desired properties
It should be noted that while single-crystal CTMO films have optimal properties for most applications, the methods described here are fully applicable to devices made ΛΛΛB. PCT/US97/05961 /39481
-7- from CTMO films having less crystallographical pure orientations, such as highly- onented or polycrystalline films Highly-oriented CTMO films may be interchangeable with single crystal films for most applications that use ferπmagnetic or ferroelectric CTMO materials Polycrystalline CTMO films may prove a better choice for integrated device fabrication where cost considerations predominate, or where the device performance is insensitive to the film crystallographic orientation, or if the anisotropy intπnsic to many CTMO single-crystal films is actually detπmental to the device performance For cases where cost considerations are paramount, the methods described here will most likely be applied with CTMO films that have sufficient, but not optimal, mateπal properties for the integrated device Indeed, it is the nature of the methods described here that they are independent of the nature of the CTMO film
In addition, the methods descπbed here are also fully applicable to those intermetalhc alloys that show long range cooperative order, such as the rare-earth containing ternary or quarternary bondes Here, these intermetalhc alloys are subsumed into the CTMO label for the sake of brevity
Many specific device applications and CTMO- film/native substrate pairs 10, 12 can be found Nonreciprocal passive microwave devices, such as circulators, are fabricated from ferπmagnetic materials that a/e members of the garnet, spinel, and hexaferrite families, with the appropπate material being chosen according to the device's desired operating wavelength, bandwidth, and performance level Appropriate CTMO- film/native substrate pairs 10, 12 for these three types of materials have a yttrium iron garnet ferπmagnetic film grown on a gadolinium gallium garnet substrate, a nickel-zinc femte spinel film grown on a magnesium oxide substrate, or a baπum hexaferrite film grown on an alumina, or sapphire, substrate A similar range of CTMO-film/substrate pairs 10, 12 also exist for technologically useful ferroelectric and perovskite-based superconducting films One example is the use of lanthanum aluminate substrate for the growth of epitaxial or highly oriented films of the ferroelectπc perovskite Pb(Zr,, Ti, x)03 , which is often denoted as PZT Since high-temperature superconducting oxide mateπals are also perovskites, lanthanum aluminate substrates are also used as their native substrate, as well as other substrates such as yttrium-stabilized zirconia or magnesium oxide.
It should not be inferred that the film 10 provided on a native substrate 12 be limited to one layer of uniform composition, or even that the film 10 itself is fixed at a single composition. The CTMO-film 10 in a further embodiment is comprised of multiple films having different compositions. For example, it has been demonstrated that the conductive oxide (La,Sr)CoO3, often denoted as LSC, has a sufficient lattice match with both lanthanum aluminate and PZT films to allow growth of high quality LSC/PZT/LSC film-sandwiches on lanthanum aluminate substrates. These sandwiches 10 are thus provided on their native substrate 12, with the entire sandwich being available for removal from their native substrate and attachment to a new substrate 14, such as a semiconductor for use as a nonvolatile memory element.
Referring now to Fig. 2, in one straightforward fabrication process the CTMO- film/native substrate 10, 12 is bonded to the wafer 14, or surface, to which the CTMO- film is to be transferred. This bonding procedure is effected using either eutectic alloy bonding, solid-state interdiffusion bonding, adhesives, van der Waal forces, anodic bonding, or other techniques known to practitioners in the art. When adhesives, eutectic alloy bonding, or solid state interdiffusion bonding techniques are used a bond layer 16 will be present between the CTMO-film/native substrate and transfer substrate. This bond layer 16 can be placed upon either or both of the mating surfaces using standard techniques known to practitioners. The constraints on the bonding process are limited only by the desire to not damage either the transfer wafer 14 or the CTMO-film 10 by either thermal, mechanical, or chemical effects, as well as cost / time considerations. Here the wafer surface may already have undergone considerable previous processing. and may already have integrated circuit components such as metal, insulating, or semiconducting layers and devices present.
Referring now to Fig. 3, in most applications it is advantageous to remove the native substrate 12 from the bonded system, leaving the CTMO-film 10 bonded to the transfer wafer. Here the native substrate 12 is removed by one or more of the following: gπnding, lapping, use of selective etching, or other techniques common to chemical- mechanical planarization processes that are well known to practitioners in the art Since these processes are destructive of the native substrate 12, which may have a significant cost, it may be advantageous to remove the native substrate 12 without destroying it m the process This result is obtained by breaking the bond between the CTMO-film 10 and the native substrate 12, allowing the substrate to be detached Methods to incoφorate a relatively weak bond at the film/substrate interface can be applied either duπng the film growth process, or by special preparation of the native substrate 12 before undertaking the CTMO-film 10 growth. For example, it is known that during the growth of many CTMO films by vapor phase deposition techniques slight changes in the film stoichiometry through oxygen-deficiency will cause the formation of dislocation sites, which in turn promote high stress at the film/substrate interface. In practice, this yields films 10 that easily delaminate, or peel, from the native substrate 12 Thus, by appropπate modifications to the vapor phase film growth process conditions weak bonding could be obtained between the film 10 and native substrate 12, which would allow the film to be easily detached while the native substrate incurs minimal damage Of course, the process modification must still yield CTMO films retaining sufficient properties for the integrated device
Another method for providing a weak bond between film 10 and the native substrate 12 is obtained by depositing a sacrificial layer that has weak mechanical strength onto the native substrate 12 before growing the CTMO-film 10 One applicable method derives from the cleaved layer epitaxy for transfer, also denoted as CLEFT, process that has been developed for the epitaxial growth and transfer of semiconductors After removal of the native substrate 12, the now-exposed CTMO-film 10 is available for surface modification or patterning into devices. Referπng to Fig 4, this includes in a first embodinu...
Figure imgf000011_0001
of the exposed surface, followed by one oi more layers of metallization 18 Or, as shown in Fig 5, the CTMO-film 10 may be patterned using standard processes well known to those in the art to yield one, or mam . devices on the transfer wafer surface 14 Furthermore, the bonded CTMO-film/transfer wafer system 10, 14 is provided in a further embodiment with yet another film transferred to it, again using one of the processes listed above, to yield a complex multilayered film stack 10.
A specific embodiment of the previously described integration process is given in the following example.
EXAMPLE 1 : One example for the use of the present invention involves the fabrication of integrated single-crystal yttrium iron garnet circulators on a metallized silicon substrate 14 at low temperatures. Single-crystal yttrium iron garnet (often denoted as YIG) films 10, having thicknesses over 100 micrometers, can be routinely grown on lattice-matched gadolinium gallium garnet (often denoted as GGG) substrates 12 by liquid phase epitaxy, but have never been grown on semiconductor substrates 14. As discussed previously, integrated polycrystalline garnet/semiconductor circulators have been produced through the direct fabrication method at using processing temperatures above 700°C. However, integrated single-crystal garnet circulators have performance benefits over integrated polycrystalline garnet circulators, and there is a greatly reduced risk of degrading the device characteristics if the integration is done at low temperatures. An integrated single-crystal YIG / silicon circulator was fabπcated by bonding a YIG film on its native GGG substrate to metallized silicon, followed by removal of the GGG native substrate by grinding. This was done at a chip, or die, level. Before bonding the garnet and silicon chips, the YIG surface had a 2 micrometer-thick copper layer deposited on it for use as a high-conductivity ground plane. Over this copper layer, a barrier layer of titanium-tungsten was deposited. Both chips then had layers of elemental gold and indium deposited on their mating surfaces. The relative thicknesses of the gold and indium layers were chosen such that their relative atomic fraction was approximately nine indium atoms to one gold atom. The chips were then mated, and heated in vacuum uncer slight compression to hold the mated faces steady. During the heating process, at a temperature of 195°C, the indium layer melts and strongly reacts with the gold layer via fast solid-liquid interdiffusion processes to yield islands of an indium-gold alloy in an indium matrix. This eutectic bonding process provided a strong bonding layer between -l i¬ the chips, as the indium-gold alloy has good mechanical strength, while still retaining some compliancy to stress through the indium matrix
After bonding, the native GGG substrate was removed by mechanical grinding The now-exposed YIG film top surface was then polished, and metallized by depositing a 2 micrometer-thick layer of copper on the top surface The Y-junction circulator structure was then fabπcated through standard semiconductor-based photolithographic and etching processes. Tests results from one of the first integrated single-crystal YIG ' silicon circulators is provided in Fig. 6 The results for both the insertion loss and isolation of this circulator show noteworthy performance levels for this nonoptimized circuit
Fig 6 shows the forward (S,2) and reverse (S21) scattering parameters for microwave propagation across the circulator circuit and connectors as a function of frequency, where the third port of the Y-junction circulator was terminated by a 50 Ω load The different transmitted power for the forward and reverse directions in the frequency range from 8 GHz to 12 GHz shows the nonreciprocal circulator action for this device. In particular, an isolation of over 20 dB is seen over a 1 GHz bandwidth centered near 9 GHz, with a minimum measured insertion loss of 1.2 dB
Although the single film-transfer method descπbed in the above paragraphs, and example, provide one straightforward method for obtaining an integrated CTMO- film/ semiconductor or dielectric substrate device, multiple-step processes may prove to be advantageous where particularly sensitive devices are present on the transfer wafer, or where it is important to pattern the CTMO-film prior to bonding, or where wastage of the CTMO-film needs to be minimized due to cost considerations.
Referring to Figs 7A-7D, a two-step transfer process is shown where the CTMO- film 20 disposed on a native substrate 22 is first patterned, etched, and metallized to the device specifications (Fig 7A), and then the modified CTMO-film is bonded to a host wafer 24 (Fig. 7B), or surface, via a weak binding layer 26, before removing the native substrate 22 using any of the methods described above (Fig 7C) At this stage, the film 20 may be further modified by patterning and etching processes, by single or multilaver metallization, or by having another film bonded to it to yield a multi-film stack. One modification may have the CTMO-film divided into discrete sub-components, where each sub-component may be bonded to different transfer substrates, or different areas of the same transfer wafer. After modification, the CTMO-film 20, or CTMO-film sub- component, is bonded to its final attachment site on the transfer wafer 28 via a bonding layer 30 (Fig. 7D), and the host wafer 24 is removed (Fig. 7E). Finally, the now- exposed surface of the modified CTMO-film 20, or multi-film stack, is further processed to yield a working device (Fig. 7F), which may be comprised of many complex film 20 and metallization 32 layers. Although the bond layer 16 has been shown as continuous, there is no need for this layer to be contiguous other than for mechanical strength. Indeed, when metallization for electrical connections are present between the CTMO-film and transfer substrate, and a metallic alloy is used for bonding, the need for electrical isolation may necessitate a discontinuous bond layer. Fig. 8 shows a cross-section schematic for one embodiment of this invention that can use both a patterned bond layer and a CTMO-film subcomponent fabricated by multiple transfer steps: a monolithic integrated self-biased circulator on a multicomponent transfer substrate 34. This device has great advantages over conventional circulators because the intrinsic properties of the c-axis oriented hexaferrite CTMO-film act to self-bias the circulator, such that no external magnetic field is required for circulator operation. The transfer substrate 34 may be procured as a GLASS MICROWAVE INTEGRATED CIRCUIT substrate, a trade-marked product of the M/A- COM Co.. This substrate 34 consists of a semiconductor wafer 36, such as silicon, a metallization layer 38 that serves as the microwave device ground plane, and a low-loss dielectric filling material 40 that provides for planarity over the substrate surface.
This embodiment of a monolithic integrated self-biased circulator entails bonding a c-axis oriented hexaferrite CTMO-film subcomponent 42, having thickness of from 20 micrometers to 100 micrometers, onto a raised silicon pedestal portion of the substrate 34 using a patterned bonding layer 44. The hexaferrite film sub-component 42 may have undergone patterning, etching, and transfer to a host wafer before bonding to the transfer substrate 34, as was shown in Fig 7 For example, the hexaferrite film sub-component 42 may have originally been grown, or procured as a continuous film on a 75 millimeter diameter substrate, and then patterned and etched using standard processes to yield a large number of subcomponents 42, each with bevelled film edges These individual subcomponents 42 may have triangular, rectagonal, or hexagonal shapes, and range in edge-length from 1 mm to 2 cm depending upon the particular hexaferπte material parameters, the device frequency range, and the circuit design After patterning and etching, the hexafemte film sub-components 42 are weakly bonded to a host substrate before attachment to the transfer substrate Finally, the hexaferrite subcomponent 42 ma\ be precisely aligned on the transfer substrate using pick-and-place techniques
The bonding process of Fig 8 may be conducted using any of the previously named methods, depending upon thermal, mechanical, time and cost considerations However, use of a bond layer that is conductive, for example an indium-gold alloy formed by solid state interdiffusion of elemental layers, will necessitate the patterned bond layer 44 This bond layer pattern consists of several isolated bond layer pads 44a. 44b, 44c that are spaced to provide electrical isolation between the substrate ground plane metallization 38 and the device top surface metallization 46 In addition, the bond layer pads 44 must also be designed to minimize detrimental capacitance effects in the circuit
Despite previous references to semiconductor wafers, it should not be construed that this technique is limited to the use of semiconductor transfer wafers Dielectric materials, such as glass, are routinely incoφorated into electronic circuits either as substrates, or as layers on top of the semiconductor substrate It has heretofore proven to be difficult to grow CTMO-films directly on such glass layers, since they are crystallographical amoφho^ ~ud typi ally melt, or soften, at temperatures below CTMO film growth temperatures However, such glasses comprise some, or all, of the transfer wafer 14, 28 upon which the CTMO-film 10. 20 or multi-film stack is bonded in further embodiment of the present invention The use of this technique to transfer CTMO-films to dielectric wafers for non- electronics applications is found in yet further embodiments of the present invention For example, using the straightforward transfer process provided in Example 1 , epitaxially grown bismuth doped garnet films having high magneto-optic Verdet constants, and thus large Faraday rotation of infrared and visible light, are attached to a glass wafer for use as a magnetic field sensing element. This glass wafer may have one or more optical waveguides internal to the wafer, to provide an integrated magneto-optic sensing element Moreover, instead of glass the transfer wafer can also be comprised of an electrooptic mateπal In yet one more application of this technique, films of barium hexaferπte are heteroepitaxially grown on a native substrate such as single-crystal alumina, or sapphire, and moved using the processes descπbed above to a glass, ceramic, or metallic platen for use as a high density magnetic storage medium for hard dnves Here, the underlying platen may already have a layer of, for example MnFe, to provide a magnetic flux closure path to yield small domain sizes in the overlying, transferred, barium hexaferrite film
Other exemplary materials, in yet further embodiments of the present invention, include ceramic or plastic substrates, depending upon the application
Modifications and substitutions to the present invention made by one of ordinary skill in the art is considered to be within the scope of the present invention, which is not to be limited except by the claims which follow

Claims

IN THE CLAIMS
1 A method of fabricating an integrated device, comprising the steps of forming a complex-transition metal oxide film on a native substrate under conditions necessary for providing film properties for integrated device fabrication, disposing said film on a transfer substrate under conditions chosen to avoid transfer substrate component degradation; and removing said native substrate.
2 The method of claim 1 wherein said step of forming further compπses forming said complex-transition metal oxide film on said native substrate at temperatures above 500 degrees Celsius.
3 The method of claim 1 wherein said step of disposing further compπses disposing said film on said transfer substrate at temperatures below 500 degrees Celsius.
4. The method of claim 1 wherein said step of disposing further comprises disposing metallic layers between said film and said transfer substrate which alloy at temperatures below 200 degrees Celsius.
5. The method of claim 1 wherein said step of forming said film on said native substrate further compπses forming a weak bond between said film and said native substrate.
6. The method of claim 5 wherein said step of forming a weak bond further comprises adjusting the oxygenation uf the atmosphere in which said film is formed on said native substrate to form dislocation sites in said bond, and wherein said step of removing said native substrate further compπses peeling said film from said native substrate
7. The method of claim 5 wherein said step of forming a weak bond further comprises forming a sacrificial layer of weak mechanical strength on said native substrate before the step of forming said film on said native substrate.
8. The method of claim 1 wherein said step of removing said native substrate further comprises a step selected from the group consisting of grinding, lapping, and etching said pπmary substrate from said complex-transition metal oxide film.
9. The method of claim 1 further comprising the step of polishing said film after said native substrate has been removed.
10. The method of claim 1 wherein said step of forming further compπses a method selected from the group consisting of melt-based deposition, physical vapor deposition, chemical vapor deposition, and film growth from solution.
11. The method of claim 10 wherein said method of melt-based deposition further comprises liquid phase epitaxy.
12 The method of claim 10 wherein said method of physical vapor deposition further comprises pulsed laser ablation deposition or sputtering.
13 The method of claim 10 wherein said method of chemical vapor deposition further comprises metal-organic chemical vapor deposition.
14 The method of claim 10 wherein said method of film growth from solution further comprises sol-gel, spin-spraying, plating or hydrothermal epitaxy.
15. The method of claim 1 wherein said step of disposing further comprises a step selected from the group consisting of eutectic alloy bonding, bonding by solid state mterdiffusion alloying, adhering with adhesive, bonding via van der Waal forces, and anodic bonding said film to said transfer substrate
16 The method of claim 1 wherein said integrated device is an integrated single- crystal yttrium iron garnet circulator
17 The method of claim 16 wherein said step of forming further compπses growing at least one single-crystal yttπum iron gamet (YIG) film on a lattice-matched gadolinium gallium garnet (GGG) native substrate
18 The method of claim 17 wherein said step of disposing further comprises disposing said YIG film on a metallized silicon transfer substrate
19 The method of claim 18 wherein said step of disposing further comprises depositing a copper layer ground plane on said YIG film pπor to disposing said film on said transfer substrate
20 The method of claim 19 wherein said step of disposing further comprises depositing a titanium-tungsten barrier layer on said ground plane
21 The method of claim 18 further comprising depositing layers of gold and indium on each of said film and said transfer substrate prior to disposing said film on said transfer substrate
22 The method of claim 1 wherein said step of forming further comprises forming plural complex-transition meim oxide subcomponent films from said complex-transition metal oxide film on said native substrate prior to disposing said subcomponent films on said transfer substrate 23 The method of claim 22 wherein said step of disposing said subcomponent films on said transfer substrate further comprises disposing a first portion of said subcomponent films on said transfer substrate, and disposing a second portion of said subcomponent films on a second transfer substrate
24 A method of fabricating an integrated device compπsing the steps of providing a native substrate, disposing a complex-transition metal oxide film on said native substrate, patterning, etching and metallizing said complex-transition metal oxide film on said native substrate, providing a host substrate, bonding said complex-transition metal oxide film and said native substrate to said host substrate, removing said native substrate from said complex-transition metal oxide film, patterning, etching and metallizing said complex-transition metal oxide film on said host substrate, providing a transfer substrate chosen from the group consisting of semiconductor, dielectric, plastic and ceramic materials, disposing a bonding layer intermediate and in contact with said transfer substrate and said complex-transition metal oxide film, and removing said host substrate
25 A method of fabricating an integrated device comprising the steps of providing a native substrate, disposing a complex-transition metal oxide film on said native substrate, providing a transfer substrate cuosen from the group consisting of semiconductor dielectric, plastic and ceramic mateπals, disposing a bonding layer intermediate and m contact with said transfer substrate and said complex-transition metal oxide film, and removing said native substrate
26 The method of claim 25 wherein said step of disposing a bonding layer further comprises disposing metallic layers which alloy at temperatures below 200 degrees Celsius
27 The method of claim 25 wherein said step of disposing a complex-transition metal oxide film on said native substrate further comprises forming a weak bond between said complex-transition metal oxide film and said native substrate
28 The method of claim 25 further comprising the step of polishing said complex- transition metal oxide film after said native substrate has been removed
29 The method of claim 25 further compπsing the step of metallizing said complex- transition metal oxide film and said transfer substrate after said native substrate has been removed
30 The method of claim 25 wherein said siep of disposing a complex-transition metal oxide film further comprises separating said film into plural subcomponent films prior to disposing said bonding layer
31 The method of claim 30 wherein a first portion of said subcomponents are in contact with said bonding layer
32 The method of claim 25 wherein said step of disposing a bonding layer further comprises the step of patterning said bonding layer on one or both of said transfer substrate and said complex-transition metal oxide film
33 An integrated device, comprising a substrate chosen from the group consisting of semiconductor and dielectric, a complex-transition metal oxide element, a bonding layer disposed intermediate said substrate and said element, and integrated circuit components disposed proximate said substrate and said element. wherein said integrated circuit components degrade under complex-transition metal oxide element growth conditions
34 The device of claim 33, wherein said integrated circuit components include a metallization layer disposed on said complex-transition metal oxide element and said substrate to yield a monohthically integrated device
35 The device of claim 33 wherein said dielectric substrate is glass
36 The device of claim 33 wherein said bonding layer is an indium-gold alloy
37 The device of claim 33 wherein said element further comprises a high- conductivity ground plane disposed adjacent said bonding layer
38 The device of claim 33 wherein said bonding layer further comprises a barπei layer disposed adjacent element
39 The device of claim 38, wherem said barrier layer is comprised of titanium- tungsten
40 The device of claim 33 wherein said bonding layer is an adhesive
41 The device of claim 33 wherem said element is a comprised of a single complex- transition metal oxide film 42 The device of claim 33 wherein said element is a comprised of multiple complex-transition metal oxiαe films, each of a unique composition
43 The device of claim 42 wherein said element is further comprised of plural metallization layers
44 The device of claim 33 wherein said complex-transition metal oxide element further compπses complex-transition metal oxide subcomponents
45 The device of claim 33 wherein said bonding layer compπses plural patterned bonding layers
46 A monohthically integrated complex-transition metal oxide/semiconductor device, comprising a semiconductor substrate and associated circuitry fabricated under semiconductor device fabrication conditions, a layer of bonding material disposed on a first surface of said semiconductor substrate, and a complex-transition metal oxide film disposed on said layer of bonding material, wherein said bonding material layer bonds said complex-material metal oxide film to said semiconductor substrate at a temperature below that at which said substrate and associated circuitry degrade, ana wherein said complex-transition metal oxide film is formed remote from said substrate and said bonding material layer under conditions necessary for fabrication of a film suitable for device fabrication prior to being bonded to said semiconductor substrate
47 The device of claim 46, wherein said complex-transition metal oxide film is chosen from the group consisting of femmagnetic, ferroelectric and superconducting matenals
48 The device of claim 46 wherein said device is a monolithic microwave integrated circuit
49 The device of claim 48 wherein said monolithic microwave integrated circuit is a nonreciprocal passive microwave device
50 The device of claim 46 wherein said complex-transition metal oxide film is a single-crystal complex-transition metal oxide film
51 The device of claim 46 wherein said complex-transition metal oxide film is a polycrystalline complex-transition metal oxide film
52 The device of claim 46 wherein said device is a nonvolatile memory element
53 A monohthically integrated intermetalhc alloy/semiconductor device, comprising a semiconductor substrate, a layer of bonding material disposed on a first surface of said semiconductor substrate, and an intermetallic alloy film disposed on said layer of bonding mateπal, wherein said bonding material layer bonds said intermetalhc alloy film to said semiconductor substrate at a temperature below that at which said semiconductor substrate degrades, and wherein said intermetalhc alloy film is formed remote from said substrate and saiu bonding material layer under conuitions necessary for fabrication of a film suitable for device fabrication prior to being bonded to said semiconductor substrate
54 The device of claim 53, wherein said intermetalhc alloy film is chosen from the group consisting of rare earth-containing ternary or quaternary boπdes
55 The device of claim 53, wherein said bonding material layer is patterned
56 The device of claim 53, wherein said intermetalhc alloy film is separated into subcomponents prior to being disposed on said layer of bonding mateπal
57 A monolithic integrated self-biased circulator on a multicomponent transfer substrate, comprising a transfer substrate, plural, isolated bond layer pads disposed on said transfer substrate, and a complex-transition metal oxide (CTMO) film subcomponent disposed on said plural bond layer pads and said transfer substrate
58 The circulator of claim 57 wherein said transfer substrate further comprises a semiconductor wafer, a ground plane metallization, and plural low-loss dielectric fill regions
59 The circulator of claim 57 wherein said CTMO film subcomponent further comprises a patterned and etched c-axis oriented hexaferrite film component procured on a host substrate
60 The circulator of claim 57 wherein said CTMO film subcomponent further compπses a surface metallization layer
61 The circulator of claim 60 wherein said plural bond iayer pads are conductive and which provide electrical isolation between said transfer substrate and said surface metallization layer 62 A method of forming a monolithic integrated self-biased circulator, comprising providing a semiconductor wafer substrate, patterning said semiconductor substrate to form at least one raised silicon pedestal portion of said substrate, disposing a microwave device ground plane metallization layer on said patterned semiconductor substrate, providing a low-loss dielectric filling material on regions of said ground plane metallization other than above said pedestal portions, forming plural isolated bond layer pads, spaced to provide electrical isolation between said ground plane metallization and conductive components disposed on said filling material, procuring a c-axis oriented hexaferrite CTMO-film on a host substrate, patterning and etching said CTMO-film to form a plurality of CTMO-film subcomponents on said host substrate, bonding at least one of said plurality of CTMO-film subcomponents on said at least one pedestal portion of said substrate, removing said host substrate from said at least one CTMO-film subcomponent, and providing a device top metallization layer on said at least one CTMO-film subcomponent and said filling material not having said CTMO-film subcomponent adjacent thereto
PCT/US1997/005961 1996-04-12 1997-04-10 An integrated complex-transition metal oxide device and a method of fabricating such a device WO1997039481A1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006134335A1 (en) * 2005-06-16 2006-12-21 Pilkington Group Limited Coated glass pane
WO2011120537A1 (en) * 2010-03-31 2011-10-06 Ev Group E. Thallner Gmbh Method for producing a wafer equipped with chips on two sides

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200484A (en) * 1977-09-06 1980-04-29 Rockwell International Corporation Method of fabricating multiple layer composite
US5034343A (en) * 1990-03-08 1991-07-23 Harris Corporation Manufacturing ultra-thin wafer using a handle wafer
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display
US5146299A (en) * 1990-03-02 1992-09-08 Westinghouse Electric Corp. Ferroelectric thin film material, method of deposition, and devices using same
US5227204A (en) * 1991-08-27 1993-07-13 Northeastern University Fabrication of ferrite films using laser deposition
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
US5391257A (en) * 1993-12-10 1995-02-21 Rockwell International Corporation Method of transferring a thin film to an alternate substrate
US5449659A (en) * 1991-07-05 1995-09-12 Conductus, Inc. Method of bonding multilayer structures of crystalline materials
US5493220A (en) * 1993-03-05 1996-02-20 Northeastern University Magneto-optic Kerr effect stress sensing system
US5527766A (en) * 1993-12-13 1996-06-18 Superconductor Technologies, Inc. Method for epitaxial lift-off for oxide films utilizing superconductor release layers
US5536361A (en) * 1992-01-31 1996-07-16 Canon Kabushiki Kaisha Process for preparing semiconductor substrate by bonding to a metallic surface

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200484A (en) * 1977-09-06 1980-04-29 Rockwell International Corporation Method of fabricating multiple layer composite
US5146299A (en) * 1990-03-02 1992-09-08 Westinghouse Electric Corp. Ferroelectric thin film material, method of deposition, and devices using same
US5034343A (en) * 1990-03-08 1991-07-23 Harris Corporation Manufacturing ultra-thin wafer using a handle wafer
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display
US5449659A (en) * 1991-07-05 1995-09-12 Conductus, Inc. Method of bonding multilayer structures of crystalline materials
US5227204A (en) * 1991-08-27 1993-07-13 Northeastern University Fabrication of ferrite films using laser deposition
US5536361A (en) * 1992-01-31 1996-07-16 Canon Kabushiki Kaisha Process for preparing semiconductor substrate by bonding to a metallic surface
US5493220A (en) * 1993-03-05 1996-02-20 Northeastern University Magneto-optic Kerr effect stress sensing system
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
US5391257A (en) * 1993-12-10 1995-02-21 Rockwell International Corporation Method of transferring a thin film to an alternate substrate
US5527766A (en) * 1993-12-13 1996-06-18 Superconductor Technologies, Inc. Method for epitaxial lift-off for oxide films utilizing superconductor release layers

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
IEEE TRANSACTIONS ON MAGNETICS, November 1990, Vol. 26, No. 6, ICHINOSE M., "Single-Crystal Ferrite Technology for Monolithic Disk Heads", pages 2972-7. *
J. APP. PHYS., 15, April 1988, Vol. 63, No. 8, ABE M. et al., "Ferrite-Organic Multilayer Film for Microwave Monolithic Integrated Circuits Prepared by Ferrite Plating Based on the Spray-Spin-Coating Method", pages 3774-6. *
MICROWAVE JOURNAL, June 1987, Vol. 30, No. 6, GLASS H.L. "Ferrite Films for Microwave and mm-Wave Applications", pages 52, 54, 56, 58, 60, 62-3. *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006134335A1 (en) * 2005-06-16 2006-12-21 Pilkington Group Limited Coated glass pane
WO2011120537A1 (en) * 2010-03-31 2011-10-06 Ev Group E. Thallner Gmbh Method for producing a wafer equipped with chips on two sides
US9224630B2 (en) 2010-03-31 2015-12-29 Ev Group E. Thallner Gmbh Method for producing a wafer provided with chips

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