WO1997031463A3 - Crossbar switch and method with reduced voltage swing and no internal blocking data path - Google Patents

Crossbar switch and method with reduced voltage swing and no internal blocking data path Download PDF

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Publication number
WO1997031463A3
WO1997031463A3 PCT/US1997/002941 US9702941W WO9731463A3 WO 1997031463 A3 WO1997031463 A3 WO 1997031463A3 US 9702941 W US9702941 W US 9702941W WO 9731463 A3 WO9731463 A3 WO 9731463A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
voltage
voltage swing
reduced voltage
input
Prior art date
Application number
PCT/US1997/002941
Other languages
French (fr)
Other versions
WO1997031463A2 (en
Inventor
Albert Mu
Jeffrey D Larson
Original Assignee
Hal Computer Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hal Computer Systems Inc filed Critical Hal Computer Systems Inc
Priority to EP97908726A priority Critical patent/EP0840971B1/en
Priority to JP53040597A priority patent/JP3742112B2/en
Priority to DE69733931T priority patent/DE69733931T2/en
Publication of WO1997031463A2 publication Critical patent/WO1997031463A2/en
Publication of WO1997031463A3 publication Critical patent/WO1997031463A3/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages
    • H04Q3/523Details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/101Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/20Support for services
    • H04L49/205Quality of Service based
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/253Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254Centralised controller, i.e. arbitration or scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • H04L49/3018Input queuing

Abstract

A switch system and method transfer a data packet from a source data port to one or more destination data ports through a switch. The system comprises a source input buffer, a first and a second source input path, a first and a second output path and at least one crosspoint circuit. The source input buffer includes a first and a second data section. The first and the second data sections are coupled to the first and the second input paths respectively. The first and the second input paths couple through the crosspoint circuits at each intersection with the first and the second output paths. The method includes loading the data packets into data sections of an input buffer, transferring each data packet across an input path dedicated for each data section, transmitting each data packet over its input path, and switching the data from the input path to the output path based on a voltage differential. A crosspoint circuit in the switch system includes a first and a second reduced voltage swing line, a first and a second transistor circuit for each data input path and a sense amplifier for a data port. The first reduced voltage swing line is coupled to the first transistor circuit, the second reduced voltage swing line is coupled to the second transistor circuit and both reduced voltage swing lines are connected to the sense amplifier. The method of the unit comprises the steps of charging a first and a second reduced voltage swing line to a predetermined voltage, discharging the voltage from the first reduced voltage swing line, maintaining the voltage in the second voltage line, receiving a clock signal at the sense amplifier, and generating an output signal based on a voltage differential between the voltage lines.
PCT/US1997/002941 1996-02-22 1997-02-20 Crossbar switch and method with reduced voltage swing and no internal blocking data path WO1997031463A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP97908726A EP0840971B1 (en) 1996-02-22 1997-02-20 Crossbar switch and method with reduced voltage swing and no internal blocking data path
JP53040597A JP3742112B2 (en) 1996-02-22 1997-02-20 Switching system, method for transferring data, and reduced voltage swing crosspoint circuit
DE69733931T DE69733931T2 (en) 1996-02-22 1997-02-20 CROSS-REFERENCE SWITCH AND METHOD WITH RESTRICTED VOLTAGE LIFT AND BLOCKING-FREE TRANSMISSION PATHS

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/604,920 US5991296A (en) 1996-02-22 1996-02-22 Crossbar switch and method with reduced voltage swing and no internal blocking data path
US08/604,920 1996-02-22

Publications (2)

Publication Number Publication Date
WO1997031463A2 WO1997031463A2 (en) 1997-08-28
WO1997031463A3 true WO1997031463A3 (en) 1997-12-04

Family

ID=24421573

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1997/002941 WO1997031463A2 (en) 1996-02-22 1997-02-20 Crossbar switch and method with reduced voltage swing and no internal blocking data path

Country Status (5)

Country Link
US (2) US5991296A (en)
EP (1) EP0840971B1 (en)
JP (1) JP3742112B2 (en)
DE (1) DE69733931T2 (en)
WO (1) WO1997031463A2 (en)

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Also Published As

Publication number Publication date
JP3742112B2 (en) 2006-02-01
DE69733931D1 (en) 2005-09-15
EP0840971A2 (en) 1998-05-13
US5991296A (en) 1999-11-23
US6490213B1 (en) 2002-12-03
DE69733931T2 (en) 2006-05-11
EP0840971B1 (en) 2005-08-10
WO1997031463A2 (en) 1997-08-28
JPH11511633A (en) 1999-10-05

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