WO1997023079A1

WO1997023079A1 - Split harmonic frequency modulation data transmission system

Info

Publication number: WO1997023079A1
Application number: PCT/US1996/019656
Authority: WO
Inventors: Fred A. Leuchter
Original assignee: B.J. MCCORMICK TRUST doing business as J.V.M. INDUSTRIES, INC.
Priority date: 1995-12-20
Filing date: 1996-12-11
Publication date: 1997-06-26
Also published as: AU1285297A

Abstract

A serial data signal is received by a serial data interface (16) of a transmitter (12) and is divided equally by a divider module (230) into a preselected number, N, of signals, N matching the number of frequencies generated by a set of frequency generators (74, 76, 78, 80, 82) whose outputs feed N switches (54, 56, 58, 60, 62). The data signals are stored in N registers (30, 32, 34, 36, 38). The data is pulsed simultaneously to the control inputs of the switches (54, 56, 58, 60, 62) and turns the frequencies on and off. The resulting signals are transmitted simultaneously, then received at a receiver. The signals are applied to N bandpass filters, whose outputs are passed to N buffers and then to N switches. The N switch outputs are sent to N registers. The register contents are converted, in sequence, into a serial data signal.

Description

SPI.IT HARMONTC FREQUENCY MODULATION DATA TRANSMISSION SYSTEM

Background of the Invention

The present invention relates generally to the field of data transmission and more particularly to a new procedure for data transmission designated as split harmonic frequency modulation which can operate at extremely high transmission rates.

A major problem in data transmission using telephone lines at high baud rates has been the limitations of the telephone system to communicate the data. Most data transmission problems relate to the frequencies of the information that the telephone lines themselves can handle and to a lesser degree the switching rates of the central offices. Electronic switching systems, the use of computers for long distance transmission and the use of multiplexing devices in local areas have contributed to the limitations of the telephone system to communicate digital data.

In the past, data transmission modems have employed a variable frequency output that has been forced to deal with bandwidth problems in the voice channel of about 300 Hz through 4,000 Hz. The fastest modems of this type are fixed to work under the limit of the bandwidth of the channel, in accordance with Shannon's theorem, never exceeding the maximum of 30,000 bits per second due to hysteresis or noise at the transmitted frequencies.

Objects of the Invention

It is an object of the present invention to provide a split harmonic frequency modulation data transmission system which is capable of extremely high rates of data transmission. Another object of the present invention is to provide a split harmonic frequency modulation data transmission system which operates effectively in the telephone voice frequency band.

Another object of the present invention is to provide a split harmonic frequency modulation data transmission system which is capable of telephone data transmission at high transmission rates.

Another object of the present invention is to provide a split harmonic frequency modulation data transmission system which is capable of providing video data transmission over telephone lines.

Another object of the present invention is to provide a split harmonic frequency modulation data transmission system which operates in the television frequency band. Another object of the present invention is to provide a split harmonic frequency modulation data transmission system which is capable of operation with computer modems.

These and other objects and advantages of the present invention will appear more fully hereinafter.

In accordance with the present invention, there is provided a split harmonic frequency modulation data transmission system which utilizes a multi-frequency design. The preferred embodiment utilizes a preselected number of frequencies for example 64, or more, frequencies within the voice band of 300 Hz to 4,000 Hz. These frequencies are designated as carrier frequencies and are generated within a new transmitter unit, according to the present invention, and are transmitted through an interface onto the telephone line. Prior to the connection to the telephone line these carrier frequencies are passed through a solid state switch the rate of which is controlled by a data queue of information from a computer or other device which generates digital data in serial format. By using a carrier frequency and by switching it on and off in accordance with the data stream the system in effect places a switched carrier frequency onto the telephone line and counts the on and off cycles of the switched carrier frequency against a time base of one second or other preselected time base.

Since the system counts the number of times the carrier frequency is turned on and off, and not the frequency itself, the system does not have to deal with the techniques of Shannon's theorem and the bandwidth limitations. The system utilizes a relatively large number of frequencies, such as 64, or more, and can transmit large quantities of data in parallel over the telephone line at high rates of transmission.

In the transmitter unit the data signal from the computer, which is in serial format, is divided into a number of parallel signals and each of the parallel signals is stored in a register. The number of registers is equal to the number of different carrier frequencies. The data is pulsed simultaneously to the control pins of a plurality of solid state switches and each frequency is chopped (turned on and off) creating a data mirror of the information in each one of a plurality of data registers and then p ssed onto the telephone line.

The data is received by a receiver unit and is filtered and applied to a set of parallel solid state switches and stored in a set of parallel registers. When the data transmission is complete, the parallel registers are cascaded in sequence into a serial data stream and fed into another computer or other unit which will utilize the data.

The carrier frequencies are never part of the data tream and act only as data carriers. The solid state switches send clean direct current into the telephone line and later into the data registers after reception. The carrier frequencies are generated by precision voltage controlled oscillators and, within the receiver, the carrier frequencies are filtered dc wn to one frequency per parallel register. Brief Description of the Drawings

Other important objects and advantages of the invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings in which: Fig. 1 is an overall block diagram of the transmitter unit of a split harmonic frequency modulation data transmission system, made in accordance with the present invention;

Fig. 2 is an overall block diagram of the receiver unit of the split harmonic frequency modulation data transmission system of Fig. 1; Fig. 3 is a schematic diagram of a typical carrier frequency generator of the transmitter unit of Fig. 1;

Fig. 4 is a schematic diagram of a solid state switch of the transmitter unit of Fig. 1 ;

Fig. 5 is a schematic diagram ofthe telephone interface of the transmitter unit of Fig. 1 ;

Fig. 6 is a schematic diagram of the telephone interface of the receiver unit of Fig. 2;

Fig. 7 is a schematic diagram of a typical solid state switch of the receiver unit of Fig. 2, and Fig. 8 is a schematic diagram of a typical combination filter and buffer which is part of the receiver unit of Fig. 2. Detailed Description of the Invention

With reference to the drawings, wherein like reference numbers designate like or corresponding parts throughout, there is shown in Figs. 1 and 2 a split harmonic frequency modulation data transmission system 10 made in accordance with the present invention, which includes a transmitter unit 12, shown in Fig. 1, and a receiver unit 14, shown in Fig. 2.

The transmitter unit 12 includes a serial data interface 16 which is connected to a computer 18 via a lead 20 and receives serial data which is generated by the computer 18.

The computer 18 has been described as the source of the serial data for purposes of illustration only. It is understood that the transmitter unit 12 may be connected to any one of a number of devices which generate serial digital data. In a similar manner, the computer 24 which has been described as being connected to the receiver unit 14 may be replaced by any one of a number of devices which utilize serial digital data.

In the primary embodiment of the invention, the transmitter unit 12 is connected to the receiver unit 14 via telephone lines 22, 23. The receiver unit 14 which is shown in Fig. 2 is connected to the computer 24 via the lead 216 and the computer 24 receives the serial data which has been generated by the computer 18 in a manner which will be presently described. The serial data interface 16 is connected to registers 1 through N, numbered 30, 32, 34, 36, 38, via leads 40, 42, 44, 46, 48, 50, 52 and queued via divider circuit module 230 via the leads 232, 234, 236, 238, 240. The divider circuit module 230 divides the serial data signal into a preselected number of signals. The number of signals, or portions, is designated for purposes of illustration by the capital letter N in Figs. 1 and 2 and throughout the following description. The range of preferred numerical values for the number of portions N is a function of the type of data to be transmitted and the transmission speeds required. By way of example, Table 1 presents typical values of N for digital data transmission using the system 10 for various types of data transmission including: computer generated data, cable television transmissions, video telephone transmissions, and digitized video data transmissions such as entertainment data (moving pictures) transmitted by or for the telephone carrier company.

Table 1 : Number of Signals (N) Produced by Divider Circuit Module

It should be understood that the numerical values of N presented above are by way of example only and do not constitute a limitation on any aspect of the present invention.

A serial data is stored in the registers 30, 32, 34, 36, 38. As is shown in Fig. 1, for purposes of illustration, the first four of the N parallel registers 30, 32, 34, 36, 38 are numbered 1, 2, 3, 4 and the last register is numbered N. This numbering convention is followed ihroughout the various figures, it being understood that while only five registers 30, 32, 34, 36, 38 have been shown, there are a total of N register!;. Each of the parallel registers 30, 32, 34, 36, 38 is connected to a solid state switch 54, 56, 58, 60, 62 via a lead 64, 66, 68, 70, 72. A plurality of N frequency generators which incorporate voltage controlled oscillators 74, 76, 78, 80, 82 is provided, as is shown in Fig. 1. The total number of voltage controlled oscillators 74, 76, 78, 80, 82 being equal to the number, N, of parallel registers 30, 32, 34, 36, 38. Each voltage controlled oscillator 74, 76, 78, 80, 82 generates a single carrier frequency. The voltage controlled oscillators 74, 76, 78, 80, 82 thus generate a total of N different carrier frequencies.

The individual earner frequencies are fed, one each, to the N solid state switches 54, 56, 58, 60, 62 by the leads 84, 86, 88, 90, 92. The serial data which was stored in the N parallel registers 30, 32, 34, 36, 38 interrupts the carrier frequencies, turning the carrier frequencies on and off in accordance with the serial data. The switched canier frequencies are then fed to a telephone interface module 94 by the leads 96, 98, 100, 102, 104, 106 and then to telephone lines 22, 23.

The telephone lines 22, 23 are connected to a telephone interface module 108 within the receiver unit 14 as is shown in Fig. 2. The leads 110, 112, 114, 116, 118, 120 connect the telephone interface module

108 to a plurality of N filters 122, 124, 126, 128, 130. The filters 122,

124, 126, 128, 130 may be, by way of example, bi-quad type filters.

Each of the N filters 122, 124, 126, 128, 130 is connected to a buffer 132, 134, 136, 138, 140 by way of a lead 142, 144, 146, 148, 150 and each of the buffers 132, 134, 136, 138, 140 is connected to one of a plurality of N solid state switches 152, 154, 156, 158, 160 by a lead 162,

164, 166, 168, 170. Each of the N solid state switches 152, 154, 156, 158, 160 receives voltage from a conventional voltage source which is designated as +V in Fig. 2 via a lead 172, 174, 176, 178, 180, 182.

The output of each of the solid state switches 152, 154, 156, 158, 160 is connected to one of the plurality of N parallel registers 184, 186, 188, 190, 192 via leads 194, 196, 198, 200, 202. Each of the registers 184, 186, 188, 190, 192 is connected to a sequence switch 204 via the leads 206, 208, 210, 212, 214 which sequences, or cascades, the data from the registers 184, 186, 188, 190, 192 in the order of 1 tirough N. The output of the parallel registers 184, 186, 188, 190, 192 is ; ow in the form of serial data which is a duplicate of the serial data geneπited by the computer 18. The output of the registers 184, 186, 188, 190, 192 may be fed to a computer 24 or any other device such as a television monitor, via the leads 216, 218, 220, 222, 224.

As is shown in Fig. 3, by way of example, ea;h voltage controlled oscillator 74, 76, 78, 80, 82 in the transmitter unit 12 incorporates a Model Number LM 566 solid state voltage controlled oscillator function generator 300 such as the unit manufactured by the National Semiconductor Corp. of Santa Clara, CA. Each individual frequency generated by the voltage controlled oscillators 74, 76, 78, 80, 82 is controlled by the setting of the potentiometer R5 to a preselected value in order to produce the desired frequency. The desired frequency output signal leaves the voltage controlled oscillator 74 via the lead 84. The various pins of the voltage controlled oscillator unit 300 are numbered as pins 1 through 8 in Fig. 3 and are connected as follows: pin 1 is connected to pin 3 by leads 302, 303, 304, 306 and a resistor 308, which is designated as Rl. Pin 3 is also connected to the lead 84. Pin 1 is connected to a source of negative voltage, designated as -V, via a lead

310 and to ground via lead 312 and a capacitor 314, designated Cl . Pin 4 is connected to ground via a lead 316 and a resistor 318, designated as R2. Pin 5 is connected to a potentiometer 320, designated as R5, via a lead 322. Pin 5 is connected to pin 6 via leads 324, 326, and a capacitor 328. Pin 6 is connected to Pin 7 via a resistor 330, designated as R3, and leads

332, 334. Pin 7 is connected to a source of positive voltage, designated as + V, via leads 336, 338 and to a transistor 340 via leads 342, 344 and capacitors 346, 348, designated as C4 and C5. The base 350 of the transistor 340 is connected to pin 2 via a resistor 352, designated R4 and lead 354. Pin 8 is connected to a source of positive voltage, designated as

+ V, via a lead 356, 358 and is also connected to ground via a capacitor 360, designated as C2, and lead 362.

Fig. 4 shows solid state switch 54 which is typical of the solid state switches 56, 58, 60, 62 of the transmitter unit 12 of Fig. 1. The solid state switch 54, which by way of example, comprises Model Number

CD4066 solid state switch manufactured by the Harris Corp. of Melbourne, FL typically receives data from one of the parallel registers 30 via the lead 64 and receives a frequency signal via the lead 84 and provides a signal containing data encoded on the carrier frequency via the lead 9(5.

Fig. 5 shows a schematic diagram of the telephone: interface module 94 of the transmitter unit 12 of Fig. 1 which incorporates an optical coupler 500, such as Model Number AN 25, manufactured by the Hanis

Coφoration of Melbourne, FL. Pin 1 of the telephone interface module 94 is connected to lead 106 and pins 4 and 5 are connected to telephone lines 22, 23. Pin 5 is connected to telephone line 22. Pin 4 is connected to a source of positive voltage, designated as + V which may be in the order of 10 volts and is also connected to telephone line 23.

Fig. 6 is a schematic diagram of the telephone inte:rface 108 of the receiver unit 14 of Fig. 2, which also incorporates an optical coupler 600 which is identical to the optical coupler 500 of Fig. 5. As is shown in Fig. 6, telephone line 23 is connected to pin 1 and telephone line 22 is connected to pin 2. Pin 2 is connected to ground via lead 602. Pin 4 is connected to ground via lead 604. Pin 5 is connected to lead 110 and is also connected to a source of positive voltage, designated as -I- V, via the resistor 606 and lead 608.

Fig. 7 shows a solid state switch 152 which is typical of the solid state switches 154, 156, 158, 160 of the receiver unit 14 of Fig. 2.

The solid state switch 152, which by way of example, comprises Model

Number CD4066 solid state switch, as described above in connection with

Fig. 4, receives data from one of the buffers 132 via the lead 162 and sends data to one of the parallel registers 184 via the lead 194. As is shown in Fig. 7, lead 162 is connected to pin 13. Lead 194 is connected to pin 1 and pins 2, 4, 8, 10 are connected to a source of positive voltage, designated +V via the lead 702. Fig. 8 shows a filter 122 and a buffer 132. The filter comprises three operational amplifiers 800, 802, 804 which preferably are part of a 3/4 model number NE5514, quad type linear operational amplifier manufactured by Phillips Electronics, North America, Corp. of Sunnyvale, CA. The buffer 132 incorporates operational amplifier 806 and preferably comprises 1/4 model number NE 5514 manufactured by Phillips

Electronics, North America, Corp. of Sunnyvale, CA. The buffer 132 is thus located as close as possible to the filter 122 to reduce the possibility of unwanted crosstalk. The filter 122 receives inputs via the lead 112.

Pin 1 of operational amplifier 800 is connected to pin 3 via leads 836, 808, and resistor 810, which is designated R3. Lead 112 is connected to pin 2 via resistor 812 which is designated as Rl . Pin 2 is also connected to pin 7 via leads 814, 816 and resistor 818, which is designated as R2. Pin 1 is also connected to pin 6 via leads 820, 822 and resistor 824, which is designated R5. The resistor 824 is connected to the resistor 818 via capacitor 826, which is designated as Cl .

Pin 4 of operational amplifier 802 is connected to a source of positive voltage, which is designated as +V, via the led 828. Pin 5 of operational amplifier 802 is connected to pin 11 via leads 830, 832 and to pin 10 of operational amplifier 804 via lead 834. Resistor 810 is connected to pin 8 of operational amplifier 804 via lead 838 and resistor 840, which is designated as R4. Pin 8 is also connected to pin 9 via leads 842, 844, 846 and capacitor 848. Pin 8 is also connected to pin 7 of operational amplifier 802 via leads 850, 852 and resistor 854 which is designated as

R6. Pin 7 of operational amplifier 802 is connected to pin 12 of operational amplifier 806 via leads 856, 858 and capacitor 860, which is designated as C3. Pin 13 is connected to pin 14 via lead 862.

During operation of the system 10, carrier frequency signals are generated in the transmitter unit 12 by the voltage controlled oscillators

74, 76, 78, 80, 82 and the carrier frequency signals are fed through the solid state switches 54, 56, 58, 60, 62 to the telephone lines 22, 23. As shown in Fig. 1, there are a preselected number of carrier frequency signals which are designated for reference as frequency number one through frequency number N, with frequency number one being the lowest frequency and frequency N being the highest frequency. Each individual frequency signal is generated in an individual voltage controlled oscillator 74, 76, 78, 80, 82 and consequently a total of N voltage controlled oscillators 74, 76, 78, 80, 82 are provided, as has been previously described. Similarly, there are a total of N solid state switches 54, 56, 58,

60, 62 and each individual carrier frequency signal is fed to an individual solid state switch 54, 56, 58, 60, 62 via the leads 84, 86, 88, 90, 92. When the system 10, according to the present invention, is used with telephone transmission lines, all of the carrier frequency signals are in the normal range of frequencies for voice transmission which is typically in the range of 300 to 4,000 Hz. When cable television transmission is utilized a wider range of frequencies may be utilized.

Serial data sent from the computer 18 is divided into a total of N signals and each signal is stored in a parallel register 30, 32, 34, 36, 38. Each of the parallel registers 30, 32, 34, 36, 38 is connected to one of the solid state switches 54, 56, 58, 60, 62 and the data collected in the registers 30, 32, 34, 36, 38 is dumped once each second to the control pins of the solid state switches 54, 56, 58, 60, 62. This process turns the carrier frequencies on and off in accordance with the stored data. The individual frequency signals numbers one through N which have thus been modulated by the serial data are transmitted over the telephone lines 22, 23. In the receiver unit 14, the frequency signals numbers one through N are filtered to separate frequencies numbers one through N by means of a plurality of N individual filters 122, 124, 126, 128, 130. The filtered signals are applied to the control pins of a plurality of N solid state switches 152, 154, 156, 158, 160 which switch DC current and feed the switched DC current to a plurality of N parallel registers 184, 186, 188,

190, 192. The data in the N parallel registers 184, 186, 188, 190, 192 is switched sequentially onto the serial input of computer 24 or a similar unit which utilizes serial data. In both the receiver 12 and the transmitter 14 conventional buffers, amplifiers and interfaces may be provided. The (details of construction of these devices is known in the art and therefore these details have not been illustrated other than to indicate that commercially available components may be utilized.

The apparatus 10 according to the present invention may be utilized with a range of different interfaces buffers and amplifiers and with different frequency ranges for the following applications: computer modems, telephone data transmission of video for cable television, and video telephones. Each of these applications may utilize a different quantity of channels designated as N in the above description. Fo ^• example cable television may utilize N greater than 5000.

As previously described, the data is dumped from the registers 30, 32, 34, 36, 38 at a rate of once per second. A checksum function may be performed on the data to verify the accuracy of the transmission by changing the transmission rate to once each one-half second and then comparing the data with the original data transmitted.

The overall data transmission throughput rate can be increased by transmitting at one-quarter (1/4), one-eighth (1/8), one sixty- fourth (1/64) or another preselected fraction of a second.

The present invention provides a process for the efficient high speed transmission of a serial digital information signal in a medium at a rate defmed as the digital transmission rate comprising the following steps. Dividing the serial digital information signal into a predetermined number of parallel data signals with the predetermined number of data signals designated as N. Storing each of the said N data signals in one of a plurality of registers. Generating a plurality of N frequency signals. Receiving the plurality of frequency signals in a plurality of switches.

Receiving the plurality of data signals from the registers in the switches. Switching the frequency signals on and off responsive to the data signals. Transmitting the switched frequency signals onto a transmission medium as a rate defmed as the digital transmission rate. Receiving the switched frequency signals from the medium in a receiver unit. Filtering the switched frequency signals into N individual frequency signals. Receiving the N individual frequency signals in a second plurality of switches. Generating N individual signals. Receiving the N individual signals in the second plurality of switches. Switching said N individual signals responsive to the N individual frequency signals. Cascading the N individual signals which have been switched responsive to the N individual frequency signals thereby resulting in a serial data signal which is a duplicate of the original serial digital information signal.

In Figs. 3, 4, 5, 6, and 7, pins which have been illustrated as being not connected to a lead are left open.

The system 10, according to the present invention, thus provides the following advantages over conventional modem devices. The limitations of conventional modem devices are primarily a result of the limitations of the bandwidth of audio systems which are typically 300 to 4,000 Hz. This bandwidth results in a theoretical maximum data transmission rate which is in the order of 30 kilobits per second . Current modem devices do not exceed transmission rates in the order of 28.8 kilobits per second and are thus operating close to the theoretical maximum data transmission rates. With the system 10, according to the present invention, the maximum transmission rate is not limited by the bandwidth considerations of the conventional modem devices but is instead limited by the following two factors. The first factor is the number of "on" and "off" events that can be sustained and counted at each of the frequencies (one through N). Data transmission tests with off-the-shelf components and hand wired circuitry have demonstrated data transmission rates greater than 110 kilobits per second. The use of custom integrated circuitry and printed wiring circuitry for the system 10, as described herein, will result in even greater rates of data transmission.

The second factor governing data transmission rate:_* using the system 10 is the number of frequencies that can be sustained within the available bandwidth. Test performed using the audio bandwidth of 300 to 4,000 Hz and using off-the-shelf components and hand wired circuitry have demonstrated a sustained frequency density of 64 frequencies. The use of custom integrated circuitry and printed wiring circuitry for the jiystem 10, as described herein, will result in even greater frequency densities. When the system 10 is compared with a conventional modem device, the use of the 64 individual frequencies in the system 10 has the effect of providing an effective increase in the available bandwidth which is generally equal to the number of individual frequencies utilized. Thus the system 10 using, for example, 64 individual frequencies has the effect of increasing the theoretical maximum data transmission rate by a factor which is approximately 64 times.

The foregoing specific embodiments of the present invention, as set forth in the specification, are for illustrative purposes only. Various changes and modifications may be made within the spirit and scope of the invention.

What is claimed is:

Claims

1. A split harmonic frequency modulation data transmission system for transmission of digital information in a medium at a rate defined as the digital transmission rate comprising: carrier frequency signal generating means, switching means with said switching means capable of modulating said carrier frequency signal with said digital information and switching said carrier frequency signal into said medium at a rate equal to said digital transmission rate.

2. A split harmonic frequency modulation data transmission system for transmission of a serial digital information signal in a medium at a rate defmed as the digital transmission rate comprising: division means for division of said serial digital information signal resulting in N parallel output signals, frequency generating means for generating N different earner frequencies, switching means for switching said N carrier frequencies into said N parallel output signals, resulting in N outputs of N carrier frequencies each modulated by said N digital information signals, and parallel data transmission means for parallel data transmission of said N outputs of said switching means at said data transmission rate.

3. A split harmonic frequency modulation data transmission system according to Claim 2 further comprising: filter means connected to said parallel transmission means for filtering said N outputs of said switching means into N filtered signals with said frequencies of said N filtered signals corresponding to said

N earner frequencies, second switch means connected to said filter means and capable of switching N signals responsive to said N filtered signals, and cascade means connected to said switch means for cascading said N parallel signals into a single serial data signal.

4. A split harmonic frequency modulation data transmission system according to Claim 3 further comprising: a plurality of buffer means connected between said filter means and said second switch means.

5. A split harmonic frequency modulation data transmission system according to Claim 3 further comprising: a plurality of register means connected between said cascade switch means and said second switch means.

6. A split harmonic frequency modulation data transmission system according to Claim 2 in which said parallel data transmission means operates at said digital transmission rate.

7. A split harmonic frequency modulation data transmission system according to Claim 2 in which said parallel data transmission means operates at two times said digital rate.

8. A split harmonic frequency modulation data transmission system according to Claim 2 in which said parallel data transmission means operates at a preselected multiple times said digital rate.

9. A split harmonic frequency modulation data transmission system according to Claim 2 further comprising checksum means for checking said data transmitted by said parallel data trinsmission means.

10. A split harmonic frequency modulation data transmission system according to Claim 9 in which said checksum means operates at a rate of one-half of said data transmission rate.

11. A split harmonic frequency modulation data transmission system according to Claim 2 in which said transmission medium comprises digitized video movie signals on telephone lines.

12. A split harmonic frequency modulation data transmission system according to Claim 2 in which said transmission medium comprises digitized telephone signals including images on telephone lines.

13. A split harmonic frequency modulation data transmission system according to Claim 2 in which said transmission medium comprises digital data and television signals on cable television lines.

14. A split harmonic frequency modulation data transmission system for transmission of serial digital information in a medium at a rate defmed as the digital transmission rate comprising: division means for dividing said serial digital signal into predetermined number of parallel signals with said predetermined number of signals designated as N, a plurality of register means for storing each of said N signals in one of said register means, a plurality of frequency generating means for generating a plurality of N frequency signals, a plurality of switch means for receiving said plurality of frequency signals and receiving said plurality of signal from said register means and switching said frequency signals on and off responsive to said data signals, transmission means connected to said switch means for transmission of said switched frequency signals, filter means connected to said transmission neans for receipt of said switched frequency signals and for filtering said switched frequency signals into N individual frequency signals, second switch means connected to said filter means for switching N signals responsive to said N frequency signals and cascade switch means connected to said second switch means for cascading said N signals resulting in a serial data signal.

15. A process for transmission of a serial digital information signal in a medium at a rate defined as the digital transmission rate comprising the steps: dividing said serial digital information signal into a predetermined number of parallel data signals with said predetermined number of data signals designated as N, storing each of said N data signals in one of a plurality of registers, generating a plurality of N frequency signals, receiving said plurality of frequency signals in a plurality of switches, receiving said plurality of data signals from said registers in said switches, switching said frequency signals on and off responsive to said data signals, transmitting said switched frequency signals onto a transmission medium at a rate defmed as the digital transmission rate, receiving said switched frequency signals from said medium, filtering said switched frequency signals into N individual frequency signals, receiving said N individual frequency signals in a second plurality of switches, generating N individual signals, receiving said N individual signals in said second plurality of switches, switching said N individual signals responsive to said N individual frequency signals, cascading said N individual signals which have been switched responsive to said N individual frequency signals, signals thereby resulting in a serial data signal which is a duplicate of said serial digital information signal.

16. A split harmonic frequency modulation data transmission system for transmission of digital information in a medium at a rate defined as the digital transmission rate according to Claim 1 further comprising: computer means, and in which said medium comprises telephone line means and with said telephone line means connected to said computer means.

17. A split harmonic frequency modulation data transmission system for transmission of digital information in a medium at a rate defined as the digital transmission rate according to Claim 2 further comprising: computer means, and in which said medium comprises telephone line means and with said telephone line means connected to said computer means.

18. A split harmonic frequency modulation data transmission system for transmission of digital information in a medium at a rate defined as the digital transmission rate according to Claim 14 further comprising: first computer means for generating said serial digital information with said first computer means connected to said division means.

19. A split harmonic frequency modulation data transmission system for transmission of digital information in a medium at a rate defined as the digital transmission rate according to Claim 18 further comprising: second computer means for receiving said serial digital information with said second computer means connected to said cascade switch means.

20. A process for transmission of a serial digital information signal in a medium at a rate defined as the digital transmission rate according to Claim 15 further comprising the steps: generating a serial digital information s gnal in a computer, with said step of generating serial digital informatioi signal in a computer preceding said step of dividing said serial digital information signal into a predetermined number of parallel data signals, and receiving said serial data signal, which is a duplicate of said serial digital information signal, in a computer, with said step of receiving said serial data signal in a computer following said step of cascading said N individual signals.