WO1997004562A1 - Point-to-multipoint arbitration - Google Patents

Point-to-multipoint arbitration Download PDF

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Publication number
WO1997004562A1
WO1997004562A1 PCT/US1996/011921 US9611921W WO9704562A1 WO 1997004562 A1 WO1997004562 A1 WO 1997004562A1 US 9611921 W US9611921 W US 9611921W WO 9704562 A1 WO9704562 A1 WO 9704562A1
Authority
WO
WIPO (PCT)
Prior art keywords
bandwidth
data
switch
point
request
Prior art date
Application number
PCT/US1996/011921
Other languages
French (fr)
Inventor
Thomas A. Manning
Stephen A. Caldara
Stephen A. Hauser
Matthias L. Colsman
Original Assignee
Fujitsu Network Communications, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Network Communications, Inc. filed Critical Fujitsu Network Communications, Inc.
Priority to PCT/US1996/011921 priority Critical patent/WO1997004562A1/en
Priority to JP9506866A priority patent/JPH11510003A/en
Priority to AU67124/96A priority patent/AU6712496A/en
Publication of WO1997004562A1 publication Critical patent/WO1997004562A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/18End to end
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356Indirect interconnection networks
    • G06F15/17368Indirect interconnection networks non hierarchical topologies
    • G06F15/17375One dimensional, e.g. linear array, ring
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    • H04L12/46Interconnection of networks
    • H04L12/4604LAN interconnection over a backbone network, e.g. Internet, Frame Relay
    • H04L12/4608LAN interconnection over ATM networks
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    • H04L12/5602Bandwidth control in ATM Networks, e.g. leaky bucket
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    • H04L41/0896Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities
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    • H04L49/153ATM switching fabrics having parallel switch planes
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    • H04Q11/00Selecting arrangements for multiplex systems
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    • H04Q11/0478Provisions for broadband connections
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    • H04W28/00Network traffic management; Network resource management
    • H04W28/02Traffic management, e.g. flow control or congestion control
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    • H04W28/14Flow control between communication endpoints using intermediate storage
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    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
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    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5685Addressing issues
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/046Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence

Definitions

  • the present invention is generally related to telecommunications networks, and more particularly to point- to-multipoint arbitration, bandwidth allocation and delay management within an asynchronous transfer mode switch.
  • Telecommunications networks such as asynchronous transfer mode (“ATM") networks are used for transfer of audio, video and other data.
  • ATM networks deliver data by routing data units such as ATM cells from source to destination through switches.
  • Switches include input/output ("I/O") ports through which ATM cells are received and transmitted. The appropriate output port for transmission of the cell is determined based on the cell header.
  • One problem associated with ATM networks is loss of cells.
  • Cells are buffered within each switch before being routed and transmitted from the switch. More particularly, switches typically have buffers at either the inputs or outputs of the switch for temporarily storing cells prior to transmission. As network traffic increases, there is an increasing possibility that buffer space may be inadeguate and data lost. If the buffer size is insufficient, cells are lost. Cell loss causes undesirable interruptions in audio and video data transmissions, and may cause more serious damage to other types of data transmissions.
  • a cell In point-to-multipoint transmission a cell is transmitted from a single input to multiple outputs across the switch fabric. In order to execute such a transmission, each of the designated outputs must be available to receive the cell from the transmitting input, i.e., have adequate buffer space. However, the likelihood that each of the designated outputs will be simultaneously prepared to receive the cell when the cell is enqueued decreases as traffic within the switch increases. In some circumstances this may result in delayed transmission. In the worst case, cells will be delayed indefinitely and incoming cells for that connection are discarded. It would therefore be desirable to facilitate point-to-multipoint transmission by reducing or eliminating delays and cell loss.
  • ATM Asynchronous Transfer Mode
  • the ATM switch includes a bandwidth arbiter, a plurality of input ports and a plurality of output ports.
  • Each input port within the switch includes a switch allocation table ("SAT") which grants bandwidth to connections.
  • SAT includes a plurality of sequentially ordered cell time slots and a pointer which is directed to one of the slots.
  • the SAT pointers at each input port are synchronized such that, at any given point in time, each of the pointers is directed to the same slot location in the respective SAT with which the pointer is associated.
  • Each connection is assigned bandwidth types based on the traffic type associated with the connection.
  • bandwidth There are two types of bandwidth to grant within the switch: allocated and dynamic.
  • Allocated bandwidth is bandwidth which is "reserved" for use by the connection to which the bandwidth is allocated.
  • a connection with allocated bandwidth is guaranteed access to the full amount of bandwidth allocated to that connection.
  • traffic types that need deterministic control of delay are assigned allocated bandwidth.
  • Dynamic bandwidth is bandwidth which is "shared" by any of various competing connections. Because dynamic bandwidth is a shared resource, there is generally no guarantee that any particular connection will have access to a particular amount of bandwidth. For this reason dynamic bandwidth is typically assigned to connections with larger delay bounds. Other connections may be assigned a combination of dynamic and allocated bandwidth. Any cell time where the SAT entry is not valid or where the scheduling list does not contain a cell thus represents an unassigned bandwidth opportunity.
  • the bandwidth arbiter To execute point-to-multipoint operation the bandwidth arbiter maintains a list of connections and bit vectors indicating the designated destination ports for a point-to- multipoint cell. The list maintained by the bandwidth arbiter is then compared to an unassigned output port bit vector generated from the SATs to determine matches there between at which point-to-multipoint transmission may be made by utilizing the instantaneously unused bandwidth within the switch. The bandwidth arbiter may also assign priority to connections in the list.
  • Switch efficiency is increased by utilizing instantaneously unused bandwidth.
  • available bandwidth decreases and collisions become more frequent. Nevertheless, unutilized bandwidth will be present from time to time, and such bandwidth is wasted if not utilized. Therefore, point-to-multipoint transmissions which would otherwise be dropped are made using the otherwise unutilized bandwidth, and switch efficiency is increased.
  • Fig. 1 is a block diagram of a switch which facilitates point-to-multipoint operation
  • Fig. 2 is a block diagram which illustrates operation of the switch allocation tables of Fig. 1;
  • Fig. 3 is a block diagram which illustrates operation of the list maintained by the bandwidth arbiter
  • Fig. 4 is a flow diagram which illustrates matching between the request bit vectors and the unassigned output port bit vector
  • Fig. 5 is a block diagram which illustrates round-robin allocation of bandwidth to TSPP requests.
  • Fig. 6 is a flow diagram which illustrates a method of point-to-multipoint bandwidth arbitration.
  • the switch includes an NxN switch fabric 10, a bandwidth arbiter 12, a plurality of to switch port processor subsystems ("TSPP") 14, a plurality of To Switch Port Processor ASICs 15, a plurality of from switch port processor subsystems ("FSPP") 16, a plurality of To Switch Port Processor ASICs 17, a plurality of multipoint topology controllers (“MTC”) 18 and a plurality of switch allocation tables ("SAT") 20.
  • the NxN switch fabric which may be an ECL crosspoint switch fabric, is used for cell data transport, and yields Nx670 Mbps throughput.
  • the bandwidth arbiter controls switch fabric interconnection dynamically schedules momentarily unused bandwidth and resolves multipoint-to-point bandwidth contention.
  • Each TSPP 14 schedules transmission of cells 22 to the switch fabric from multiple connections. Not shown are the physical line interfaces between the input link and the TSPP 14.
  • the FSPP 16 receives cells from the switch fabric and organizes those cells onto output links. Not shown are the physical line interfaces between the output link and the FSPP 16.
  • the switch allocation table controls crossbar input to output mapping, connection bandwidth and the maximum delay through the switch fabric.
  • a cell 22 In order to traverse the switch, a cell 22 first enters the switch through an input port 24 and is buffered in a queue 26 of input buffers. The cell is then transmitted from the input buffers to a queue 28 of output buffers in an output port 30. From the output port 30, the cell is transmitted outside of the switch, for example, to another switch.
  • each input port 24 includes a TSPP 14, and each output port 30 includes an FSPP 16.
  • the TSPPs and FSPPs each include cell buffer RAM 32 which is organized into respective queues 26, 28. All cells in a connection pass through a unique queue at each port, one at the TSPP and one at the FSPP, for the life of the connection. The queues thus preserve cell ordering. This strategy also allows quality of service ("QoS”) guarantees on a per connection basis.
  • QoS quality of service
  • Request and feedback messages are transmitted between the TSPP and FSPP to implement flow control.
  • Flow control prevents cell loss within the switch, and is performed after arbitration, but before transmission of the data cell.
  • Flow control is implemented on a per connection basis.
  • each TSPP within the switch includes an SAT 20 which maps bandwidth allocation.
  • the SAT is the basic mechanism behind cell scheduling.
  • Each SAT 20 includes a plurality of sequentially ordered cell time slots 50 and a pointer 52 which is directed to one of the slots. All of the pointers in the switch are synchronized such that at any given point in time each of the pointers is directed to the same slot location in the respective SAT with which the pointer is associated, e.g., the first slot.
  • the pointers are advanced in lock-step, each slot being active for 32 clock cycles at 50 MHz.
  • the TSPP uses the corresponding entry 51 in the SAT to obtain a cell for launching into the switch fabric 10 and to begin flow control.
  • Each of the counters is incremented once for each cell time, and the pointer returns to the first slot after reaching the last slot.
  • the pointers scan the SATs approximately every 6msec, thereby providing a maximum delay for transmission opportunity of approximately 6msec.
  • the delay can be decreased by duplicating a given entry at a plurality of slots within the SAT.
  • the maximum delay that an incoming cell will experience corresponds to the number of slots between the pointer and the slot containing the entry which specifies the destination of the cell.
  • the duplicate entries are therefore preferably spaced equidistantly within the SAT. Maximum delay for transmission opportunity therefore corresponds to the frequency and spacing of duplicate entries within the SAT.
  • the amount of bandwidth allocated to a particular connection corresponds to the frequency at which a given entry appears in the SAT.
  • Each slot 50 provides 64Kbps of bandwidth. Since the pointers cycle through the SATs at a constant rate, the total bandwidth allocated to a particular connection is equal to the product of 64Kbps and the number of occurrences of that entry. For example, connection identifier "g (4,6)," which occurs in five slots, is allocated 320Kbps of bandwidth.
  • instantaneously unused bandwidth 60 will become available in the switch during operation. Such instantaneously unused bandwidth may occur because that bandwidth, i.e., that entry in the SAT, has not been allocated to any connection. Such bandwidth is referred to as "unallocated bandwidth.” Unused bandwidth may also occur when the SAT entry is allocated to a connection, but the connection does not have a cell enqueued for transmission across the switch. Such bandwidth is referred to as "unused- allocated" bandwidth. Both types of unused bandwidth are collectively referred to as "dynamic" bandwidth, and some connections, such as connections assigned an Available Bit Rate (“ABR”) QoS level utilize such dynamic bandwidth. The bandwidth arbiter operates to increase efficiency within the switch by granting dynamic bandwidth to such connections.
  • ABR Available Bit Rate
  • a connection has no allocated bandwidth, or if the arriving cell rate is greater than the allocated rate a ⁇ indicated by an input queue threshold, dynamic bandwidth may be employed.
  • the point-to-multipoint transmission described in the SAT entry 51 is entered into a list 53 maintained by the bandwidth arbiter as a "request" in order that the point-to- multipoint transmission can be made at the next available opportunity.
  • the list 53 maintained by the bandwidth arbiter includes two fields for storing point-to-multipoint transmissions which utilize dynamic bandwidth.
  • a connection identifier field 56 is employed to store the connection identifier, e.g., "a,” and hence also indicates the port of origin.
  • a bit vector field 58 is employed to indicate the designated output ports for transmission.
  • the bit vector field is a bit mask which, in the case of an 8X8 switch, includes eight bits, each bit corresponding to a specific output port.
  • the list 53 contains "00000110" in the bit vector field (where the port identification numbers start from "1" rather than from "0") .
  • the logic "1" values in the bit vector field indicate destination output ports "2" and "3,” and the logic "0" values indicate non-destination output ports.
  • the connections and bit vectors in the list 53 are entered sequentially in the order in which they are received.
  • the bandwidth arbiter tests for matches between the list and dynamic bandwidth. More particularly, the connection identifier 56 and bit vector 58 corresponding to "a (2,3)" is entered into the list 53 so that the cell will be transmitted when a dynamic bandwidth opportunity becomes available for simultaneous transmission to each output port designated by the request.
  • the bandwidth arbiter first calculates an unassigned output port bit vector by ORing all allocated bit vectors from the SAT and toggling each resultant bit to provide a single unassigned output port bit vector.
  • the unassigned output port bit vector is then matched against each request. For a particular input port the entered requests are tested in parallel for a match, and for simplification matching may be made against only the first four requests in the list. If all of the bits in a request match the unassigned bit vector, a match is made.
  • the request is subtracted from the unassigned bit vector, and the result serves as the new unassigned bit vector which indicates remaining available output ports for matching against other input port request bit vectors in the list.
  • the matched requests are transmitted and the transmitted requests are dequeued from the list.
  • a prioritization technique may be used in conjunction with the matching operation in the bandwidth arbiter in order to support switch traffic having different priority levels, such as QoS levels.
  • each TSPP defines a priority level for each submitted request.
  • priority levels could be HI and LO levels, or include greater than two levels.
  • the bandwidth arbiter attempts to match higher priority requests before attempting to match lower priority requests. Since the unassigned bit vector contains less unassigned bits as each subsequent match is made, the higher priority requests are then more likely to obtain a match and be transmitted than the lower priority requests. This higher likelihood for a match translates into a quicker response and greater bandwidth for such higher priority connections.
  • the bandwidth arbiter may grant bandwidth to requesting TSPPs by attempting to match available bandwidth on a round-robin basis. Matching is done in parallel, and granting is then attempted.
  • a pointer 67 is employed to select a TSPP with which a grant opportunity is first attempted, e.g., TSPP i + 1. After providing granting opportunities to TSPP i + 1, granting opportunities are next provided to TSPP i + 2, and so on ending with TSPP i such that granting opportunities are provided to each TSPP.
  • the pointer 67 begins with the next TSPP (here TSPP i + 2) at the next cell time. However, if the first TSPP is not able to transmit the cell in the oldest entry then the pointer 67 begins with the same TSPP (here TSPP i + 1) at the next cell time. When multiple matches are determined for a single TSPP the oldest match is selected for transmission. Thus, every point-to-multipoint connection is guaranteed to receive bandwidth.
  • HI and LO prioritization When HI and LO prioritization is employed, separate HI and LO round-robin operations are executed to grant bandwidth. Each of the round-robin operations operates in the same fashion, but matching is not attempted on the LO priority requests until a match has been attempted with each of the HI priority requests. Hence, a separate round robin operation is executed for each priority level.
  • a portion of unassigned bandwidth i.e., unallocated SAT entries, may be put aside for dedication to point-to-multipoint transmissions.
  • This technique provides increased opportunity for point-to-multipoint connections which specify a greater number of output ports to be matched and transmitted, and prevents connections from becoming stuck or starved for bandwidth.
  • Fig. 6 illustrates a method of point-to-multipoint arbitration. In a first step a bit vector representation of the SAT entry is entered 68 into the list as a connection identifier and output bit vector. In the next cell time, the allocated bit vectors are ORed and used to generate 70 the unassigned bit vector.
  • N is the oldest request in the list. If no match is made, N is incremented 74 and an attempt is made to match the unassigned bit vector with request N+l, i.e., the next oldest request in the list. If a match is made, the bit vector of the matched request is subtracted 76 from the unassigned bit vector to provide an updated unassigned bit vector. The cell corresponding to the matched request is then transmitted 78, and a determination 80 is made as to whether the end of the list maintained by the bandwidth arbiter has been reached.

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Abstract

An Asynchronous Transfer Mode switch and method which facilitates point-to-multipoint transmission are disclosed. The switch includes a bandwidth arbiter (12), and each input port (24) within the switch includes a switch allocation table ('SAT') (20) which controls bandwidth allocation between input and output ports. Each SAT (20) includes a plurality of sequentially ordered cell time slots and a synchronized pointer (52) which is directed to one of the slots such that at any given time each of the pointers is directed to the same slot location in the respective SAT (20) with which the pointer is associated. The list (53) maintained by the bandwidth arbiter (12) is then compared to an unassigned output port bit vector generated from the SATs to determine matches therebetween, at which point-to-multipoint transmission may be made by utilizing instantaneously unused bandwidth within the switch while arbitration distributes bandwidth among competing point-to-multipoint connections.

Description

POINT-TO-MULTIPOINT ARBITRATION FIELD OF THE INVENTION The present invention is generally related to telecommunications networks, and more particularly to point- to-multipoint arbitration, bandwidth allocation and delay management within an asynchronous transfer mode switch.
RELATED APPLICATION A claim of priority is made to provisional application
60/001,498 entitled COMMUNICATION METHOD AND APPARATUS, filed July 19, 1995.
BACKGROUND OF THE INVENTION Telecommunications networks such as asynchronous transfer mode ("ATM") networks are used for transfer of audio, video and other data. ATM networks deliver data by routing data units such as ATM cells from source to destination through switches. Switches include input/output ("I/O") ports through which ATM cells are received and transmitted. The appropriate output port for transmission of the cell is determined based on the cell header.
One problem associated with ATM networks is loss of cells. Cells are buffered within each switch before being routed and transmitted from the switch. More particularly, switches typically have buffers at either the inputs or outputs of the switch for temporarily storing cells prior to transmission. As network traffic increases, there is an increasing possibility that buffer space may be inadeguate and data lost. If the buffer size is insufficient, cells are lost. Cell loss causes undesirable interruptions in audio and video data transmissions, and may cause more serious damage to other types of data transmissions.
In point-to-multipoint transmission a cell is transmitted from a single input to multiple outputs across the switch fabric. In order to execute such a transmission, each of the designated outputs must be available to receive the cell from the transmitting input, i.e., have adequate buffer space. However, the likelihood that each of the designated outputs will be simultaneously prepared to receive the cell when the cell is enqueued decreases as traffic within the switch increases. In some circumstances this may result in delayed transmission. In the worst case, cells will be delayed indefinitely and incoming cells for that connection are discarded. It would therefore be desirable to facilitate point-to-multipoint transmission by reducing or eliminating delays and cell loss.
SUMMARY OF THE INVENTION An Asynchronous Transfer Mode ("ATM") switch and method which facilitate point-to-multipoint transmission is disclosed. The ATM switch includes a bandwidth arbiter, a plurality of input ports and a plurality of output ports. Each input port within the switch includes a switch allocation table ("SAT") which grants bandwidth to connections. Each SAT includes a plurality of sequentially ordered cell time slots and a pointer which is directed to one of the slots. The SAT pointers at each input port are synchronized such that, at any given point in time, each of the pointers is directed to the same slot location in the respective SAT with which the pointer is associated.
Each connection is assigned bandwidth types based on the traffic type associated with the connection. There are two types of bandwidth to grant within the switch: allocated and dynamic. Allocated bandwidth is bandwidth which is "reserved" for use by the connection to which the bandwidth is allocated. Generally, a connection with allocated bandwidth is guaranteed access to the full amount of bandwidth allocated to that connection. As such, traffic types that need deterministic control of delay are assigned allocated bandwidth. Dynamic bandwidth is bandwidth which is "shared" by any of various competing connections. Because dynamic bandwidth is a shared resource, there is generally no guarantee that any particular connection will have access to a particular amount of bandwidth. For this reason dynamic bandwidth is typically assigned to connections with larger delay bounds. Other connections may be assigned a combination of dynamic and allocated bandwidth. Any cell time where the SAT entry is not valid or where the scheduling list does not contain a cell thus represents an unassigned bandwidth opportunity.
To execute point-to-multipoint operation the bandwidth arbiter maintains a list of connections and bit vectors indicating the designated destination ports for a point-to- multipoint cell. The list maintained by the bandwidth arbiter is then compared to an unassigned output port bit vector generated from the SATs to determine matches there between at which point-to-multipoint transmission may be made by utilizing the instantaneously unused bandwidth within the switch. The bandwidth arbiter may also assign priority to connections in the list.
Switch efficiency is increased by utilizing instantaneously unused bandwidth. When switch traffic increases, available bandwidth decreases and collisions become more frequent. Nevertheless, unutilized bandwidth will be present from time to time, and such bandwidth is wasted if not utilized. Therefore, point-to-multipoint transmissions which would otherwise be dropped are made using the otherwise unutilized bandwidth, and switch efficiency is increased.
BRIEF DESCRIPTION OF THE DRAWING These and other features and advantages of the present invention will become apparent from the following detailed description of the drawing in which:
Fig. 1 is a block diagram of a switch which facilitates point-to-multipoint operation;
Fig. 2 is a block diagram which illustrates operation of the switch allocation tables of Fig. 1;
Fig. 3 is a block diagram which illustrates operation of the list maintained by the bandwidth arbiter;
Fig. 4 is a flow diagram which illustrates matching between the request bit vectors and the unassigned output port bit vector;
Fig. 5 is a block diagram which illustrates round-robin allocation of bandwidth to TSPP requests; and
Fig. 6 is a flow diagram which illustrates a method of point-to-multipoint bandwidth arbitration.
DETAILED DESCRIPTION OF THE DRAWING
Referring now to Fig. 1, the switch includes an NxN switch fabric 10, a bandwidth arbiter 12, a plurality of to switch port processor subsystems ("TSPP") 14, a plurality of To Switch Port Processor ASICs 15, a plurality of from switch port processor subsystems ("FSPP") 16, a plurality of To Switch Port Processor ASICs 17, a plurality of multipoint topology controllers ("MTC") 18 and a plurality of switch allocation tables ("SAT") 20. The NxN switch fabric, which may be an ECL crosspoint switch fabric, is used for cell data transport, and yields Nx670 Mbps throughput. The bandwidth arbiter controls switch fabric interconnection dynamically schedules momentarily unused bandwidth and resolves multipoint-to-point bandwidth contention. Each TSPP 14 schedules transmission of cells 22 to the switch fabric from multiple connections. Not shown are the physical line interfaces between the input link and the TSPP 14. The FSPP 16 receives cells from the switch fabric and organizes those cells onto output links. Not shown are the physical line interfaces between the output link and the FSPP 16. The switch allocation table controls crossbar input to output mapping, connection bandwidth and the maximum delay through the switch fabric.
In order to traverse the switch, a cell 22 first enters the switch through an input port 24 and is buffered in a queue 26 of input buffers. The cell is then transmitted from the input buffers to a queue 28 of output buffers in an output port 30. From the output port 30, the cell is transmitted outside of the switch, for example, to another switch. To facilitate traversal of the switch, each input port 24 includes a TSPP 14, and each output port 30 includes an FSPP 16. The TSPPs and FSPPs each include cell buffer RAM 32 which is organized into respective queues 26, 28. All cells in a connection pass through a unique queue at each port, one at the TSPP and one at the FSPP, for the life of the connection. The queues thus preserve cell ordering. This strategy also allows quality of service ("QoS") guarantees on a per connection basis.
Request and feedback messages are transmitted between the TSPP and FSPP to implement flow control. Flow control prevents cell loss within the switch, and is performed after arbitration, but before transmission of the data cell. Flow control is implemented on a per connection basis.
Referring now to Figs. 1 & 2, each TSPP within the switch includes an SAT 20 which maps bandwidth allocation. The SAT is the basic mechanism behind cell scheduling. Each SAT 20 includes a plurality of sequentially ordered cell time slots 50 and a pointer 52 which is directed to one of the slots. All of the pointers in the switch are synchronized such that at any given point in time each of the pointers is directed to the same slot location in the respective SAT with which the pointer is associated, e.g., the first slot. In operation, the pointers are advanced in lock-step, each slot being active for 32 clock cycles at 50 MHz. When the pointer is directed toward a slot, the TSPP uses the corresponding entry 51 in the SAT to obtain a cell for launching into the switch fabric 10 and to begin flow control.
Each of the counters is incremented once for each cell time, and the pointer returns to the first slot after reaching the last slot. Hence, given an SAT depth of 8k, which defines a frame, the pointers scan the SATs approximately every 6msec, thereby providing a maximum delay for transmission opportunity of approximately 6msec. The delay can be decreased by duplicating a given entry at a plurality of slots within the SAT. The maximum delay that an incoming cell will experience corresponds to the number of slots between the pointer and the slot containing the entry which specifies the destination of the cell. When multiple entries are made in order to decrease the maximum possible number of separating slots, the duplicate entries are therefore preferably spaced equidistantly within the SAT. Maximum delay for transmission opportunity therefore corresponds to the frequency and spacing of duplicate entries within the SAT.
The amount of bandwidth allocated to a particular connection corresponds to the frequency at which a given entry appears in the SAT. Each slot 50 provides 64Kbps of bandwidth. Since the pointers cycle through the SATs at a constant rate, the total bandwidth allocated to a particular connection is equal to the product of 64Kbps and the number of occurrences of that entry. For example, connection identifier "g (4,6)," which occurs in five slots, is allocated 320Kbps of bandwidth.
Significantly, instantaneously unused bandwidth 60 will become available in the switch during operation. Such instantaneously unused bandwidth may occur because that bandwidth, i.e., that entry in the SAT, has not been allocated to any connection. Such bandwidth is referred to as "unallocated bandwidth." Unused bandwidth may also occur when the SAT entry is allocated to a connection, but the connection does not have a cell enqueued for transmission across the switch. Such bandwidth is referred to as "unused- allocated" bandwidth. Both types of unused bandwidth are collectively referred to as "dynamic" bandwidth, and some connections, such as connections assigned an Available Bit Rate ("ABR") QoS level utilize such dynamic bandwidth. The bandwidth arbiter operates to increase efficiency within the switch by granting dynamic bandwidth to such connections. Referring now to Figs. 1-3, if a connection has no allocated bandwidth, or if the arriving cell rate is greater than the allocated rate aε indicated by an input queue threshold, dynamic bandwidth may be employed. In either situation the point-to-multipoint transmission described in the SAT entry 51 is entered into a list 53 maintained by the bandwidth arbiter as a "request" in order that the point-to- multipoint transmission can be made at the next available opportunity.
The list 53 maintained by the bandwidth arbiter includes two fields for storing point-to-multipoint transmissions which utilize dynamic bandwidth. A connection identifier field 56 is employed to store the connection identifier, e.g., "a," and hence also indicates the port of origin. A bit vector field 58 is employed to indicate the designated output ports for transmission. The bit vector field is a bit mask which, in the case of an 8X8 switch, includes eight bits, each bit corresponding to a specific output port. Thus, for the exemplary SAT entry "a (2,3)" the list 53 contains "00000110" in the bit vector field (where the port identification numbers start from "1" rather than from "0") . The logic "1" values in the bit vector field indicate destination output ports "2" and "3," and the logic "0" values indicate non-destination output ports. The connections and bit vectors in the list 53 are entered sequentially in the order in which they are received.
To execute point-to-multipoint operation of cells described in the list maintained by the bandwidth arbiter the bandwidth arbiter tests for matches between the list and dynamic bandwidth. More particularly, the connection identifier 56 and bit vector 58 corresponding to "a (2,3)" is entered into the list 53 so that the cell will be transmitted when a dynamic bandwidth opportunity becomes available for simultaneous transmission to each output port designated by the request.
Referring now to Figs. 1-4, to determine matches between the requests in the list maintained by the bandwidth arbiter and available bandwidth, the bandwidth arbiter first calculates an unassigned output port bit vector by ORing all allocated bit vectors from the SAT and toggling each resultant bit to provide a single unassigned output port bit vector. The unassigned output port bit vector is then matched against each request. For a particular input port the entered requests are tested in parallel for a match, and for simplification matching may be made against only the first four requests in the list. If all of the bits in a request match the unassigned bit vector, a match is made. When a match is made, the request is subtracted from the unassigned bit vector, and the result serves as the new unassigned bit vector which indicates remaining available output ports for matching against other input port request bit vectors in the list. After matching against each of the requests, the matched requests are transmitted and the transmitted requests are dequeued from the list.
A prioritization technique may be used in conjunction with the matching operation in the bandwidth arbiter in order to support switch traffic having different priority levels, such as QoS levels. To implement such prioritization each TSPP defines a priority level for each submitted request. Such priority levels could be HI and LO levels, or include greater than two levels. When prioritization is implemented the bandwidth arbiter attempts to match higher priority requests before attempting to match lower priority requests. Since the unassigned bit vector contains less unassigned bits as each subsequent match is made, the higher priority requests are then more likely to obtain a match and be transmitted than the lower priority requests. This higher likelihood for a match translates into a quicker response and greater bandwidth for such higher priority connections.
Referring now to Fig. 5, the bandwidth arbiter may grant bandwidth to requesting TSPPs by attempting to match available bandwidth on a round-robin basis. Matching is done in parallel, and granting is then attempted. A pointer 67 is employed to select a TSPP with which a grant opportunity is first attempted, e.g., TSPP i + 1. After providing granting opportunities to TSPP i + 1, granting opportunities are next provided to TSPP i + 2, and so on ending with TSPP i such that granting opportunities are provided to each TSPP. If the firεt TSPP (here TSPP i + 1) is able to transmit the cell in the oldest entry (here described by connection "a") then the pointer 67 begins with the next TSPP (here TSPP i + 2) at the next cell time. However, if the first TSPP is not able to transmit the cell in the oldest entry then the pointer 67 begins with the same TSPP (here TSPP i + 1) at the next cell time. When multiple matches are determined for a single TSPP the oldest match is selected for transmission. Thus, every point-to-multipoint connection is guaranteed to receive bandwidth.
When HI and LO prioritization is employed, separate HI and LO round-robin operations are executed to grant bandwidth. Each of the round-robin operations operates in the same fashion, but matching is not attempted on the LO priority requests until a match has been attempted with each of the HI priority requests. Hence, a separate round robin operation is executed for each priority level.
To further insure that there will be opportunities for point-to-multipoint connections to transmit, a portion of unassigned bandwidth, i.e., unallocated SAT entries, may be put aside for dedication to point-to-multipoint transmissions. This technique provides increased opportunity for point-to-multipoint connections which specify a greater number of output ports to be matched and transmitted, and prevents connections from becoming stuck or starved for bandwidth. Fig. 6 illustrates a method of point-to-multipoint arbitration. In a first step a bit vector representation of the SAT entry is entered 68 into the list as a connection identifier and output bit vector. In the next cell time, the allocated bit vectors are ORed and used to generate 70 the unassigned bit vector. An attempt is then made to match 72 the unassigned bit vector with request N in the list, where N is the oldest request in the list. If no match is made, N is incremented 74 and an attempt is made to match the unassigned bit vector with request N+l, i.e., the next oldest request in the list. If a match is made, the bit vector of the matched request is subtracted 76 from the unassigned bit vector to provide an updated unassigned bit vector. The cell corresponding to the matched request is then transmitted 78, and a determination 80 is made as to whether the end of the list maintained by the bandwidth arbiter has been reached. Flow ends if the end of the list has been reached, i.e., an attempt has been made to match the unassigned bit vector with each request in the list. If the end of the list has not been reached, N is incremented, and an attempt is made to match the next oldest request in the list with the unassigned bit vector.
Having described the preferred embodiments of the invention, it will now become apparent to one of skill in the art that other embodiments incorporating their.concepts may be used. It is felt therefore that the invention should not be limited to disclosed embodiments, but rather should be limited only by the spirit and scope of the appended claims.

Claims

CLAIMSWhat is claimed is:
1. A network switch for facilitating point-to-multipoint ' 5 transmission of a unit of data in a connection from an input port to a plurality of output ports, comprising: an allocation map operative to store a representation of dynamic bandwidth within the switch; a request map operative to store a representation of 10 units of data enqueued for point-to-multipoint transmission; and a matching operator which functions to match dynamic bandwidth to at least one representation of a unit of data enqueued for point-to-multipoint transmission via dynamic 15 bandwidth, whereby units of data enqueued for point-to-multipoint transmission are transmitted when matching dynamic bandwidth becomes available.
20 2. The network switch of claim 1 wherein said request map includes a connection field operative to store a representation of the connection associated with each of the units of data enqueued for point-to-multipoint transmission.
25 3. The network switch of claim 2 wherein said request map further includes a bit vector field operative to store a representation of the output ports to which the unit of data is to be transmitted.
30 4. The network switch of claim 3 wherein said allocation map includes a switch allocation table operative to store an « index identifier and an allocation table operative to store a bitmask which represents dynamic bandwidth within the switch, said allocation table indexed by said index
35 identifier. 5. The network switch of claim 1 wherein said matching operator functions to match dynamic bandwidth to said at least one representation of a unit of data enqueued for point-to-multipoint transmission via dynamic bandwidth sequentially starting from the first enqueued unit of data.
6. The network switch of claim 5 wherein said enqueued units of data are prioritized into at least two separate groups and said matching operator functions to match dynamic bandwidth to higher priority groups prior to matching dynamic bandwidth to lower priority groups.
7. The network switch of claim 3 wherein said matching operator generates an unassigned output port vector which is compared with said bit vector field to match dynamic bandwidth with the enqueued units of data.
8. The network switch of claim 7 wherein said request map includes a pointer for indicating which the order in which enqueued units of data are matched to dynamic bandwidth, said pointer being incremented to provide a round-robin type ordering of unit of data matching.
9. A method for point-to-multipoint transmission of a unit of data in a network switch comprising the steps of: in a first storing step, storing a representation of the unit of data in an request list; in a second storing step, storing a representation of available bandwidth in an allocation list; comparing the request list with the allocation list to determine if a match therebetween exists; and transmitting at least one unit of data for which a match is determined to exist via the available bandwidth.
10. The method of claim 9 wherein said first storing step includes the further step of storing a request map including a connection field operative to store a representation of the connection associated with each unit of data enqueued for point-to-multipoint transmission.
"5 11. The method of claim 10 wherein said first storing step includes the further step of storing a request bit vector representation of each output port to which the unit of data is to be transmitted.
10 12. The method of claim 11 wherein said second storing step includes the further step of storing a bitmask which represents dynamic bandwidth within the switch.
13. The method of claim 12 wherein said comparing step 15 includes the further step of comparing the dynamic bandwidth bitmask with the request bit vector.
14. The method of claim 13 wherein a plurality of bit request bit vectors are stored and said comparing step
20 includeε the further step of prioritizing the request bit vectors into at least two separate groups arranged from high priority to low priority, said comparing step being performed upon higher priority request bit vectors prior to said lower priority request bit vectors.
25
15. The method of claim 13 wherein the request bitmask field includes a pointer for indicating which the order in which enqueued units of data are first matched to dynamic bandwidth, said comparing step including the further step of
30 incrementing the pointer to provide a round-robin type ordering of unit of data matching.
PCT/US1996/011921 1995-07-19 1996-07-18 Point-to-multipoint arbitration WO1997004562A1 (en)

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PCT/US1996/011921 WO1997004562A1 (en) 1995-07-19 1996-07-18 Point-to-multipoint arbitration
JP9506866A JPH11510003A (en) 1995-07-19 1996-07-18 Point-to-multipoint arbitration
AU67124/96A AU6712496A (en) 1995-07-19 1996-07-18 Point-to-multipoint arbitration

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US149895P 1995-07-19 1995-07-19
US60/001,498 1995-07-19
PCT/US1996/011921 WO1997004562A1 (en) 1995-07-19 1996-07-18 Point-to-multipoint arbitration

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080079027A (en) * 2007-02-26 2008-08-29 삼성전자주식회사 Packet processing apparatus and method in network processor

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130982A (en) * 1989-06-30 1992-07-14 At&T Bell Laboratories Fully shared communications network
US5392280A (en) * 1994-04-07 1995-02-21 Mitsubishi Electric Research Laboratories, Inc. Data transmission system and scheduling protocol for connection-oriented packet or cell switching networks
US5436893A (en) * 1992-12-05 1995-07-25 Netcom Limited ATM cell switch suitable for multicast switching
US5521916A (en) * 1994-12-02 1996-05-28 At&T Corp. Implementation of selective pushout for space priorities in a shared memory asynchronous transfer mode switch
US5528588A (en) * 1994-09-14 1996-06-18 Fore Systems, Inc. Multicast shared memory
US5530695A (en) * 1993-12-15 1996-06-25 Nec Usa, Inc. UPC-based traffic control framework for ATM networks
US5535197A (en) * 1991-09-26 1996-07-09 Ipc Information Systems, Inc. Shared buffer switching module

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130982A (en) * 1989-06-30 1992-07-14 At&T Bell Laboratories Fully shared communications network
US5535197A (en) * 1991-09-26 1996-07-09 Ipc Information Systems, Inc. Shared buffer switching module
US5436893A (en) * 1992-12-05 1995-07-25 Netcom Limited ATM cell switch suitable for multicast switching
US5530695A (en) * 1993-12-15 1996-06-25 Nec Usa, Inc. UPC-based traffic control framework for ATM networks
US5392280A (en) * 1994-04-07 1995-02-21 Mitsubishi Electric Research Laboratories, Inc. Data transmission system and scheduling protocol for connection-oriented packet or cell switching networks
US5528588A (en) * 1994-09-14 1996-06-18 Fore Systems, Inc. Multicast shared memory
US5521916A (en) * 1994-12-02 1996-05-28 At&T Corp. Implementation of selective pushout for space priorities in a shared memory asynchronous transfer mode switch

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080079027A (en) * 2007-02-26 2008-08-29 삼성전자주식회사 Packet processing apparatus and method in network processor

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