WO1996008842A1 - Electronic system circuit package - Google Patents

Electronic system circuit package Download PDF

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Publication number
WO1996008842A1
WO1996008842A1 PCT/US1995/011690 US9511690W WO9608842A1 WO 1996008842 A1 WO1996008842 A1 WO 1996008842A1 US 9511690 W US9511690 W US 9511690W WO 9608842 A1 WO9608842 A1 WO 9608842A1
Authority
WO
WIPO (PCT)
Prior art keywords
lead frame
subsegment
electrically
electronic components
circuit package
Prior art date
Application number
PCT/US1995/011690
Other languages
French (fr)
Inventor
Peng-Cheng Lin
Hem P. Takiar
Original Assignee
National Semiconductor Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corporation filed Critical National Semiconductor Corporation
Priority to EP95933809A priority Critical patent/EP0729646B1/en
Priority to DE69524724T priority patent/DE69524724T2/en
Publication of WO1996008842A1 publication Critical patent/WO1996008842A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01005—Boron [B]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
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Definitions

  • the present invention relates generally to an electronic system circuit package, and more particularly to a package including a lead frame having a unique and specific design with provisions for electrically interconnecting a plurality of passive and active electronic components, at least in part directly by means of the lead frame in accordance with a specific predetermined circuit design.
  • a lead frame In integrated circuit packaging, a lead frame is typically used to support an integrated circuit within an integrated circuit package as well as to provide electrically conductive leads for the connection of the integrated circuit to other circuit elements outside the package .
  • the integrated circuit itself has been mounted directly to the lead frame within the integrated circuit package, while other cooperating components have typically been placed outside the package. This segregation ot components leads to a multiplicity of problems encountered in circuit design which problems are solved by the present invention, also to be discussed below.
  • a past solution was to include some components within the integrated circuit package by mounting those components to a dielectric substrate which was then, in turn, mounted to the lead frame.
  • This prior art method introduces an additional layer of thermal impedance from the parts mounted on the substrate to the lead frame, since the substrate is typically a poor thermal conductor as compared with metal lead frames .
  • mounting and electrically connecting parts directly to the lead frame avoids the need lor a substrate.
  • Components mounted directly to the lead frame will exhibit improved heat dissipation characteristics since the metal lead frame is an efficient conductor of heat. Higher manufacturing costs and complexity will also be avoided as a result of eliminating the use of a substrate. Material cost would be reduced as well because substrate material is no longer needed.
  • n is desirable to mount electionic components directly to the lead frame wherever possible and to electrically mtciconnect the components, at least in part, by means of the metal lead frame itself.
  • the invention also teaches a new method ol electrically interconnecting components by elecli ically connecting them to subsegments of the lead frame whereby bonding wires can be electi ically welded directly to the subsegments to form strong, reliable bonds. The eiectrical connection is thereby completed to these components through the subsegments to which each component is electrically connected .
  • an electronic system circuit package is disclosed herein along with its method of manufacture .
  • the package includes a lead frame with an electrically conductive component support segment having a series ot associated electrically conductive leads.
  • a plurality of electronic components including at least one IC chip and one individual active element are mounted directly to the support segment of the lead frame .
  • the electronic components and the conductive leads are electrically interconnected to one another in accordance with a predetermined circuit design.
  • the electronic components, the lead frame support segment, the electrical interconnections and portions of the electrically conductive leads are encapsulated in a dielectric medium In a preferred embodiment, at least some of the electronic components are mounted directly to electrically isolated subsegments of the support segment and electrically interconnected through their respective subsegments to other components .
  • Figure 1 is a schematic illustration, in a perspective view, of an electronic system circuit package showing a lead frame with electronic components mounted thereon in accordance with the present invention
  • Figure 2 is a bottom ( underside) plan view ot the electronic system cucuit package of Figure 1 ;
  • Figure 3 is a diagrammatic plan view of a prototype lead frame based power supply system utilizing the present invention
  • Figure 4 is a cross-sectional elevationai view taken along section 4-4 of Figure 3
  • Figure 5 is a cross sectional elevationai view taken along section 5-5 of Figure 3.
  • the package includes a lead frame 12 having an electrically conductive support segment 14 divided into a plurality of electrically conductive subsegments 14A, 14B, 14C, 14D, 14E and 14F
  • the subsegments are arranged and designed in accordance with a predetermined overall circuit diagram, as will be described hereinafter.
  • the subsegments are electrically isolated from one another by insulating slots, an example of which is shown at 16.
  • the overall electronic system circuit package includes a plurality of electronic components, each of which is mounted at least in part directly on one of the subsegments.
  • an IC chip is designated by reference numeral 20
  • a capacitor is designated by reference numeral 22
  • a resistor is shown at 24
  • a diode is depicted at 25.
  • Mounting and electrical interconnection of the components on the circuit ot Figure 1 are accomplished by a number ot techniques.
  • Electronic components are mounted directly to support segment 14 and contact at least one subsegment of the support segment in being so mounted.
  • Components may be electrically isolated trom the support segment, if so desired, as will be shown in relation to a later figure, or components may be mounted by electrically connecting them to one or more subsegments.
  • Capacitor 22 shown in Figure 1 is connected electrically to subsegment 14B at a first end and to subsegment 14C at a second end. These connections may be accomplished bv conventional means, for example conductive epoxy or solder.
  • An insulating slot 16 extends under capacitor 22 causing subsegments 14B and 14C to be electrically isolated w ith the capacitor electrically connected therebetween .
  • Subsegments 14B and 14C are formed specifically for receiving capacitor 22.
  • IC 20 is shown directly mounted to subsegment 14A.
  • Subsegment 14A must be properly shaped to form an appropriate foundation for IC 20.
  • Heat transfer from IC 20 to subsegment 14A and heat transfer from the other components in the package mounted to their respective lead frame subsegments is enhanced by the direct connection of these components to their respective subsegments since lead frame 12 constitutes an efficient heat sink.
  • Bonding wires are also used to complete electrical interconnections within the circuit package.
  • a bonding wire is shown at reference numeral 26.
  • Bonding wire 26 is attached to a pad 28 on IC 20 at one end. This is a typical application of a bonding w ire to an IC chip or other component.
  • the opposite end of bonding wire 26 is bonded directly to subsegment 14C at an attachment point 30 .
  • the bonded connection shown at 30 is electrically conductive and will normally comprise an electrical weld.
  • An electrical weld to electrically conductive subsegment 14C will form a strong and permanent electrical connection to the subsegment and, since capacitor 22 is electrically connected at one end to subsegment 14C, pad 28 on IC 20 is electrically connected to one end of capacitor 22 via bonding wire 26 and subsegment 14C. Any number of bonding wires may be electrically connected to subsegment 14C by this method.
  • Capacitor 24, in Figure 1 has an electrical contact at each opposing end.
  • a first end of the capacitor is mounted directly to subsegment 14A.
  • the opposing end of capacitor 24 is mounted directly to subsegment 14F and is electrically connected thereto, so that capacitor 24 is electrically connected between subsegments 14A and 14F.
  • Resistor 25 may be a typical surface mount resistor having an electrical contact at each opposite end.
  • FIG. 2 is a bottom, underside, plan view of Figure 1 and illustrates an additional aspect of the invention.
  • a transistor is shown at reference numeral 32.
  • the opposite ends of the transistor may, for example comprise the emitter and collector terminals
  • the transistor 32 is electrically mounted between subsegments 14A and 14F across an insulating slot 34 on the bottom side 38 of lead frame 10, whereby the emitter and collector terminals are electrically connected to subsegments 14 A and 14F respectively.
  • Any number of components may be mounted on the bottom 38 of lead frame 10 and electrically interconnected between the subsegments in this manner.
  • a bonding wire 40 is shown at one end electrically connected to a pad 42 representing the base of transistor 32.
  • the opposite end of bonding wire 40 is electrically welded to subsegment 14C at 44, whereby the base of transistor 32 is electrically connected to subsegment 14C, illustrating that this method may also be used on the bottom side of lead frame 12.
  • FIG. 3 A prototype switch mode power supply using the present invention is shown in Figure 3.
  • the prototype is generally designated by the reference numeral 50.
  • the circuit design which is realized is schematically illustrated in Figure 6 and comprises a switch mode power supply.
  • the lead frame used in the power supply is designated as 5 1 in Figure 3.
  • the lead frame includes an electrically conductive component support segment 52, which is divided into a plurality of electrically conductive subsegments 52A through 52J. The subsegments are isolated from one another by insulating slots, an example of which is shown at 54.
  • Dielectric substrate 72 has a plurality of components mounted thereon, typical of the prior a rt, and was not used to illustrate inventive features disclosed herein, but only to functionally complete the prototype power supply wherein inventive features are used in the remainder of the power supply and described below.
  • subsegment 52A is held at ground potential and also functions as a ground plane .
  • a subsegment, such as 52A may be designed to function as a ground plane with such considerations as electronic interference shielding and component grounding requirements in mind. Any number of component electrical connections to ground may be accomplished in accordance with the present invention by utilizing a grounded subsegment, as will be seen below.
  • Inductor 56 has a pair of bonding pads 72A and 72B.
  • a bonding wire 73 is electrically connected at one end to pad 72A on the inductor.
  • the opposite end of bonding wire 73 is electrically bonded to subsegment 52A of the lead frame at attachment point 74, since subsegment 52A is held at ground potential, pad 72A on the inductor is thereby grounded by means of bonding wire 73, as taught by the present invention .
  • Diode 58 is electrically connected to subsegment 52A by being directly mounted thereto, illustrating that a component may be electrically grounded by direct mounting to a grounded subsegment in accordance with the invention herein disclosed.
  • a bonding wire 75 is bonded at one end to diode 58 at attachment point 76.
  • the opposite end of bonding wire 75 is electrically connected to bonding pad 72B on inductor 56.
  • a bonding wire 78 parallels bonding wire 75 .
  • Bonding wire 78 is eleetncall y connected to pad 72B on the inductor at a first end and electrically connected to diode 58 at attachment point 80. Bonding w ires may be paralleled in this manner, tor example, due to ciicuit demands for increased carrying capacity.
  • Bonding wire 82 is electrically connected at one end to diode 58 at attachment point 84 and at an opposite end is electricalIy connected to a bonding pad 86 on IC 70, illustrating that a multitude of bonding w ires may be connected to an electrically common point on the diode.
  • a plurality ot bonding w ires may be connected to an electrically common point on any component used with the present invention, in accordance with electrical interconnection requirements.
  • IC 70 has a grounding terminal 88.
  • a bonding wire 90 is electrically connected at one end to the grounding terminal.
  • the second end of bonding wire 90 is electrically connected to subsegment 52A at attachment point 92, whereby the grounding terminal of the IC is grounded by means of a bonding wire electrically attached to grounded subsegment 52A .
  • Any component mounted on the lead frame support segment, including those components mounted directly to a ground plane subsegment, may be grounded by a bonding wire to said ground plane subsegment per the present invention.
  • Capacitor 60 is mounted at one end to subsegment 52A and is thereby grounded. The opposite terminal of capacitor 60 is electrically connected to subsegment 52J .
  • the remaining capacitors 62, 64, 66 and 68 are similarly disposed in that they are all mounted directly to subsegments so as to each be electrically connected to an opposing pair of subsegments across an isolating slot, as can be seen by referring to Figure 3.
  • the remaining required electrical connections to these capacitors are completed, as shown, utilizing bonding wires as taught by the present invention .
  • Figure 4 shows the inductor 56 and the lead frame 51 in cross- section. Insulating slots 94A, 94B and 94C can be seen Figure 4.
  • the inductor 56 is mounted to the lead frame support segment 52, contacting subsegments 52A, 52B and 52J .
  • the inductor 56 is not electrically bonded to the subsegments but is simply mounted thereon by means such as dielectric adhesiv e, well known in the art. Any component, such as the inductor 56, not amenable to direct electrical bonding to the lead frame may be mounted in this fashion .
  • the lead frame and components are encapsulated in a sealed dielectric package 96, shown in
  • Dielectric package 96 is of the type typically used to encapsulate indiv idual integrated circuits. These packages have proven to be extremely reliable and environmentally resistant.
  • a cross-sectional view of the power supply of Figure 3 is depicted as F igure 5 Insulating slots can be seen as 98A, 98B and 9SC.
  • Capacitor 62 IC 70 and capacitor 68 are alsi show n in cross- section and are directly mounted to subsegm ents of the lead f rame 5 1.
  • Capacitor 62 is directly mounted to subsegment 521 at the point w here c r oss section 5- 5 is taken IC 70 is directly mounted to subsegment 52 A and capac itor 68 is diiectly mounted to subsegment 52B , in accordance with the present invention.

Abstract

An electronic system package is disclosed herein. The package utilizes a lead frame having an electrically conductive component support segment (52) incorporating provisions for mounting a plurality of electronic components directly on the support segment (52) in accordance with a predetermined circuit design. The circuit package is then encapsulated in a dielectric medium (96). In a preferred embodiment, at least some of the electronic components are mounted direclty to electrically isolated subsegments (52A-52J) of the component support segment and electrically interconnected through their respective subsegments to other components.

Description

ELECTRONIC SYSTEM CIRCUIT PACKAGE
BACKGROUND OF THE INVENTION
The present invention relates generally to an electronic system circuit package, and more particularly to a package including a lead frame having a unique and specific design with provisions for electrically interconnecting a plurality of passive and active electronic components, at least in part directly by means of the lead frame in accordance with a specific predetermined circuit design.
In integrated circuit packaging, a lead frame is typically used to support an integrated circuit within an integrated circuit package as well as to provide electrically conductive leads for the connection of the integrated circuit to other circuit elements outside the package . To date, as a general rule only the integrated circuit itself has been mounted directly to the lead frame within the integrated circuit package, while other cooperating components have typically been placed outside the package. This segregation ot components leads to a multiplicity of problems encountered in circuit design which problems are solved by the present invention, also to be discussed below.
A past solution was to include some components within the integrated circuit package by mounting those components to a dielectric substrate which was then, in turn, mounted to the lead frame. This prior art method introduces an additional layer of thermal impedance from the parts mounted on the substrate to the lead frame, since the substrate is typically a poor thermal conductor as compared with metal lead frames . As will be seen hereinafter in accordance with the present invention mounting and electrically connecting parts directly to the lead frame avoids the need lor a substrate. Components mounted directly to the lead frame will exhibit improved heat dissipation characteristics since the metal lead frame is an efficient conductor of heat. Higher manufacturing costs and complexity will also be avoided as a result of eliminating the use of a substrate. Material cost would be reduced as well because substrate material is no longer needed.
Circuit designers are forced in many instances to use components external to the circuit package to meet design requirements, each additional required external component adding cost, lowering reliability and causing the overall size of the electronic package to increase . These external parts must be mounted and electrically interconnected by means of technology such as a printed circuit board. If all parts are mounted within the lead frame itself the need for a printed circuit board to mount the external parts on is obviated and a manufacturing cost savings is realized. Further, a compact design is obtained by containing all components exclusively on the lead frame with no external parts, in fact, the look and feel of an IC package may be maintained, allowing the circuit package itself to be mounted directly to a pc board.
Electrical connections of external components, even on a pc board, are typically not as reliable as those made within the integrated circuit package. Overall reliability of the electrical interconnections are therefore improved by housing all the interconnections within the circuit package. Reliability of the package is also improved w ith regard to environmental resistance of the package. A past solution was to house a module type electronic package within a custom plastic housing. This housing is expensive to produce and has been shown to be substandard with regard to moisture resistance. Incorporating all components within the lead frame, as the present invention teaches, allows the circuit package to be encapsulated by means typically used to encapsulate an individual IC. These methods, such as potting, have proven to be very environmentally resistant . SUMMARY OF THE INVENTION
In accordance w ith the present invention, n is desirable to mount electionic components directly to the lead frame wherever possible and to electrically mtciconnect the components, at least in part, by means of the metal lead frame itself. The invention also teaches a new method ol electrically interconnecting components by elecli ically connecting them to subsegments of the lead frame whereby bonding wires can be electi ically welded directly to the subsegments to form strong, reliable bonds. The eiectrical connection is thereby completed to these components through the subsegments to which each component is electrically connected . As will be descri bed in more detail hereinafter, an electronic system circuit package is disclosed herein along with its method of manufacture . The package includes a lead frame with an electrically conductive component support segment having a series ot associated electrically conductive leads. A plurality of electronic components including at least one IC chip and one individual active element are mounted directly to the support segment of the lead frame . The electronic components and the conductive leads are electrically interconnected to one another in accordance with a predetermined circuit design. The electronic components, the lead frame support segment, the electrical interconnections and portions of the electrically conductive leads are encapsulated in a dielectric medium In a preferred embodiment, at least some of the electronic components are mounted directly to electrically isolated subsegments of the support segment and electrically interconnected through their respective subsegments to other components .
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention may be understood by reference to the following description taken in conjunction with the following drawings in which:
Figure 1 is a schematic illustration, in a perspective view, of an electronic system circuit package showing a lead frame with electronic components mounted thereon in accordance with the present invention;
Figure 2 is a bottom ( underside) plan view ot the electronic system cucuit package of Figure 1 ;
Figure 3 is a diagrammatic plan view of a prototype lead frame based power supply system utilizing the present invention; Figure 4 is a cross-sectional elevationai view taken along section 4-4 of Figure 3; Figure 5 is a cross sectional elevationai view taken along section 5-5 of Figure 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring initially to Figure 1 , an electronic system circuit package designed in accordance with the present invention and generally designated by the reference numeral 10 will be described. The package includes a lead frame 12 having an electrically conductive support segment 14 divided into a plurality of electrically conductive subsegments 14A, 14B, 14C, 14D, 14E and 14F The subsegments are arranged and designed in accordance with a predetermined overall circuit diagram, as will be described hereinafter. The subsegments are electrically isolated from one another by insulating slots, an example of which is shown at 16. The overall electronic system circuit package includes a plurality of electronic components, each of which is mounted at least in part directly on one of the subsegments. As illustrated in Figure 1 , an IC chip is designated by reference numeral 20, a capacitor is designated by reference numeral 22, a resistor is shown at 24 and a diode is depicted at 25. Mounting and electrical interconnection of the components on the circuit ot Figure 1 are accomplished by a number ot techniques. Electronic components are mounted directly to support segment 14 and contact at least one subsegment of the support segment in being so mounted. Components may be electrically isolated trom the support segment, if so desired, as will be shown in relation to a later figure, or components may be mounted by electrically connecting them to one or more subsegments. Capacitor 22 shown in Figure 1 is connected electrically to subsegment 14B at a first end and to subsegment 14C at a second end. These connections may be accomplished bv conventional means, for example conductive epoxy or solder. An insulating slot 16 extends under capacitor 22 causing subsegments 14B and 14C to be electrically isolated w ith the capacitor electrically connected therebetween . Subsegments 14B and 14C are formed specifically for receiving capacitor 22.
In the case of mounting and electrically connecting an active or passive component, the subsegments are customized for the specific design parameters of concern. IC 20, for example, is shown directly mounted to subsegment 14A. Subsegment 14A must be properly shaped to form an appropriate foundation for IC 20. Heat transfer from IC 20 to subsegment 14A and heat transfer from the other components in the package mounted to their respective lead frame subsegments is enhanced by the direct connection of these components to their respective subsegments since lead frame 12 constitutes an efficient heat sink.
Bonding wires are also used to complete electrical interconnections within the circuit package. A bonding wire is shown at reference numeral 26. Bonding wire 26 is attached to a pad 28 on IC 20 at one end. This is a typical application of a bonding w ire to an IC chip or other component. In accordance with the present invention, the opposite end of bonding wire 26 is bonded directly to subsegment 14C at an attachment point 30 . The bonded connection shown at 30 is electrically conductive and will normally comprise an electrical weld. An electrical weld to electrically conductive subsegment 14C will form a strong and permanent electrical connection to the subsegment and, since capacitor 22 is electrically connected at one end to subsegment 14C, pad 28 on IC 20 is electrically connected to one end of capacitor 22 via bonding wire 26 and subsegment 14C. Any number of bonding wires may be electrically connected to subsegment 14C by this method.
Capacitor 24, in Figure 1 , has an electrical contact at each opposing end. A first end of the capacitor is mounted directly to subsegment 14A. The opposing end of capacitor 24 is mounted directly to subsegment 14F and is electrically connected thereto, so that capacitor 24 is electrically connected between subsegments 14A and 14F. Resistor 25 may be a typical surface mount resistor having an electrical contact at each opposite end. A first end of resistor 25 is electrically connected directly to sub.segment 14D and the opposite end is electrically connected directly to subsegment 14E. Electrical connections of capacitor 24 and resistor 25 to their respective subsegments may be completed using solder Daste or other means well known in the art.
Figure 2 is a bottom, underside, plan view of Figure 1 and illustrates an additional aspect of the invention. A transistor is shown at reference numeral 32. The opposite ends of the transistor may, for example comprise the emitter and collector terminals The transistor 32 is electrically mounted between subsegments 14A and 14F across an insulating slot 34 on the bottom side 38 of lead frame 10, whereby the emitter and collector terminals are electrically connected to subsegments 14 A and 14F respectively. Any number of components may be mounted on the bottom 38 of lead frame 10 and electrically interconnected between the subsegments in this manner.
A bonding wire 40 is shown at one end electrically connected to a pad 42 representing the base of transistor 32. The opposite end of bonding wire 40 is electrically welded to subsegment 14C at 44, whereby the base of transistor 32 is electrically connected to subsegment 14C, illustrating that this method may also be used on the bottom side of lead frame 12.
A prototype switch mode power supply using the present invention is shown in Figure 3. The prototype is generally designated by the reference numeral 50. The circuit design which is realized is schematically illustrated in Figure 6 and comprises a switch mode power supply. The lead frame used in the power supply is designated as 5 1 in Figure 3. The lead frame includes an electrically conductive component support segment 52, which is divided into a plurality of electrically conductive subsegments 52A through 52J. The subsegments are isolated from one another by insulating slots, an example of which is shown at 54.
An inductor 56 is also shown in Figure 3 along with a diode 58, capacitors of various sizes are shown by reference numerals 60, 62, 64, 66 and 68, an IC 70; and a dielectric substrate 72 with thick film printed resistors and a chip capacitor. Dielectric substrate 72 has a plurality of components mounted thereon, typical of the prior a rt, and was not used to illustrate inventive features disclosed herein, but only to functionally complete the prototype power supply wherein inventive features are used in the remainder of the power supply and described below.
Referring again to Figure 3. subsegment 52A is held at ground potential and also functions as a ground plane . A subsegment, such as 52A, may be designed to function as a ground plane with such considerations as electronic interference shielding and component grounding requirements in mind. Any number of component electrical connections to ground may be accomplished in accordance with the present invention by utilizing a grounded subsegment, as will be seen below.
Inductor 56 has a pair of bonding pads 72A and 72B. A bonding wire 73 is electrically connected at one end to pad 72A on the inductor. The opposite end of bonding wire 73 is electrically bonded to subsegment 52A of the lead frame at attachment point 74, since subsegment 52A is held at ground potential, pad 72A on the inductor is thereby grounded by means of bonding wire 73, as taught by the present invention . Diode 58 is electrically connected to subsegment 52A by being directly mounted thereto, illustrating that a component may be electrically grounded by direct mounting to a grounded subsegment in accordance with the invention herein disclosed.
A bonding wire 75 is bonded at one end to diode 58 at attachment point 76. The opposite end of bonding wire 75 is electrically connected to bonding pad 72B on inductor 56. A bonding wire 78 parallels bonding wire 75 . Bonding wire 78 is eleetncall y connected to pad 72B on the inductor at a first end and electrically connected to diode 58 at attachment point 80. Bonding w ires may be paralleled in this manner, tor example, due to ciicuit demands for increased carrying capacity. Bonding wire 82 is electrically connected at one end to diode 58 at attachment point 84 and at an opposite end is electricalIy connected to a bonding pad 86 on IC 70, illustrating that a multitude of bonding w ires may be connected to an electrically common point on the diode. A plurality ot bonding w ires may be connected to an electrically common point on any component used with the present invention, in accordance with electrical interconnection requirements.
IC 70 has a grounding terminal 88. A bonding wire 90 is electrically connected at one end to the grounding terminal. The second end of bonding wire 90 is electrically connected to subsegment 52A at attachment point 92, whereby the grounding terminal of the IC is grounded by means of a bonding wire electrically attached to grounded subsegment 52A . Any component mounted on the lead frame support segment, including those components mounted directly to a ground plane subsegment, may be grounded by a bonding wire to said ground plane subsegment per the present invention.
Capacitor 60, previously mentioned, is mounted at one end to subsegment 52A and is thereby grounded. The opposite terminal of capacitor 60 is electrically connected to subsegment 52J . The remaining capacitors 62, 64, 66 and 68 are similarly disposed in that they are all mounted directly to subsegments so as to each be electrically connected to an opposing pair of subsegments across an isolating slot, as can be seen by referring to Figure 3. The remaining required electrical connections to these capacitors are completed, as shown, utilizing bonding wires as taught by the present invention . Figure 4 shows the inductor 56 and the lead frame 51 in cross- section. Insulating slots 94A, 94B and 94C can be seen Figure 4. The inductor 56 is mounted to the lead frame support segment 52, contacting subsegments 52A, 52B and 52J . The inductor 56 is not electrically bonded to the subsegments but is simply mounted thereon by means such as dielectric adhesiv e, well known in the art. Any component, such as the inductor 56, not amenable to direct electrical bonding to the lead frame may be mounted in this fashion . The lead frame and components are encapsulated in a sealed dielectric package 96, shown in
Figure 4. Dielectric package 96 is of the type typically used to encapsulate indiv idual integrated circuits. These packages have proven to be extremely reliable and environmentally resistant. A cross-sectional view of the power supply of Figure 3 is depicted as F igure 5 Insulating slots can be seen as 98A, 98B and 9SC. Capacitor 62 IC 70 and capacitor 68 are alsi show n in cross- section and are directly mounted to subsegm ents of the lead f rame 5 1. Capacitor 62 is directly mounted to subsegment 521 at the point w here c r oss section 5- 5 is taken IC 70 is directly mounted to subsegment 52 A and capac itor 68 is diiectly mounted to subsegment 52B , in accordance with the present invention.
It should be understood that the present invention may be embodied in many other specif ic forms without departing from the spirit or scope of the invention T heref ore the present examples are to be considered as illustrative and not restrictiv e and the invention is not to be limited to the details given herein, but may be modified wuhin the scope of the appended claims.

Claims

WHAT IS CLAIMED IS
1 . An electronic system circuit package, comprising:
(a) a lead frame including an electrically conductive component support segment and a series of electrical ly conductive leads in close proximity to said support segment,
(b) a plurality ot electronic components including at least one IC chip and one individual active element, each of which is mounted directly to the suppon segment of said lead frame,
(c) means for electrically interconnecting said electronic components and said electrically conductive leads to one another in accotdance with a predetermined circuit design; and
(d) a dielectric medium encapsulating said electronic components, said lead frame support segment, said interconnecting means and poi tions of said electrically conductive leads .
2. An electronic system circuit package according to Claim 1 wherein
said lead frame support segment includes a first subsegment to which said IC chip is
directly mounted and a second subsegment which is electrically isolated from said first subsegment and to which said individual active element is at least in part directly mounted
3 . An electronic system circuit package according to Claim 2 wherein said individual active element is electrically connected to the second subsegment of said lead frame support segment by virtue of being at least in part mounted directly to said second subsegment.
4. An electronic system circuit package according to Claim 3 wherein said IC chip includes a series of input/output terminals and wherein said interconnecting means includes a bonding wire connected at one end to one of said input/output terminals and at its other end directly to the second subsegment of said lead frame support segment, whereby to electrically connect said individual active element to said IC chip via said second subsegment and said one input/output terminal.
5. An electronic system circuit package according to Claim I wherein said plurality of electronic components include additional individual active elements, each of which is mounted directly to said lead frame support segment, all of said electronic components being selected and interconnected together along with the electrically conductive leads in accordance with said predetermined circuit design such that the overall electronic circuit system package functions as a switching power supply.
6. An electronic system circuit package according to Claim 5 wherein said electronic components include at least one diode, one capacitor and one inductor along with said IC chip.
7. An electronic system circuit package according to Claim 6 wherein said lead frame support segment is divided into a plurality of subsegments, at least some of which are electrically isolated from one another, each of said electronic components being individually mounted, at least in part, to a respective one of said subsegments.
8. An electronic system circuit package according to Claim 7 wherein at least a first one of said individual electronic components is electrically connected to the lead frame subsegment to which it is at least in part directly mounted by virtue of being mounted directly to said one subsegment, and wherein said interconnecting means includes at least one bonding wire connected at one end directly to said one subsegment to w hich said f irst component is mounted and at its other end directly to a second one of said electronic components, whereby to electrically connect together said first and second components
9. An electronic system circuit package according to Claim 8 wherein at ieast one of said electronic components includes a grounding terminal, wherein at Ieast one of said lead frame subsegments is adapted for connection to ground potential in order to serve a ground plate and wherein said interconnecting means include at least one bonding wire connected at one end to the grounding terminal of said last-mentioned one electronic component and at its other end to said last-mentioned subsegment
10. An electronic system circuit package according to Claim 1 wherein said lead frame support segment is divided into a plurality of subsegments, at least some of which are electrically isolated from one another, each of said electronic components being individually mounted, at Ieast in pan, to a respective one of said subsegments.
1 1. An electronic system circuit package according to Claim 10 wherein at Ieast a first one of said individual electronic components is electricallv connected to the lead frame subsegment to which it is at Ieast in part directly mounted by virtue of being mounted directly to said one subsegment, and wherein said interconnecting means includes at Ieast one bonding wire connected at one end directly to said one subsegment to which said first component is mounted and at its other end directly to a second one of said electronic components, whereby to electrically connect together said first and second components.
12 . An electronic system circuit package according to Claim 1 1 wherein at Ieast one ot said electronic components includes a grounding terminal, wherein at Ieast one of said lead frame subsegments is adapted for connection to ground potential in order to serve a ground plate and wherein said interconnecting means include at least one bonding wire connected at one end to the grounding terminal of said last-mentioned one electronic component and at its other end to said last-mentioned subsegment.
1 3. An electronic system circuit package according to Claim 12 wherein said electronic components include at Ieast one diode, one capacitor and one inductor along with said IC chip.
14. An electronic system circuit package according to Claim 13 including dielectric adhesive means for fixedly connecting said IC chip and said diode to their respective lead frame subsegments in an electrically isolating manner and wherein each of said IC chip and said diode is electrically connected directly to its respective lead frame subsegment by means ot at least one bonding wire.
1 5. An electronic system circuit package according to Claim 14 including electrically conductive adhesive means for fixedly connecting said capacitor and inductor to their respective lead frame subsegments in an electrically connecting manner.
16. An electronic system circuit package according to Claim 10 wherein at Ieast one of said electronic components is directly mounted to its respective lead frame subsegment on the opposite side of the lead frame as other ones of said components.
17. A switching power supply system circuit package, comprising.
(a) a lead frame including an electrically conductive component support segment divided into a plurality of subsegments, at least some of which are electrically isolated from one another and a series of electrically conductive leads in close proximity to said support segment;
(b) a plurality of electronic components, each of which is mounted, at Ieast in part, directly to a respective one of said subsegments of said lead frame support segment, said electronic components including at least one IC chip, one diode, one capacitor and one inductor,
(c) means for electrically interconnecting said electronic components and said electrically conductive leads to one another in accordance with a predetermined circuit design such that the overall package functions as a switching power supply circuit and
(d) a dielectric medium encapsulating said electronic components said lead frame support segment, said interconnecting means and portions of said electrically conductive leads
18. A switching power supply system circuit package according to Claim 10 wherein at Ieast one of said electronic components is directlv mounted to its respective lead frame subsegment on the opposite side of the lead frame as other ones of said components
19. A lead frame for use as pan an overall electronic systems circuit package which includes a plurality of electronic components, said lead frame comprising
(a) an electrically conductive component support segment divided into a plurality of subsegments, at least some of which are electrically isolated from one another, each of said subsegments being adapted to support directly , individual ones of said electronic components, and
(b) a series of electrically conductive leads in close proximity to said support segment
20 . For use in an overall electronic system circuit package including J plurality ot components, a method of electrically interconnecting said components comprising the steps of
(a) providing a leading frame having an electrically conductive component support segment including at least first and second subsegments including at Ieast f irst and second subsegments electrically isolated from one another
(b) supporting a first component on the first subsegment of said lead f rame and mounting a second component directly to and electncally connected with said second subsegment;
(c) bonding a first end of a bonding wire to a bonding pad on the first component; and
(d) bonding a second end of the bonding wire directly to the second subsegment of the lead frame, whereby the bonding wire electrically connects the first component with the second component through said second sub.segment.
21. A method according to Claim 20 wherein the method includes mounting said second component directly to said second subsegment on the opposite side of the lead frame suppon segment from said first component.
PCT/US1995/011690 1994-09-15 1995-09-15 Electronic system circuit package WO1996008842A1 (en)

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DE69524724D1 (en) 2002-01-31
DE69524724T2 (en) 2002-08-14
EP0729646B1 (en) 2001-12-19
US5504370A (en) 1996-04-02

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