WO1995032549A1

WO1995032549A1 - Method and apparatus for distributing clock signals with minimal skew

Info

Publication number: WO1995032549A1
Application number: PCT/US1995/003165
Authority: WO
Inventors: Jared L. Zerbe; John B. Dillon; Thomas H. Lee
Original assignee: Rambus, Inc.
Priority date: 1994-05-23
Filing date: 1995-03-14
Publication date: 1995-11-30
Also published as: AU2159095A

Abstract

A method and circuit for distributing high speed signals, such as clock signals, along a transmission line with minimal skew at points along the signal line regardless of the distance of the points relative to the source of the signal. The signal line is left unterminated at the end of the signal line opposite the end coupled to the source. This forces the reflectance of the signal back towards the source and the constructive interference of the incident and reflected signal. In addition, the time of flight delay is set to equal the rise time of the signal. The resultant effect causes a proportional increase in edge speed to eliminate or greatly reduce skew. Furthermore, in a preferred embodiment the signal source is coupled to the signal line with an impedance substantially equal to the characteristic impedance of the signal line to minimize sensitivity of the skew reduction to parameter variations. Additionally, line Q may be boosted by increasing the inductance of the line to improve the quality of the skew reduction.

Description

METHOD AND APPARATUS FOR DISTRIBUTING CLOCK SIGNALS WITH MINIMAL SKEW

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method and apparatus for distributing signals along a signal path whereby little or no skew of the signals occur at different points along the signal path.

2. Art Background

The electrical interconnect or signal lines among high speed components is often a limiting factor in the operation of a circuit. For example, one problem which exists is the occurrence of clock skew. Clock skew occurs when different devices coupled to the same clock signal line receive the clock signal pulses at different phases due to the varying distances of the devices from the clock source. Previously, when slower clock signals were utilized, the timing margins were large enough to accommodate skew. However, with faster clock speeds, the margins have become smaller and impose stricter requirements for skew.

A parameter associated with any signal line is delay, where delay is defined to be the time required for a signal to travel between two points. Conventionally, the amount of delay for signals to propagate across a signal line is usually estimated by RC/2 where R and C represent the total resistance and capacitance of the line. However, the effect of inductance on the signal line is usually ignored as the RC model of the transmission line provides a sufficient estimate of delay when a signal line is configured to exhibit low (i.e., substantially less than unity) Q, where Q is defined as the ratio of the characteristic impedance of the line to the series resistance of the line. In fact, high Q is considered an undesirable property of a line for which the RC model does not provide an accurate estimate of delay.

Conventionally, delays and skews are considered to be intimately linked and, therefore, there is a non-zero bound to which delays and skews may be reduced. This lower bound may not be sufficient to meet strict skew requirements in all cases. In an attempt to minimize the skew problem, sophisticated transmission interconnects have been designed with strict distance and timing criteria. However, as the interconnect becomes more and more complex requiring more and more connections and therefore varying delays, the design of such interconnect becomes quite difficult. Furthermore, as the clock speeds continue to increase, the requirements for skew become even stricter.

Prior art has employed series termination as one means of obtaining signal integrity. Conventionally, the rise time of the signal originating from the source is short compared to the round trip time of the signal on the transmission line. The result is that the signal voltage along the line dwells at one-half of the signal swing for a substantial time interval. This makes the time at which the signal crosses the 50% point, and therefore the skew, indeterminate.

SUMMARY OF THE INVENTION

Therefore, it is an object of the present invention to provide a method and apparatus for distributing signals along a signal line with little or no skew.

Furthermore, it is an object of the present invention to minimize skew by exploiting the full transmission line nature of the interconnect.

The method and apparatus of the present invention provides a way to reduce the skew that occurs along different points of a signal line transmitting a signal to a plurality of receiving devices coupled at differing distances from the signal source. In particular, advantage is taken of the effect inductance has on a signal traveling along a signal line as well as the reflectance effect caused by leaving the signal line unterminated at the end opposite to the end coupled to the signal source.

In the prior art, it is preferable to terminate a signal line with an impedance that matches the impedance of the signal line in order that a signal is not reflected back along the signal line to the signal source. Such reflections are considered detrimental in the prior art, as the reflections typically interfere destructively with the incident signal.

In the system of the present invention, however, the transmission line is purposely unterminated at one end. Therefore, a signal issued from a source at one end of the transmission line, is reflected back due to the differences in impedance of the signal line and the unterminated end of the signal line resulting in, at points along the transmission line, a combined signal. The combined signal, consisting of the incident wave and the reflected wave, are timely oriented such that the signals constructively interfere with one another. The reflected wave adds to the incident wave to increase the edge speed of the signal at points along the signal line where the start of an edge is delayed due to the distance from the point to the source. Thus as the distance away from the source of the pulses increases, the pulses initially reach a given small value (e.g., 10% of the voltage rail) later and later. However, utilizing the method and apparatus of the present invention, the signal edges coincide with low or zero skew at a predetermined value (e.g., 50% of the voltage rail) because, by exploiting the constructive interference arising from reflections due to the unterminated signal line, the reflected wave adds back to the latest or slowest wave (that is, the one furthest away from the signal source) first. The result is a proportional increase in the signal edge speed that compensates for the skew.

In a preferred embodiment, the transmission line is configured such that at all points along the signal line the signals reach a voltage value V/2, where V represents the voltage rail (i.e., maximum voltage value) of the input signal. This is achieved by configuring the rise time of the signal to equal approximately twice the time of flight (i.e. round-trip signal propagation delay) of a signal between the two ends of the line and increasing the value of Q, defined as the ratio of the characteristic impedance of the line to the series resistance of the line. In the prior art, Q is typically maintained at a low value (e.g., substantially less than unity) and the RC model of a transmission line applies. In the present invention Q is controlled to be high such that the line inductance has to be considered in addition to the resistance and capacitance in order to analyze accurately the propagation of signals down the line. The inductance increases the amount of reflection which occurs. Therefore, it has been found that delay and skew need not be tightly linked, enabling skew to be minimized, even in the presence of substantial delay.

BRIEF DESCRIPTION OF THE DRAWINGS

The objects, features and advantages of the present invention will be apparent to one skilled in the art from the following detailed description in which:

Figure 1 illustrates a truncated ramp input wave form.

Figure 2 illustrates a coaxial transmission line driven by a voltage step signal.

Figure 3 illustrates a unit step response of the signal line of Figure 2 at point X - A*£, where £ is the line length, and 0 < A < 1.

Figure 4 is an exemplary pulse response when T = T .

Figure 5 represents a response to truncated ramp signal when T

Figure 6 illustrates a pulse response when T = T - Δt.

Figure 7 is a simulation showing an input square wave signal and corresponding pulses generated when the skew occurs.

Figure 8a illustrates an unloaded, lossless line driven by a voltage step through resistance Rs.

Figure 8b, 8c and 8d illustrate a signal after one time-of-flight trip, one full round trip and after 1.5 round trips, respectively. Figure 9 illustrates skew (measured with respect to voltage value V/2 where V is the voltage rail) which may occur along a lossless (i.e., infinite Q) signal line with an uncontrolled rise time of the input waveform.

Figure 10 illustrates the skew generated using a lossless line if the rise time of the input waveform is controlled according to the teachings of the present invention.

Figure 11a illustrates a series termination, Figure lib is a prior art signal timing diagram and Figure lie is a signal timing diagram illustrating the advantages by using the present invention.

Figure 12 shows skewed signals resulting from a change in rise time from the ideal, along a lossy line (Q=0.7).

Figure 13 shows a reduction in skew achievable, even with a lossy line (Q=0.7), by adjusting the rise time of the input waveform.

Figure 14 illustrates the results if a reduction in edge speed is combined with an increase in line "Q" (to a value 1.4) obtained by doubling the inductance per unit length.

DETAILED DESCRIPTION

In the following description, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that these specific details are not required in order to practice the present invention. In other instances, electrical structures and circuits are shown in block diagram form in order not to obscure the present invention unnecessarily.

The method and apparatus of the present invention provides an innovative system and method for reducing skew of a signal at points along a signal line. In particular, reference will be made to the minimization of skew for clock signals issued from a source to a plurality of points along a transmission line. These points conceivably are connected to devices which require the same clock signal input with minimum skew to operate correctly. However, it should be readily apparent to one skilled in the art that the present invention is not limited to clock signals and can be utilized to eliminate skew of different types of signals that are distributed along interconnect to a plurality of points at different distances from the source component which generates the signal.

For purposes of explanation, the driving wave form originating at the source is assumed, for ease of description, to be a slew-limited transient (a truncated ramp), an example of which is shown in Figure 1. It will be readily apparent to one skilled in the art that the present invention will operate with different types of driving wave forms. Furthermore, in the present embodiment, the system is configured to eliminate skew at the voltage equal to 2 of the voltage rail. Therefore skew is defined here as a difference in times at which the responses at different points along the signal line cross 50% of the voltage value. Again, the present invention is not limited as such and the voltage value at which skew is minimized or eliminated can be varied by varying the characteristics of the transmission line as well as rise time of the signal that drives the transmission line.

Figure 2 illustrates an exemplary coaxial line which may be utilized in the system and method of the present invention. Preferably, a microstrip line is used. However, the present invention is also applicable to other types of transmission line including, but not limited to, parallel plate lines. Figure 2 illustrates an exemplary configuration in which the source 50 generates a signal along transmission line 55 to points along the line where devices 60, 65 and 70 are located.

In the prior art, skew would occur whereby the predetermined value, in the present example, 50% of the voltage rail, of the signal is reached at the closest location to the source 50, device 60, prior to the time at which the specified voltage value reached by the farthest point from the source 50, device 70. However, utilizing the method and system of the present invention, skew is minimized significantly or eliminated by configuring the signal edge time, the inductance and by leaving the load end of the signal line unterminated such that reflected waves are generated by the unterminated end of signal line 55 in order to constructively interfere with the signal generated by the source 50.

Although the response to the truncated ramp waveform of Figure 1 is desired to illustrate the invention, it is analytically more convenient to consider first the response to a voltage step waveform. In one ideal case, the transmission line is perfectly lossless, the source impedance is zero and the load impedance is infinite. Under the conditions stated, the voltage step response at some point X = A* £ where A may range from 0 to 1 and έ is the line length, is the periodic oscillation signal shown in Figure 3. The signal has a period T = 4*£ /vp where vp is the signal propagation velocity that is characteristic of the signal line.

From the step response discussed above, the response on the line to a rectangular pulse of duration T_w can be determined. As a rectangular pulse is simply the sum of a step with a delayed negative step, the response to a rectangular pulse on a signal line is equal to the sum of the step response with a delayed negative step response. Furthermore, since the response to a truncated ramp response is the integral of the rectangular pulse response, the location of the first moment of the pulse response (i.e., the center of mass of the pulse response) is the time at which the truncated ramp response attains 50% of the voltage rail value.

If the pulse width T is chosen precisely to be equal to the periodicity T, the pulse response is formed by taking the sum of the step response and a negative step response that is delayed by exactly one oscillation period. In this case, only the first pulse group of the step response oscillation survives the superposition and the rectangular pulse response thus would appear as shown in Figure 4. It should be noted that the center of mass of any pulse along the signal line occurs at t=T/2, independent of the position along the line, thus enabling the reduction of skew. Finally, it should be noted that the pulse width at the end of the line (A=l) is T/2 or half the width of the input pulse. Figure 5 shows the response to a truncated ramp waveform, obtained by integrating the pulse response of Figure 4.

Because of the choice of rise time of the driving waveform to correspond to the propagation delay or time of flight of the signal between endpoints of the signal line, all responses along the line cross 50% of the voltage rail at the same time, namely, at t=T/2, even though the rise time is different at each point along the signal line. Therefore, as the distance along the signal line away from the signal source increases, the initial delay increases but there is a corresponding decrease in rise time that precisely compensates for this initial delay, leading to a uniformity of time at which the outputs at various points along the signal line reach a 50% voltage value of the voltage rail (as illustrated in Figure 10). This result contrasts sharply with the pure RC diffusion line model, in which zero skew is not possible even in principle.

In the present invention, the delay times increase and rise times decrease monatonically down the line. Although all waveforms reach the predetermined value, e.g., 50% of the voltage rail, at the same time, the rise times at the different points along the single line differ. Therefore, it is preferable to employ local buffers at each point at which the signal is tapped. If the thresholds of the buffers are set at 50%, the output waveforms from the buffers will tend to have similar rise times and minimum skew is still obtained.

Preferably, to commonly reach 50% of the voltage rail, the source rise time is set to approximately equal twice the round trip delay along the line, or 4*.. /vp; however, it is not always possible that the rise time is adjusted as such. The effect of a non-ideal rise time may be computed most conveniently by first calculating the response to a rectangular pulse, and integrating the result. If the rectangular pulse has a width Tw (wherein the width equals the rise time of the truncated ramp that is the integral of the rectangular pulse waveform) that differs from T=4*._ /vp, the response will be as illustrated in

Figure 6.

The pulse response will possess additional pulses of width ΔT, as appear in Figure 6. As can be seen from Figure 6, the center of mass of the first pulse group changes and therefore the time at which the truncated ramp response reaches 50% of the voltage rail in response to the source input changes. Hence, skew, as measured with reference to the 50% value, increases. However, as seen in the corresponding truncated ramp response of Figure 9, a zero skew point still exists, albeit at a voltage value that differs from V/2. In addition to a shift in the zero-skew voltage value, ripples in the truncated ramp response now appear. The ripple amplitude is dependent upon the amount the ramp rise time differs from the nominal value.

This problem can be avoided in part by slowing down the edge speeds of the signals. If the line were truly lossless and the source impedance truly zero, these ripples would persist indefinitely and could possibly affect the skew on subsequent edges, as illustrated by Figure 7. Therefore, a loss mechanism to dampen the ringing is desirable to accommodate some variation in the rise time relative to the theoretical value computed for the lossless case. One way to dampen this potential ringing is by using a non-zero source resistance. Non-zero source resistance is present in all practical systems and functions to dampen out the ringing before the occurrence of the next input edge of the signal. By choosing a particular value of source resistance, a theoretically zero sensitivity to rise time variations can be achieved. Preferably, the source resistance is chosen to correspond to the characteristic impedance of the signal line.

Figures 8a, 8b, and 8c show a step input signal and the progress of reflections down a lossless line after n round trips have taken place. As can be seen from Figures 8a, 8b, and 8c, the magnitude of the fractional error £(n)/Vs diminishes as n increases and is computed as follows: £(n)/V_s = Tⁿ where £(n) is the error relative to the final value, Vs is the amplitude of the input step signal, Vi is the amplitude of the initial step on the line [= — Vs (l-O], n is the number

of roundtrips that have occurred and T is the reflection coefficient

R — T \ at the source end of the signal line.

R + z ⁶

For example, if it is desirable that the fractional error drop to 5% after 5 roundtrips, the magnitude of T needs to be smaller than approximately 0.55, indicating that the source resistance must be within about a factor of 3.4 of the line impedance. This formula applies to any wave propagating down a signal line. Thus, any signal on a line that experiences reflections will decay to within 5% of its initial value after 5 roundtrips if T is less than 0.55.

Therefore, matching the source resistance to the characteristic impedance on a line, that is, setting T equal to zero, results in maximum insensitivity to rise time. For the case where the source resistance and the line impedance are equal, all truncated ramp responses will still cross 50% of the voltage rail simultaneously at every point along the signal line; therefore zero skew is still achieved. In this example, the response crosses the 50% value at a time given by T50 = i /v-p + Tγv/2 where £ /v is the time of flight delay down the signal line and Tw is the 0-100% of the rise time of the truncated ramp input. Therefore, while the rise time of the ramp affects delay it has no effect on skew when the source and line impedance are matched. One practical criterion sets the upper bound on Tyv for a given value of time-of-flight delay £ /vp: T50 must be small enough to allow the truncated ramp response to reach substantially the final value before the next edge of the source signal occurs.

The advantages for following this bound are shown by the diagrams of Figures 9 and 10. Figure 9 is a plot of a truncated ramp response along a lossless line. The line is driven by a non-zero output impedance source, e.g. a CMOS inverter. In this example the source impedance is lower than the line impedance and ringing is visible. Also the input rise time is not optimum so that the zero skew point is no longer at 50% of the voltage rail value. Nevertheless, the skew as measured at the 50% point is still 3 time-of-flight delay of 99 picoseconds.

Another practical requirement that sets a lower bound on Tw,

T 2 is that Tw > — = — . This requirement insures that the response

crosses the 50% value with nonzero slope, in contrast with the series termination of the prior art.

Figure 10 shows a lossless line which is driven by a source with an optimally chosen source impedance. In this case, ringing is much less pronounced and the skew of 2.4 picoseconds is achieved, a value that is substantially smaller than that exhibited in Figure 9 and much smaller than the speed of light delay. The advantage is seen in the example of a series termination as illustrated in Figure 11a. Referring to Figure 11a, an input buffer 800 receives a source voltage signal input I, and passes the voltage signal through the resistor 810 having a resistance Rs. The signal is then input along the signal line 820, having an impedance Z, and reflected back from unterminated end 830 towards the source.

The signals in the prior art would look like those represented by the diagram of Figure lib. Point A along the signal line would receive the signal first, followed by point B and point C. However, point C will first reach the maximum value generated by the combination of the signal and reflected signal and point A will dwell at one-half of the peak value until the reflected signal reaches point A. This makes it quite difficult to compensate for skew. Using the present invention, the rise time of the input voltage signal is set to the round trip delay of the signal or 2Vp/ £. Then, as shown in Figure lie, the signal at points A, B, and C all reach the 50% value at approximately the same time, thereby minimizing skew.

In practicality, each signal line has some line loss. This loss affects the degree to which skew can be reduced. In a limit of extreme lossiness, the lines can be modeled as ordinary RC diffusion lines. Because loss mechanisms in the signal line itself tend to destroy the symmetry necessary to minimize skew, the inductance on the line may be increased (thereby increasing line Q) to compensate for this. As the forward wave of the source signal propagates towards the unterminated end of the signal line, energy dissipates in the lossy line. The voltage of whatever portion of the signal survives the propagation down the line immediately doubles at the unterminated end and reflects back to the source. This doubling is unaffected by the lossiness of the line and the rising edge of signals that are near the unterminated end are boosted in speed. This speed increase progressively weakens as the wave travels further and further back down the signal line towards the source. Therefore, the ability to reduce skew becomes limited to signals near the unterminated end of the signal line, since far from the unterminated end, the reflected signals have suffered sufficient attenuation that they have little influence on the edge speed of signals, as can be seen, for example, in Figure 12.

Figure 12 illustrates the effect of line loss. In this example, the conditions are the same as used for the simulation in Figure 10 except that the interconnect is a lossy line, for example, a 15,000 μm long, 50 μm wide wire with rectangular cross-section typical of integrated circuit processes. In this example, the skew degrades to 87 picoseconds, a value substantially larger than the 2.4 picoseconds achieved with the lossless line. Although superconducting interconnect has been used in at least one commercial product, and is the focus of much research, most practical lines will have characteristics similar to the 50 micron wide wire used in the simulation of Figure 12. Figure 13 shows that an improvement can be obtained if the driver size is reduced to slow down the driving waveform edge speed. This purposeful reduction in speed allows the doubling at the open end of the line to have proportionally greater effect. The 64 picoseconds skew value that is achieved, while not as impressive as the 2.4 picosecond value for the lossless case, is still ²/3 of the time-of- flight value.

Figure 14 shows the result in effect if the edge speed reductions combined with a doubling of Q obtained by the doubling the inductance per unit length. Although the time-of-flight delay has increased by over 40% from the doubling of inductance, the skew has reduced to 46 picoseconds, a value that is less that ^] /3 of the new time- of-flight value. Thus, if the Q is insufficient for skew reduction sought, alternative conductive patterns that increase the ratio of inductance to resistance, without substantially increasing the ratio of capacitance to inductance, may be employed. Typically, Q values approximately equal to unity are adequate. However, it is preferred that the signal lines are configured with Q values greater than unity.

ΪLΪC

Since Q is defined as — , Q may be increased by any means

R that increases that ratio. One possibility is to employ materials with permeabilities greater than that of free-space to boost inductance. Another method would be to alter the dimensions of the line to alter the resistance. The line loss must be made small enough compared with the line impedance to allow a roundtrip of a signal without significant attenuation. The drive impedance must also match the line impedance closely enough to ensure that, by the time the next edge occurs, any parasitic ripples caused by departures from the rise time /line length matching criterion have substantially dampened out.

The invention has been described in conjunction with the preferred embodiment. It is evident that numerous alternatives, modifications, variations and uses will be apparent to those skilled in the art in light of the foregoing description.

Claims

CLAIMSWhat is claimed is:

1. A signal line system comprising: a signal generating source at a first end of a signal line to generate a signal having a rise time, said rise time of the signal generated on the signal line set substantially equal to twice a delay incurred by the signal traveling down the signal line and back to the source; taps along the signal line for reading the signal; an unterminated second end of the signal line opposite to the first end, whereby a signal generated by the source is reflected back towards the source; such that signals read at the taps reach a predetermined value with minimum skew.

2. The signal line system as set forth in claim 1, wherein said signal line has a characteristic impedance and said source impedance is substantially equal to the characteristic impedance of the line.

3. The signal line system as set forth in claim 1, further comprising inductance means to enhance line Q to be a value greater than unity.

4. The signal line system as set forth in claim 1, wherein the predetermined value is V/2 wherein V represents the voltage rail of the signal.

5. The signal line system as set forth in claim 1, further comprising buffers coupled to each of the taps, said buffers having a threshold equal approximately to the predetermined value, such that an output signal is generated by the buffer when the signal reaches the threshold.

6. The signal line system as set forth in claim 1, wherein the signal line is configured to increase the ratio of inductance to resistance without substantially increasing the ratio of capacitance to inductance.

7. The signal line system as set forth in claim 1, wherein the signal is a clock signal.

8. In a signal line delineated by a source end and load end, a source generator coupled to the source end for generating a signal on the signal line, said signal line having a resistance, said signal line having a plurality of taps coupled to the signal line from which an output signal is generated from the signal, a method for controlling the signal to be read at the taps with minimum skew such that the signal reaches a predetermined voltage value at the taps with minimum skew, comprising the steps of: setting the rise time of the signal to be approximately equal to twice a delay incurred by the signal traveling from the source end, down the signal line to the load end and back to the source end; providing the load end of the signal line to be unterminated such that a signal traveling to the unterminated end of the signal line is reflected back as a reflected signal towards the source end; constructively interfering the signal and reflected signal to generate a combined signal detecting the combined signal at each of the taps; whereby the combined signal detected at each of the taps reaches a predetermined voltage at approximately the same time.

9. The method as set forth in claim 8, wherein the signal line has a characteristic impedance and said method further comprises the step of setting the impedance of the source generator to be approximately equal to the characteristic impedance of the signal line.

10. The method as set forth in claim 8, further comprising the step of controlling inductance on the signal line such that line Q is a value greater than unity.

11. The method as set forth in claim 8, wherein the predetermined value is equal to V/2, where V is the voltage rail of the signal.

12. The method as set forth in claim 8, further comprising the step of buffering the combined signal detected at the taps such that an output signal is generated at each of the taps when the detected combined signal crosses a predetermined threshold.

13. The method as set forth in claim 12, wherein the predetermined threshold is approximately equal to the predetermined voltage.