WO1995030191A1 - Apparatus and method for network access through modular connections - Google Patents

Apparatus and method for network access through modular connections Download PDF

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Publication number
WO1995030191A1
WO1995030191A1 PCT/US1995/005535 US9505535W WO9530191A1 WO 1995030191 A1 WO1995030191 A1 WO 1995030191A1 US 9505535 W US9505535 W US 9505535W WO 9530191 A1 WO9530191 A1 WO 9530191A1
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WO
WIPO (PCT)
Prior art keywords
input
output
recited
processor
data
Prior art date
Application number
PCT/US1995/005535
Other languages
French (fr)
Inventor
Lynn D. Alley
R. Todd Garrett
David Clair Olsen
Original Assignee
Dayna Communications, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dayna Communications, Inc. filed Critical Dayna Communications, Inc.
Priority to AU25847/95A priority Critical patent/AU2584795A/en
Publication of WO1995030191A1 publication Critical patent/WO1995030191A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4072Drivers or receivers

Definitions

  • This invention relates to remote network access for computer and communications devices and to methods used to manage, control and secure remote accessible networks, in particular to a device used to provide access to the local area network through use of a plurality of modular PCMCIA components.
  • the processor-controlled device is connected by the appropriate means to the LAN, allowing for transmission of information (such as commands and data) between the processor-controlled device and the LAN.
  • the processor controlled device has electronic connections to a plurality of modular
  • Each of these connectors is capable of receiving one or two modular input/output devices.
  • These modular input/output devices when inserted into a input/output connector and when connected by appropriate means to a communication channel, allows for the transmission of information (such as commands and data) between the device and other computers or
  • the processor controls the flow of information from the LAN or any of the installed modular input/output devices to any other installed modular input/output device or the LAN.
  • Programs stored in Read-Only Memory (ROM) are executed by the processor to perform start-up, diagnostics, communication device identification and initialization, security, and
  • the invention permits a user with a computer, a modem and a telephone line to connect to a local area network or to another user also connected to the invented device through a computer, a modem and a telephone line.
  • users can transmit and receive information in the same manner and same ease that they would experience if they were directly connected to each other on the LAN.
  • Figure 1 illustrates the rear view of one preferred embodiment of the enclosure in which the invention may operate.
  • Figure 2 illustrates the front view of one preferred embodiment of the enclosure in which the invention may operate.
  • Figure 3 is a flow diagram showing the steps of one preferred embodiment of the method of the invention.
  • FIG. 4 is a block diagram of the working components of one preferred embodiment of the invention.
  • FIG. 5 is a block diagram of the electronic circuits of one preferred embodiment of the invention.
  • Figure 6 depicts the schematic of the processor and EPROM portion of one preferred embodiment of the invention.
  • Figure 7 depicts the schematic of the local talk circuit portion of one preferred embodiment of the invention.
  • Figure 8 depicts the schematic of the Ethernet interface portion of one preferred embodiment of the invention.
  • Figure 9 depicts the schematic of the PCMCIA modem connections 0 - 2 portion of one preferred
  • Figure 10 depicts the schematic of the PCMCIA modem connections 3 - 5 portion of one preferred
  • Figure 11 depicts the schematic of the PCMCIA modem connections 6 - 7 portion of one preferred
  • Figure 12 depicts the schematic of RAM portion of one preferred embodiment of the invention.
  • Figure 13 depicts the schematic of the Host PCMCIA Controller portion of one preferred embodiment of the invention.
  • Figure 14 depicts the schematic of the development system interface portion of one preferred embodiment of the invention.
  • Figure 15 depicts the schematic of the register portion of one preferred embodiment of the invention.
  • Figure 16 depicts the schematic of the LED control portion of one preferred embodiment of the invention.
  • Figure 17 depicts the schematic of the logic portion of one preferred embodiment of the invention. Detailed Description of the Invention
  • FIG. 1 which illustrates a representative view of the rear of the enclosure 101 of the invention, eight connectors 108a-108h can be seen. These connectors 108a-108h provide access to input/output devices. Also shown in Figure 1 are a power switch 102 provided to permit the operator to power up and down the invention. A connector 103 for a thick Ethernet
  • a connection is provided.
  • Local Area Network status is provided with an LED 104.
  • An AC plug connector 105 is provided.
  • a Thin Ethernet connector 106 is shown in figure 1.
  • a 10BASE-T connector 107 is shown in Figure 1.
  • Figure 2 illustrates a representative front view of the enclosure 201, where eight sets of status LEDs 202a-202h can be seen. Also shown in Figure 2 are two general purpose PCMCIA slots 201a and 201b.
  • Figure 3 depicts the method for network access and data transfer that is considered to be a part of the invention.
  • the first step 301 is the insertion of modular input/output devices into
  • the second step 302 is the sensing of the type of modular input/output device which was inserted in the first step.
  • the third step 303 is initializing of the modular input/output device.
  • the fourth step 304 represents the receipt of data into the invention.
  • the fifth step 305 represents the
  • FIG. 4 depicts the block diagram of the invention. Identified on this block diagram are a RISC- based processor 401, static memory 404, dynamic memory 406, an Ethernet controller 402, Apple Remote Access Protocol ("ARAP") Stack 405, a PCMCIA Controller 407, a data and control bus 408 and the PCMCIA modem slots 108.
  • RISC- based processor 401 static memory 404
  • dynamic memory 406 dynamic memory 406
  • an Ethernet controller 402 Apple Remote Access Protocol
  • ARAP Apple Remote Access Protocol
  • PCMCIA Controller 407 PCMCIA Controller
  • data and control bus 408 PCMCIA modem slots 108.
  • the invention can support any remote access network protocol, such as INRAP, IPX over PPP, NetBEUI over PIP, TCPIP and ARAP.
  • remote access network protocol such as INRAP, IPX over PPP, NetBEUI over PIP, TCPIP and ARAP.
  • processors including RISC and CISC can be used.
  • Figure 5 depicts a functional block diagram of the invention and a jumper table 501 used to enable the selection of particular circuit components.
  • Figure 6 depicts a portion of the electronic schematic and shows the processor and connections 601, the EPROM 602, pull-up resistors 603, a power monitor circuit 604, a clock circuit 605, bypass capacitors 606 and a jumper block 607.
  • Figure 7 depicts a portion of the electronic schematic and shows the local talk controller 701, a timer/counter circuit 702, a set of processor bus buffers 703, a set of transceiver/receivers 704 and a local talk connector 705.
  • FIG 8 depicts a portion of the electronic schematic and shows the Ethernet controller 801
  • FIG. 9 depicts a portion of the electronic schematic and shows data buffers 901, fuses 902 and input/output connectors 108.
  • Figure 10 depicts a portion of the electronic schematic and shows buffers 1001 and input/output connectors 108.
  • Figure 11 depicts a portion of the electronic schematic and shows buffers 1101 and input/output
  • Figure 12 depicts a portion of the electronic schematic and shows dynamic RAM 1201, a RAM controller 1202, a real-time clock 1203, the speaker interface circuit 1204, static RAM 1205 and a socket 1206 for memory expansion.
  • Figure 13 depicts a portion of the electronic schematic and shows the PCMCIA interface controller 1301, data registers 1302, 1303, fuses 1304 and general purpose PCMCIA connectors 201.
  • Figure 14 depicts a portion of the electronic schematic and shows the system interface connectors 1401.
  • Figure 15 depicts a portion of the electronic schematic and shows read/write registers 1501.
  • Figure 16 depicts a portion of the electronic schematic and shows the LED circuit detail, with LED blocks 202 and connectors 1601.
  • Figure 17 depicts a portion of the electronic schematic and shows the traffic detect logic 1701, DMA controller logic 1702, wait generation logic 1703, I/O logic 1704, registers 1705, multiplexers 1706 and PCMCIA host logic 1707.
  • an input/output device such as a PCMCIA modem
  • PCMCIA Standards PCMCIA means “Personal Computer
  • the processor 401 is inserted (as depicted in step 301 of Figure 2) into a connector 108 its presence is sensed across the processor bus 408 by the processor 401.
  • the processor 401 is a RISC-based AM29200 available from Advanced Micro Devices, Inc. located in Sunnyvale, California. In other embodiments of the invention, other processes may be used, whether or not RISC-based.
  • the processor 401 interrogates the input/output device to determine the input/output device's type and characteristics (as depicted by step 302 of Figure 2).
  • the input/output device is initialized (as depicted by step 303 of Figure 2) by the processor 401 across the bus 408 using a table of initialization values which are stored in static memory 404.
  • the device waits for data transmitted either originating from a remote telephone line connected to the input/output device or from the bus itself 408.
  • data is received (step 304 depicted in Figure 3)
  • it is identified by its source and destination by the processor 401 and transferred across the bus 408 to the designated destination (step 305 depicted in Figure 3).
  • data received through an input/output connector 108 via a PCMCIA modem from a telephone line connection is transferred across the bus 408 to the processor 401 which identifies the data and stores it into dynamic memory 406.
  • processor 401 then initiates the destination port for the data, assume for this example that the destination is computer on the local area network.
  • the processor 401 sets up the local area network controller 402 (such as Ethernet controller) then transfers the data from dynamic memory 406 across the bus 408 to the local area network controller 402 which passes the data to transceivers 403 and out the port to the local area network (for this example the data would likely be passed through the Thick Ethernet connector 103).
  • this invention enables communication of data between two input/output devices and between input/output devices and the local area network using a variety of local area network connections including: 10BASE-T 107, Thin Ethernet (10BASE-2) 106 and Thick Ethernet 103.
  • Other connectors may be suitable in various embodiments of the invention.
  • a power switch 102 is provided to permit the operator to power down the invention prior to connecting to local area network connections using connectors 103, 106 or 107. In the preferred embodiment it is not necessary to power down the invention prior to
  • a status LED 104 (“LED” denotes light emitting diode) is provided to give 10BASE-T local area network status to the operator. When the LED 104 is lit an active connection to a local area network is indicated.
  • Associated with each input/output connector 108 is a set of four status LEDs 202 on the front panel of the chassis 101. For the purposes of this description these status LEDs 202 will be labeled left to right 1 to 4. LED 1 is green, it is illuminated when an
  • LED 1 When LED 1 is flashing on and off, it indicates that an unrecognizable input/output device has been inserted.
  • LED 2 is red, it is illuminated when a connection is made to the input/output device from an outside phone line.
  • LED 3 is yellow, it is illuminated when data is being transferred to the input/output device connector 108 from the phone line.
  • LED 4 is yellow, it is illuminated when data is being transferred from the input/output device connector 108 to the phone line.
  • connectors 201 are also included in this embodiment of the invention. These connectors 201 provide access to the device for general purpose PCMCIA cards. It is envisioned that these connectors 201 will be used to provide software, memory, or processor upgrades for the future or interface devices to a variety of compatible devices or networks such as: Token Ring, FDDI or Disk Drives. Other
  • PCMCIA modems for the input/output devices and Ethernet for the local area network, the method employed is not limited to this technology.
  • Figures 5 through 17 show detailed schematics of this particular embodiment of the invention.
  • Figure 5 shows the table 501 for jumpers which may be placed on the circuit board depending on the selection of
  • Figure 6 shows the processor 601 connections as well as EPROM memory unit 602 where static memory storage is provided 404.
  • Pull up or pull down resistors 603 are provided to ensure that voltage levels to processor 601 pins are maintained correctly.
  • a reset/power monitor circuit 604 is provided to ensure that the power for the processor is maintained within specification.
  • a clock circuit 605 is used to provide the processor 601 system clock.
  • Bypass capacitors 606 are used to maintain noise free power to the electronic components.
  • a jumper block 607 is provided to permit memory component flexibility. These jumpers 607 should be set according to the jumper table 501.
  • FIG. 7 shows the local talk circuits.
  • a local talk controller 701 sends and receives signals to the connector 705 through transceiver/receivers 704.
  • a timer/counter circuit 702 is provided to control read/write access timing.
  • the invention supports local talk because that protocol is supported by APPLE brand computers as they come from the manufacturer. Any network protocol could be supported by the invention in its various embodiments.
  • Figure 8 shows the Ethernet interface circuit
  • An Ethernet controller 801 manages the interface. Signal isolation is provided by circuits 802 for the AUI connector 103.
  • a BNC Ethernet driver is provided 805 connected to the BNC Ethernet connector 106 and a DC/DC power transformer 804 is provided to voltage shift for the BNC connection.
  • a local area network transformer 803 is provided to electrically isolate the signals from the 10BASE-T connector 107.
  • FIG 9 shows the detailed connections to the input/output connectors 108.
  • Buffers 901 are provided to buffer data to and from the connectors 108.
  • Fuses 902 are used to provide electrical safety to the circuit board from the electrical risk caused by the insertion of input/output devices.
  • Figure 10 shows additional detailed connections to input/output connectors 108.
  • Buffers 1001 are provided to buffer data to and from the connectors 108.
  • Fuses 1002 are used to provide electrical safety to the circuit board from the electrical risk caused by the insertion of input/output devices.
  • Figure 11 shows additional detailed connections to input/output connectors 108.
  • Buffers 1101 are provided to buffer data to and from the connectors 108.
  • Fuses 1102 are used to provide electrical safety to the circuit board from the electrical risk caused by the insertion of input/output devices.
  • FIG. 12 shows dynamic memory 406 circuit detail.
  • Dynamic RAM 1201 is connected to the processor bus.
  • An expansion slot 1206 is provided for future memory expansion.
  • Battery backed-up Static RAM 1205 is provided to store the start-up program.
  • a Real-Time clock circuit 1203 is provided in order to support time- based functions, such as let-in and lock-out security, time-logging of errors in chronological order, etc.
  • a speaker circuit 1204 is provided to give audible
  • connection status for operator of device The speaker could be used for any purpose for which speakers can be used.
  • FIG. 13 shows the PCMCIA module controller 407 circuit detail.
  • a PCMCIA interface controller 1301 is provided. Data going to and from the general purpose PCMCIA connectors 201 is buffered registered 1302 and
  • Fuses 1304 are provided to give electrical safety to the circuit board for the electrical risk when PCMCIA devices are inserted into the device.
  • Figure 14 shows the development system interface. Connectors 1401 are provided to give access to the processor 601 for development of the system software.
  • Figure 15 shows the detail of the Read and Write Registers. Registers 1501 are used to synchronize data transfer between devices on the processor bus 408.
  • Figure 16 shows the states LED 202 circuit detail. Connections are also shown 1601 which provide access to the circuit board for an emulator test device.
  • Figure 17 shows the logic components of the design. These components provide traffic detection 1701, DMA (direct memory access) control 1702, wait state generation 1703, PCMCIA host control 1707, input/output (I/O) control 1704, registering of control lines 1705 and multiplexing of address lines 1706.
  • traffic detection 1701 DMA (direct memory access) control 1702
  • wait state generation 1703 PCMCIA host control 1707
  • PCMCIA host control 1707 PCMCIA host control 1707
  • I/O input/output

Abstract

A method (301-305) and apparatus (101, 201) for providing remote access to a computer network using modular PCMCIA modem components. These PCMCIA modem components which when inserted into the device are sensed (302), initialized (303) and brought on-line automatically. Unlike other remote access controllers, this method requires no operator set-up of the modems before they are ready for use, nor does it require separate power access and cabling to the control device for the modems. Also, unlike other remote access controllers, this invention was designed specifically to permit up to eight independent high speed modems and the local area network to operate at full speed simultaneously. By isolating the PCMCIA modems, the invention also permits insertion and removal of PCMCIA modems while the invention is in operation, without interfering with communication through the device (101, 201).

Description

APPARATUS AND METH0D F0R NETWORK ACCESS THROUGH MODULAR CONNECTIONS
Background of the Invention
Field of the Invention. This invention relates to remote network access for computer and communications devices and to methods used to manage, control and secure remote accessible networks, in particular to a device used to provide access to the local area network through use of a plurality of modular PCMCIA components.
Description of Related Art. It is often desirable to provide for remote access to local area networks. In the prior art, to accomplish this it is necessary to have both computer hardware or components thereof connected to both the local area network and to one or more telephone lines. Such computer hardware had to have installed on it the software required to control, manage and provide security for the desired remote access. In the prior art, this was generally done by either having a stand-alone computer with remote
communications server software installed dedicated to the remote access function, or by providing a dedicated communications server, modems, a console, console and control software and providing power and cabling for and between each of the components, providing a complicated remote access system. These prior art methods have not solved the problem of providing a cost-effective solution for remote computing access to local area networks because of (1) requirements for dedicated computer systems to manage the access, (2) insufficient throughput capability to support the desired number of connections to the local area network, (3) requirements for operator intervention in the set-up and management of the modem connections, (4) lack of an integrated software security system, (5) use of non-industry standard components and/or requirements of users to mix and match hardware and software components from a variety of vendors, (6) requirements for supplying separate power and cabling for each of the modems and (7) difficulty of configuring system under prior methods.
Summary of the Invention
It is an object of this invention to provide remote access to Local Area Networks ("LAN's") by utilizing modular hardware components in a high
throughput and reconfigurable manner. This is achieved by having a processor-controlled device which connects to both a LAN and a number of special purpose Modular
Input/Output (I/O) devices. The processor-controlled device is connected by the appropriate means to the LAN, allowing for transmission of information (such as commands and data) between the processor-controlled device and the LAN. The processor controlled device has electronic connections to a plurality of modular
input/output connectors. Each of these connectors is capable of receiving one or two modular input/output devices. These modular input/output devices, when inserted into a input/output connector and when connected by appropriate means to a communication channel, allows for the transmission of information (such as commands and data) between the device and other computers or
electronic devices. The processor controls the flow of information from the LAN or any of the installed modular input/output devices to any other installed modular input/output device or the LAN. Programs stored in Read-Only Memory (ROM) are executed by the processor to perform start-up, diagnostics, communication device identification and initialization, security, and
compression functions.
The invention permits a user with a computer, a modem and a telephone line to connect to a local area network or to another user also connected to the invented device through a computer, a modem and a telephone line. Through this connection users can transmit and receive information in the same manner and same ease that they would experience if they were directly connected to each other on the LAN.
Brief Description of the Drawings
Figure 1 illustrates the rear view of one preferred embodiment of the enclosure in which the invention may operate.
Figure 2 illustrates the front view of one preferred embodiment of the enclosure in which the invention may operate.
Figure 3 is a flow diagram showing the steps of one preferred embodiment of the method of the invention.
Figure 4 is a block diagram of the working components of one preferred embodiment of the invention.
Figure 5 is a block diagram of the electronic circuits of one preferred embodiment of the invention.
Figure 6 depicts the schematic of the processor and EPROM portion of one preferred embodiment of the invention.
Figure 7 depicts the schematic of the local talk circuit portion of one preferred embodiment of the invention.
Figure 8 depicts the schematic of the Ethernet interface portion of one preferred embodiment of the invention.
Figure 9 depicts the schematic of the PCMCIA modem connections 0 - 2 portion of one preferred
embodiment of the invention.
Figure 10 depicts the schematic of the PCMCIA modem connections 3 - 5 portion of one preferred
embodiment of the invention.
Figure 11 depicts the schematic of the PCMCIA modem connections 6 - 7 portion of one preferred
embodiment of the invention.
Figure 12 depicts the schematic of RAM portion of one preferred embodiment of the invention. Figure 13 depicts the schematic of the Host PCMCIA Controller portion of one preferred embodiment of the invention.
Figure 14 depicts the schematic of the development system interface portion of one preferred embodiment of the invention.
Figure 15 depicts the schematic of the register portion of one preferred embodiment of the invention.
Figure 16 depicts the schematic of the LED control portion of one preferred embodiment of the invention.
Figure 17 depicts the schematic of the logic portion of one preferred embodiment of the invention. Detailed Description of the Invention
Referring to Figure 1, which illustrates a representative view of the rear of the enclosure 101 of the invention, eight connectors 108a-108h can be seen. These connectors 108a-108h provide access to input/output devices. Also shown in Figure 1 are a power switch 102 provided to permit the operator to power up and down the invention. A connector 103 for a thick Ethernet
connection is provided. Local Area Network status is provided with an LED 104. An AC plug connector 105 is provided. A Thin Ethernet connector 106 is shown in figure 1. A 10BASE-T connector 107 is shown in Figure 1.
Figure 2 illustrates a representative front view of the enclosure 201, where eight sets of status LEDs 202a-202h can be seen. Also shown in Figure 2 are two general purpose PCMCIA slots 201a and 201b.
Figure 3 depicts the method for network access and data transfer that is considered to be a part of the invention. In Figure 3, the first step 301 is the insertion of modular input/output devices into
input/output connectors. The second step 302 is the sensing of the type of modular input/output device which was inserted in the first step. The third step 303 is initializing of the modular input/output device. The fourth step 304 represents the receipt of data into the invention. The fifth step 305 represents the
transmission of data from the invention.
Figure 4 depicts the block diagram of the invention. Identified on this block diagram are a RISC- based processor 401, static memory 404, dynamic memory 406, an Ethernet controller 402, Apple Remote Access Protocol ("ARAP") Stack 405, a PCMCIA Controller 407, a data and control bus 408 and the PCMCIA modem slots 108. For more information about the ARAP Stack, the reader is directed to a document entitled "Apple Talk Remote Access Protocol (ARAP) Developer's Toolkit - Beta 2.0" which is hereby incorporated by reference. In various
embodiments, the invention can support any remote access network protocol, such as INRAP, IPX over PPP, NetBEUI over PIP, TCPIP and ARAP. In various embodiments of the invention, various processors including RISC and CISC can be used.
Figure 5 depicts a functional block diagram of the invention and a jumper table 501 used to enable the selection of particular circuit components.
Figure 6 depicts a portion of the electronic schematic and shows the processor and connections 601, the EPROM 602, pull-up resistors 603, a power monitor circuit 604, a clock circuit 605, bypass capacitors 606 and a jumper block 607.
Figure 7 depicts a portion of the electronic schematic and shows the local talk controller 701, a timer/counter circuit 702, a set of processor bus buffers 703, a set of transceiver/receivers 704 and a local talk connector 705.
Figure 8 depicts a portion of the electronic schematic and shows the Ethernet controller 801,
isolation circuits 802, a transformer 803, a power transformer 804, an Ethernet driver 805, an LED 104, a BNC connector 106 and a 10BASE-T connector 107. Figure 9 depicts a portion of the electronic schematic and shows data buffers 901, fuses 902 and input/output connectors 108.
Figure 10 depicts a portion of the electronic schematic and shows buffers 1001 and input/output connectors 108.
Figure 11 depicts a portion of the electronic schematic and shows buffers 1101 and input/output
connectors 108.
Figure 12 depicts a portion of the electronic schematic and shows dynamic RAM 1201, a RAM controller 1202, a real-time clock 1203, the speaker interface circuit 1204, static RAM 1205 and a socket 1206 for memory expansion.
Figure 13 depicts a portion of the electronic schematic and shows the PCMCIA interface controller 1301, data registers 1302, 1303, fuses 1304 and general purpose PCMCIA connectors 201.
Figure 14 depicts a portion of the electronic schematic and shows the system interface connectors 1401.
Figure 15 depicts a portion of the electronic schematic and shows read/write registers 1501.
Figure 16 depicts a portion of the electronic schematic and shows the LED circuit detail, with LED blocks 202 and connectors 1601.
Figure 17 depicts a portion of the electronic schematic and shows the traffic detect logic 1701, DMA controller logic 1702, wait generation logic 1703, I/O logic 1704, registers 1705, multiplexers 1706 and PCMCIA host logic 1707.
Referring to the aforementioned Figures, when an input/output device (such as a PCMCIA modem; the
PCMCIA protocol is described in a document entitled
"PCMCIA Standards" (PCMCIA means "Personal Computer
Memory Interface Association", which is located at 1030G East Duane Avenue, Sunnyvale, California 94086) which is hereby incorporated by reference) is inserted (as depicted in step 301 of Figure 2) into a connector 108 its presence is sensed across the processor bus 408 by the processor 401. In the case of this embodiment of the invention the processor 401 is a RISC-based AM29200 available from Advanced Micro Devices, Inc. located in Sunnyvale, California. In other embodiments of the invention, other processes may be used, whether or not RISC-based. Once the input/output device's presence is sensed, the processor 401 interrogates the input/output device to determine the input/output device's type and characteristics (as depicted by step 302 of Figure 2). Once identified as per step 302, the input/output device is initialized (as depicted by step 303 of Figure 2) by the processor 401 across the bus 408 using a table of initialization values which are stored in static memory 404. Once initialized in step 303, the device waits for data transmitted either originating from a remote telephone line connected to the input/output device or from the bus itself 408. When data is received (step 304 depicted in Figure 3), it is identified by its source and destination by the processor 401 and transferred across the bus 408 to the designated destination (step 305 depicted in Figure 3). For example, data received through an input/output connector 108 via a PCMCIA modem from a telephone line connection is transferred across the bus 408 to the processor 401 which identifies the data and stores it into dynamic memory 406. The
processor 401 then initiates the destination port for the data, assume for this example that the destination is computer on the local area network. The processor 401 sets up the local area network controller 402 (such as Ethernet controller) then transfers the data from dynamic memory 406 across the bus 408 to the local area network controller 402 which passes the data to transceivers 403 and out the port to the local area network (for this example the data would likely be passed through the Thick Ethernet connector 103). In a similar manner this invention enables communication of data between two input/output devices and between input/output devices and the local area network using a variety of local area network connections including: 10BASE-T 107, Thin Ethernet (10BASE-2) 106 and Thick Ethernet 103. Other connectors may be suitable in various embodiments of the invention.
This embodiment of the invention provides a variety of features enhancing the operation of the invention. A power switch 102 is provided to permit the operator to power down the invention prior to connecting to local area network connections using connectors 103, 106 or 107. In the preferred embodiment it is not necessary to power down the invention prior to
connection. An AC power plug 105 is provided to bring AC power to the device. A status LED 104 ("LED" denotes light emitting diode) is provided to give 10BASE-T local area network status to the operator. When the LED 104 is lit an active connection to a local area network is indicated. Associated with each input/output connector 108 is a set of four status LEDs 202 on the front panel of the chassis 101. For the purposes of this description these status LEDs 202 will be labeled left to right 1 to 4. LED 1 is green, it is illuminated when an
input/output device has been inserted into its connector 108, has been sensed 302 by the processor 401 and identified. When LED 1 is flashing on and off, it indicates that an unrecognizable input/output device has been inserted. LED 2 is red, it is illuminated when a connection is made to the input/output device from an outside phone line. LED 3 is yellow, it is illuminated when data is being transferred to the input/output device connector 108 from the phone line. LED 4 is yellow, it is illuminated when data is being transferred from the input/output device connector 108 to the phone line.
Also included in this embodiment of the invention are two connectors 201 on the front panel of the chassis 101. These connectors 201 provide access to the device for general purpose PCMCIA cards. It is envisioned that these connectors 201 will be used to provide software, memory, or processor upgrades for the future or interface devices to a variety of compatible devices or networks such as: Token Ring, FDDI or Disk Drives. Other
compatible devices or networks could be used with the invention as well.
While this particular embodiment of the
invention uses PCMCIA modems for the input/output devices and Ethernet for the local area network, the method employed is not limited to this technology.
Figures 5 through 17 show detailed schematics of this particular embodiment of the invention. Figure 5 shows the table 501 for jumpers which may be placed on the circuit board depending on the selection of
particular circuit components selected.
Figure 6 shows the processor 601 connections as well as EPROM memory unit 602 where static memory storage is provided 404. Pull up or pull down resistors 603 are provided to ensure that voltage levels to processor 601 pins are maintained correctly. A reset/power monitor circuit 604 is provided to ensure that the power for the processor is maintained within specification. A clock circuit 605 is used to provide the processor 601 system clock. Bypass capacitors 606 are used to maintain noise free power to the electronic components. A jumper block 607 is provided to permit memory component flexibility. These jumpers 607 should be set according to the jumper table 501.
Figure 7 shows the local talk circuits. A local talk controller 701 sends and receives signals to the connector 705 through transceiver/receivers 704.
Data moves between the processor 601 to the local talk controller 701 through the processor bus 408 buffers 703. A timer/counter circuit 702 is provided to control read/write access timing. The invention supports local talk because that protocol is supported by APPLE brand computers as they come from the manufacturer. Any network protocol could be supported by the invention in its various embodiments.
Figure 8 shows the Ethernet interface circuit.
An Ethernet controller 801 manages the interface. Signal isolation is provided by circuits 802 for the AUI connector 103. A BNC Ethernet driver is provided 805 connected to the BNC Ethernet connector 106 and a DC/DC power transformer 804 is provided to voltage shift for the BNC connection. A local area network transformer 803 is provided to electrically isolate the signals from the 10BASE-T connector 107.
Figure 9 shows the detailed connections to the input/output connectors 108. Buffers 901 are provided to buffer data to and from the connectors 108. Fuses 902 are used to provide electrical safety to the circuit board from the electrical risk caused by the insertion of input/output devices.
Figure 10 shows additional detailed connections to input/output connectors 108. Buffers 1001 are provided to buffer data to and from the connectors 108. Fuses 1002 are used to provide electrical safety to the circuit board from the electrical risk caused by the insertion of input/output devices.
Figure 11 shows additional detailed connections to input/output connectors 108. Buffers 1101 are provided to buffer data to and from the connectors 108. Fuses 1102 are used to provide electrical safety to the circuit board from the electrical risk caused by the insertion of input/output devices.
Figure 12 shows dynamic memory 406 circuit detail. Dynamic RAM 1201 is connected to the processor bus. An expansion slot 1206 is provided for future memory expansion. Battery backed-up Static RAM 1205 is provided to store the start-up program. A Real-Time clock circuit 1203 is provided in order to support time- based functions, such as let-in and lock-out security, time-logging of errors in chronological order, etc. A speaker circuit 1204 is provided to give audible
connection status for operator of device. The speaker could be used for any purpose for which speakers can be used.
Figure 13 shows the PCMCIA module controller 407 circuit detail. A PCMCIA interface controller 1301 is provided. Data going to and from the general purpose PCMCIA connectors 201 is buffered registered 1302 and
1303. Fuses 1304 are provided to give electrical safety to the circuit board for the electrical risk when PCMCIA devices are inserted into the device.
Figure 14 shows the development system interface. Connectors 1401 are provided to give access to the processor 601 for development of the system software.
Figure 15 shows the detail of the Read and Write Registers. Registers 1501 are used to synchronize data transfer between devices on the processor bus 408.
Figure 16 shows the states LED 202 circuit detail. Connections are also shown 1601 which provide access to the circuit board for an emulator test device.
Figure 17 shows the logic components of the design. These components provide traffic detection 1701, DMA (direct memory access) control 1702, wait state generation 1703, PCMCIA host control 1707, input/output (I/O) control 1704, registering of control lines 1705 and multiplexing of address lines 1706. The logic equations performed by the GAL chips shown in Figure 17 are as defined below.
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It is to be understood that the above detailed
description of the embodiment of the invention is merely illustrative of numerous and varied other embodiments which may constitute applications of the principles of the invention. Such other embodiments may be readily devised by those skilled in the art without departing from the spirit or scope of this invention and it is our intent that they be deemed within the scope of our invention.

Claims

Claims We claim:
1. A method for providing remote access to a computer network, said computer network comprising:
a processor-controlled device executing an operating system adapted to control communications between
interfaces;
an interface connecting the processor-controlled device to a computer network;
a plurality of input/output connectors connecting the processor-controlled device to modular input/output devices;
the method of the invention comprising:
(A) inserting a plurality of modular input/output devices into the input/output connectors;
(B) sensing type of said modular input/output devices;
(C) initializing said modular input/output devices to communicate data upon command;
(D) receiving data from said modular input/output device;
(E) transmitting said data to a network interface;
(F) receiving network data from a network interface; and
(G) transmitting said network data to said modular input/output device.
2. A method as recited in claim 1, wherein said processor controlled device is a Reduced Instruction Set Computer system.
3. A method as recited in claim 1, wherein said computer system contains static memory for storage of operating system.
4. A method as recited in claim 1, wherein said computer system contains dynamic memory for data storage.
5. A method as recited in claim 1, wherein said computer system includes an Ethernet interface control device.
6. A method as recited in claim 1, wherein said computer system includes a remote access network protocol stack.
7. A method as recited in claim 1, wherein said network interface connection is Ethernet.
8. A method as recited in claim 1, wherein said input/output connectors are PCMCIA compatible.
9. A method for providing remote access to a computer network, the computer network comprising:
a processor controlled device executing an operating system adapted to control communications between
interfaces;
an interface connecting said processor controlled device to a computer network;
a plurality of input/output connectors connecting said processor controlled device to modular input/output devices;
the method of the invention comprising:
(A) inserting a plurality of modular input/output devices into input/output connectors;
(B) sensing type of said modular input/output devices;
(C) initializing said modular input/output devices to communicate data upon command;
(D) receiving network data from a network interface;
(E) transmitting said network data to said modular input/output device;
(F) receiving data from a modular input/output device; and
(G) transmitting said data to said network
interface.
10. A method as recited in claim 9, wherein said processor controlled device is a Reduced Instruction Set Computer system.
11. A method as recited in claim 9, wherein said computer system contains static memory for storage of operating system.
12. A method as recited in claim 9, wherein said computer system contains dynamic memory for data storage.
13. A method as recited in claim 9, wherein said computer system includes an Ethernet interface control device.
14. A method as recited in claim 9, wherein said computer system includes a remote access protocol stack.
15. A method as recited in claim 9, wherein said network interface connection is Ethernet.
16. A method as recited in claim 9, wherein said input/output connectors are PCMCIA compatible.
17. A method for providing remote access to a computer network, the computer network comprising:
a processor controlled device executing an operating system adapted to control communications between
interfaces;
an interface connecting said processor controlled device to a computer network;
a plurality of input/output connectors connecting said processor controlled device to modular input/output devices;
said method comprising:
(A) inserting a plurality of modular input/output devices into said input/output connectors;
(B) sensing type of said modular input/output devices;
(C) initializing said modular input/output devices to communicate data upon command;
(D) receiving first data from first said modular input/output device;
(E) transmitting said first data to second said modular input/output device;
(F) receiving second data from said second modular input/output device; and
(G) transmitting said second data to said first modular input/output device.
18. A method as recited in claim 17, wherein said processor controlled device is a Reduced Instruction Set Computer system.
19. A method as recited in claim 17, wherein said computer system contains static memory for storage of operating system.
20. A method as recited in claim 17, wherein said computer system contains dynamic memory for data storage.
21. A method as recited in claim 17, wherein said computer system includes an Ethernet interface control device.
22. A method as recited in claim 17, wherein said computer system includes a remote access network protocol stack.
23. A method as recited in claim 17, wherein said network interface connection is Ethernet.
24. A method as recited in claim 17, 1wherein said input/output connectors are PCMCIA compatible.
25. A method for providing remote access to a computer network, the computer network comprising:
a processor controlled device executing an operating system adapted to control communications between
interfaces;
an interface connecting said processor controlled device to a computer network;
a plurality of input/output connectors connecting the processor controlled device to modular input/output devices;
the method of the invention comprising:
(A) inserting a plurality of modular input/output devices into said input/output connectors;
(B) sensing type of said modular input/output devices;
(C) initializing said modular input/output devices to communicate data upon command;
(D) receiving data from said modular input/output device; (E) transmitting said data to said network
interface;
(F) receiving network data from network interface;
(G) transmitting said network data to said modular input/output device; and
(H) repeating steps (D) through (G) until
communication completed.
26. A method as recited in claim 25, wherein said processor controlled device is a Reduced Instruction Set Computer system.
27. A method as recited in claim 25, wherein said computer system contains static memory for storage of operating system.
28. A method as recited in claim 25, wherein said computer system contains dynamic memory for data storage.
29. A method as recited in claim 25, wherein said computer system includes an Ethernet interface control device.
30. A method as recited in claim 25, wherein said computer system includes an remote access protocol stack.
31. A method as recited in claim 25, wherein said network interface connection is Ethernet.
32. A method as recited in claim 25, wherein said input/output connectors are PCMCIA compatible.
33. An apparatus comprising:
(A) a processor-controlled device;
(B) means for interfacing said processor-controlled device to a computer network to facilitate communication between said processor-controlled device and a computer network;
(C) a plurality of input/output connectors, said input/output connectors being adapted to receive
insertable modular input/output devices;
(D) means for connecting said input/output
connectors to said processor-controlled device such that an insertable modular input/output device inserted into said one of said input/output connectors may communicate with said processor-controlled device;
(E) means for sensing a type of said modular input/output device;
(F) means for initializing a modular input/output device based upon said sensed type to communicate data upon command;
(G) means for communicating data between a modular input/output device and another modular.
34. An apparatus comprising:
(A) a processor-controlled device;
(B) means for interfacing said processor-controlled device to a computer network to facilitate communication between said processor-controlled device and a computer network;
(C) a plurality of input/output connectors, said input/output connectors being adapted to receive insertable modular input/output devices;
(D) means for connecting said input/output
connectors to said processor-controlled device such that an insertable modular input/output device inserted into said one of said input/output connectors may communicate with said processor-controlled device;
(E) means for sensing a type of said modular input/output device;
(F) means for initializing a modular input/output device based upon said sensed type to communicate data upon command;
(G) means for communicating data between a modular input/output device and a computer network.
PCT/US1995/005535 1994-05-02 1995-05-01 Apparatus and method for network access through modular connections WO1995030191A1 (en)

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