WO1994008396A1

WO1994008396A1 - Adaptive filtering of periodic noise

Info

Publication number: WO1994008396A1
Application number: PCT/AU1993/000510
Authority: WO
Inventors: Greig William Small
Original assignee: Commonwealth Scientific And Industrial Research Organisation
Priority date: 1992-10-05
Filing date: 1993-10-01
Publication date: 1994-04-14

Abstract

A noise cancelling system for a parameter measurement system (13) employing a delay line (15) to store a representation of the periodic noise being cancelled. The delay of the delay line is a multiple of the noise period, with timing circuitry (16) providing synchronization. The representation is continuously updated by adding the delay line output to the weighted output of the measurement system (13) in adder (14) and feeding the sum to the delay line input. Signals which are not synchronous with the reference signal (20) average out over time and do not accumulate in recirculating delay line (15). The delay line output (18) (or a function thereof) is fed to a transducer (17) that converts this signal to the same energy or signal type as measured by measurement system (13) such that the cancelling signal is applied in anti-phase to the input of the measurement system (13) as represented by the summing point (12).

Description

ADAPTIVE FILTERING OF PERIODIC NOISE

This invention relates to synchronous noise filtering in systems measuring low level signals in the presence of periodic noise. Low level measurements are frequently subject to interference from periodic noise sources arising from electrical power supplies, rotating machinery, structural resonances, and so on. For example the a.c. mains power supply may produce an interfering signal which is of a greater amplitude than, or at least a comparable amplitude to, that of the signal to be measured. Comb filters utilising analogue switches operating synchronously with the mains are a satisfactory means of reducing such interference in many situations. However, the performance of these filters is limited by imperfections in the analog switches, notably leakage in the "off" state, leading to limited rejection of the unwanted signal and generation of significant high frequency noise. There are situations where measurements of such a low signal-to-noise ratio are desired to be made that these analogue comb filters are unsatisfactory in their level of performance.

It might be considered theoretically possible to completely remove a synchronous interference signal if the frequency, amplitude and form of the signal are perfectly constant and the filtering components have perfect operating characteristics. By continuously measuring the interfering signal, its instantaneous value at any point of time can be established beforehand from the measurement of the interference signal at the corresponding points in a number of previous cycles of that signal, the signal to be measured averaging out to zero. However in practice filter components do not have perfect characteristics and usually the interfering signal itself will vary somewhat over a period of time, for example due to the actual variation in the interference source (such as frequency changes in mains power supply) .

Comb filters operating digitally are in principle free of such performance limitations. However designs for digital comb filters which have been so far proposed have not been specifically optimised to overcome, the aforesaid limitations.

USA patent 4344150 describes a digital filter within an operational amplifier for removing coherent noise from a signal. The device refers in particular to the filtering of electrically induced noise from amplifying circuits of an echo analysis system, such as a radar, sonar or seismic echo system.

While USP 4344150 provides improvements in amplification in environments suffering synchronous noise, it suffers a disadvantage in that, in order for the signal to be extracted faithfully, the signal measurement and processing system preceding the filter is required to transmit the signal and noise undistorted to the filter. If the noise is of larger amplitude than the signal the dynamic range, linearity, and slewing rate of the measurement and processing system may need to be increased beyond what would otherwise be required. In extreme cases the required performance may not be achievable in any practical implementation of the measurement system. The present invention seeks to provide a comb filter technique implemented as a synchronous noise canceller operating at the input of an electrical system.

In operation the technique provides a synchronous noise cancelling signal in the same physical energy form as the noise source, the effect of which is to be cancelled from the electrical system.

The present invention consists in a noise cancelling system for cancelling periodic noise present at an input of a physical parameter measurement system, wherein the physical parameter measurement system includes an input transducer to convert a measured parameter into a signal representative of the measured parameter and the measurement system has an output signal linearly related to the measured parameter, the noise cancelling system comprising an input arranged to accept the output signal from the measurement system, an accumulator arranged to maintain a continuously updated representation of the periodic noise present at the input of the measurement system by monitoring the output signal and transducer means arranged to synchronously feed a noise cancelling signal back to the input of the measurement system in the form of a parameter signal of the type detected by the measurement system, the noise cancelling signal being a function of the representation of the periodic noise. Preferred embodiments of the invention accumulate the representation of the periodic noise using a delay line or similar storage device having a delay period which is equal to, or a multiple of, the noise period, the input to the delay line being fed a signal from a summing device which is the sum of a weighted value of the output signal from the measurement system and the current delay line output.

In various possible implementations of the invention the noise cancelling output may be derived from the delay line input signal, the delay line output signal or the average of these two signals. It will be recognised, however, that the noise representation may be processed in other ways to derive the cancelling signal without departing from the spirit of the invention. Embodiments of the invention may employ analogue recirculating delay lines, however, in preferred embodiments of the invention the delay line is a device arranged to hold a plurality of samples, such as a charged coupled device, a digital shift register, or other sample storage device, access to which is cycled at a rate corresponding to a sampling period p such that the delay through the delay line is m x p.

In embodiments of the invention in which the delay line is a digital storage device, the measurement system output, if an analogue form, is preferably digitised by an analog to digital converter (ADC) before being weighted and added to delay line output.

The noise cancelling signal is preferably converted to an analog signal by a digital to analog converter (DAC) before being fed to the output transducer means.

Preferably, when the delay line is a digital storage device, the weighting of the output from the measurement system is achieved by shifting its digital form by n bits to give a weighting of 2^" . In one particularly advantageous embodiment of the invention, the delay line is a random access storage device with addressing controlled by timing circuits and arranged to cyclicly output and update the samples held in the device. In yet another advantageous embodiment of the invention, the delay line and summing functions are performed by software running in a programme controlled device, such as a microprocessor or personal computer, the input to the programme controlled device being the digital signal from ADC and the output from the programme controlled device being fed to the DAC.

Embodiments of the invention effectively cancel interfering periodic noise at the input of an analogue measuring or sensing system and thus reduce dynamic range requirements and ease problems of overload, non-linearity and intermodulation distortion.

By way of example only, preferred embodiments of the invention will now be described with reference to the drawings in which: Fig. 1 is a schematic diagram of a first system embodying the invention;

Fig. 2 graphically shows the amplitude response for three parameter settings of the system of Fig. 1;

Fig. 3 is a schematic diagram of a second system embodying the invention;

Fig. 4 graphically shows the amplitude response for three parameter settings of the system of Fig. 3;

Fig. 5 is a schematic diagram of a third system embodying the invention; Fig. 6 graphically shows the amplitude response for three parameter settings of the system of Fig. 5;

Fig. 7 shows a schematic fourth embodiment of the invention;

Fig. 8 shows a schematic diagram of a fifth embodiment of the invention employing digital processing means;

Figs. 9 and 10 show schematic representations of two possible implementations of the embodiment of Figure 8;

Figs. 11 and 12 graphically show performance data pertaining to embodiments of the invention.

Referring to Fig. 1, a schematic diagram of a synchronous noise cancelling system for sensor systems is shown.

A linear sensor system 13 provides an analogue electrical output 19 which is proportional to the input physical signal 11. The sensor system may include electronics for various purposes, for example for amplification, filtering and linearisation. The input signal 11 may take any physical form, e.g. ultrasonic, magnetic, vibrational, etc. It comprises the desired signal to be measured plus interfering noise of a periodic nature having period T.

The analogue signal 19 passes through an adder 14 and delay line 15, the delay of the delay line being exactly equal to the period T of the noise signal. A reference noise signal 20 and timing circuitry 16 are provided for the purpose of synchronisation. The output of the delay line is recirculated to its input via adder 14. The output of the delay line is also converted into the physical form of the input quantity via a transducer system 17, and added in opposite phase to the input of the sensor system. This addition is represented schematically by the adder 12.

The operation of the noise cancelling system is as follows. Periodic noise components at the sensor system output 19 add cumulatively into the recirculating delay line. Signals which are not synchronous with the reference signal 16 average out over time and do not accumulate in the recirculating delay line. Eventually a steady state is reached in which the periodic signal stored in the delay line, when fed back to the sensor input via transducer 17, accurately cancels the periodic noise signal present at the input 11. Under these conditions no further periodic signal is present at 19, and the cancelling signal stored in the recirculating delay line persists without change. Should there be any change in the level, period or waveform of the noise signal, the stored cancelling signal will automatically adapt to preserve cancellation at the system input. For correct operation it is advantageous that the gain of the delay line be accurately equal to one, ensuring that under steady state conditions the stored signal neither grows nor decays with time. If we let the gain of the path between points 18 and 19 through the transducer 17, adder 12 and sensor system 13 be denoted by w, and let the gain of the system 13 be denoted by A, it can be shown that under steady state conditions the transfer function of the system between input 11 and output 19 is given by A ( 1 - exp ( -j2rrfT) ) G ( f ) = ( 1 )

1 - ( l-w) exp ( -j2rrfT ) where f denotes frequency in units of hertz. G(f) represents the frequency-dependent weighting given by the system to input signal or noise.

Figure 2 shows the amplitude response | G(f) | for three values of the transducer-sensor gain w: (a) w = 0.2,

(b) w = 0.1, and

(c) w = 0.02.

It can be seen that the transfer function is that of a notch filter removing components at frequencies equal to or close to multiples of 1/T. The narrowness of the notches is determined by w.

Referring to Fig. 3, a second embodiment is illustrated in which the noise cancelling signal 18 is derived by weighting the output signal 19 from the measurement or sensing system and adding this to the output of the delay line 15, the summed signal being present at the output of the adder 14. In other respects the embodiment of Fig. 3 is similar to that of Fig. 1, however, the resultant transfer function is now given by:-

A (1 - exp (-j2rrfT)) 6(f) = (2)

(1 + w) - exp (-j2τrfT) Fig. 4 shows the amplitude response G(f) for the embodiment of Fig. 3, using the same 3 values of w as used to derive the response of Fig. 2.

Turning now to the third embodiment of the invention illustrated in Fig. 5, the noise cancelling signal 18 in this case is derived as the average of the signals at the input and output of the delay line. This summation is performed in adder 38. In this case the resultant transfer function is given by:

A (1 - exp (-j2rrfT) ) _G(f) = (3)

(1 + 1/2 w - (1 - 1/2 w) exp (-j2rrfT)

Fig. 6 shows the amplitude response G(f) from the embodiment of Fig. 5 using the same 3 values of w as used to derive the responses of Figs. 2 and 4.

It will be seen from Figs. 2, 4 and 6 that the third embodiment provides a system in which the amplitude of the response between the notches is least affected by the weighting factor w. Some sensor systems commonly provide local feedback around the sensor as a means of achieving improved linearity or dynamic range, or for some other purpose. This is the case, for example, with SQUID (superconducting quantum interference device) magnetic flux and field sensors, whose response is a very non-linear (in fact, periodic) function of the input magnetic quantity. Where such local feedback is provided, the design of the noise cancelling system is considerably simplified, as illustrated in Fig. 7. The local feedback consists of the sensor system 13, additional electronics, for example amplifiers and integrators, 22, and the transducer 17 providing a feedback signal added in antiphase at the sensor input 12. It may be shown that a signal added into this local feedback loop at adder 21, traversing the loop in the direction of the arrows, and returning to the output point 19, is subject to a gain close to unity. Thus a nett transducer-sensor gain w may be achieved by means of a signal attenuator 23 having a gain or weighting factor equal to w. The adder 14 and synchronous delay 15 complete the noise canceller. The requirement for an accurately timed unity gain delay can be conveniently met using a digital sampled data system, as shown in Fig. 8. Here 11 is the input physical signal with periodic noise interference, and 13 is a sensor system providing an analogue electrical output 19. The analogue signal passes through an optional anti-aliasing low-pass filter 24 to an analogue-to-digital converter (ADC) 25. A digital sampled data representation of the analogue signal is passed to a digital processor 26 implementing the function of a recirculating delay line. The output of the digital processor 26 passes through a digital-to-analogue converter (DAC) 27, optional smoothing low-pass filter 28, and transducer system 17 providing an analogue feedback signal in the same physical form as the original signal 11. The feedback signal is added in antiphase to the input signal as represented by adder 12. Digital clocks 29 synchronised to a reference noise signal 16 determine the sampling and data transfer rates of the ADC, DAC and digital processor. Digital output data are available at 30.

Let the sampling rate be exactly M times the fundamental frequency of the interfering noise, and let x(i) and y(i) denote the ith input and output samples of the digital processor respectively. Then the digital processor is required to effect the following algorithm:

y(i) = y(i-M) + w_dx(i-M) (4) where w, is a weighting factor implemented in the digital processor. If the gain of the analogue path comprising DAC 27, filter 28, transducer system 17, sensor system 13, filter 24 and ADC 25 is w then the system has an overall effective gain factor w given by w = w_aw_d. The digital embodiment of Fig. 8 may also be used to obtain results similar to those obtained from the embodiments of Figs. 3 and 5, having transfer functions (2) and (3) respectively. To achieve a transfer function (2) the digital processor would be required to effect the following algorithm:

Y(i) = Y( -M) + _dx(i) (5) Similarly, to achieve the transfer function (3) the digital processor would be required to effect the following algorithm.

y(i) = y(i-M) + ι/2W_d[x(i) + x(i- )] (6) If either or both of the two optional low-pass filters 24 and 28 is included in the circuit, two possible problems may arise. Firstly the phase shifts associated with the low-pass filters may cause instability in the feedback circuit. This problem can be overcome in some cases by introducing lead compensation in the digital algorithm. If the phase shifts are exactly or nearly equivalent to a delay of m sampling periods, or mT/M seconds, alteration of the algorithm (4) as follows may be advantageous:

y(i) = y(i-M+m) + w_dx(i-M+m)

This algorithm yields a transfer function differing negligibly in performance from that of (1) . Secondly when analogue low pass filters are used it is possible for frequency components higher than the filter cutoff frequency to be trapped in the digital recirculating delay line. Such high frequency components can be generated by overload conditions, for example. In the absence of high frequency feedback such components - 1 .1 -

will not be removed by normal system operation. This problem can be overcome by adding the high frequency components present at DAC 27 output 31 into the ADC 25 input 32 via a high pass filter (not shown) . Alternatively an equivalent high-frequency feedback path can be provided within the digital processor using standard digital filter algorithms.

Figs. 9 and 10 show schematically two possible implementations of the digital processor. In the hardware implementation shown in Fig. 9 the weighting factor w, is achieved by means of a digital shift of the input sampled data I entering the digital adder A. Implementation of algorithms (4) and (5) is effected by a choice of timing at the output while algorithm (6) requires some additional hardware. An n-bit shift provides a weighting factor w, = 2~ⁿ. The delay comprises a random access memory (RAM) M and an address counter C which is synchronised to the reference input signal R by means of a phase-locked loop. This type of circuit is capable of high accuracy. The case illustrated in Fig. 9 is for a filter designed to remove noise at mains frequency (50 Hz) and its harmonics from biomagnetic ' signals. Such noise may exceed the wanted signal by 2 orders of magnitude. The input and output samples have 16-bit accuracy and the adding circuitry and RAM are each 24-bits wide. An 8-bit shift gives a weighting factor

A further advantage of the hardware implementation is its high speed. In the case illustrated in Fig. 9, the sampling rate is 3.2 kHz (M=64 samples per 20 ms mains period) but could easily be much faster if the signal bandwidth required it. Alternatively the excess speed capacity of the system could be used to provide multiplexed noise cancellation for a number of sensors.

Fig. 10 shows schematically a software implementation of the digital processor using a microprocessor 36 and associated random access memory (RAM) 37. Input data 33 from the ADC is processed in accordance with one of the algorithms (4), (5) or (6) using the RAM 37 to provide a delay, and output data 35 is passed to the DAC. The microprocessor is timed by clock signal 34 which may or may not be phase-locked to the noise reference signal. If the clock signal is phase-locked to the noise, timing of the ADC and the DAC may be invested in the microprocessor itself. If the microprocessor clock is asynchronous, a separate phase-locked timing signal will be required to pace the microprocessor and to synchronise the ADC and DAC. Software implementation of the filter algorithm by means of a microprocessor requires fewer components than a hardware implementation but may be restricted in speed. A microprocessor-based mains (50 Hz) noise canceller has been built for a SQUID magnetometer system. This system is designed for detection of very weak magnetic fields, for example the biomagnetic fields of the human heart, brain etc. Typically in the operation of such a system, magnetic fields due to mains currents in the environment will be several orders of magnitude larger than the wanted signal. The SQUID system is operated with its own local feedback forming a so-called "flux-locked loop". The mains canceller and SQUID electronics may be represented schematically as shown in Fig. 7. However, the specific implementation of the canceller is digital and involves the use of a DAC, microprocessor, and ADC as in Fig. 8 (components 25, 26, and 27 respectively). Figs. 11 and 12 illustrate the performance of this system. Fig. 11 shows a frequency spectrum of the system output 19 with the mains canceller switched off. The peaks seen are all interference components at the mains frequency 50 Hz and its harmonics. Fig. 12 shows a frequency spectrum of the system output to the same scale as Fig. 11 with the mains canceller, having equation (1) as its transfer function, in operation. The 50 Hz component has been reduced in amplitude by approximately 60 dB (1000 times) and the harmonics have been reduced to a magnitude which is too small to be displayed on the scale of the figure.

It will be appreciated by persons skilled in the art that numerous variations and/or modifications may be made to the invention as shown in the specific embodiments without departing from the spirit or scope of the invention as broadly described. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive.

Claims

CLAIMS :

1. A noise cancelling system for cancelling periodic noise present at an input of a physical parameter measurement system, wherein the physical parameter measurement system includes an input transducer to convert a measured parameter into a signal representative of the measured parameter and the measurement system has an output signal linearly related to the measured parameter the noise cancelling system comprising an input arranged to accept the output signal from the measurement system, an accumulator arranged to maintain a continuously updated representation of the periodic noise present at the input of the measurement system by monitoring the output signal and transducer means arranged to synchronously feed a noise cancelling signal back to the input of the measurement system in the form of a parameter signal of the type detected by the measurement system, the noise cancelling signal being a function of the representation of the periodic noise.

2. The noise cancelling system of claim 1 wherein the accumulator is a delay line having a delay period which is equal to, or a multiple of, the noise period, the input to the delay line being fed a signal from a summing device which is the sum of a weighted value of the output signal from the measurement system and the current delay line output.

3. The noise cancelling system of claim 2 wherein the noise cancelling signal is derived from the delay line output signal.

4. The noise cancelling system of claim 2 wherein the noise cancelling signal is derived from the signal which is the input to the delay line.

5. The noise cancelling system of claim 2 wherein the noise cancelling signal is derived from a signal which is the average of the signal which is the input to the delay line and the delay line output signal.

6. The noise cancelling system of claim 2 wherein the delay line is a device arranged to hold a plurality of samples, access to which is cycled at a rate corresponding to a sampling period p such that the delay through the delay line is m x p.

7. The noise cancelling system of claim 6 wherein the delay line is a charge coupled device.

8. The noise cancelling system of claim 6 wherein the delay line is a digital storage device and the measurement system output is digitised by an analog to digital converter (ADC) before being weighted and added to delay line output.

9. The noise cancelling system of claim 8 wherein the noise cancelling signal is converted to an analog signal by a digital to analog converter (DAC) before being fed to the output transducer means.

10. The noise cancelling system of claim 9 wherein the weighting of the output from the measurement system is achieved by shifting its digital form by n bits to give a weighting of 2~ⁿ.

11. The noise cancelling system of claim 9 wherein the delay line is a shift register.

12. The noise cancelling system of claim 9 wherein the delay line is a random access storage device with addressing controlled by timing circuits and arranged to cyclicly output and update the samples held in the device.

13. The noise cancelling system of claim 9 wherein the delay line and summing functions are performed by software running in a programme controlled device, the input to the programme controlled device being the digital signal from ADC and an output from the programme controlled device being fed to the DAC.