WO1993013560A1 - Elektronisches bauelement und verfahren zu dessen herstellung - Google Patents
Elektronisches bauelement und verfahren zu dessen herstellung Download PDFInfo
- Publication number
- WO1993013560A1 WO1993013560A1 PCT/DE1992/001080 DE9201080W WO9313560A1 WO 1993013560 A1 WO1993013560 A1 WO 1993013560A1 DE 9201080 W DE9201080 W DE 9201080W WO 9313560 A1 WO9313560 A1 WO 9313560A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- base
- laterally
- electronic component
- structured
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 37
- 230000008569 process Effects 0.000 title claims abstract description 6
- 230000003071 parasitic effect Effects 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 38
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 24
- 239000004065 semiconductor Substances 0.000 claims description 18
- 238000000407 epitaxy Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 4
- 230000005669 field effect Effects 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 5
- 229910052782 aluminium Inorganic materials 0.000 claims 5
- 150000001875 compounds Chemical class 0.000 claims 4
- 230000003247 decreasing effect Effects 0.000 claims 2
- 239000010410 layer Substances 0.000 description 49
- 238000005530 etching Methods 0.000 description 9
- 238000001020 plasma etching Methods 0.000 description 6
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 239000002800 charge carrier Substances 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 3
- 229910017401 Au—Ge Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000001741 metal-organic molecular beam epitaxy Methods 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 125000002524 organometallic group Chemical group 0.000 description 2
- 230000007723 transport mechanism Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910007991 Si-N Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910006294 Si—N Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000004922 lacquer Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66454—Static induction transistors [SIT], e.g. permeable base transistors [PBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/7722—Field effect transistors using static field induced regions, e.g. SIT, PBT
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/011—Bipolar transistors
Definitions
- the invention relates to an electronic component, in particular a p-channel or n-channel permeable base transistor, with a plurality of layers produced in a composite and with at least one laterally structured layer provided for controlling a space charge zone, in particular a base.
- the invention further relates to a method for producing such a component.
- Integrated circuits are being developed as fast microwave components for use in supercomputers and high-speed data networks in the context of information technology. Integrated circuits on GaAs chips are of great importance. Components that have previously been used in this context are the MESFET and the HEMT. They both belong to the so-called field effect transistors (FET), in which the current is transported parallel to the surface of the chip.
- FET field effect transistors
- a significantly speed-determining variable, the so-called “transit time under the gate”, is limited here by the smallest, structurally achievable lateral structuring of the gate.
- the permeable base transistor which was proposed as early as 1979, is in principle a field effect transistor, but with a current direction perpendicular to the chip surface, in which the "Runtime under the gate” is significantly reduced.
- the reason for this is that the gate length in vertical structuring is predetermined by the thickness of the base layer to be deposited epitaxially.
- epitaxial methods such as molecular beam epitaxy (MBE), organometallic gas phase epitaxy (MOCVD) or organometallic molecular beam epitaxy (MOMBE, CBE, GSMBE) to produce the metallic, structured base, layer thicknesses in the range of some nuclear sites are controlled.
- a per eable base transistor, in particular made of GaAs, is known from German patent application DE 40 25 269.8. There are several, the active ones
- PJBT permeable junction base transistor
- the space charge zone designed in this way can be controlled via the highly doped, conductive base. GaAs with an n-doping in the range of 10 17 was used as the base material for the areas surrounding the base, which also includes the strobe channels located between the "fingers" of the base
- the space charge zone which forms at the interface of the base is used with the aid of a suitable bias voltage at the base to control the electrical current in the region of the current channels.
- the space charge zone which expands in the region of the lateral interface of the base layer represents a parasitic space charge capacity which disadvantageously limits the switching speed of the component.
- the object of the invention is an electronic component of the type described in the introduction, in which this effect is reduced and enables an increased switching speed. Another object is a corresponding method for producing such a component.
- the laterally structured base represents one of the two layers forming the pn junction as a controllable space charge zone.
- the base contains at least one of its two lateral interfaces with an additional layer which is structured laterally with it and which reduces parasitic space charge capacities leads in the area of the lateral interface of the base.
- semiconducting material with a doping that is at least 10 times less than the charge carrier doping of the base as material for this additional layer It may also be expedient for there to be a variation in the doping within the layer, which can be achieved, for example, during epitaxial growth by deliberately changing the doping substances.
- a particularly advantageous embodiment of the component according to the invention is that the material for filling the respective areas in the openings of the laterally structured base, which are provided as individual current channels, is to provide semi-conductive material which is suitable for the charge carrier doping, but also by the partial replacement of an element of the semiconductor (for example Al in GaAs to AlxGa “1-xAs)” and thus the deposition of 3 semiconducting heterostructures offers an additional possibility of improving the current transport mechanisms.
- an element of the semiconductor for example Al in GaAs to AlxGa “1-xAs
- a further, particularly advantageous embodiment of the electronic component lies in structuring the base laterally in a sieve shape.
- the base has laterally circular and / or oval and / or square openings.
- the PJBT is homogeneous, that is to say it is composed only of semiconductor material (for example GaAs).
- the space charge zone extends substantially uniformly into the current channel from all sides.
- the space charge zone is widened, it can be pinched off in two lateral directions, that is to say two-dimensionally.
- the method according to the invention is advantageously formed when the material for the Basis AlGaAs is chosen. If GaAs is chosen as the base material for the other active component layers within the layer sequence, a base made of AlGaAs represents an etching stop with a suitable choice of the etching substance. Consequently, even with a relatively low layer thickness, the base can, for example, contact the base layer a targeted stop of the etching of the layers located above the base up to the surface of the base surface chemically different from GaAs in the correct one
- Depth can be achieved.
- this material is not limited to the base. Rather, there is a possible location of such etch stops on the one hand where the overgrown channel is to begin and on the other hand directly above the highly doped layers which have to be contacted.
- the base has laterally circular and / or oval and / or square openings.
- the PJBT is homogeneous, ie it is only made up of semiconductor material (eg GaAs).
- the space charge zone extends substantially uniformly into the current channel from all sides.
- the space charge zone is widened, it can be pinched off in two lateral directions, that is to say two-dimensionally.
- a finger-like structure of the base in this sieve structure with the same change in voltage a greater change in current in the channel and thus a higher steepness of the component is achieved.
- the laterally structured base advantageously represents one of the two layers forming the pn junction as a controllable space charge zone.
- the base contains at least one of its two lateral interfaces an additional layer which is structured laterally with it and which is para ⁇ to reduce leads to space charge capacities in the area of the lateral interface of the base.
- a particularly advantageous embodiment of the component according to the invention is that the material for filling the respective areas in the openings of the laterally structured base, which are provided as individual current channels, is to provide semi-conductive material which is suitable for the charge carrier doping, but also due to the partial ⁇ se replacement of an element of the semiconductor (eg Al in GaAs to Al Ga. As) and thus the deposition of semiconducting heterostructures, offers an additional possibility to improve the current transport mechanisms.
- an element of the semiconductor eg Al in GaAs to Al Ga. As
- FIG. 1 shows a component according to the invention, consisting of a p-channel and a ⁇ -channel PJBT, on a single chip and is explained in the following:
- the component in FIG. 1 was produced as follows:
- a layer sequence was produced, in which an n -ip -in -i-layers- on a substrate made of n-doped GaAs follow epitaxially grew up in GaAs. (n / p mean n- or p-doped GaAs, i means intrinsic GaAs).
- an SiO 2 layer was evaporated on this layer sequence. Then the SiO ? Open cover layer to form an etching mask for the production of the current channels of the p-PJBT.
- the areas provided for the growth of the current channels were etched free except for the p layer.
- these etched areas were filled with p-doped GaAs.
- the SiO p top layer initially present there and the top i and n layers were removed with the aid of a suitable etching method.
- SiO 2 was again evaporated on the now highest level / layer and opened in a known manner to form the areas provided for the current channels of the n-PJBT in a known manner using a suitable etching mask.
- these areas, which were etched down to the n layer, were filled with n-doped GaAs and coated with an SiO ? -
- the highly doped n + or p + layers were exposed by etching and at the same time an isolation trench was etched onto the n-doped substrate and the contacts were separated to separate the areas provided as p-channel PJBT and n-channel PJBT manufactured.
- the component shown in FIG. 1 shows an example of integrating several components on the same chip. Of course, other components, such as lasers made from PJBTs, photodetectors can also be accommodated on the chip.
- Appropriate wiring which can advantageously also be provided by the p, n layers present, or by additional, deeper layers, can be used to switch any circuits, e.g. an inverter comparable to the C-MOS inverter or a Darlington circuit can be produced.
- the individual transistors are finished with an SiO ? -Layer be provided.
- these layer sequences are thus preserved, so that further individual components can be produced elsewhere on the same chip.
- Such a cover layer can be made of SiO p , but also made of Si-N. or other suitable material.
- the material should be as
- Etching mask particularly suitable for reactive ion etching (REI).
- REI reactive ion etching
- it should show as little diffusion as possible in the semiconductor material of the layer sequence (e.g. GaAs), and finally selective epitaxy - with sufficiently good properties - should be made possible.
- cover layers can be used as a "substrate" for further layer sequences growing epitaxially thereon, so that three-dimensional networking can be realized on a single chip.
- FIG. 2 shows the schematic sectional view of a PJBT according to the invention with a p-doped, laterally rectangular, sieve-shaped base.
- the oxide is then opened by reactive ion etching (RIE), with 0 ? Plasma the lacquer removed and finally through the over- transmitted as in the oxide mask trenches through all layers up to the n-GaAs g s eskyt.
- RIE reactive ion etching
- the SiO 2 is an excellent mask for H 0 2 / CH 4 ,, - RIE, which makes it possible to produce essentially vertical flanks. In this process, a polymide is formed, which can be removed again with 0 "plasma.
- the structured wafer Before being reinstalled in the epitaxial system, the structured wafer must be cleaned with a wet chemical etchant, which means that only thin surface layers are removed compared to the structures and the SiO "layer is not attacked.
- the parameters for the second epitaxy are chosen such that the channels are filled with GaAs of the desired doping and at the same time the SiO p surface remains free. This selectively filling epi-taxy only fills the previously etched trenches and the distance between source and gate can already be predetermined in the first epitaxy by the layer thickness of the intrinsic cover layer selected there.
- the metallizations for the contacts are vapor-deposited with a few mask steps in the lift-off process.
- Au-Ge / SiO p or Ni / Au-Ge / Ni is used for the source contact, which forms an ohmic contact when alloyed at approx. 400 ° C,
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/256,600 US5541424A (en) | 1991-12-23 | 1992-12-19 | Permeable base transistor having laminated layers |
EP93901646A EP0619921A1 (de) | 1991-12-23 | 1992-12-19 | Elektronisches bauelement und verfahren zu dessen herstellung |
JP5511352A JPH07502379A (ja) | 1991-12-23 | 1992-12-19 | 電子部品およびその製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DEP4142595.2 | 1991-12-23 | ||
DEP4142654.1 | 1991-12-23 | ||
DE19914142595 DE4142595C2 (de) | 1991-12-23 | 1991-12-23 | Elektronisches Bauelement und Verfahren zum Herstellen |
DE19914142654 DE4142654A1 (de) | 1991-12-23 | 1991-12-23 | Elektronisches bauelement und verfahren zu seiner herstellung |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1993013560A1 true WO1993013560A1 (de) | 1993-07-08 |
Family
ID=25910448
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE1992/001080 WO1993013560A1 (de) | 1991-12-23 | 1992-12-19 | Elektronisches bauelement und verfahren zu dessen herstellung |
Country Status (5)
Country | Link |
---|---|
US (2) | US5541424A (de) |
EP (1) | EP0619921A1 (de) |
JP (1) | JPH07502379A (de) |
CA (1) | CA2117341A1 (de) |
WO (1) | WO1993013560A1 (de) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011019396A2 (en) * | 2009-08-14 | 2011-02-17 | Unifrax I Llc | Mounting mat for exhaust gas treatment device |
US8017085B2 (en) | 2007-08-31 | 2011-09-13 | Unifrax I Llc | Substrate mounting system |
US8524161B2 (en) | 2007-08-31 | 2013-09-03 | Unifrax I Llc | Multiple layer substrate support and exhaust gas treatment device |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2117341A1 (en) * | 1991-12-23 | 1993-07-08 | Jurgen Graber | Electronic component and process for making it |
US6011279A (en) * | 1997-04-30 | 2000-01-04 | Cree Research, Inc. | Silicon carbide field controlled bipolar switch |
US6106454A (en) * | 1997-06-17 | 2000-08-22 | Medtronic, Inc. | Medical device for delivering localized radiation |
US9385224B2 (en) * | 2014-08-13 | 2016-07-05 | Northrop Grumman Systems Corporation | Method of forming an integrated multichannel device and single channel device structure |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0450274A1 (de) * | 1990-02-07 | 1991-10-09 | Forschungszentrum Jülich Gmbh | Halbleiteranordnung mit durch Feldeffekt steuerbarer Raumladungszone und Verfahren zu deren Herstellung |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3381189A (en) * | 1964-08-18 | 1968-04-30 | Hughes Aircraft Co | Mesa multi-channel field-effect triode |
FR2147883B1 (de) * | 1971-08-05 | 1977-01-28 | Teszner Stanislas | |
US4171995A (en) * | 1975-10-20 | 1979-10-23 | Semiconductor Research Foundation | Epitaxial deposition process for producing an electrostatic induction type thyristor |
US4719496A (en) * | 1982-11-24 | 1988-01-12 | Federico Capasso | Repeated velocity overshoot semiconductor device |
US4901121A (en) * | 1985-03-29 | 1990-02-13 | American Telephone & Telegraph Co., At&T Bell Labs. | Semiconductor device comprising a perforated metal silicide layer |
US4758534A (en) * | 1985-11-13 | 1988-07-19 | Bell Communications Research, Inc. | Process for producing porous refractory metal layers embedded in semiconductor devices |
JPS6384066A (ja) * | 1986-09-26 | 1988-04-14 | Semiconductor Res Found | 集積化光トリガ・光クエンチ静電誘導サイリスタ及びその製造方法 |
US5016074A (en) * | 1987-10-20 | 1991-05-14 | Bell Communications Research, Inc. | Epitaxial intermetallic contact for compound semiconductors |
US4903089A (en) * | 1988-02-02 | 1990-02-20 | Massachusetts Institute Of Technology | Vertical transistor device fabricated with semiconductor regrowth |
FR2663466A1 (fr) * | 1990-06-15 | 1991-12-20 | Thomson Csf | Composant semiconducteur a jonction schottky pour amplification hyperfrequence et circuits logiques rapides, et procede de realisation d'un tel composant. |
CA2117341A1 (en) * | 1991-12-23 | 1993-07-08 | Jurgen Graber | Electronic component and process for making it |
-
1992
- 1992-12-19 CA CA002117341A patent/CA2117341A1/en not_active Abandoned
- 1992-12-19 US US08/256,600 patent/US5541424A/en not_active Expired - Fee Related
- 1992-12-19 EP EP93901646A patent/EP0619921A1/de not_active Withdrawn
- 1992-12-19 JP JP5511352A patent/JPH07502379A/ja active Pending
- 1992-12-19 WO PCT/DE1992/001080 patent/WO1993013560A1/de not_active Application Discontinuation
-
1997
- 1997-08-19 US US08/914,496 patent/US5814548A/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0450274A1 (de) * | 1990-02-07 | 1991-10-09 | Forschungszentrum Jülich Gmbh | Halbleiteranordnung mit durch Feldeffekt steuerbarer Raumladungszone und Verfahren zu deren Herstellung |
Non-Patent Citations (2)
Title |
---|
IEEE TRANSACTIONS ON ELECTRON DEVICES Bd. 37, Nr. 9, September 1990, NEW YORK US Seiten 2090 - 2098 'Optimization of the Doping Profile in Si Permeable Base Transistors for High-Frequency, High-Voltage Operation' * |
PATENT ABSTRACTS OF JAPAN vol. 10, no. 129 (E-403)(2186) 14. Mai 1986 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8017085B2 (en) | 2007-08-31 | 2011-09-13 | Unifrax I Llc | Substrate mounting system |
US8524161B2 (en) | 2007-08-31 | 2013-09-03 | Unifrax I Llc | Multiple layer substrate support and exhaust gas treatment device |
WO2011019396A2 (en) * | 2009-08-14 | 2011-02-17 | Unifrax I Llc | Mounting mat for exhaust gas treatment device |
WO2011019396A3 (en) * | 2009-08-14 | 2011-06-09 | Unifrax I Llc | Mounting mat for exhaust gas treatment device |
US9174169B2 (en) | 2009-08-14 | 2015-11-03 | Unifrax I Llc | Mounting mat for exhaust gas treatment device |
Also Published As
Publication number | Publication date |
---|---|
US5814548A (en) | 1998-09-29 |
EP0619921A1 (de) | 1994-10-19 |
CA2117341A1 (en) | 1993-07-08 |
JPH07502379A (ja) | 1995-03-09 |
US5541424A (en) | 1996-07-30 |
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