WO1992000582A1

WO1992000582A1 - Digital color tv for personal computers

Info

Publication number: WO1992000582A1
Application number: PCT/US1991/004554
Authority: WO
Inventors: Mark C. Koz
Original assignee: Wardco
Priority date: 1990-06-27
Filing date: 1991-06-26
Publication date: 1992-01-09
Also published as: US5592233A; US5249164A; US5341175A; AU8294591A; US5502503A

Abstract

On a single plug-in card (20) for insertion in a desk model personal computer are mounted all the components to provide display on a portion of the computer screen as selected and controlled by the computer, television picture or similar compatible display, and reproduce an associated audio signal. The miniature television adapter functions within the operating cycle of a host computer capable of operating in a multi-program mode with split or overlay display screen capability. It does not preempt or override any normal computer functions. Its specially designed data transfer stage and control circuits (60) and the method of delivering eight-bit data words singly or multiply in parallel make possible delivery of a digitally formatted television data stream at a sufficient speed to enable display of television images at a rate of thirty frames per second when the device is installed in a cooperating computer with sufficient operating speed.

Description

DIGITAL COLOR TV FOR PERSONAL COMPUTERS

TECHNICAL FIELD The invention is in the field of video display on a personal computer (PC). More particularly, it concerns the display of a television (TV) picture or other analog visual signal on a portion of the cathode ray tube (CRT) or monitor of a PC while the PC is running other programs. The invention comprises a standard plug-in card for a desk-type computer or work station on which card is an all-channel television tuner which is adapted to continuously tune through all standard television channels as well as the broadcast FM frequency spectrum, and all necessary circuitry and components to demodulate the selected TV signal (or other similar analog visual signal, such as a closed-circuit surveillance, test monitoring or security system camera, or playback from a video cassettte recorder (VCR), digitize it, store these digitally encoded signals in a temporary memory, and through a novel multi-word buffer stage transfer the stored signals to the computer when requested during its operating cycle for display in a selected portion of its screen along with other displayed material under control of the computer's central processor. The invention will produce picture data for display at a rate of thirty picture frames per second, which is the standard transmitted rate of broadcast and/or closed-circuit television This picture frame rate is required for smooth motion display, and will be referred to in this specification as "real time" display or processing. In its color version, the invention also provides a slower picture display of much higher resolution, in a freeze frame or similar mode.

The invention described primarily herein will be referred to as the DigiVideo, particularly meaning its color version. Twodifferent sizes of picture display on the associated PC may be produced. The invention is most efficiently adaptable to a computer which uses 32-bit words and has sufficient operating speed to achieve real time display, thus being particularly compatible with the Macintosh II. It is this version which will be described in detail, although the invention could be adapted to be functional in the large group of computers known as IBM (International Business Machines) compatibles and/or clones, using a common basic processing scheme and language, Microsoft Disk Operating System (DOS) having resident either Windows 386 or Operating System/2 (OS/2). While the invention could be adaptable to the UNIX software system, the cycle time of that system is too slow to accomodate display of 30 picture frames per second. Certain processing differences are required by variations in basic personal computers.

(The disclosure will include an earlier black and white design operatng in the same manner. The black and white version provided two models delivering different picture sizes, called the MicrpTV for the smaller display, DigtVideo for a unit capable of producing both display sizes.)

BACKGROUND ART

The basic processing scheme of a personal computer does not directly facilitate display of visual images showing continuous motion, as particularly exemplified by standard television transmissions. Processing and displaying pictures at this real time rate involves handling a relatively large data stream.

It can readily be seen there are numerous potential uses for the capability of viewing a motion picture or TV type image on an inset portion of a PC screen. In addition to merely watching television, surveillance and security systems come to mind - comparing a closed-circuit view of a person with file copies of photographs and clearance or authorization, for example. Viewing of testing operations (e.g.: wind tunnels or displays of changing data such as oscillographs monitored by remote cameras) while reviewing or correcting calculated data is another possibility. Reviewing forensic simulations on magnetic tape recordings while preparing or reviewing commentary or testimony thereon is another, as well as comparison of still file photographs therewith. Other applications are not difficult to conceive. Visual images for display on a PC are made up of pixels, or discrete image elements, each pixel requiring an eight bit word for definition. It can be seen that the operating speed of a PC will determine whether or not it is possible to achieve motion display with the smoothness which is characteristic of the standard thirty frame per second real time rate. When the PC lacks sufficient speed to display real time motion, edited or intermittent motion display could still be very useful in many applications.

Prior art methods transmit only one pixel of video at a time on the computer's internal bus, resulting in a transmssion time of as much as one second or more for a black and white image, considerably longer for color, which is clearlyinadequate for smooth display of images involving motion.

Prior art devices for achieving display of moving images on a PC screen from analog sources have customarily provided extra processing capability to bypass the internal computer bus cycle processing or reduce the machine time required for thepicture display. This results in an increase in equipment expense, as processors are relatively expensive, as well as increasing the bulk and installation complexity of the equipment.

Applicant is aware of two current art products which seek to achieve a result similar to the current invention.

1. A device called the MassMicro, selling for about $3,000, it is believed. This device requires two plug-in cards and includes its own video output card, producing a video overlay which it mixes directly with the picture displayed by the PC. The host PC's main processor never sees the data being processed by the MassMicro.

2. A device called the OrangeMicro , selling for about $4,000, it is believed. This device also requires two plug-in cards, and has its own processor, taking over the PC data bus as a bus master processor, so again the PC main processor never sees the data being handled by this device.

In addition to their expense, their requirement for two expansion slots in the PC, and their interference with control by the host PC, neither of these devices is capable of the ouput data delivery speed necessary for smooth motion display on the PC's screen.

The current invention provides, on a single plug-in video card at a much lower cost than either of the abovementioned devices, smooth video motion at up to thirty frames per second. The current invention not only provides, by its novel data transfer stage, picture data at a much higher rate than either of the above devices, but does so under the master control of the host PC, rather than overriding its processing, as do the two devices mentioned above.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a block diagram of the invention, adapted as a data flow diagram, showing all components of the invention mounted on the plug-in card with the exception of the card connector to the PC, which is shown in Figures 3 and 5.

Figure 2 is a circuit diagram of a portion of the video demodulation and conditioning circuitry with that portion constituting the dither circuit indicated.

Figure 3 is a block diagram of the novel data output circuit of the invention in its color form, providing the capability to transfer the picture to the host PC in real time if the PC is capable of that speed.

Figure 4 is a block diagram of the black and white version of the invention, analagous to Figure 1.

Figure 5 is the black and white version of the data output circuit.

Figure 6 is the software flow diagram for operation of the DigiVideo and its readout by the Macintosh PC.

In Figures 1, 3 and 5 double lines indicate digital data transfer in parallel. Data transfer is indicated in Figure 4.

DISCLOSURE OF THE INVENTION

The invention comprises a plug-in computer card on which are disposed an all-channel television (TV) tuner and accom panying circuitry to provide a continuous TV picture which the user can display on a chosen portion of a computer screen. The display is controlled by the computer operator with software provided with the invention in conjunction with the basic operating system for the PC, while the PC is simultaneously used for other processing tasks.

The invention has the capability of providing to a PC for display on its screen an inset or overlay picture. While the mode of processing is essentially unchanged, the invention is available in models providing different capabilities: the frame displayed may be 128 × 128 pixels in the earlier black and white MicroTV model, the later models (DigiVideo, both color and black and white) provide either 128 × 128 pixels or 256 × 256 pixels, depending upon the machine and software with which it is used. Clearly, the larger picture requires four times as many pixels as the smaller, trasmitted in the same period of time if real time display is to be achieved, which puts a premium on machine speed and capacity. In those personal computers having sufficient operating speed (e.g. the Macintosh II) this invention makes possible this real time display by transmitting pixels of picture data at a much higher rate than prior art methods.

For use for TV reception, an external antenna is required, and a standard F-type connector is provided. An additional F-type plug is provided for an alternate video source, such as a video cassette recorder, and RCA pin-plug connectors are provided for separate audio input and output.

This disclosure section will discuss the color model and will reference the numbers on the system block diagram Figure 1; subsequently the simpler black and white processing will be addressed. For simplicity the description herein will be addressed to TV reception displayed on a Macintosh II personal computer, but one skilled in the art can see how other sources may be substituted, and illustrative changes required for IBM compatible applications will stated. It is noted, however, that all external clocking for the DigiVideo processing is derived from the Macintosh 10 MHz clock, so that to use another computer clock changes may be required. I t i s further noted that in Figure 1, control lines for the Intelligent Instruments Communications (I2C herein, a registered trademark of Phillips Signetics, a two line system using a clock line and a signal pulse line) system are not shown; instead each element controlled thereby is noted on the diagram in the bottom right corner of the element block.

In summary, the DigiVideo standard plug-in card for the Macintosh II connects with the Macintosh internal processing bus designated as the NuBus. The sequence of processing within the invention and within the host Macintosh computer is controlled by system software resident in a read-only memory (ROM) in the NuBus Driver and Xilinx Configuration component 51. When the system is powered, this program loads instructions into the Xilinx field programmable gate array 50, and also loads a NuBus driver program into the Macintosh, for its picture control and decoding operations.

1. The desired channel of TV reception (or FM frequency) may be selected by keyboard control, or with the mouse, using software provided with the invention and installed in the PC. The software provides for tuning the TV tuner by voltage controlled oscillator (VCO), utilizing "look-up" tables for the control frequency for each channel and for the voltage to the VCO to tune that frequency. Frequency control and stability are provided by the phase-locked-loop design of the tuner utilized. The actual tuning, as well as other switching and control operations within the invention, is controlled by use of the I2C control system mentioned above.

The incoming signal from the TV tuner goes to a tuner/IF (intermediate frequency) Processor (21), which comprises two sections. The front end comprises a Phase Locked Loop (PLL) television band tuner which also includes the FM (frequency modulated) radio broadcast band. The tuner utilized in the invention is capable of continuous tuning from 50 to 809 MegaHertz (MHz).

In the tuner section of this processor, the received RF is converted to a 45 MegaHertz IF signal, which in the second section of the processor is detected to obtain an NTSC (Natio nal Television Standards Committee) video signal.

The ouput of the initial processor is directed to a videoaudio multiplexer (22), which is essentially an analog switch to provide selection of either video from the tuner-processor or one of the alternate inputs from the other connector. This selection is again controlled by the I2C serial control system under computer control.

2. The audio signal from the video/audio multiplexer (hereinafter mux) is directed to an audio amplifier (23) and an audio switch (24) which switches it to either an external audio ouput pin-plug or to an internal speaker on the DigiVideo board. The DigiVideo in its present form does not provide for demodulation and reproduction of standard FM radio broadcasts, but available components could provide this capability.

3. The video is directed both to an NTSC to RGB (red-bluegreen) converter or signal-conditioning unit (31) and to a video synchronization (hereafter sync) signal stripper (33).

The received television signal is processed in the video signal conditioner (31) which demodulates the video signal and separates it into its color components indicating red, green and blue; the demodulation frequency is crystal stabilized at 3.579545 MHz. Transfer of color components is controlled by the 10 MHz NuBus clock in the host Macintosh computer, which clock signal controls all DigiVideo functions. In the signal conditioner, and in data transfer, the clock signal is divided according to the frame size selected - if the picture is 256 × 256 pixels the storage and delivery clock rate is 5 MHZ; if it is 128 × 128 pixels, the clock rate is 2.5 MHz.

Each of these color components is sent to one of three identical seven-bit analog-to-digital (A-D) converters (42, 43 and 44). These signals are also directed to an analog multiplexer 41 which selects either an 8-bit mode for real time display or a 24-bit color mode for high resolution display.

The video signal conditioner is adapted to demodulate and process either the 3.5 MHz frequency band for United States standard TV broadcasts, or the 4.4 MHz band for the PAL (phase alternate line) system used in European broadcasts, in which latter case the crystal reference frequency is 4.43 MHz.

The converter is controlled by a picture attribute controller (32), again as directed by the host computer through the I2C control lines. This controller is an octal digital-analog controller using direct current drive level control to control several functions: hue, saturation, contrast and brightness in the televisioon picture, as well as audio volume. The attribute controller also controls the level of a drive signal to 35, a novel picture enhancement circuit.

The video sync stripper (33) extracts the vertical and horizontal synchronization pulses from the video signal and provides them on separate lines to a Xilinx (TM) field programmable gate array which controls the delivery of the output data words to the Macintosh NuBus, as described hereinafter.

The picture signal conditioning process includes a picture enhancement circuit (35) also referred to herein as a dither control. The reference voltage and ground from the color component A-D converters (42, 43 and 44) are reintroduced into the NTSC to RGB converter or signal conditioner 31 after digitization in a positive feedback mode (Figure 2 at 35b). These references carry a noise signal from the digitization which enhances the noise of the color component signals in a random manner. The feedback enhancement is limited by a "dither control" (Figure 2 at 35a), so the increased noise signal is controlled to that level which will, when converted in the three separate color-band A-D converters, affect the least significant bit of the three (or two) bit signals for the color bands. This least significant bit will then "dither", or change state somewhat randomly, so that a color transition in the lower intensity edge of each separate color-band signal will then change in a more or less gradual (and unpredictable) manner rather than by a step change as is characteristic of digital decoding. This sloped rate of change of the lower intensity border of each of the primary colors will produce a varying and somewhat random range of shades within the spectrum defined in the received video signal. Since this dithering of the least significant bit in each of the three

SUBSTITUTE SHEET color-band signals is gaussian in its distribution, the interaction of the independent signals will cross over the discrete color spot boundaries on the video card and produce nmany more than the standard 256 colors produced by a clean or noise-filtered video signal. Since the eye perceives the thirty-frame-per-second screen display as smooth motion, it will also blend the random variances of the color-edges between the red-green-blue pixels as many more slight variations or shades in color, in a number which cannot be accurately determined.

4. In converter 31, the video signal is separated into red, green and blue components. Each of these components is directed to a 7-bit analog-to-digital (A-D) converter (42, 43 and 44) which continuously convert the analog video color component streams into seven-bit digital words, each separate stream defining a color component for display on the PC screen.

The red, green and blue color components (analog) are directed to analog multiplexer (mux, also called a 24-bit frame grab control) 41 which, as directed by system software (gate array transfer control 50 through the I2C link), selects between two color word modes for storage and display (see Figure 1):

a: In what may be termed the real time (eight-bit color) mode, analog mux 41 directs A-D converter 42 to the eight-bit color mode. In this mode, the green component signal is transferred by analog mux 41 to A-D converter 42, while the red signal goes direct to A-D converter 43 and the blue signal to A-D converter 44. Data buffer 46 continuously accepts eight-bit color words (three red, three green, two blue) and transfers them for storage in video frame memory 47, from which complete video frames are transferred to the host computer NuBus, as described subsequently.

Timing of processing the A-D conversion and storage is based on the vertical sync pulse which begins each TV frame; eight-bit words are read out 256 for each line (in the larger size display) for 256 lines, clocked by the horizontal sync pulse (63.5 microsecond intervals). After a complete frame is stored in video frame memory 47, the computer is signalled and the DigiVideo waits for a command to transfer the picture frame.

b. In an alternative mode providing a slow rate non- real-time display of much higher resolution (and many more color shades), analog mux 41 and data buffer 45 are commanded to assemble 24-bit color words, each of all one color (21 color bits from three seven-bit words, plus three dummy bits). Mux 41 selects the proper color component and transfers it to A-D converter 42, which provides seven-bit color words to data buffer 45 for storage in memory 47. In this mode, an entire frame of red signals is assembled and transferred to the computer, then a frame of green, then of blue. Software provided with the invention for the Macintosh provides for display of a resultant high-resolution color frame at a slow repetition rate, in what might be considered a freeze frame mode. It might be noted the dither circuit has very little effect in this color mode.

5. Data transfer to the PC is controlled by the Xilinx programmable gate array, according to instructions loaded at power on as initially described.

a. When a complete TV picture has been assembled in the memory, the DigiVideo transmits a signal to the PC processor that a picture frame is ready.

b. When the main PC program is ready to read the picture for display, it addresses the DigiVideo by a signal known in Macintosh language as "myslot", initiating data readout from that source in time intervals of 500 nanoseconds [ns] each.

c. During the allotted 500ns interval, the DigiVideo receives a clock signal every 100ns from the Macintosh PC:

On the "myslot" pulse, the controller in the invention's novel data transfer stage directs transfer of video data from the RAM to four output registers or buffers, the first three of which are uni-directional latched buffers, the fourth being bi-directional. On each of the the four successive clock counts at 100 ns intervals, an eight-bit data word describing a pixel of information is transferred in parallel into one of the four eight-bit output registers, in order. On the fourth clock pulse in addition to loading the data word in the fourth buffer, the controller directs output in parallel of all four words to the PC which accepts them in correct order as one 32-bit word for Macintosh processing. The DigiVideo then ackowledges and signals ready again. d. The PC continues to address the DigiVideo under its program control, each sample time being 500 ns, during which time four pixels are transferred as described in 7 above, the sample rate being determined by program rate and relative priority, as described below. When the complete picture has been read, the MicroTv assembles another complete frame in its RAM, signals the PC that a complete picture is ready and the process repeats under control of the PC program. To read out data for a 128 × 128 pixel array, the above-described 500ns readout cycle must occur 4096 times per complete picture frame, or 122,880 times per second, which amounts to slightly over six one-hundredths of a second (or 67o of machine time) consumed in this data transfer process. For adisplay array of 256 × 256 pixels, these numbers are correspondingly 16384 times per picture frame, or 491,520 times per second, approximately 24% of machine time. Internal PC processing time is additional, and display of the picture may consume a significant part of the PC operating cycle, partic¬ularly for the 256 × 256 pixel picture.

The data output transfer sequence (DOT for short) is precisely the same in the color and earlier black and white models. In the earlier models, readout and storage control is exercised by a PAL (programmable array logic) which has the control sequence permanently "burned" in. See below for code. In the color model, as described above, a Read Only Memory (51) supplies the program both to gate array circuit 50 for internal control and to the computer as a NuBus driver. Communication with the Macintosh is through a bi-directional buffer 55 - see Figures 3 and 5.

Original IBM machines used either an eight-bit or sixteen-bit word, however computers appear almost daily with increased speed and capacity.

For example, the original IBM PC, using eight-bit words at 4.77 megahertz (MHz) operating speed, could only receive one word at a time, so the multi-word output buffer circuit would not help. That particular machine could not display a real time picture. Internal PC processing, not included in this invention, could provide a slower than real time picture display. Later models of IBM machines operate at higher speeds and have progressed to longer operating words, which could provide real time display.

Other computers recently appearing on the market feature greatly higher operating speeds and some besides the Macintosh now use thirty two bit words, so the preferred mode of the invention described herein could be directly adaptable to them, depending on internal logic, clock frequency and processing mode.

Again, internal machine processing time for display must be considered to determine utility of the process.

A logic difference between the two types of machines requires attention. A Macintosh reads zero as "white" on its video card, while IBM reads a digital one as white. So the A-D converter in different versions of the the MicroTV must accomodate this logic inversion. PREFERRED MODE FOR CARRYING OUT THE INVENTION

[This detailed description will apply to that version of the invention which is specifically adapted to the Macintosh II or subsequent models in that series. Adaptability of the invention to the IBM type machines has been indicated hereinbefore, but will not be discussed in detail.]

The operation of the DigiVideo is controlled by software provided with the machine. The flow diagram of operations is shown in Figure 6, and the entire software program, which is in Read Only Memory (ROM) in NuBus driver and Xilinx configuration controller 51 is attached hereto as Appendix 1.

Referring first to Figure 1, at the right of the figure the number 10 represents signal sources for the invention described herein, as well as an audio output monitor. At 11 is indicated an antenna for reception of a standard TV broadcast signal, at 12 an alternate signal source, such as a videocassette recorder, closed-circuit TV cable, or other analog source whose signal characteristics are compatible with analog TV signal processing. Also indicated are provisions for an external audio source 13 and an external audio monitor 14 which may be used by the invention. By external switching, not a part of the invention, more than one alternate source may be used.

Signal sources 11 and 12 are connected to the invention through F-type connectors, 13 and 14 by RCA pin-type connectors. These connectors are on the frame edge of the computer card 20 on which the invention is disposed. This is a standard card for the Macintosh II or subsequent models of that series of computers. The card dimensions are 4 × 13 inches (10.16 × 323.02 mm), with a 96-pin connector, indicaed at 28, mating with the PC.

On the plug-in card 20 are disposed the elements of the color DigiVideo, which will be specified by part numbers. Additional discrete circuitry is according to standard practice known to one skilled in the art.

A. A first processing stage, comprising

- an all-channel standard TV tuner combined with an intermediate frequency (IF) processor 21, UV936, Phillips;

- a switching control unit or video/audio multiplexer (mux)

22, TDA8440N;

-an audio chain consisting of an amplifier 23, LM324AD, an audio switch 24 and a miniature loudspeaker 25, both of standard design, and an audio output plug; B . A video processing stage :

- video signal conditioner ( NTSC to RGB converter ) 31 , TDA3567N;

- p i cture attribute contro l 32 , TDA8444N , which al so provides audio volume control and a novel "dither" circuit

( 35 ) see Figure 2 and discussion;

- a differential voltage control 34, LM78L05 , which supplies reference voltage ( 2 volts ) for the analog to di gi tal conversion;

C . Analog to digital conversion and storage stage :

- a 24-bit "frame grab control" 41, 74HC4051 , which selects on command either an 8-bit real time color mode or a slower 24-bit high resolution color frame display ;

- three ident ical s even-bi t d i gi tal-to-analog ( A-D ) converters , 42 , 43 and 44 , (MC101321 ) , one each for red, green and blue color signals;

- a data buffer 45, 74LS540 which transfers the color data frame to the RAM storage if the 24-bit color mode is selected;

_ a data buffer, also 74LS540, which transfers the color data to the RAM storage in the eight-bit mode, which is standard PC video color of three red bits, three green bits and two blue;

- a video frame memory (RAM storage) 47, 43256-100, which stores a full video frame for readout to the PC;

D. The data transfer (data output transfer, or DOT) stage which delivers color data words to the computer;

- a Xilinx field programmable gate array 50, XC2018PC84-70, which follows instructions loaded therein on power-up, and controls the operations of the DigiVideo, including data delivery (also referred to as a controller);

- a NuBus driver and Xilinx configuration ROM 51, NS27C64- 200. This circuit holds the instructions for gate array 50 as well as the software program for the Macintosh PC. On initial power-up of the DigiVideo, gate array 50 is configured and, on request from the PC, the NuBus driver contain ing all DigiVideo interface instructions is loaded therein through bi-directional buffer 55;

- uni-directional buffers 52, 53, 54 (each 74F534) and bi- directional buffer 55, 74ALS640, which deliver four eightbit words to the PC at one time as a 32-bit data word. These buffers are identical in the color and black and white versions of the invention.

Referring to Figure 2, a portion of the circuitry including NTSC to RGB processor 31 is shown. The novel dither control of the invention, the operation of which has been described in general above, is indicated herein at 35a and 35b.

The ground and reference voltage from the three color component A-D converters 42, 43, and 44, which after signal processing in those converters are now carrying a noise signal, are reintroduced into signal conditioner 31 as indicated at 35b. This noise signal, in a positive feedback mode, will cause the three color components to vary, or "dither", somewhat randomly, since the noise is gaussian in distribution. The dither control voltage signal, introduced through the network shown at 35a, to the filter and peak elements of the signal conditioner limits the amount of variation allowed in the signal to that level which will, as previously summarized, cause the least significant bit to vary randomly. This dither is effective in the eight-bit mode, but much less so in the 24-bit high resolution mode.

Referring to Figure 3, the elements of the invention's novel data transfer and control stage are shown to explain the operation of the device. Also shown, designated 28, is the 92-pin connector which mates the card to the NuBus in the Macintosh II PC. In Figure 3, double lines represent data transfer in parallel over eight lines for the eight-bit words used to define picture pixels. The ultimate bit numbers for the final 32-bit word transferred to the Macintosh II are indicated bythe corresponding pin numbers on connector 28 to which they are addressed, in four-bit groups (ADO, AD4, etc, through AD28). Control signal flow is shown in lighter lines.

Other than the four signals marked at the top of the figure, data transfer between the Macintosh and the DigiVide are through bi-directional buffer 55.

The elements of this novel input-output controal and data transfer device are stated above.

Communication of the invention with the PC is through connector 28. The following signals are required for control and data transfer:

-- a signal called NMRQ (non-maskable interrupt data request), is sent by controller 50 to the PC via pin 31 of connector 28, to inform the PC that a complete picture frame is ready for transfer;

-- the signal called "myslot" in Macintosh language, is received by the invention (controller 50) on pin 92;

-- the clock signal (every 100ns) is received on pin 96 to go to the controller 50, and provided by the controller to the other elements of the DigiVideo which are clock synchronized;

-- the "ready" or "acknowledge" is returned on pin 28 ; -- address code and I2C control signals are received on the eight pins designated which communicate with bi-directional buffer 55 (pin-pairs 82 & 18, 83 & 19, 84 & 20 and 85 & 21). The eight-pin data bus as designated on Figure 2 goes to the memory 47 and the I2C controller 64 shown in Figure 4, previously described.

On "myslot", controller 50 directs transfer of four eight- bit words, each defining one pixel of picture information, from the RAM 49 to the four output buffers or registers 52 through 55 inclusive.

The controller switches "myslot" and counts and switches the first three clock signals in succession to registers 52, 53 and 54. On each clock pulse one eight-bit word is loaded in parallel into the register addressed by that particular closk pulse. On the fourth clock pulse the controller 50 switches the data flow direction for register 55 to output and directs loading of the fourth data word in that register in parallel. On that same fourth clock pulse controller 50 sends the output enable signal to all four registers and the four eight-bit data words are read out to the PC in parallel over the thirty- two lines previously designated and shown in Figure 3 (and 5). The controller also sends the "acknowledge" or "ready" signal back to the PC over pin 28 of connector 28, which signal means that four-word data transfer operation is complete and the invention is ready for the next "myslot", at which time the data transfer sequence just described is repeated until an entire frame is read out.

When the entire picture frame has been read out, controller

50 directs storage in the RAM 47 of another frame. When the next frame is asembled, the controller 50 notifies the PC (by sending NMRQ) that it is ready and waits for the next

"myslot".

The signal flow and operation has been previously described under the disclosure of the invention, with control of internal operations being directed as previously described by the I2C control system.

MODE OF INVENTION FOR BLACK AND WHITE PICTURE

The invention comprises a plug-in computer card of the same characteristics as previously described for the color version of the invention, and general observations made there apply herein.

The invention has the capability of providing to a PC for display on its screen a continuous black and white inset or overlay picture, as controlled by the operator through the PC with software provided with the invention. While the mode of processing is essentially unchanged, the invention is available in two models providing different capabilities: the MicroTV provides a display of 128 × 128 pixels; the DigiVideoversion has a switchable ouput to provide either 128 × 128 pixels or 256 × 256 pixels, depending upon the machine and software with which it is used. This discussion is primarily addressed to use with the Macintosh II series of computers.

The input connectors are as previously described for the color version, as is the basic processing chain, except that it is simpler for a black and white picture. The system elements are largely discrete circuits available, with external networks of standard design to provide proper functioning.

In summary, referring initially to Figure 4, the MicroTV standard plug-in card for the Macintosh II connects with the Macintosh internal processing bus designated as the NuBus. The sequence of processing within the invention includes the following steps:

1. The desired channel of TV reception may be selected by keyboard control, or with the mouse, using software provided with the invention and installed in the PC. The software provides for tuning the TV tuner by voltage controlled oscillator, utilizing "look-up" tables for the control frequency for each channel and for the voltage to the VCO to tune that frequency, actual control of the tuner being through the I2C controller 64 (74LS378), using a clock line and a signal pulse line. The tuner is a commercially available component, Samsung EBC1731AL. The tuner or alternate source signal is switched by a switching network 27, of discrete circuitry of standard design. The audio signal included in the TV or other source signal is received separately from the tuner or RCA pin-plug and is routed to either an internal miniature speaker mounted on the card or to the output pin plug mentioned above.

The audio speaker is a standard miniature, of which many are available.

Frequency control and stability are provided by the phase-locked-loop design of the tuner utilized.

2. The video component is switched to a video signal conditioning circuit 36 (a combination of discrete circuitry and standard chips, comprising essentially a low-pass filter limiting the signal which passes through to that portion of the TV picture signal below 3.5 MHz). This signal processor strips the signal of any components other than its luminance (black and white) elements, to restrict the signal to the gray scale section of the PC video card.

3. An analog-to-digital (A-D) converter 48 (MC10321) continuously converts this processed analog signal to digital format. The encoded 8-bit digital words (each representing one pixel of video display coded for the necessary gray scale area signal from the PC video color card) are stored temporarily in internal random access memory (RAM) 26 (43256-100), prior to readout by the novel data output transfer section of the invention, which functions in the black and white version precisely as previously described for the color version, except that its control elements are less flexible. In the smaller model of the invention, called the MicroTV, which is capable of providing a 128 × 128 pixel array to the PC, this RAM storage uses about half of a standard 32 kilobit (32K) matrix. The Digivideo model, which provides a 256 × 256 pixel array, uses two 32 kilobit matrices for storage.

Referring to Figure 5, the invention's novel data transfer and control stage for the black and white model, which was indicated as 60 in the system block diagram Figure 4, are shown to explain the control of this version of the device, which functions exactly as described previously for the color version. Also shown, designated 28, is the 92-pin connector which mates the card to the Nu-bus in the Macintosh II PC.

In Figure 5, double lines represent data transfer in parallelover eight lines for the eight-bit words used to define picture pixels. The ultimate bit numbers for the final 32-bit word transferred to the Macintosh II are indicated by the corresponding pin numbers on connector 28 to which they are addressed, in four-bit groups (ADO, AD4, etc, through AD27). Control signal flow is shown in lighter lines.

The elements of this novel input-output control and data transfer device are, in addition to a programmable array logic state machine or controller 31 , a 2-bit counter 62 (74F163), a 2:4 demultiplexer 63 (74F139), three uni-directional eight-bit latched data registers or buffers 52, 53, and 54 (74F534) and a bi-directional eight-bit register 55 (74F640). The logic state machine 31 is part No. PAL 16R4, which is configured by having its switches "burned" by a program, for which see below.

-- a signal called NMRQ (non-maskable interrupt data request), is sent by controller 61 to the PC via pin 31 of connector 28, to inform the PC that a complete picture frame is ready in the RAM for transfer;

-- the signal called "myslot" in Macintosh language, is received by the invention on pin 92 and is routed to both the controller 61 and the 2 bit counter 62;

-- the clock signal (every 100ns) is received on pin 96 to go to the controller 61, and the 2-bit counter 62, it is also provided by the controller to the RAM 49 for synchronization;

-- the "ready" or "acknowledge" is returned on pin 28 ;

-- address code and I2C control signals are received on the eight pins designated which communicate with bi-directional buffer 55 (pin-pairs 82 & 18, 83 & 19, 84 & 20 and 85 & 21). The eight-pin data bus as designated on Figure 2 goes to the memory 26 and the I2C controller 64 shown in Figure 4, previously described. On "myslot", controller 61 directs transfer of four eight-bit words, each defining one pixel of picture information from the

RAM 49 to the four output buffers or registers 52 through 55 inclusive.

Two-bit counter 62 receives "myslot", and then the four clock signals, which it routes in succession to the 2:4 demultiplexer 63. The demultiplexer counts and switches the first three clock signals in succession to registers 52, 53 and 54. On each clock pulse one eight-bit word is loaded in parallel into the register addressed by that particular clock pulse. The fourth clock pulse is switched by the demultiplexer 63 back to the 2-bit counter 62, which turns off.

On that fourth clock pulse the controller 61 switches the data flow direction for register 55 to output and directs loading of the fourth data word in that register in parallel. On that same fourth clock pulse controller 61 sends the output enable signal to all four registers and the four eight-bit data words are read out to the PC in parallel over the thirty- two lines previously designated and shown in Figure 2. The controller also sends the "acknowledge" or "ready" signal back to the PC over pin 28 of connector 28, which signal means that four-word data transfer operation is complete and the invention is ready for the next "myslot", at which time the data transfer sequence just described is repeated until an entire frame is read out.

When the entire picture frame has been read out, controller 61 directs storage in the RAM 49 of another frame. When the next frame is asembled, the controller 61 notifies the PC (by sending NMRQ) that it is ready and waits for the next "myslot". The system output controller 61 is a programmable-array-logic (PAL) module, configured to direct the sequence of operations described previously by a PAL programmer in accordance with JEDEC code set forth immediately following: ABEL(tm) 3.10 Data I/O Corp. JEDEC file for: P16R4 V7.0

Created on: 8-Nov-89 08:38 AM

AAPPS MACTV

NuBus state control pal -- p/n MTV-1 Revision 1.0*

QP20* QF2048*

See next page. L0000

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00000000000000000000000000000000 00000000000000000000000000000000 00000000000000000000000000000000 Aapps MicroTV & DigiVideo PAL Jedic Listing Hay 14, '90

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C5067*

B9FF INDUSTRIAL APPLICABILITY

As indicated in the specification, many applications of the technology can be envisioned:

1. In premises security systems, it could provide immediate visual comparison of identification photographs or other supporting information from the files, with that presented by an indivdual seeking access;

2. It could be applicable in test procedures, displaying remote video coverage of a test or demonstration, while verifying calculations or test procedures on the computer;

3. Similar use could be made in medical technology, observing treatment while searching a data base or comparable procedures;

4. Forensic applications can also be foreseen - preparing, reviewing or challenging testimony involving evidence or calculated data, mapping, geology,etc.

5. Field scientific/engineering investigations using video taping can be immediately integrated with records, calculations or other material. Other uses are sure to develop, limited only by applications amenable to visual display coupled with calculating or data search capability.

The above disclosure of my invention is considered the best mode for carrying out its function. Minor variations are considered to be within the scope and limits of the invention, as claimed hereinafter.

App 1-1

Aapps Corporation

DigiVideo™ Color

NuBus Driver

&

Configuration

ROM

Rev. 2.0.1

Claims

I claim as my invention:

1 . Apparatus f or di splaying on the monitor screen of a cooperating personal computer a color television picture at a frame repetition rate sufficient to show smooth motion in the displayed picture while the personal computer is proces sing other programs , said apparatus comprising a single plug-in card mating with an expansion slot in the personal computer, and providing connectors for an external antenna as well as alternate compatible signal sources , on said plug-in card being disposed :

- - an all-channel televi sion tuner , providing video and audio outputs to a switching means adapted to switching these signal s as well as compatible alternate external sources ,

- - audio signal processing and reproduction or output means, as well as

- - video signal processing means adapted to demodulate the received analog television signal and separate it into its red, green and blue components;

- -picture control and enhancement means providing picture value controls, and additionally providing an enhancement of color values by an induced random variation of the digital color component signals so that the displayed color shades vary in an unpredictable manner to produce many more discernible color shades than are provided by the normal computer pallette;

- - conversion means to continuously convert the color compon-ent signals into digital color component signals; - - digital buffer means to assemble eight bit data words, each representing one color pixel for display containing the standard color component display coding;

- - digital storage means of capacity sufficient to store one complete television picture frame made up of said eight- bit digital words, each said word defining one pixel of color pic-ture information, and

- - data transfer means adapted to transfer said digital words to the personal computer's processing bus through a plurality of output buffers adapted to substantially simultaneously transfer in parallel said plurality of said digital words to said personal computer's processing bus, still further providing

- - control means for data transfer adapted to communicate to said personal computer when a picture frame is ready, to control transfer from said digital storage means to said data transfer means output buffers when said computer requests data, loading each said buffer in parallel in succession, then directing substantially simultaneous transfer of data in parallel from all said buffers to said personal computer's processing bus as one computer word.

2. Apparatus as in claim 1 further providing means whereby assembly of 24-bit color words may be directed, all bits being of the same color, providing

- -that an analog multiplexer selects in succession which analog color component is to be converted to digital format in seven-bit color words, all of one color, by a single analog-to-digital converter, further providing

- -that a data buffer assembles said seven-bit color words all of one color into twenty-four bit color words, all of one color by adding three dummy bits, and transferring them to a video frame memory, so that

- -an entire frame of picture data of only one color component signal will be stored in random access memory, then read out to the computer, each color being stored and read out in succession, still further providing

- -that software instructions issued to the computer will enable said computer to construct from the frames of single color data a high resolution color picture for display at a slow rate.

3. Apparatus as in claim 1 wherein said output buffers in said data transfer means comprise four eight-bit buffers adapted to substantially simultaneously transfer in parallel thirty two data bits for use in a cooperating personal computer which uses data words of thirty-two bits.

14. Apparatus as in claim 1 wherein said data transfer means provides such number of said buffers as required by cooperating personal computers using data words of length other than thirty two bits.

5. Apparatus for rapid transfer of digital data words to a cooperating personal computer wherein said data words are of eight-bit length, each said data word defining one pixel of a color television picture for display on a personal computer's viewing screen under control of said personal computer's proprocessor, said apparatus comprising a programmable gate array logic controller, a read only memory containing software instructions for said controller and for said computer, and a plurality of eight-bit output buffers, all but the final buffer being latched uni-directional buffers, said final buffer being bi-directional for transmission of control signals and program instructions, said apparatus communicating with said personal computer, receiving signals and clock pulses, and sending other signals to effectuate data transfer at a rapid rate, wherein

--said controller informs said computer when a complete frame of picture information is ready in a cooperating digital data storage means, whereupon

-- on receipt of a signal from said computer to transfer picture data, said controller directs parallel loading of eight-bit data words in succession in said plurality of output buffers on successive computer clock counts, said controller directing clock pulses in succession to the uni- directional output buffers, loading one word in each said buffer on successive clock pulses before the final pulse in the loading cycle,

-- on said final clock pulse said controller switches said bi-directional buffer to output, loads the final data word in said buffer, and directs substantially simultaneous transfer in parallel of all data words from said output buffers to said computer;

-- said controller then signals said computer that data transfer operation is complete and awaits command for subsequent transfers.

6. Apparatus for color enhancement of pixels of picture data for a color television display on the screen of a cooperating personal computer while said computer is operating other programs wherein a feedback signal of noise generated in analog-to-digital conversion of the color component signals is reintroduced into the video signal processor in a positive feedback mode, causing the color component signals to vary in a random and unpredictable manner, so that the least significant bit of each color component signal in its digital form changes in a random manner to increase the number of color shades produced, providing that a control voltage is also introduced to limit the amount of variation induced.

7. Apparatus for displaying on the monitor screen of a cooperating personal computer a black and white television picture at a frame rate sufficient to show smooth motion in the displayed picture while said personal computer is processing other programs, said apparatus comprising a single plugin card mating with an expansion slot in said personal computer, and providing connectors for an external antenna as well as alternate compatible signal sources, on said plug-in ard being disposed:

-- an all-channel television tuner, providing separate video and audio outputs to a switching means adapted to switching these signals as well as alternate external compatible sources,

-- audio signal processing and reproduction or output means, as well as

-- video signal processing means adapted to convert the received analog television signal to digital signals in the form of eight-bit words each representing one pixel of picture information for display on said personal computer's monitor screen, each word being formatted so as to be limited to the gray scale portion of said personal computer's video card, also providing -- digital storage means of capacity sufficient to store one complete television picture frame made up of said eight-bit digital words each said word defining one pixel of picture information, and

-- data transfer means adapted to transfer said digital words to said personal computer's processing bus through a plurality of output buffers adapted to substantially simultaneously transfer in parallel said plurality of digital words to said personal computer's processing bus as one digital word, still further providing

-- control means for data transfer adapted to communicate to said personal computer when a picture frame is ready, to control transfer from said digital storage means to said data transfer means output buffers when said computer requests data, loading each said buffer in parallel in succession, then directing substantially simultaneous transfer of data in parallel from all said buffers to said personal computer's processing bus as one computer word.

8. Apparatus as in claim 5 wherein said output buffers in said data transfer means comprise four eight-bit buffers adapted to substantially simultaneously transfer in parallel thirty two data bits for use in a cooperating personal computer which uses data words of thirty-two bits.

9. Apparatus as in claim 5 wherein said data transfer means provides such number of sa id buf f ers as required by cooperating personal computers using data words of length other than thirty two bits .

10. Apparatus for rapid transfer of digital data words to a cooperating personal computer wherein said data words are of eight-bit length, each said data word defining one pixel of a black and white television picture for display on the personal computer's viewing screen under control of said personal computer's processor, said apparatus comprising a programmed array logic controller, a digital counting means, a digital demultiplexing means, and a plurality of eight-bit output buffers, all but the final buffer being latched uni-directional buffers, said final buffer being bi-directional for transmission of control signals, said apparatus communicating with said personal computer, receiving signals and clock pulses, and sending other signals to effectuate data transfer at a rapid rate, wherein

said controller informs said computer when a complete frame of picture infcormation is ready in a cooperating digital data storage means, whereupon

--on receipt of a signal from said computer to transfer picture data, said controller directs parallel loading of eight-bit data words in said plurality of uni-directional output buffers, said digital counting means and said demultiplexer directing clock pulses in succession to the uni-directional output buffers, loading one word in each buffer on said clock count, said digital counting means and demultiplexer turning off on the final clock pulse but one in the transfer cycle, and

11. Apparatus as in claim 10 further providing that said computer clock pulses are at 100 nanosecond intervals, said plurality of output buffers is defined as four, said digital counter is a two-bit counter, said demultiplexer is a two by four demultiplexer and the data transfer cycle is complete within 500 nanoseconds during which period said transfer apparatus transfers thirty two bits in parallel to the computer.

12. Apparatus as in claim 5 adapted to transfer thirty complete picture frames per second , each said picture frame including 128 by 128 pixels of picture data.

13. Apparatus as in claim 5 adapted to transfer thirty complete picture frames per second, each said picture frame including 256 by 256 pixels of picture data.

14: Method for rapid data transfer from a digital data storage means to a cooperating personal computer wherein, after said computer requests data transfer, digital data words are loaded in parallel on successive clock pulses in a plurality of data output buffers, the last of which said buffers is bi-directional so as to be adapted to transmit control signals from and to said cooperating computer, said final buffer being switched to output direction and loaded on the final clock pulse of the transfer cycle, on which said final clock pulse all said data words in all said buffers are then output in a substantially simultaneous transfer in parallel to said computer's operating bus as one computer word.

15: Apparatus as in claim 1 wherein the said complete television picture frame constitutes 128 by 128 pixels of picture data. 16: Apparatus as in claim 1 wherein the said complete television picture frame constitutes 256 by 256 pixels of picture data.

17 : Apparatus as in claim 5 further providing that said computer clock pulses are at 100 nanosecond intervals, said plurality of output buffers is defined to be four, and the data transfer cycle is completed in 500 nanoseconds, during which period said data trasnfer apparatus transfers thirty-two bits in parallel to the computer.