|Publication number||WO1990014712 A1|
|Publication date||29 Nov 1990|
|Filing date||26 Apr 1990|
|Priority date||24 May 1989|
|Publication number||PCT/1990/2244, PCT/US/1990/002244, PCT/US/1990/02244, PCT/US/90/002244, PCT/US/90/02244, PCT/US1990/002244, PCT/US1990/02244, PCT/US1990002244, PCT/US199002244, PCT/US90/002244, PCT/US90/02244, PCT/US90002244, PCT/US9002244, WO 1990/014712 A1, WO 1990014712 A1, WO 1990014712A1, WO 9014712 A1, WO 9014712A1, WO-A1-1990014712, WO-A1-9014712, WO1990/014712A1, WO1990014712 A1, WO1990014712A1, WO9014712 A1, WO9014712A1|
|Inventors||King Fu Lee|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (2), Referenced by (3), Classifications (6), Legal Events (3)|
|External Links: Patentscope, Espacenet|
LOW CURRENT SWITCHED CAPACITOR CIRCUIT
Technical Field This invention relates generally to energy (battery) saving circuits, and more particularly to the battery saving of a switched capacitor circuit that may be used as a switched capacitor filter.
Background Art Switched capacitor circuits are known. Such circuits are the product of circuit design techniques commonly used to miniaturize (integrate) components. In portable (hand-held) communication applications, components such as filters are often reduced to integrated circuit (IC) form. A switched capacitor circuit utilizes the fact that when a capacitor is switched between a signal to be sampled and ground at a rate many times that of the frequency of the sampled signal, the capacitor will simulate the circuit behavior of a resistor.
To save the current drain (energy consumption) of a switched capacitor circuit, it is known to activate the switched capacitor circuit only when it is needed and to fully deactivate it when it is not in use. This provides maximized energy savings since the circuit only draws current when activated. However, substantial DC transient currents are produced when the switched capacitor circuit is turned ON and OFF (i. e., activated and deactivated). These DC transients increase the settling time required before information can be passed through the circuits, and therefore, cannot be used in a system that requires fast turn- on time.
Another problem exists for the conventional battery saving technique of turning the switched capacitor circuit ON and OFF. For those communication applications that require continuous operation, such as squelch, discontinuities in the applied power would interrupt such operations, and therefore, would not be usable. Hence, a need exists to lower the current drain of switched capacitor circuits without introducing transient switching currents.
Summary of the Invention
Accordingly, it is an object of the present invention to provide an energy efficient switched capacitor circuit that avoids the transients generated in the prior art circuits.
Briefly, according to the invention, a switched capacitor circuit is provided having reduced energy consumption. A variable bias supplies an operating current to the switched capacitor circuit. When the circuit is not being utilized, the variable bias supplies a lower, but non-zero, current.
Brief Description of the Drawings
FIG. 1 is a schematic diagram of a switched capacitor circuit according to the present invention.
Detailed Description of the Preferred Embodiment
Referring to FIG. 1 , a switched capacitor low-pass filter according to the present invention is shown. A conventional switched capacitor filter 10 comprises an operational amplifier 16 and a pair of capacitors 12 and 14 (that simulate resistors when switched rapidly) forming a simple low-pass filter configuration. An input signal, Vjn, is coupled to an inverting input of the operational amplifier (Op Amp) 16 by a pair of sampling switches 18. As is readily understood in the art, there are commonly two phases of sampling signals associated with the switches 18. These are an EVEN phase and an ODD phase. Typically, these signals are of complimentary phase and are generated from a clock signal 50 by a circuit 20. All the switches marked "EVEN" are closed simultaneously, then opened followed by a closure of all the switches marked "ODD". When the switch 18 is closed for the EVEN phase, the current provided by V|N charges the capacitor 12. The voltage VIN developed across the capacitor 12 is fed to the Op Amp 16 when the switch 18 is closed for the ODD phase. As in a conventional active RC low-pass filter, the positive input of the Op Amp 16 is grounded. The Op Amp 16 provides an output signal, Vout. ~ portion of which is fed back to the negative input of the Op Amp 16 by a capacitor 22 and the capacitor 14 (in conjunction with the sampling switches 18). A bias network 30 supplies a bias output 32 to the operational amplifier 16. A resistor 34 and an N-channel MOSFET 36 set up a current reference 11 that is mirrored by a pair of N-channel MOSFETs 38 and 42 as currents 12 and 13 respectively. A P-channel MOSFET 44 provides the current source capability for the mirrored currents I 2 and 1 3. To insure that the operational amplifier 16 is never completely turned OFF, and yet to reduce the current drain, a control signal is coupled to the gate of an N channel MOSFET 46 to selectively turn the current 12 ON and OFF. During normal circuit operation, the control signal will be HIGH, which turns on the MOSFET 46. In this way, the sum of currents 12 and 13 will bias the Op Amp 16 at a current having full drive capability. However, when the control line is LOW, the MOSFET 46 becomes non-conductive and no current will flow through it. The duty cycle (or duration) the control signal will remain LOW is selectable to obtain the current reduction desired. The longer the control signal is LOW, the less current is consumed. This lower current mode has limited drive capability, but the current 13 from the MOSFET 42 will bias the Op Amp 16 in a standby mode. Although limited, this current is sufficient to compensate for any leakage in the Op Amp16 and to eliminate the DC transients from occurring when reactivated. During the standby mode, the limited current 13 is insufficient to provide for the switching of the capacitors 12 and 14. Therefore, the switching signals (ODD and EVEN) are also disabled. To disable the switching signals, the LOW control signal is ANDed (52) with the CLOCK signal 50 to prevent the clock signal from driving the phase generation circuit 20.
What is claimed is:
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4521743 *||29 Dec 1983||4 Jun 1985||Cordis Corporation||Switched capacitor amplifier|
|US4760346 *||30 Sep 1986||26 Jul 1988||Motorola, Inc.||Switched capacitor summing amplifier|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US5155394 *||12 Feb 1991||13 Oct 1992||National Semiconductor Corporation||Bias distribution circuit and method using FET and bipolar|
|US5543745 *||28 Apr 1995||6 Aug 1996||Mitsubishi Denki Kabushiki Kaisha||Voltage controlled current source and bias generation circuit using such current source|
|US6255885||21 Dec 1998||3 Jul 2001||Per-Olof Brandt||Low voltage transistor biasing|
|International Classification||H03F1/02, H03H19/00|
|Cooperative Classification||H03F1/0216, H03H19/004|
|European Classification||H03F1/02T1C, H03H19/00B|
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