WO1990009640A1

WO1990009640A1 - Apparatus for high speed image rotation

Info

Publication number: WO1990009640A1
Application number: PCT/US1990/000859
Authority: WO
Inventors: George W. Crozier
Original assignee: Unisys Corporation
Priority date: 1989-02-15
Filing date: 1990-02-15
Publication date: 1990-08-23
Also published as: US5081700A

Abstract

Apparatus (20) is provided for shifting the output of a bit matrix character generator (17) ninety degrees to provide ninety degree shifted characters and comprises a barrel shifter (28) for barrel shifting bit slices of the bit matrix characters coupled to a linear array shifter (Fig. 3) for linear array shifting the information that was first barrel shifted. A feedback loop (31-35) which includes a rotate RAM memory (34) having its output (35) connected to the input of the barrel shifter means (28) to twice barrel shift the information which was previously barrel shifted and then linear array shifted to provide a bit matrix character output (29) which is rotated ninety degrees from the original bit matrix character provided at the output of the character generator.

Description

APPARATUS FOR HIGH SPEED IMAGE ROTATION

The present invention relates to apparatus for rotating characters of the type generated by character generators in any desired image font or format. More particularly, the present invention relates to a novel high speed circuit for rotating a character_/ micro column word by by micro column word as it is generated or read out of a character generator memory. INTENTIONALLY LEFT BLANK

SUMMARY OF THE INVENTION

It is a principal object of the present invention to provide an improved high speed character generator. It is another principal object of the present invention to provide novel logic circuitry for rotating a character stored in a character memory in the form of a bit matrix. INTENTIONALLY LEFT BLANK

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a block diagram of a prior art printer system for a laser printer;

Figure 2 is a block diagram of the present invention rotational hardware which comprises one of the block elements shown in Figure 1;

Figure 3 is a more detailed block diagram of a linear array shifter of the type shown in the feedback loop of Figure 2; Figures 4A to 4D are diagrammatic representations of a character image as it is processed in the rotational hardware of Figure 2; Figures 5A to 5D are diagrammatic representations of the rotation of the bit positions of a character using alphanumeric characters; and

Figures 6A to 6D are diagrammatic representations of four bits of a fifty bit character that passes through the linear array shifter.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Refer now to Figure 1 showing a prior art block diagram printer system 10 of the type used for laser printers. The logical page information to be printed by the laser printer is presented by the data processing unit 11 to a channel interface 12 which adapts the information being presented on line 13 to an output on line 14 which may be utilized by microprocessor and page buffer 15. The output from microprocessor 15 on line 16 comprises character addresses and the positions of characters of the character generator memory 17 which is already loaded. The information presented on line 18 from character generator memory 17 is a word or micro column of a character which is presented in standard format to the rotational hardware 19. In this prior art printer system 10 the rotational hardware 19 is preferably that hardware shown in my aforementioned application Serial Number 836,285. As will be explained hereinafter, the present invention is an improvement of part of the rotational hardware 19 shown in this previous application.

The rotated character information on line 21 is also page positioned when it is loaded into bit map memory 22 to provide a complete logical page in the form of dot matrix bits which can be scanned and read out on line 23 to a high speed laser printer or dot matrix printer mechanism 14. 5 -

Refer now to Figure 2 showing a block diagram of the preferred embodiment of the present inventiojn rotational hardware 20 which can be substituted "for the block 19 of Figure 1. The micro column words being read out of character generator memory 17 on line 18 is first applied to a multiplexer 25 which is set for the first pass to provide an output on line 26 which passes through a 180° multiplexer 27 without alteration into a barrel shifter or end around shifter 28. The output of the barrel shifter 28 on line 29 enters the rotational loop circuitry at line 31 and is applied to the register array 32 before being applied via line 33 to a large random access memory designated rotate RAMS 34. A complete character is read slice by slice through barrel shifter 28 and further processed at register array 32 and then stored in rotate RAMS 34. The information in RAM 34. is read out on line 35 slice by slice and passes through MUX 25 which now inhibits the information on line 18 and enables the information on line 35 to pass to the 180° multiplexer 27 which may or may not be active depending on whether the character originally being read from memory 17 is to be inverted or rotated 180°. The information on line 26 at the output of MUX 25 is again barrel shifted in barre shifter 28 before being again applied to the o *utVp- tut line 29 where it is now stored slice by slice or micro column word by micro column word in bit map memory 22 to prepare a logic page for printout by laser printer 24.

There are four distinct modes of operation of the information being presented at the output of character generator memory 17 on line 18. The information can be passed directly through the barrel shifter 28 without being end around shifter by disabling the input counter 36

». - and the output shift counter 37. The outpit shift counter 37 is provided with a preset number on line 38 from an associated microprocessor (not shown). This number preset in counter 37 is presented on line 39 to MUX 41 and on line 42 to the barrel shifter 28 so that a word slice passing through the barrel shifter without an end around barrel rotation was positioned before being stored in the bit map memory 22 via line 29.

A second mode of operation permits the character read out of memory 17 to be reverse column scanned and rotated 180° by the 180° multiplexer 27 before being positioned by the output shift counter 37 and barrel shifter 28 before being stored into bit map memory 22 via line 29.

A third (and fourth) mode of operation permits the character stored in memory 17 to be forward scanned (or reverse scanned) and presented slice by slice as a micro column word on line 18 and pass through multiplexers 25 and 27 for a first pass operation where it is barrel shifted by employing input shift counter 36 and its control signal line 43, multiplexer 41 and signal line 42 to barrel shift 28 each micro column word during the first pass operation. The barrel shifted micro column word bn lines 29 and 31 are applied to the register array 32 which delays and processes the input signals as will be explained in greater detail hereinafter. The processed signals on line 33 are stored micro column word slice by word slice in rotate RAMS 34 under control of input address counter 44, line 45, multiplexer 46 and control line 47. After the complete character is stored in rotate RAMS 34 it is read out on line 35 under control of the output address counters 48, line 49,MUX 46 and control line 47. The micro column word slices being presented on line 35 are now passed through the MUX 25 for a second pass through the barrel shifter 28 and presented as an - 7 -

output on line 29 before being stored micro column word slice by word slice in bit map memory 22 in a 90° rotational bit position. If the character read out of memory 17 was reverse scanned, it is flipped 180° by the *-> 180° multiplexer 27 during the second pass so that the character stored in bit map memory 22 is orientel 180° from the 90° rotational position described hereinbefore. To coordinate the sequence of operations of the present invention rotational hardware, there is provided a 0 sequence clock controller 51 which provides a sequence or plurality of timing clock signals on output line 52 which is applied to all of the logic blocks which require coordination and timing as shown. It will be noted that input clocks and output clocks are applied to "the counters 5 and are operable at different phases or periods of the clock. In similar manner, the bit map memory 22 requires an input and output clock signal, however, the output clock signal is supplied from the laser printer or dot matrix printer 24. The barrel shifter 28 is similar to ⁰ those which are commercially available and does not require a clock signal. The rotate RAMS 34 are arranged as thirteen 4 x 50+ RAM chips to provide the equivalent of 50+ by 50+ RAM capacity. RAM buffer 34 permits one character to be loaded into the RAM memory 34 while a 5 second character is being read out, thus enhancing *the speed of operation of the rotational hardware 2^*0.. ^* It will be understood that there is a register array 32 for each of the RAM chips and there is an individual input counter 44, output counter 48 and MUX 46 for each of 4- x 50+ RAM ⁰ chips which will be explained in greater detail hereinafter.

SUBSTITUTESHEET Refer now to Figure 3 showing a more detailed block diagram of the linear array shifter in the feedback loop of the rotational hardware 20. For purposes of definition the feedback loop comprises all of the elements connected to the loop comprising elements 31 through 35. For purposes of explanation of Figure 3, assume that the bit positions 43 through 49 of a fifty bit micro column word slice are being presented on input lines 31 to the register array 32 that comprises a plurality of individual shift registers which operate as delayed registers. The bit positions 46 through 49 shown opposite the arrow SI diagrammatically indicate that micro column slice 1 has not had its bit positions 46 through 49 rotated. Information in bit position 49 of slice 1 is applied to the input of static RAM 34 without any delay. Bit positions 48, 47 and 46 are shown having their information bit positions delayed by 1, 2 and 3 shift register stages before being applied to the static RAM 34. For purposes of this explanation, assume that the static RAM is a 53 x 4 portion of a RAM chip which will accommodate 4 bit positions of a 50 x 50 character or image which is stored in memory 17. In similar manner, the bit positions for micro column 2, 3 and 4 shown as slices S2, S3 and S4 are applied to the input bus 31 and clocked into the static RAM 34 with their 4 bit positions being delayed 1, 2 or 3 write access times. During subsequent operations, the information loaded as data into static RAM 34 can be read out on bus 35. As explained hereinbefore, one RAM element is being loaded at the same time a second RAM element is being read out so that a continuous operation of writing in and reading out is overlapping and occurring. It will be noted that the four bit positions 46 through 49 are only one-thirteenth of a micro column having 50 bit positions,thus,the 53 x 4 RAM 34 which accommodates a complete micro column of bit positions require 13 similar 53 x 4 static RAMS. -'It has been found that a 50 x 50 dot matrix is sufficiently dense to accommodate any known type of font or character as well as hieroglyphics, Sanskrit and Asian characters.

Refer now to Figures 4A to 4D which provide a diagrammatic representation of the character image as it is processed in the rotational hardware 20. While the character H shown in Figure 4 is only an 8 x 8 matrix, it will illustrate the functional operation of the present invention rotational hardware. Assume that the H shown in Figure 4A has been read out of character memory 17 slice by slice as the original image and is to be rotated 90°. The barrel shifter 28 performs an end around barrel barrel shift of the dot matrix positions under control of the input counter 36 to provide a barrel shifted character which may be diagrammatically represented in Figure 4B as iτwould appear on line 31 at the output of the barrel shifter 28. Figure 4C is a dot matrix representation of the character shown in Figure 4B after being store .d* in the rotate RAMS 34 and read out to provide final linear ar.ray shifting of the horizontal columns of the array siio«rn in Figure 4B and presented on output line 35. The information on line 35 represented in Figure _4C is«* passed through the barrel shifter 28 for a second pass and ._, appears as a character on output line 29 having be^en rotated 90° as shown in Figure 4D.

The preferred embodiment barrel shifter 28 shifts the first slice or micro column word shown as SI in Figure 4A by no bit positions. Slice S2 is shifted by one bit position which is clearly shown in Figure 4B where the horizontal leg of the H on the right side has moved down 10 -

one bit position. In similar manner the slices or micro columns SI through S8 are shifted zero to 7 positions, thus, slice S7 shown in Figure 4 has been shifted end around 6 positions as shown in Figure 4B. In a similar manner, the linear array shifter performs an end around shift in the horizontal or row direction similar to the barrel shifter just described. Row Rl, shown in Figure 4C, is shifted no bit positions and the row R8 shown in Figure 4C is shifted 7 bit positions from the character shown in Figure 4B. The character shown in Figure 4C is the information of the type which appears on line 35 to the input of MUX 25 and barrel shifter 28. After the information passes through the barrel shifter during the second pass, the information shown in Figure 4C is again barrel shifted to provide the 90° rotated character shown in Figure 4D on output line 29 which is then stored in fait memory 22.

Refer now to Figures 5A to 5D showing a further diagrammatic representation of the rotation of a character using alphanumeric bit positions. It will be noted that slice or word column SI when translated from Figure 5A to 5B has no end around barrel shift rotation. Micro columns S2 through S8 have been barrel shifted by 1 through 7 bit positions respectively as shown in Figure 5B. The end around bit shifted character 5B is further linear array shifted by end around shifting the horizontal rows Rl through R8 zero through seven bit positions to provide the information in Figure 5C at the input of the barrel shifter 28 via line 35. This information is again barrel shifted during the second pass as explained with reference to Figure 5A to provide a character having bit positions or alphanumeric bit positions as shown in Figure 5B which is the equivalent of the character H shifted 90° as shown in Figure 4D. Stated differently, the matrix of alphanumeric character shown in Figure 5D have been rotated 90° in the counterclockwise direction when shown in Figure 5D.

Refer now to Figure 6A to 6D which is a diagrammatic representation of the 4 bits of a 50 bit character previously discussed with reference

3. Figure 6A shows the same 4 4 matrix of bit positions being applied to the input of the register array 32. »To conform the bit positions to the same explanation employed with Figures 4 and 5, Figure 6A represents the information in micro column or word slice format which appears at the output of character generator memory 17. Figure 6B represents the information having been barrel shifted which appears on line 31 at the input to the register array 32 as shown in Figure 3. The information shown in Figure 6C is the information which appears on the output lines 35 shown in Figure 3 and is similar to four of the fifty bits of information being presented on output line 35 of Figure 2. Thus, it will be understood that the information shown in Figure 6D is the format of the information which appears on output line 29 after the second pass through the barrel shifter 28. In the attempt to show how a matrix of 50 x 50 bits is processed in the novel rotational hardware, the first barrel shift operation of the information in Figure 6C has shifted all but one of the 49 bits to another part of the matrix (not shown). However, in Figure 6D the missing three 49 bits and missing two 48 bitsand missing one 47 bit is again shifted back into the 4 x 4 matrix so that bit position 53, shown as 49 in the square, of Figure 6A appears as the bit position 54 shown rotated 90° as a bit 49 in the square of Figure 6D. Thus, it is shown that Figure 6A is rotated 90° counterclockwise to provide the information in Figure 6D as previously explained with reference to Figures 4 and 5. - 12 -

It might be asked why not use a massive look-up table to perform the transformation of the bit positions. It is not practical to store 10,000 characters in 50 x 50 bit position matrix format and perform a parallel read out transformation with a known addressable memory. Having explained the preferred embodiment of the present invention, it will now be understood that the size of the character generator memory 17 employed in my prior art copending application Serial No. 836,285 has been reduced by a factor greater than two in that the hardware shown in Figure 2 can be physically placed at the output of the character generator memory 17 shown in my copending application to provide input information for the bit map memory 22.

SUBSTITUTESHEET

Claims

13WHAT IS CLAIMED IS:

1. Apparatus for shifting the output of a bit matrix character generator ninety degrees, comprising: barrel shifter means for receiving as an*input a bit matrix character and producing a barrel shifted output, linear array shifter means having an input coupled to the output of said barrel shifter for linear array shifting said barrel shifted input and providing a twice shifted output, and said twice shifted output from said linear array shifter being fed back to the input,of said barrel shifter to provide a thrice shifted bit matrix character output which is rotated 90 degrees from the original bit matrix character.

2. Apparatus for shifting characters as set forth in claim 1 wherein said barrel shifter means comprises means for parallel shifting the bits of successive micro column words of said bit matrix characters by one additional bit per column.

3. Apparatus for shifting characters as set forth in claim 2 wherein said linear array shifter means comprises means for shifting the successive rows of' the barrel shifted bit matrix character output by one additional bit per row.

4. Apparatus for shifting characters as set forth in claim 3 wherein said linear array shifter means comprises a plurality of delay shift register stages and a plurality of random access memory chips coupled to the output of said delay register stages. ,

5. Apparatus for shifting characters as set forth in claim 4 wherein said linear array shifter means further comprises an input address counter and an output address counter. - 14 -

6. Apparatus for shifting characters as set forth in claim 5 wherein said linear array shifter further comprises a multiplexer coupled between said random access memory chips and said address counter for selecting one or the other of said address counters.

7. Apparatus for shifting characters as set forth in claim 1 wherein said barrel shifter means comprises an input address counter and an output address counter and a barrel shifter.

8. Apparatus for shifting characters as set forth in claim 7 wherein said barrel shifter means further comprises a multiplexer coupled between the barrel shifter and said address counters.

9. Apparatus for shifting characters as set forth in claim 8 wherein said barrel shifter means further comprises a second multiplexer coupled between the output of said bit matrix character generator and the input of said barrel shifter.

10. Apparatus for shifting characters as set forth in claim 7 which further includes means for presetting a count in said output address counter of said barrel shifter means which further includes counter load logic means coupled to said counter means for presetting said output shift counter of said barrel shifter means.

11. Apparatus for shifting characters as set forth in claim 7 wherein said barrel shifter means further comprises a 180 degree multiplexer connected to the input of the barrel shifter.