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Publication numberUSRE43119 E1
Publication typeGrant
Application numberUS 12/577,074
Publication date17 Jan 2012
Filing date9 Oct 2009
Priority date30 Oct 1998
Fee statusPaid
Also published asUS6321335, USRE41076, USRE41294, USRE41961, USRE42814, USRE44933
Publication number12577074, 577074, US RE43119 E1, US RE43119E1, US-E1-RE43119, USRE43119 E1, USRE43119E1
InventorsWilliam W. Y. Chu
Original AssigneeAcqis Llc
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Password protected modular computer method and device
US RE43119 E1
Abstract
A method and device for securing a removable Attached Computer Module (“ACM”) 10. ACM 10 inserts into a Computer Module Bay (“CMB”) 40 within a peripheral console to form a functional computer such as a desktop computer or portable computer. The present ACM 10 includes a locking system, which includes hardware and software 600, 700, to prevent accidental removal or theft of the ACM from the peripheral console. While ACM is in transit, further security is necessary against illegal or unauthorized use. If ACM contains confidential data, a high security method is needed to safeguard against theft.
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Claims(62)
1. A computer module, said modulesystem comprising:
a console comprising
a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, serial bit channels to transmit data in opposite directions; and
an interface controller coupled to said first LVDS channel; and
a computer module comprising
an enclosure, said enclosure being insertable into asaid console;
a central processing unit in said enclosure, said central processing unit comprising a microprocessor based integrated circuit chip;
an integrated interface controller and bridge unit to communicate encoded address and data of Peripheral Component Interconnect (“PCI”) bus transaction, said integrated interface controller and bridge unit directly coupled to said central processing unit without any intervening PCI bus;
a second LVDS channel extending directly from said integrated interface controller and bridge unit to convey said encoded address and data of PCI bus transaction, said second LVDS channel comprising two sets of unidirectional, multiple serial bit channels to transmit data in opposite directions;
a hard disk drive in said enclosure, said hard disk drive being coupled to said central processing unit; and
a programmable memory device in said enclosure, said programmable memory device being configurable to store a password for preventing a possibility of unauthorized use of said hard disk drive.
2. The computer module of claim 1 further comprising a host interface controller for providing a status of a locking device in said enclosure.
3. The computer module of claim 1 further comprising a mechanical locking device that is coupled to said programmable memory device.
4. The computer module of claim 1 further comprising a host interface controller coupled to a mechanical locking device, said host interface controller being coupled to said programmable memory device.
5. The computer modulesystem of claim 1 wherein said programmable memory device comprises a flash memory device.
6. The computer module of claim 1 wherein said programmable memory device comprises a flash memory device having at least 8 Mbits of cells and greater.
7. The computer module of claim 1 further comprising a security program in a main memory.
8. The computer module of claim 7 wherein said security program comprises a code for storing a password on said programmable memory device.
9. The computer module of claim 8 wherein said security program comprises a code for checking a time from said real-time clock circuit.
10. The computer module of claim 1 further comprising a host interface controller coupled to a solenoid that drives a mechanical lock in a first position to a second position.
11. The computer module of claim 10 wherein said solenoid also drives said mechanical lock from said second position to said first position.
12. The computer module of claim 1 further comprising a real-time clock circuit coupled to said central processing unit.
13. The computer module of claim 12 further comprising a battery coupled to a host interface controller that includes said real-time clock.
14. A method for operating a computer system, said method comprising:
inserting an attached computer module (“ACM”) into a bay of a console of a modular computer system, said console comprising a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, multiple serial bit channels to transmit encoded address and data of Peripheral Component Interconnect (“PCI”) bus transaction in opposite directions, said ACM comprising
a microprocessor unit coupled to a mass memory storage device including a plurality of application software program files;
an integrated interface controller and bridge unit directly coupled to said microprocessor unit without any intervening PCI bus; and
a second LVDS channel extending directly from said integrated interface controller and bridge unit, said second LVDS channel comprising at least two unidirectional, serial bit channels to transmit data in opposite directions;
applying power to said computer system and said ACM to execute a security program, said security program being stored in said mass memory storage device; and
prompting for a user password from a user on a display.
15. The method of claim 14 wherein said ACM comprises an enclosure that houses said microprocessor unit and said mass memory storage device.
16. The method of claim 14 further comprising providing a user password to said security program.
17. The method of claim 14further comprisingwherein said mass memory storage device comprises a flash memory devicefor storing a desired password for said ACM.
18. The method of claim 17 wherein said flash memory device maintains said desired password when power is removed from said ACM.
19. The method of claim 18 wherein said flash memory device is coupled to a host interface controller that is coupled to said microprocessor based unit.
20. The method of claim 14 wherein said mass memory storage device comprises a code directed to comparing said user password with a desired password.
21. The method of claim 14 further comprising identifying a permanent password or user code on said attached computer module.
22. The method of claim 21 wherein said permanent password or user code is stored in said microprocessor unit.
23. The method of claim 21 wherein said permanent password or user code is stored in a flash memory device coupled to said microprocessor unit.
24. A computer system comprising:
a console comprising a LAN communication device and a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, multiple serial bit channels to transmit encoded address and data of Peripheral Component Interconnect (“PCI”) bus transaction in opposite directions;
a computer module comprising an enclosure insertable into said console to form a functional computer;
a central processing unit in said enclosure, said central processing unit comprising a microprocessor based integrated circuit chip;
a hard disk drive in said enclosure, said hard disk drive being coupled to said central processing unit;
a programmable memory device in said enclosure, said programmable memory device being configurable to store a password for preventing a possibility of unauthorized use of said hard disk drive;
an integrated interface controller and bridge unit in said enclosure, said integrated interface controller and bridge unit directly coupled to said central processing unit without any intervening PCI bus; and
a second LVDS channel extending directly from said integrated interface controller and bridge unit, said second LVDS channel comprising at least two unidirectional, serial bit channels to transmit data in opposite directions;
wherein said integrated interface controller and bridge unit is configured to communicate to said console through said second LVDS channel and an interface connector.
25. The computer system of claim 24 further comprising a graphics accelerator in said enclosure.
26. The computer system of claim 24 wherein said first LVDS channel is configured to transmit said encoded address and data of PCI bus transaction in 10-bit packets.
27. A method for operating a computer system, said method comprising:
inserting an attached computer module (“ACM”) into a bay of a modular computer system housed in a console, said console comprising a LAN communication device and a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, multiple serial bit channels to transmit encoded address and data of Peripheral Component Interconnect (“PCI”) bus transaction in opposite directions, said ACM comprising
a graphics subsystem;
a microprocessor unit coupled to a mass memory storage device;
a peripheral bridge coupled to said microprocessor unit without any intervening PCI bus; and
a second LVDS channel extending directly from said peripheral bridge, said second LVDS channel comprising at least two unidirectional, serial bit channels to transmit data in opposite directions;
applying power to said computer system and said ACM to execute a security program, said security program being stored in said mass memory storage device; and
prompting for a user password from a user on a display.
28. The method of claim 27, further comprising transmitting said encoded address and data of PCI bus transaction in 10-bit packets through said first LVDS channel.
29. The method of claim 27 wherein said mass memory storage device comprises a flash memory device.
30. The method of claim 27 further comprising executing said security program to prevent unauthorized use of said mass memory storage device based on said user password.
31. The method of claim 27 further comprising executing said security program to manage an access privilege to data based on said user password.
32. A method for operating a computer system, said method comprising:
inserting an attached computer module (“ACM”) into a bay of a modular computer system housed in a console, said console comprising an add-on card slot and a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, multiple serial bit channels to transmit encoded address and data of Peripheral Component Interconnect (“PCI”) bus transaction in opposite directions, said ACM comprising
a microprocessor unit coupled to a mass memory storage device comprising a plurality of application software program files;
an enclosure;
an integrated interface controller and bridge unit directly coupled to said microprocessor unit without any intervening PCI bus; and
a second LVDS channel extending directly from said integrated interface controller and bridge unit, said second LVDS channel comprising at least two unidirectional, serial bit channels to transmit data in opposite directions;
applying power to said computer system and said ACM to execute a security program, said security program being stored in said mass memory storage device; and
prompting for a user password from a user on a display,
wherein data in said mass memory storage device is accessed by said microprocessor unit through said integrated interface controller and bridge unit.
33. The method of claim 32, further comprising transmitting said encoded address and data of PCI bus transaction in 10-bit packets through said first LVDS channel.
34. The method of claim 32 wherein said mass memory storage device comprises a flash memory.
35. A method for operating a computer system, said method comprising:
inserting an attached computer module (“ACM”) into a bay of a console of a modular computer system, said console comprising a LAN communication device, a removable storage media subsystem, and a first low voltage differential signal (“LVDS”) channel comprising two unidirectional, serial channels to transmit encoded address and data of Peripheral Component Interconnect (“PCI”) bus transaction in 10-bit packets, said ACM comprising
a microprocessor unit coupled to a mass memory storage device;
a peripheral bridge directly coupled to said microprocessor unit without any intervening PCI bus; and
a second LVDS channel extending directly from said peripheral bridge, said second LVDS channel comprising two unidirectional, serial bit channels to transmit data in opposite directions;
applying power to said computer system and said ACM to execute a security program, said security program being stored in said mass memory storage device; and
prompting for a user password from a user on a display.
36. The method of claim 35 wherein said mass memory storage device comprises a flash memory.
37. The method of claim 35 wherein said mass memory storage device comprises a hard disk drive.
38. A method for operating a computer system, said method comprising:
inserting an attached computer module (“ACM”) into a bay of a console of a modular computer system, said console comprising a LAN communication device and a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, multiple serial bit channels to transmit encoded Peripheral Component Interconnect (“PCI”) bus transaction address and data in opposite directions, said ACM comprising
a microprocessor unit coupled to a mass memory storage device;
a peripheral bridge directly coupled to said microprocessor unit without any intervening PCI bus; and
a second LVDS channel extending directly from said peripheral bridge, said second LVDS channel comprising two sets of unidirectional, serial bit channels to transmit data in opposite directions;
applying power to said computer system and said ACM to execute a security program, said security program being stored in said mass memory storage device; and
prompting for a user password from a user on a display.
39. The method of claim 38 wherein said mass memory storage device comprises a flash memory.
40. The method of claim 38 wherein said mass memory storage device comprises a hard disk drive.
41. A computer module, said module comprising:
an enclosure, said enclosure being insertable into a console of a modular computer system, said console comprising a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, multiple serial bit channels to transmit data in opposite directions;
a central processing unit in said enclosure, said central processing unit comprising a microprocessor based integrated circuit chip;
a peripheral bridge to communicate address and data of Peripheral Component Interconnect (“PCI”) bus transaction in an encoded, serial form, said peripheral bridge directly coupled to said central processing unit without any intervening PCI bus;
a hard disk drive in said enclosure, said hard disk drive being coupled to said central processing unit;
a second LVDS channel extending directly from said peripheral bridge to convey said address and data of PCI bus transaction in said encoded, serial form, said second LVDS channel comprising two sets of unidirectional, multiple serial bit channels to transmit data in opposite directions; and
a programmable memory device in said enclosure, said programmable memory device being configurable to store a password for preventing a possibility of unauthorized use of said hard disk drive.
42. The computer module of claim 41 wherein said second LVDS channel is configured to transmit data in 10-bit packets.
43. The computer module of claim 41 wherein said first LVDS channel couples to said second LVDS channel upon insertion of said computer module into said console.
44. A computer module, said module comprising:
an enclosure, said enclosure being insertable into a console of a modular computer system, said console comprising a first low voltage differential signal (“LVDS”) channel comprising two sets of unidirectional, serial bit channels to transmit data in opposite directions;
a central processing unit in said enclosure, said central processing unit comprising a microprocessor based integrated circuit chip;
an integrated interface controller and bridge unit coupled to said central processing unit without any intervening Peripheral Component Interconnect (“PCI”) bus;
a hard disk drive in said enclosure, said hard disk drive being coupled to said central processing unit;
a second LVDS channel extending directly from said integrated interface controller and bridge unit, said second LVDS channel comprising two sets of unidirectional, serial bit channels to transmit data in opposite directions; and
a programmable memory device in said enclosure, said programmable memory device being configurable to store a password for preventing a possibility of unauthorized use of said hard disk drive,
wherein said first LVDS channel couples to said second LVDS channel upon insertion of said computer module into said console.
45. The computer module of claim 44 wherein said console further comprises a power supply to supply power to said computer module upon insertion.
46. The computer module of claim 44 wherein said second LVDS channel is configured to transmit encoded address and data of PCI bus transaction in 10-bit packets.
47. The computer system of claim 1 wherein said integrated interface controller and bridge unit is configured to output said encoded address and data of PCI bus transaction as 10-bit packets.
48. The computer system of claim 47 wherein said hard disk drive is coupled to said central processing unit through said integrated interface controller and bridge unit.
49. The computer system of claim 26 wherein said integrated interface controller and bridge unit is configured to output a serial bit stream that is conveyed over said second LVDS channel as data packets.
50. The computer system of claim 49 wherein said serial bit stream comprises information of Universal Serial Bus protocol.
51. The computer system of claim 49 wherein said hard disk drive is coupled to said central processing unit through said integrated interface controller and bridge unit.
52. The computer module of claim 42 wherein said peripheral bridge is configured to output an encoded serial bit stream comprising said address and data of PCI bus transaction.
53. The computer module of claim 52 wherein said encoded serial bit stream comprises information to permit decoding to create a PCI bus transaction.
54. The computer module of claim 53 wherein said hard disk drive is coupled to said central processing unit through said peripheral bridge.
55. The computer module of claim 54 wherein said peripheral bridge comprises a north bridge.
56. The computer module of claim 42 wherein said peripheral bridge comprises an interface controller to output said address and data of PCI bus transaction in said encoded, serial form, and said second LVDS channel extends directly from said interface controller.
57. The computer module of claim 56 wherein said interface controller is integrated with the peripheral bridge to form a single integrated unit.
58. The computer module of claim 57 wherein said interface controller is directly coupled to said central processing unit without any intervening PCI bus.
59. The computer module of claim 44 wherein said integrated interface controller and bridge unit is configured to output an encoded serial bit stream that is conveyed over said second LVDS channel.
60. The computer module of claim 59 wherein said encoded serial bit stream is conveyed over said second LVDS channel as 10-bit packets.
61. The computer module of claim 59 wherein said hard disk drive is coupled to said central processing unit through said integrated interface controller and bridge unit.
62. The computer module of claim 59 wherein said encoded serial bit stream comprises information of Universal Serial Bus protocol.
Description
CROSS REFERENCE TO RELATED APPLICATIONS

Notice: More than one reissue application has been filed for the reissue of U.S. Pat. No. 6,321,335. The reissue applications are U.S. application Ser. Nos. 10/963,825 (a parent reissue application), 11/474,256 (which is a continuation reissue of the parent reissue application), 11/517,601 (which is a continuation reissue of the parent reissue application), 12/577,074 (the present application, which is a continuation reissue of the parent reissue application), and 12/322,858 (which is a continuation reissue of U.S. application Ser. No. 11/517,601).

This application is a continuation reissue of U.S. application Ser. No. 10/963,825, which is a reissue of U.S. Pat. No. 6,321,335, which are incorporated herein by reference.

The following two commonly-owned copending applications, including this one, are being filed concurrently and the other one is hereby incorporated by reference in their entirety for all purposes:

1. U.S. patent application Ser. No. 09/183,816, William W. Y. Chu, entitled, “Modular Computer Security Method and Device”, and

2. U.S. patent application Ser. No. 09/183,493, William W. Y. Chu, entitled, “Password Protected Modular Computer Method and Device”.

BACKGROUND OF THE INVENTION

The present invention relates to computing devices. More particularly, the present invention provides a method and device for securing a personal computer or set-top box using password protection techniques. Merely by way of example, the present invention is applied to a modular computing environment for desk top computers, but it will be recognized that the invention has a much wider range of applicability. It can be applied to a server as well as other portable or modular computing applications.

Many desktop or personal computers, which are commonly termed PCs, have been around and used for over ten years. The PCs often come with state-of-art microprocessors such as the Intel Pentium™ microprocessor chips. They also include a hard or fixed disk drive such as memory in the giga-bit range. Additionally, the PCs often include a random access memory integrated circuit device such as a dynamic random access memory device, which is commonly termed DRAM. The DRAM devices now provide up to millions of memory cells (i.e., mega-bit) on a single slice of silicon. PCs also include a high resolution display such as cathode ray tubes or CRTs. In most cases, the CRTs are at least 15 inches or 17 inches or 20 inches in diameter. High resolution flat panel displays are also used with PCs.

Many external or peripheral devices can be used with the PCs. Among others, these peripheral devices include mass storage devices such as a Zip™ Drive product sold by Iomega Corporation of Utah. Other storage devices include external hard drives, tape drives, and others. Additional devices include communication devices such as a modem, which can be used to link the PC to a wide area network of computers such as the Internet. Furthermore, the PC can include output devices such as a printer and other output means. Moreover, the PC can include special audio output devices such as speakers the like.

PCs also have easy to use keyboards, mouse input devices, and the like. The keyboard is generally configured similar to a typewriter format. The keyboard also has the length and width for easily inputting information by way of keys to the computer. The mouse also has a sufficient size and shape to easily move a curser on the display from one location to another location.

Other types of computing devices include portable computing devices such as “laptop” computers and the like. Although somewhat successful, laptop computers have many limitations. These computing devices have poor display technology. In fact, these devices often have a smaller flat panel display that has poor viewing characteristics. Additionally, these devices also have poor input devices such as smaller keyboards and the like. Furthermore, these devices have limited common platforms to transfer information to and from these devices and other devices such as PCs.

Up to now, there has been little common ground between these platforms including the PCs and laptops in terms of upgrading, ease-of-use, cost, performance, and the like. Many differences between these platforms, probably somewhat intentional, has benefited computer manufacturers at the cost of consumers. A drawback to having two separate computers is that the user must often purchase both the desktop and laptop to have “total” computing power, where the desktop serves as a “regular” computer and the laptop serves as a “portable” computer. Purchasing both computers is often costly and runs “thousands” of dollars. The user also wastes a significant amount of time transferring software and data between the two types of computers. For example, the user must often couple the portable computer to a local area network (i.e., LAN), to a serial port with a modem and then manually transfer over files and data between the desktop and the portable computer. Alternatively, the user often must use floppy disks to “zip” up files and programs that exceed the storage capacity of conventional floppy disks, and transfer the floppy disk data manually.

Another drawback with the current model of separate portable and desktop computer is that the user has to spend money to buy components and peripherals the are duplicated in at least one of these computers. For example, both the desktop and portable computers typically include hard disk drives, floppy drives, CD-ROMs, computer memory, host processors, graphics accelerators, and the like. Because program software and supporting programs generally must be installed upon both hard drives in order for the user to operate programs on the road and in the office, hard disk space is often wasted.

One approach to reduce some of these drawbacks has been the use of a docking station with a portable computer. Here, the user has the portable computer for “on the road” use and a docking station that houses the portable computer for office use. The docking station typically includes a separate monitor, keyboard, mouse, and the like and is generally incompatible with other desktop PCs. The docking station is also generally not compatible with portable computers of other vendors. Another drawback to this approach is that the portable computer typically has lower performance and functionality than a conventional desktop PC. For example, the processor of the portable is typically much slower than processors in dedicated desktop computers, because of power consumption and heat dissipation concerns. As an example, it is noted that at the time of drafting of the present application, some top-of-the-line desktops include 400 MHz processors, whereas top-of-the-line notebook computers include 266 MHz processors.

Another drawback to the docking station approach is that the typical cost of portable computers with docking stations can approach the cost of having a separate portable computer and a separate desktop computer. Further, as noted above, because different vendors of portable computers have proprietary docking stations, computer users are held captive by their investments and must rely upon the particular computer vendor for future upgrades, support, and the like.

Thus what is needed are computer systems that provide reduced user investment in redundant computer components and provide a variable level of performance based upon computer configuration.

SUMMARY OF THE INVENTION

According to the present invention, a technique including a method and device for securing a computer module using a password in a computer system is provided. In an exemplary embodiment, the present invention provides a security system for an attached computer module (“ACM”). In an embodiment, the ACM inserts into a Computer Module Bay (CMB) within a peripheral console to form a functional computer.

In a specific embodiment, the present invention provides a computer module. The computer module has an enclosure that is insertable into a console. The module also has a central processing unit (i.e., integrated circuit chip) in the enclosure. The module has a hard disk drive in the enclosure, where the hard disk drive is coupled to the central processing unit. The module further has a programmable memory device in the enclosure, where the programmable memory device can be configurable to store a password for preventing a possibility of unauthorized use of the hard disk drive and/or other module elements. The stored password can be any suitable key strokes that a user can change from time to time. In a further embodiment, the present invention provides a permanent password or user identification code stored in flash memory, which also can be in the processing unit, or other integrated circuit element. The permanent password or user identification code is designed to provide a permanent “finger print” on the attached computer module.

In a specific embodiment, the present invention provides a variety of methods. In one embodiment, the present invention provides a method for operating a computer system such as a modular computer system and others. The method includes inserting an attached computer module (“ACM”) into a bay of a modular computer system. The ACM has a microprocessor unit (e.g., microcontroller, microprocessor) coupled to a mass memory storage device (e.g., hard disk). The method also includes applying power to the computer system and the ACM to execute a security program, which is stored in the mass memory storage device. The method also includes prompting for a user password from a user on a display (e.g., flat panel, CRT). In a further embodiment, the present method includes a step of reading a permanent password or user identification code stored in flash memory, or other integrated circuit element. The permanent password or user identification code provides a permanent finger print on the attached computer module. The present invention includes a variety of these methods that can be implemented in computer codes, for example, as well as hardware.

Numerous benefits are achieved using the present invention over previously existing techniques. The present invention provides mechanical and electrical security systems to prevent theft or unauthorized use of the computer system in a specific embodiment. Additionally, the present invention substantially prevents accidental removal of the ACM from the console. In some embodiments, the present invention prevents illegal or unauthorized use during transit. The present invention is also implemented using conventional technologies that can be provided in the present computer system in an easy and efficient manner. Depending upon the embodiment, one or more of these benefits can be available. These and other advantages or benefits are described throughout the present specification and are described more particularly below.

These and other embodiments of the present invention, as well as its advantages and features, are described in more detail in conjunction with the text below and attached FIGS.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a simplified diagram of a computer system according to an embodiment of the present invention;

FIG. 2 is a simplified diagram of a computer module according to an embodiment of the present invention;

FIG. 3 is a simplified side-view diagram of a computer module according to an embodiment of the present invention;

FIG. 4 is a simplified layout diagram of a security system for a computer system according to an embodiment of the present invention;

FIG. 5 is a simplified block diagram of a security system for a computer module according to an embodiment of the present invention; and

FIGS. 6 and 7 show simplified flow diagrams of security methods according to embodiments of the present invention.

FIG. 8 is a block diagram of one embodiment of a computer system using the interface of the present invention.

FIG. 9 is a detailed block diagram of one embodiment of the host interface controller (HIC) of the present invention.

FIG. 10 is a detailed block diagram of one embodiment of the PIC of the present invention.

FIG. 11 is a schematic diagram of the signal lines PCK, PD0 to PD3, and PCN.

FIG. 12 is a block diagram of another embodiment of the HIC and PIC of the present invention and the interface therebetween.

FIG. 13 is a detailed block diagram of another embodiment of the HIC of the present invention.

FIG. 14 is a schematic diagram of the signal lines PCK and PD0 to PD3.

FIG. 15 is a partial block diagram of a computer system in which the north and south bridges are integrated with the host and peripheral interface controllers, respectively.

DESCRIPTION OF SPECIFIC EMBODIMENTS

I. System Hardware

FIG. 1 is a simplified diagram of a computer system 1 according to an embodiment of the present invention. This diagram is merely an illustration and should not limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. The computer system 1 includes an attached computer module (i.e., ACM) 10, a desktop console 20, among other elements. The computer system is modular and has a variety of components that are removable. Some of these components (or modules) can be used in different computers, workstations, computerized television sets, and portable or laptop units.

In the present embodiment, ACM 10 includes computer components, as will be described below, including a central processing unit (“CPU”), IDE controller, hard disk drive, computer memory, and the like. The computer module bay (i.e., CMB) 40 is an opening or slot in the desktop console. The CMB houses the ACM and provides communication to and from the ACM. The CMB also provides mechanical protection and support to ACM 10. The CMB has a mechanical alignment mechanism for mating a portion of the ACM to the console. The CMB further has thermal heat dissipation sinks, electrical connection mechanisms, and the like. Some details of the ACM can be found in co-pending patent application Nos. 09/149,882 and 09/149,548 filed Sep. 8, 1998, commonly assigned, and hereby incorporated by reference for all purposes.

In a preferred embodiment, the present system has a security system, which includes a mechanical locking system, an electrical locking system, and others. The mechanical locking system includes at least a key 11. The key 11 mates with key hole 13 in a lock, which provides a mechanical latch 15 in a closed position. The mechanical latch, in the closed position, mates and interlocks the ACM to the computer module bay. The mechanical latch, which also has an open position, allows the ACM to be removed from the computer module bay. Further details of the mechanical locking system are shown in the Fig. below.

FIG. 2 is a simplified diagram of a computer module 10 according to an embodiment of the present invention. This diagram is merely an illustration and should not limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. Some of the reference numerals are similar to the previous Fig. for easy reading. The computer module 10 includes key 11, which is insertable into keyhole 13 of the lock. The lock has at least two position, including a latched or closed position and an unlatched or open position. The latched position secures the ACM to the computer module bay. The unlatched or open position allows the ACM to be inserted into or removed from the computer bay module. As shown, the ACM also has a slot or opening 14, which allows the latch to move into and out of the ACM. The ACM also has openings 17 in the backside for an electrical and/or mechanical connection to the computer module bay, which is connected to the console.

FIG. 3 is a simplified side-view diagram of a computer module according to an embodiment of the present invention. This diagram is merely an illustration and should not limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. Some of the reference numerals are similar to the previous FIG. for easy reading. As shown, the ACM module inserts into the computer module bay frame 19, which is in the console. A side 27 and a bottom 19 of ACM slide and fit firmly into the computer module bay frame, which has at least a bottom portion 19 and back portion 26. A backside 23 of the ACM faces backside 26 of the frame. ACM also has a front-side or face 25 that houses the lock and exposes the keyhole 13 to a user. The key 11 is insertable from the race into the keyhole.

As the ACM inserts into the frame, connector 17 couples and inserts into connector 21. Connector 17 electrically and mechanically interface elements of the ACM to the console through connector 21. Latch 14 should be moved away from the bottom side 19 of the module bay frame before inserting the ACM into the frame. Once the ACM is inserted fully into the frame, latch 15 is placed in a closed or lock position, where it keeps the ACM firmly in place. That is, latch 15 biases against a backside portion 29 of the ACM enclosure to hold the ACM in place, where the connector 17 firmly engages, electrically and mechanically, with connector 21. To remove the ACM, latch 15 is moved away or opened from the back side portion of the ACM enclosure. ACM is manually pulled out of the computer module bay frame, where connector 17 disengages with connector 21. As shown, the key 11 is used to selectively move the latch in the open or locked position to secure the ACM into the frame module.

In most embodiments, the ACM includes an enclosure such as the one described with the following components, which should not be limiting:

    • 1) A CPU with cache memory;
    • 2) Core logic device or means;
    • 3) Main memory;
    • 4) A single primary Hard Disk Drive (“HDD”) that has a security program;
    • 5) Flash memory with system BIOS and programmable user password;
    • 6) Operating System, application software, data files on primary HDD;
    • 7) An interface device and connectors to peripheral console;
    • 8) A software controllable mechanical lock, lock control means, and other accessories.

The ACM connects to a peripheral console with power supply, a display device, an input device, and other elements. Some details of these elements with the present security system are described in more detail below.

FIG. 4 is a simplified layout diagram of a security system for a computer system according to an embodiment of the present invention. This diagram is merely an illustration and should not limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. The layout diagram illustrates the top-view of the module 10, where the backside components (e.g., Host Interface Controller) are depicted in dashed lines. The layout diagram has a first portion, which includes a central processing unit (“CPU”) module 400, and a second portion, which includes a hard drive module 420. A common printed circuit board 437 houses these modules and the like. Among other features, the ACM includes the central processing unit module 400 with a cache memory 405, which is coupled to a north bridge unit 421, and a host interface controller 401. The host interface controller includes a lock control 403. As shown, the CPU module is disposed on a first portion of the attached computer module, and couples to connectors 17. Here, the CPU module is spatially located near connector 17.

The CPU module can use a suitable microprocessing unit, microcontroller, digital signal processor, and the like. In a specific embodiment, the CPU module uses, for example, a 400 MHz Pentium II microprocessor module from Intel Corporation and like microprocessors from AMD Corporation, Cyrix Corporation (now National Semiconductor Corporation), and others. In other aspects, the microprocessor can be one such as the Compaq Computer Corporation Alpha Chip, Apple Computer Corporation PowerPC G3 processor, and the like. Further, higher speed processors are contemplated in other embodiments as technology increases in the future.

In the CPU module, host interface controller 401 is coupled to BIOS/flash memory 405. Additionally, the host interface controller is coupled to a clock control logic, a configuration signal, and a peripheral bus. The present invention has a host interface controller that has lock control 403 to provide security features to the present ACM. Furthermore, the present invention uses a flash memory that includes codes to provide password protection or other electronic security methods.

The second portion of the attached computer module has the hard drive module 420. Among other elements, the hard drive module includes north bridge 421, graphics accelerator 423, graphics memory 425, a power controller 427, an IDE controller 429, and other components. Adjacent to and in parallel alignment with the hard drive module is a personal computer interface (“PCI”) bus 431, 432. A power regulator 435 is disposed near the PCI bus.

In a specific embodiment, north bridge unit 421 often couples to a computer memory, to the graphics accelerator 423, to the IDE controller, and to the host interface controller via the PCI bus. Graphics accelerator 423 typically couples to a graphics memory 423, and other elements. IDE controller 429 generally supports and provides timing signals necessary for the IDE bus. In the present embodiment, the IDE controller is embodied as a 643U2 PCI-to IDE chip from CMD Technology, for example. Other types of buses than IDE are contemplated, for example EIDE, SCSI, 1394, and the like in alternative embodiments of the present invention.

The hard drive module or mass storage unit 420 typically includes a computer operating system, application software program files, data files, and the like. In a specific embodiment, the computer operating system may be the Windows98 operating system from Microsoft Corporation of Redmond Wash. Other operating systems, such as WindowsNT, MacOS8, Unix, and the like are also contemplated in alternative embodiments of the present invention. Further, some typical application software programs can include Office98 by Microsoft Corporation, Corel Perfect Suite by Corel, and others. Hard disk module 420 includes a hard disk drive. The hard disk drive, however, can also be replaced by removable hard disk drives, read/write CD ROMs, flash memory, floppy disk drives, and the like. A small form factor, for example 2.5″, is currently contemplated, however, other form factors, such as PC card, and the like are also contemplated. Mass storage unit 240 may also support other interfaces than IDE. Among other features, the computer system includes an ACM with security protection. The ACM connects to the console, which has at least the following elements, which should not be limiting.

    • 1) Connection to input devices, e.g. keyboard or mouse;
    • 2) Connection to display devices, e.g. Monitor;
    • 3) Add-on means, e.g. PCI add-on slots;
    • 4) Removable storage media subsystem, e.g. Floppy drive, CDROM drive;
    • 5) Communication device, e.g. LAN or modem;
    • 6) An interface device and connectors to ACM;
    • 7) A computer module bay with a notch in the frame for ACM's lock; and
    • 8) Power supply and other accessories.

As noted, the computer module bay is an opening in a peripheral console that receives the ACM. The computer module bay provides mechanical support and protection to ACM. The module bay also includes, among other elements, a variety of thermal components for heat dissipation, a frame that provides connector alignment, and a lock engagement, which secures the ACM to the console. The bay also has a printed circuit board to mount and mate the connector from the ACM to the console. The connector provides an interface between the ACM and other accessories.

FIG. 5 is a simplified block diagram 500 of a security system for a computer module according to an embodiment of the present invention. This diagram is merely an illustration and should not limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. The block diagram 500 has a variety of features such as those noted above, as well as others. In the present diagram, different reference numerals are used to show the operation of the present system.

The block diagram is an attached computer module 500. The module 500 has a central processing unit, which communicates to a north bridge 541, by way of a CPU bus 527. The north bridge couples to main memory 523 via memory bus 529. The main memory can be any suitable high speed memory device or devices such as dynamic random access memory (“DRAM”) integrated circuits and others. The DRAM includes at least 32 Meg. or 64 Meg. and greater of memory, but can also be less depending upon the application. Alternatively, the main memory can be coupled directly with the CPU in some embodiments. The north bridge also couples to a graphics subsystem 515 via bus 542543. The graphics subsystem can include a graphics accelerator, graphics memory, and other devices. Graphics subsystem transmits a video signal 517 to an interface connector, which couples to a display, for example.

The attached computer module also includes a primary hard disk drive that serves as a main memory unit for programs and the like. The hard disk can be any suitable drive that has at least 2 GB and greater. As merely an example, the hard disk is a Marathon 2250 (2.25 GB, 2½ inch drive) product made by Seagate Corporation of Scotts Valley, but can be others. The hard disk communicates to the north bridge by way of a hard disk drive controller and bus lines 502 and 531. The hard disk drive controller couples to the north bridge by way of the host PCI bus, which connects bus 537 to the north bridge. The hard disk includes computer codes that implement a security program according to the present invention. Details of the security program are provided below.

The attached computer module also has a flash memory device 505 with a BIOS. The flash memory device 505 also has codes for a user password that can be stored in the device. The flash memory device generally permits the 5 storage of such password without a substantial use of power, even when disconnected. As merely an example, the flash memory device has at least 4 Meg. or greater of memory, or 16 Meg. or greater of memory. A host interface controller 507 communicationscommunicates to the north bridge via bus 535 and host PCI bus. The host interface controller also has a lock control 509, which couples to a lock. The lock is attached to the module and has a manual override to the lock on the host interface controller in some embodiments. Host interface controller 507 communicates to the console using bus 511, which couples to connectionconnector 513.

In one aspect of the present invention the security system uses a combination of electrical and mechanical locking mechanisms. Referring to FIG. 5A, for example, the present system provides a lock status mechanism in the host interface controller 509. The lock status of the lock is determined by checking a lock status bit 549, which is in the host interface controller. The lock status bit is determined by a signal 553, which is dependent upon the position of the lock. Here, the position of the lock is closed in the ground 559 position, where the latch couples to a ground plane in the module and/or system. Alternatively, the signal of the lock is at Vcc, for example, which is open. Alternatively, the signal can be ground in the open position and Vcc in the closed position, depending upon the application. Other signal schemes can also be used depending upon the application.

Once the status is determined, the host interface controller turns the lock via solenoid 557 in a lock on or lock off position, which is provided through the control bit 551, for example. The control bit is in a register of the host interface controller in the present example. By way of the signal schemes noted and the control bit, it is possible to place the lock in the lock or unlock position in an electronic manner. Once the status of the lock is determined, the host interface controller can either lock or unlock the latch on the module using a variety of prompts, for example.

In a preferred embodiment, the present invention uses a password protection scheme to electronically prevent unauthorized access to the computer module. The present password protection scheme uses a combination of software, which is a portion of the security program, and a user password, which can be stored in the flash memory device 505. By way of the flash memory device, the password does not become erased by way of power failure or the lock. The password is substantially fixed in code, which cannot be easily erased. Should the user desire to change the password, it can readily be changed by erasing the code, which is stored in flash memory and a new code (i.e., password) is written into the flash memory. An example of a flash memory device can include a Intel Flash 28F800F3 series flash, which is available in 8 Mbit and 16 Mbit designs. Other types of flash devices can also be used, however. Details of a password protection method are further explained below by way of the FIGS.

In a specific embodiment, the present invention also includes a real-time clock 510 in the ACM, but is not limited. The real-time clock can be implemented using a reference oscillator 14.31818 MHz 508 that couples to a real-time clock circuit. The real-time clock circuit can be in the host interface controller. An energy source 506 such as a battery can be used to keep the real-time clock circuit running even when the ACM has been removed from the console. The real-time clock can be used by a security program to perform a variety of functions. As merely an example, these functions include: (1) fixed time period in which the ACM can be used, e.g., ACM cannot be used at night; (2) programmed ACM to be used after certain date, e.g., high security procedure during owner's vacation or non use period; (3) other uses similar to a programmable time lock. Further details of the present real-time clock are described in the application listed under Ser. No. 09/183,816 noted above.

In still a further embodiment, the present invention also includes a permanent password or user identification code to identify the computer module. In one embodiment, the permanent password or user code is stored in a flash memory device. Alternatively, the permanent password or user code is stored in the central processing unit. The password or user code can be placed in the device upon manufacture of such device. Alternatively, the password or user code can be placed in the device by a one time programming techniques using, for example, fuses or the like. The present password or user code provides a permanent “finger print” on the device, which is generally hardware. The permanent finger print can be used for identification purposes for allowing the user of the hardware to access the hardware itself, as well as other systems. These other systems include local and wide area networks. Alternatively, the systems can also include one or more servers. The present password and user identification can be quite important for electronic commerce applications and the like. In one or more embodiments, the permanent password or user code can be combined with the password on flash memory for the security program, which is described below in more detail.

II. SECURITY DETECTION PROGRAMS

FIGS. 6 and 7 show simplified flow diagrams 600, 700 of security methods according to embodiments of the present invention. These diagrams are merely illustrations and should not limit the scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives. Referring to FIG. 6, which considers an example for when the ACM is inserted into the computer module bay in the console, ACM has already been inserted into the console and is firmly engaged in an electrical and mechanical manner. A computer system is powered up 601, which provides selected signals to the microprocessor. The microprocessor oversees the operation of the computer system. The microprocessor searches the memory in, for example, the hard disk drive and execute a security program, step 603.

The security program runs through a sequence of steps before allowing a user to operate the present system with the ACM. Among other processes, the security program determines if an “Auto-lock” is ON. If so, the security program goes via branch 606 to step 607. Alternatively, the security program goes to step 609, which determines that the lock stays OFF and loops to step 627, which indicates that the ACM can be removed physically from the console. In step 607, the security program turns a switch or switching means that turns ON a lock, which can be electrical, mechanical, or a combination of electrical and mechanical.

In a specific embodiment, the security program turns OFF the power of the ACM and console. Here, the security program directs the OS to turn the power OFF, step 613. In an embodiment where power failure occurs (step 611), a key is used to release a latch in the ACM on the lock 615, where the ACM can be removed, step 627. From step 613, the security program determines if the ACM is to be removed, step 617. If not, the lock stays ON, step 619. Alternatively, the security detection program determines if the password (or other security code) matches with the designated password, step 621. If not, the lock stays ON, step 623. Alternatively, the security program releases the lock 625, which frees the ACM. Next, the ACM can be removed, step 627.

In an alternative embodiment, the present invention provides a security system for the ACM, which is outside the console or computer module bay. See, FIG. 7, for example. As shown, the security system is implemented to prevent illegal or unauthorized use (step 701) of the ACM, which has not been used in the console. Here, a key turns ON a lock (step 703). The lock moves a latch in the ACM to a specific spatial location that physically blocks the passage of the ACM into the computer module bay. Accordingly, the ACM cannot insert (step 705) into the computer module bay.

In an alternative aspect, the key can be used to turn the lock OFF, step 707. Here, the key moves the latch in a selected spatial location that allows the ACM to be inserted into the computer bay module. In the OFF position, the ACM inserts into the computer module bay, step 709. Once the ACM is in the bay, a user can begin operating the ACM through the console. In one embodiment, the computer console including the ACM goes through the sequence of steps in the above FIG., but is not limited.

In a specific embodiment, the present invention implements the sequences above using computer software. In other aspects, computer hardware can also be used and is preferably in some applications. The computer hardware can include a mechanical lock, which is built into the ACM. An example of such mechanical lock is shown above, but can also be others. In other aspects, the lock can be controlled or accessed electronically by way of computer software. Here, the key can be used to as a manual override if the ACM or computer fails.

The lock is used to prevent theft and accidental removal inside CMB. The current invention locates the lock inside the ACM to allow a user to keep a single key as ACM is moved from console to console at different locations. When ACM is in transit, the lock can be engaged using the key so that the latch extends outside ACM's enclosure. The extended latch prevents ACM from being inserted into any CMB. This prevents any illegal use of ACM by someone other than the user.

In one aspect of the invention, the user password is programmable. The password can be programmable by way of the security program. The password can be stored in a flash memory device within the ACM. Accordingly, the user of the ACM and the console would need to have the user password in order to access the ACM. In the present aspect, the combination of a security program and user password can provide the user a wide variety of security functions as follows:

    • 1) Auto-lock capability when ACM is inserted into CMB;
    • 2) Access privilege of program and data;
    • 3) Password matching for ACM removal; and
    • 4) Automatic HDD lock out if tempering is detected.

In still a further embodiment, the present invention also includes a method for reading a permanent password or user identification aide to identify the computer module. In one embodiment, the permanent password or user code is stored in a flash memory device. Alternatively, the permanent password or user code is stored in the central processing unit. The password or user code can be placed in the device upon manufacture of such device. Alternatively, the password or user code can be placed in the device by a one time programming techniques using, for example, fuses or the like. The present password or user code provides a permanent “finger print” on the device, which is generally hardware. The permanent finger print can be used for identification purposes for allowing the user of the hardware to access the hardware itself, as well as other systems. These other systems include local and wide area networks. Alternatively, the systems can also include one or more servers. The present method allows a third party confirm the user by way of the permanent password or user code. The present password and user identification can be quite important for electronic commerce applications and the like, which verify the user code or password. In one or more embodiments, the permanent password or user code can be combined with the password on flash memory for the security program.

Two PCI or PCI-like buses are interfaced using a non-PCI or non-PCI-like channel. PCI control signals are encoded into control bits, and the control bits, rather than the control signals that they represent, and are transmitted on the interface channel. At the receiving end, the control bits representing control signals are decoded back into PCI control signals prior to being transmitted to the intended PCI bus.

The fact that control bits rather than control signals are transmitted on the interface channel allows using a smaller number of signal channels and a correspondingly small number of conductive lines in the interface channel than would otherwise be possible. This is because the control bits can be more easily multiplexed at one end of the interface channel and recovered at the other end than control signals. This relatively small number of signal channels used in the interface channel allows using low voltage differential signal (“LVDS”) channels for the interface. An LVDS channel is more cable friendly, faster, consumes less power, and generates less noise than a PCI bus channel. Therefore, an LVDS channel is advantageously used for the hereto unused purpose of interfacing PCI or PCI-like buses. The relatively smaller number of signal channels in the interface also allows using connectors having smaller pins counts. As mentioned above an interface having a smaller number of signal channels and, therefore, a smaller number of conductive lines is less bulky and less expensive than one having a larger number of signal channels. Similarly, connectors having a smaller number of pins are also less expensive and less bulky than connectors having a larger number of pins.

In a preferred embodiment, the interface channel has a plurality of serial bit channels numbering fewer than the number of parallel bus lines in each of the PCI buses and operates at a clock speed higher than the clock speed at which any of the bus lines operates. More specifically, the interface channel includes two sets of unidirectional serial bit channels which transmit data in opposite directions such that one set of bit channels transmits serial bits from the HIC to the PIC while the other set transmits serial bits from the PIC to the HIC. For each cycle of the PCI clock, each bit channel of the interface channel transmits a packet of serial bits.

FIG. 8 is a block diagram of one embodiment of a computer system 800 using the interface of the present invention. Computer system 800 includes an attached computer module (ACM) 805 and a peripheral console 810. The ACM 805 and the peripheral console 810 are interfaced through an exchange interface system (XIS) bus 815. The XIS bus 815 includes power bus 816, video bus 817 and peripheral bus (XPBus) 818, which is also herein referred to as an interface channel. The power bus 816 transmits power between ACM 805 and peripheral console 810. In a preferred embodiment power bus 816 transmits power at voltage levels of 3.3 volts, 5 volts and 12 volts. Video bus 817 transmits video signals between the ACM 805 and the peripheral console 810. In a preferred embodiment, the video bus 817 transmits analog Red Green Blue (RGB) video signals for color monitors, digital video signals (such as Video Electronics Standards Association (VESA) Plug and Display's Transition Minimized Differential signaling (TMDS) signals for flat panel displays), and television (TV) and/or super video (S-video) signals. The XPBus 818 is coupled to host interface controller (HIC) 819 and to peripheral interface controller (PIC) 820, which is also sometimes referred to as a bay interface controller.

FIG. 9 is a detailed block diagram of one embodiment of the HIC of the present invention. As shown in FIG. 9, HIC 900 comprises bus controller 910, translator 920, transmitter 930, receiver 940, a PLL 950, an address/data multiplexer (A/D MUX) 960, a read/write controller (RD/WR Cntl) 970, a video serial to parallel converter 980 and a CPU control & general purpose input/output latch/driver (CPU CNTL & GPIO latch/driver) 990.

HIC 900 is coupled to an optional flash memory BIOS configuration unit 901. Flash memory unit 901 stores basic input output system (BIOS) and PCI configuration information and supplies the BIOS and PCI configuration information to A/D MUX 960 and RD/WR Control 970, which control the programming, read, and write of flash memory unit 901.

Bus controller 910 is coupled to the host PCI bus, which is also referred to herein as the primary PCI bus, and manages PCI bus transactions on the host PCI bus. Bus controller 910 includes a slave (target) unit 911 and a master unit 916. Both slave unit 911 and master unit 916 each include two first in first out (FIFO) buffers, which are preferably asynchronous with respect to each other since the input and output of the two FIFOs in the master unit 916 as well as the two FIFOs in the slave unit 911 are clocked by different clocks, namely the PCI clock and the PCK. Additionally, slave unit 911 includes encoder 922 and decoder 923, while master unit 916 includes encoder 927 and decoder 928. The FIFOs 912, 913, 917 and 918 manage data transfers between the host PCI bus and the XPBus, which in the embodiment shown in FIG. 9 operate at 33 MHz and 66 MHz, respectively. PCI address/data (AD) from the host PCI bus is entered into FIFOs 912 and 917 before they are encoded by encoders 922 and 927. Encoders 922 and 927 format the PCI address/data bits to a form more suitable for parallel to serial conversion prior to transmittal on the XPBus. Similarly, address and data information from the receivers is decoded by decoders 923 and 928 to a form more suitable for transmission on the host PCI bus. Thereafter the decoded data and address information is passed through FIFOs 913 and 918 prior to being transferred to the host PCI bus. FIFOs 912, 913, 917 and 918 allow bus controller 910 to handle posted and delayed PCI transactions and to provide deep buffering to store PCI transactions.

Bus controller 910 also comprises slave read/write control (RD/WR Cntl) 914 and master read/write control (RD/WR Cntl) 915. RD/WR controls 914 and 915 are involved in the transfer of PCI control signals between bus controller 910 and the host PCI bus.

Bus controller 910 is coupled to translator 920. Translator 920 comprises encoders 922 and 927, decoders 923 and 928, control decoder & separate data path unit 924 and control encoder & merge data path unit 925. As discussed above encoders 922 and 927 are part of slave data unit 911 and master data unit 916, respectively, receive PCI address and data information from FIFOs 912 and 917, respectively, and encode the PCI address and data information into a form more suitable for parallel to serial conversion prior to transmittal on the XPBus. Similarly, decoders 923 and 928 are part of slave data unit 911 and master data unit 916, respectively, and format address and data information from receiver 940 into a form more suitable for transmission on the host PCI bus. Control encoder & merge data path unit 925 receives PCI control signals from the slave RD/WR control 914 and master RD/WR control 915. Additionally, control encoder & merge data path unit 925 receives control signals from CPU CNTL & GPIO latch/driver 990, which is coupled to the CPU and north bridge (not shown in FIG. 9). Control encoder & merge data path unit 925 encodes PCI control signals as well as CPU control signals and north bridge signals into control bits, merges these encoded control bits and transmits the merged control bits to transmitter 930, which then transmits the control bits on the data lines PD0 to PD3 and control line PCN of the XPBus. Examples of control signals include PCI control signals and CPU control signals. A specific example of a control signal is FRAME# used in PCI buses. A control bit, on the other hand, is a data bit that represents a control signal. Control decoder & separate data path unit 924 receives control bits from receiver 940 which receives control bits on data lines PDR0 to PDR3 and control line PCNR of the XPBus. Control decoder & separate data path unit 924 separates the control bits it receives from receiver 940 into PCI control signals, CPU control signals and north bridge signals, and decodes the control bits into PCI control signals, CPU control signals, and north bridge signals, all of which meet the relevant timing constraints.

Transmitter 930 receives multiplexed parallel address/data (A/D) bits and control bits from translator 920 on the AD[31::0] out and the CNTL out lines, respectively. Transmitter 930 also receives a clock signal from PLL 950. PLL 950 takes a reference input clock and generates PCK that drives the XPBus. PCK is asynchronous with the PCI clock signal and operates at 66 MHz, twice the speed of the PCI clock of 33 MHz. The higher speed is intended to accommodate at least some possible increases in the operating speed of future PCI buses. As a result of the higher speed, the XPBus may be used to interface two PCI or PCI-like buses operating at 66 MHz rather than 33 MHz or having 64 rather than 32 multiplexed address/data lines.

The multiplexed parallel AID bits and some control bits input to transmitter 930 are serialized by parallel to serial converters 932 of transmitter 930 into 10 bit packets. These bit packets are then output on data lines PD0 to PD3 of the XPBus. Other control bits are serialized by parallel to serial converter 933 into 10 bit packets and send out on control line PCN of the XPBus.

FIG. 10 is a detailed block diagram of one embodiment of the PIC of the present invention. PIC 1000 is nearly identical to HIC 900 in its function, except that HIC 900 interfaces the host PCI bus to the XPBus while PIC 1000 interfaces the secondary PCI bus to the XPBus. Similarly, the components in PIC 1000 serve the same function as their corresponding components in HIC 900. Reference numbers for components in PIC 1000 have been selected such that a component in PIC 1000 and its corresponding component in HIC 900 have reference numbers that have the same two least significant digits. Thus for example, the bus controller in PIC 1000 is referenced as bus controller 1010 while the bus controller in HIC 900 is referenced as bus controller 910. As many of the elements in PIC 1000 serve the same functions as those served by their corresponding elements in HIC 900 and as the functions of the corresponding elements in HIC 900 have been described in detail above, the function of elements of PIC 1000 having corresponding elements in HIC 900 will not be further described herein. Reference may be made to the above description of FIG. 9 for an understanding of the functions of the elements of PIC 1000 having corresponding elements in HIC 900.

As suggested above, there are also differences between HIC 900 and PIC 1000. Some of the differences between HIC 900 and PIC 1000 include the following. First, receiver 1040 in PIC 1000, unlike receiver 940 in HIC 900, does not contain a synchronization unit. As mentioned above, the synchronization unit in HIC 900 synchronizes the PCKR clock to the PCK clock locally generated by PLL 950. PIC 1000 does not locally generate a PCK clock and, therefore, it does not have a locally generated PCK clock with which to synchronize the PCK clock signal that it receives from HIC 900. Another difference between PIC 1000 and HIC 900 is the fact that PIC 1000 contains a video parallel to serial converter 1089 whereas HIC 900 contains a video serial to parallel converter 980. Video parallel to serial converter 1089 receives 16 bit parallel video capture data and video control signals on the Video Port Data [0::15] and Video Port Control lines, respectively, from the video capture circuit (not shown in FIG. 10) and converts them to a serial video data stream that is transmitted on the VPD line to the HIC. The video capture circuit may be any type of video capture circuit that outputs a 16 bit parallel video capture data and video control signals. Another difference lies in the fact that PIC 1000, unlike HIC 900, contains a clock doubler 1082 to double the video clock rate of the video clock signal that it receives. The doubled video clock rate is fed into video parallel to serial converter 1082 through buffer 1083 and is sent to serial to parallel converter 980 through buffer 1084. Additionally, reset control unit 1035 in PIC 1000 receives a reset signal from the CPU CNTL & GPIO latch/driver unit 1090 and transmits the reset signal on the RESET# line to the HIC 900 whereas reset control unit 945 of HIC 900 receives the reset signal and forwards it to its CPU CNTL & GPIO latch/driver unit 990 because, in the above embodiment, the reset signal RESET# is unidircctionally sent from the PIC 1000 to the RIC 900.

Like HIC 900, PIC 1000 handles the PCI bus control signals and control bits from the XPBus representing PCI control signals in the following ways:

1. PIC 1000 buffers clocked control signals from the secondary PCI bus, encodes them and sends the encoded control bits to the XPBus;

2. PIC 1000 manages the signal locally; and

3. PIC 1000 receives control bits from XPBus, translates them into PCI control signals and sends the PCI control signals to the secondary PCI bus.

PIC 1000 also supports a reference arbiter on the secondary PCI Bus to manage the PCI signals REQ# and GNT#.

FIG. 11 is a schematic diagram of lines PCK, PD0 to PD3, and PCN. These lines are unidirectional LVDS lines for transmitting clock signals and bits from the HIC to the PIC. The bits on the PD0 to PD3 and the PCN lines are sent synchronously within every clock cycle of the PCK. Another set of lines, namely PCKR, PDR0 to PDR3, and PCNR, are used to transmit clock signals and bits from the PIC to HIC. The lines used for transmitting information from the PIC to the HIC have the same structure as those shown in FIG. 11, except that they transmit data in a direction opposite to that in which the lines shown in FIG. 11 transmit data. In other words they transmit information from the PIC to the HIC. The bits on the PDR0 to PDR3 and the PCNR lines are sent synchronously within every clock cycle of the PCKR. Some of the examples of control information that may be sent in the reverse direction, i.e. PCNR line, include a request to switch data bus direction because of a pending operation (such as read data available), a control signal change in the target requiring communication in the reverse direction, target busy, and transmission error detected.

The XPBus which includes lines PCK, PD0 to PD3, PCN, PCKR, PDR0 to PDR3, and PCNR, has two sets of unidirectional lines transmitting clock signals and bits in opposite directions. The first set of unidirectional lines includes PCK, PD0 to PD3, and PCN. The second set of unidirectional lines includes PCKR, PDR0 to PDR3, and PCNR. Each of these unidirectional set of lines is a point-to-point bus with a fixed transmitter and receiver, or in other words a fixed master and slave bus. For the first set of unidirectional lines, the HIC is a fixed transmitter/master whereas the PIC is a fixed receiver/slave. For the second set of unidirectional lines, the PIC is a fixed transmitter/master whereas the HIC is a fixed receiver/slave. The LVDS lines of XPBus, a cable friendly and remote system I/O bus, transmit fixed length data packets within a clock cycle.

The XPBus lines, PD0 to PD3, PCN, PDR0 to PDR3 and PCNR, and the video data and clock lines, VPD and VPCK, are not limited to being LVDS lines, as they may be other forms of bit based lines. For example, in another embodiment, the XPBus lines may be IEEE 1394 lines.

It is to be noted that although each of the lines PCK, PD0 to PD3, PCN, PCKR, PDR0 to PDR3, PCNR, VPCK, and VPD is referred to as a line, in the singular rather than plural, each such line may contain more than one physical line. For example, in the embodiment shown in FIG. 11, each of lines PCK, PD0 to PD3 and PCN includes two physical lines between each driver and its corresponding receiver. The term line, when not directly preceded by the terms physical or conductive, is herein used interchangeably with a signal or bit channel of one or more physical lines for transmitting a signal. In the case of non-differential signal lines, generally one physical line is used to transmit one signal. However, in the case of differential signal lines, a pair of physical lines is used to transmit one signal. For example, a pair of physical lines together transmit a signal in a bit line or bit channel in an LVDS or IEEE 1394 interface.

A bit based line (i.e., a bit line) is a line for transmitting serial bits. Bit based lines typically transmit bit packets and use a serial data packet protocol. Examples of bit lines include an LVDS line, an IEEE 1394 line, and a Universal Serial Bus (USB) line.

FIG. 12 is a block diagram of another embodiment of the HIC and PlC of the present invention and the interface therebetween. One important difference is the fact that the XPBus of FIG. 12 does not have control lines PCN and PCNR. Another difference lies in the fact that the XPBus of FIG. 12 has two dedicated reset lines RSTEH# and RSTEP# instead of one. RSTEH# and RSTEP# are unidirectional reset and error condition signal lines that transmit a reset and error condition signal from the host PCI to the peripheral PCI and from the peripheral PCI to host PCI, respectively.

In one embodiment, each of reset lines RSTEH#, RSTEP#, and RESET# (previously discussed) is preferably a non-differential signal line of one physical line. In other embodiments, one or more of the above lines may be a differential signal line having more than one physical line.

FIG. 13 shows a detailed block diagram of the HIC shown in FIG. 12. HIC 1300 shown in FIG. 13 is, other than for a few differences, identical to HIC 900 shown in FIG. 9. Accordingly, reference numbers for components in HIC 1300 have been selected such that a component in HIC 1300 and its corresponding component in HIC 900 have reference numbers that have the same two least significant digits. One of the differences between HIC 1300 and HIC 900 is the fact that, unlike HIC 900, HIC 1300 does not have a parallel to serial converter or a serial to parallel converter dedicated exclusively to CNTL out and CNTL in signals, respectively. This is due to the fact that XPBus for HIC 1300 does not contain a PCN or PCNR line. Another difference between H1C 1300 and HIC 900 is the fact that HIC 1300, unlike HIC 900, has two reset lines, RSTEP# and RSTEH#, instead of one reset line. Reset line RSTEP# is coupled to Reset & XPBus Parity Error Control Unit 1336 which receives, on the reset line RSTEP#, a reset signal and a parity error signal generated by the PIC, sends a reset signal to the CPU CNTL & GPIO latch/driver 1390, and controls retransmission of bits from the parallel to serial converters 1332. Reset & XPBus Parity Error Detection and Control Unit 1346 takes bits from serial to parallel converters 1342, performs a parity check to detect any transmission error, and sends reset and parity error signals to the PIC on the reset line RSTEH#. The reset and parity error signals may be distinguished by different signal patterns and/or different signal durations. In the two reset line system, the reset and error parity signals are transmitted on the same line, and it is possible to send a parity error confirmation signal on one line while receiving a reset signal on the other line. Because HIC 1300 provides for parity error detection, the parallel to serial converters 1332 include buffers. The buffers in parallel to serial converters 1332 store previously transmitted bits (e.g., those transmitted within the previous two clock cycles) for retransmission if transmission error is detected and a parity error signal is received on line RSTEP#. It is to be noted that parallel to serial converters 932 do not contain buffers such as those contained in parallel to serial converters 1332 for purposes of retransmission since HIC 900 does not provide for parity error signal detection. Yet another difference between HIC 900 and HIC 1300 is the fact that in HIC 1300 clock multipliers 1331 and 1341 multiply the PCK and PCKR clocks, respectively, by a factor of 6 rather than 10 because the XPBus coupled to HIC 1300 transmits six bit packets instead of ten bit packets during each XPBus clock cycle. Sending a smaller number of bits per XPBus clock cycle provides the benefit of improving synchronization between the data latching clock output by clock multipliers 1331 and 1341 and the XPBus clocks, PCK and PCKR. In another embodiment, one may send 5 or some other number of bits per XPBus clock cycle. As mentioned above, the remaining elements in HIC 1300 are identical to those in HIC 900 and reference to the description of the elements in HIC 900 may be made to understand the function of the corresponding elements in HIC 1300.

FIG. 14 is a schematic diagram of the lines PCK and PD0 to PD3. These lines are unidirectional LVDS lines for transmitting signals from HIC 1300 to the PIC of FIG. 12. Another set of lines, namely PCKR and PDR0 to PDR3, are used to transmit clock signals and bits from the PIC of FIG. 12 to HIC 1300. The lines used for transmitting information from the PIC to HIC 1300 have the same structure as those shown in FIG. 14, except that they transmit information in the opposite direction from that shown in FIG. 14. In other words they transmit information from the PIC to the HIC.

In the embodiment shown in FIG. 8, HIC 819 is coupled to an integrated unit 821 that includes a CPU, a cache and a north bridge. In yet another embodiment, such as that shown in FIG. 15, the HIC and PIC are integrated with the north and south bridges, respectively, such that integrated HIC and north bridge unit 1505 includes an HIC and a north bridge, while integrated PIC and south bridge unit 1510 includes a PIC and a south bridge.

The above embodiments are described generally in terms of hardware and software. It will be recognized, however, that the functionality of the hardware can be further combined or even separated. The functionality of the software can also be further combined or even separated. Hardware can be replaced, at times, with software. Software can be replaced, at times, with hardware. Accordingly, the present embodiments should not be construed as limiting the scope of the claims here. One of ordinary skill in the art would recognize other variations, modifications, and alternatives.

While the above is a full description of the specific embodiments, various modifications, alternative constructions and equivalents may be used. Therefore, the above description and illustrations should not be taken as limiting the scope of the present invention which is defined by the appended claims.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US399658522 Jan 19767 Dec 1976International Business Machines CorporationVideo generator circuit for a dynamic digital television display
US414106824 Mar 197720 Feb 1979Xerox CorporationAuxiliary ROM memory system
US42284967 Sep 197614 Oct 1980Tandem Computers IncorporatedMultiprocessor system
US44532151 Oct 19815 Jun 1984Stratus Computer, Inc.Central processing apparatus for fault-tolerant computing
US462396422 Dec 198218 Nov 1986International Business Machines CorporationHomogeneous hierarchial computer business system
US467083725 Jun 19842 Jun 1987American Telephone And Telegraph CompanyElectrical system having variable-frequency clock
US468067416 Jul 198414 Jul 1987Moore Fergus EModular computer system with integral electronic bus
US470036221 Aug 198413 Oct 1987Dolby Laboratories Licensing CorporationA-D encoder and D-A decoder system
US47602769 Nov 198726 Jul 1988Unisys CorporationPower supply system, for segmented loads, having phantom redundancy
US476976411 Aug 19866 Sep 1988Isaac LevanonModular computer system with portable travel unit
US479152418 Nov 198713 Dec 1988International Business Machines CorporationElectrostatic discharge protection for electronic packages
US47992587 Feb 198517 Jan 1989National Research Development CorporationApparatus and methods for granting access to computers
US487209115 Jul 19873 Oct 1989Ricoh Company, Ltd.Memory cartridge
US48902828 Mar 198826 Dec 1989Network Equipment Technologies, Inc.Mixed mode compression for data transmission
US491857227 Dec 198817 Apr 1990Motorola Computer X, Inc.Modular electronic package
US493973521 Jul 19883 Jul 1990International Business Machines CorporationInformation handling system having serial channel to control unit link
US505614118 Jun 19868 Oct 1991Dyke David WMethod and apparatus for the identification of personnel
US508649923 May 19894 Feb 1992Aeg Westinghouse Transportation Systems, Inc.Computer network for real time control with automatic fault identification and by-pass
US51034469 Nov 19907 Apr 1992Moses Computers, Inc.Local area network adaptive throughput control for instantaneously matching data transfer rates between personal computer nodes
US51876457 Jun 199116 Feb 1993Ergo Computing, Inc.Portable computer with docking connector for peripheral devices
US51915817 Dec 19902 Mar 1993Digital Equipment CorporationMethod and apparatus for providing high performance interconnection between interface circuits coupled to information buses
US525109711 Jun 19905 Oct 1993Supercomputer Systems Limited PartnershipPackaging architecture for a highly parallel multiprocessor system
US52785093 Feb 199211 Jan 1994At&T Bell LaboratoriesMethod for monitoring battery discharge by determining the second derivative of battery voltage over time
US527873026 Jul 199311 Jan 1994Cordata, Inc.Modular notebook computer having a planar array of module bays
US528224712 Nov 199225 Jan 1994Maxtor CorporationApparatus and method for providing data security in a computer system having removable memory
US529348727 Dec 19918 Mar 1994Digital Equipment CorporationNetwork adapter with high throughput data transfer circuit to optimize network data transfers, with host receive ring resource monitoring and reporting
US529349715 Apr 19938 Mar 1994Traveling Software, Inc.Cable for transmitting eight-bit parallel data
US53113976 Aug 199210 May 1994Logistics Management Inc.Computer with modules readily replaceable by unskilled personnel
US531744121 Oct 199131 May 1994Advanced Micro Devices, Inc.Transceiver for full duplex signalling on a fiber optic cable
US531747730 Jun 199231 May 1994International Business Machines CorporationHigh density interconnection assembly
US531977126 Apr 19937 Jun 1994Seiko Epson CorporationCPU clock generator having a low frequency output during I/O operations and a high frequency output during memory operations
US532551717 May 198928 Jun 1994International Business Machines CorporationFault tolerant data processing system
US533150918 Nov 199319 Jul 1994Cordata, Inc.Modular notebook computer having a planar array of module bays and a pivotally attached flat-panel display
US533940830 Dec 199216 Aug 1994Digital Equipment CorporationMethod and apparatus for reducing checking costs in fault tolerant processors
US53553916 Mar 199211 Oct 1994Rambus, Inc.High speed bus system
US542880622 Jan 199327 Jun 1995Pocrass; Alan L.Computer networking system including central chassis with processor and input/output modules, remote transceivers, and communication links between the transceivers and input/output modules
US543060731 Dec 19924 Jul 1995North Atlantic Industries, Inc.Rugged modular portable computer including modules hinged along an edge
US543293927 May 199211 Jul 1995International Business Machines Corp.Trusted personal computer system with management control over initial program loading
US543685722 Nov 199325 Jul 1995Ncr CorporationPersonal computer module system and method of using
US54369025 Apr 199425 Jul 1995First Pacific NetworksEthernet extender
US54637425 Mar 199331 Oct 1995Hitachi Computer Products (America), Inc.Personal processor module and docking station for use therewith
US551984315 Mar 199321 May 1996M-SystemsFlash memory system providing both BIOS and user storage capability
US553312518 Jul 19952 Jul 1996International Business Machines CorporationRemovable computer security device
US553754416 Aug 199316 Jul 1996Kabushiki Kaisha ToshibaPortable computer system having password control means for holding one or more passwords such that the passwords are unreadable by direct access from a main processor
US553961629 Nov 199323 Jul 1996Elonex Technologies, Inc.Modular portable computer
US554646312 Jul 199413 Aug 1996Information Resource Engineering, Inc.Pocket encrypting and authenticating communications device
US55507109 Sep 199427 Aug 1996Hitachi Computer Products (America), Inc.Computer system module
US555086128 Oct 199427 Aug 1996Novalink Technologies, Inc.Modular PCMCIA modem and pager
US555277624 Jun 19943 Sep 1996Z-MicrosystemsEnhanced security system for computing devices
US55724414 Apr 19945 Nov 1996Lucent Technologies Inc.Data connector for portable devices
US557720521 Apr 199519 Nov 1996Ht Research, Inc.Chassis for a multiple computer system
US55789404 Apr 199526 Nov 1996Rambus, Inc.Modular bus with single or double parallel termination
US55888508 Aug 199531 Dec 1996Tongrand LimitedGrounding means for memory card connector
US55903777 Jun 199531 Dec 1996Ast Research, Inc.Automatic control of distributed DMAs in a PCI bus system supporting dual ISA buses
US560080019 Jul 19944 Feb 1997Elonex I.P. Holdings, Ltd.Personal computer system having a docking bay and a hand-held portable computer adapted to dock in the docking bay by a full-service parallel bus
US56030448 Feb 199511 Feb 1997International Business Machines CorporationInterconnection network for a multi-nodal data processing system which exhibits incremental scalability
US56067175 Mar 199225 Feb 1997Rambus, Inc.Memory circuitry having bus interface for receiving information in packets and access time registers
US5608608 *17 Apr 19964 Mar 1997International Business Machines CorporationCartridge-based design for portable and fixed computers
US5623637 *17 May 199622 Apr 1997Telequip CorporationEncrypted data storage card including smartcard integrated circuit for storing an access password and encryption keys
US56300571 Jul 199613 May 1997Progressive Technology Inc.Secure architecture and apparatus using an independent computer cartridge
US56385215 Feb 199610 Jun 1997Leunig GmbhApparatus using a parallel interface for data transfer between a plurality of computers, as well as for transfer of data from computers to shared peripheral devices
US5640302 *11 Mar 199617 Jun 1997Elonex Ip HoldingsModular portable computer
US56487621 Feb 199515 Jul 1997Canon Kabushiki KaishaBuilt-in electronic apparatus and device-detaching method therefor
US565977314 Nov 199019 Aug 1997International Business Machines CorporationPersonal computer with input/output subsystem
US566366112 Jul 19962 Sep 1997Rambus, Inc.Modular bus with single or double parallel termination
US56731725 Jan 199630 Sep 1997Compaq Computer CorporationApparatus for electromagnetic interference and electrostatic discharge shielding of hot plug-connected hard disk drives
US567317423 Mar 199530 Sep 1997Nexar Technologies, Inc.Computer having means for external replacement of circuit boards
US568012623 Aug 199421 Oct 1997Elonex I.P. Holdings, Ltd.Modular portable computer
US568053629 Nov 199521 Oct 1997Tyuluman; Samuel A.Dual motherboard computer system
US56896547 Nov 199418 Nov 1997Elonex F.P. Holdings, Ltd.Digital assistant system including a host computer with a docking bay for the digital assistant wherein a heat sink is moved into contact with a docked digital assistant for cooling the digital assistant
US57088404 Mar 199613 Jan 1998Elonex I.P. Holdings, Ltd.Scanning and image capturing system
US572183715 Oct 199624 Feb 1998Elonex I.P. Holdings, Ltd.Micro-personal digital assistant including a temperature managed CPU
US572184225 Aug 199524 Feb 1998Apex Pc Solutions, Inc.Interconnection system for viewing and controlling remotely connected computers with on-screen video overlay for controlling of the interconnection switch
US572459126 Jan 19963 Mar 1998Hitachi, Ltd.Multiprocessor system with reduced power mode and improved variation of power demand
US573719429 Jul 19967 Apr 1998Cray Research, Inc.Input/output module assembly
US573752422 May 19957 Apr 1998International Business Machines CorporationAdd-in board with programmable configuration registers for use in PCI bus computers
US57457339 Aug 199528 Apr 1998Ncr CorporationComputer system including a portable portion and a stationary portion providing both uni-processing and multiprocessing capabilities
US5751711 *26 Mar 199612 May 1998Kabushiki Kaisha ToshibaDigital information processing device
US575208022 Dec 199412 May 1998Intel CorporationCable terminal unit using bit set for selectively enabling a plurality of hardware functions with some functions having a plurality of selectively enabled hardware functions
US576492424 Aug 19959 Jun 1998Ncr CorporationMethod and apparatus for extending a local PCI bus to a remote I/O backplane
US57747035 Jan 199630 Jun 1998Motorola, Inc.Data processing system having a register controllable speed
US577470429 Jul 199630 Jun 1998Silicon Graphics, Inc.In a computer system
US57952283 Jul 199618 Aug 1998Ridefilm CorporationInteractive computer-based entertainment system
US58023914 Oct 19951 Sep 1998Ht Research, Inc.Direct-access team/workgroup server shared by team/workgrouped computers without using a network operating system
US580590321 May 19968 Sep 1998Compaq Computer CorporationProtection of computer system against incorrect card insertion during start-up
US580926230 Aug 199615 Sep 1998Dell U.S.A., L.P.Commonly housed multiple processor type computing system and method of manufacturing the same
US58095387 Feb 199615 Sep 1998General Instrument CorporationDRAM arbiter for video decoder
US581568121 May 199629 Sep 1998Elonex Plc Ltd.Integrated network switching hub and bus structure
US581905029 Feb 19966 Oct 1998The Foxboro CompanyAutomatically configurable multi-purpose distributed control processor card for an industrial control system
US582604831 Jan 199720 Oct 1998Vlsi Technology, Inc.PCI bus with reduced number of signals
US583893230 Jun 199717 Nov 1998Compaq Computer CorporationTransparent PCI to PCI bridge with dynamic memory and I/O map programming
US584824911 Jul 19978 Dec 1998Intel CorporationMethod and apparatus for enabling intelligent I/O subsystems using PCI I/O devices
US585966926 Nov 199612 Jan 1999Texas Instruments IncorporatedSystem for encoding an image control signal onto a pixel clock signal
US58623503 Jan 199719 Jan 1999Intel CorporationMethod and mechanism for maintaining integrity within SCSI bus with hot insertion
US586238126 Nov 199619 Jan 1999International Business Machines CorporationVisualization tool for graphically displaying trace data
US587821120 Dec 19962 Mar 1999N C R CorporationMulti-functional retail terminal and associated method
US588404931 Dec 199616 Mar 1999Compaq Computer CorporationIncreased processor performance comparable to a desktop computer from a docked portable computer
US588405311 Jun 199716 Mar 1999International Business Machines CorporationConnector for higher performance PCI with differential signaling
US590756629 May 199725 May 19993Com CorporationContinuous byte-stream encoder/decoder using frequency increase and cyclic redundancy check
US59301105 Jun 199727 Jul 1999Kabushiki Kaisha ToshibaComputer system having detachable expansion unit
US59336098 Apr 19963 Aug 1999Vlsi Technology, Inc.Method and system for hot docking a portable computer to a docking station via the primary PCI bus
US594196512 Jul 199624 Aug 1999Electronics Accessory Specialists International, Inc.Computer system
US594804729 Aug 19967 Sep 1999Xybernaut CorporationDetachable computer structure
US6006243 *30 May 199721 Dec 1999International Business Machines CorporationFoldable personal computer with detachable cover section
US6012145 *14 Nov 19944 Jan 2000Calluna Technology LimitedSecurity system for hard disk drive
US6070214 *6 Aug 199830 May 2000Mobility Electronics, Inc.Serially linked bus bridge for expanding access over a first bus to a second bus
Non-Patent Citations
Reference
1"Features Chart", (Feb. 1, 1997) http://www.lantimes.com/testing/97feb/702b072a.html , downloaded from web on Jun. 23, 2004, 3 pgs.
2"SQL Server and NT Cluster Manager Availability Demo," Microsoft Server Programmer Developers Conference, Nov. 1996, 15 pages total.
3"Think Modular", PC Magazine, Jun. 10, 1997, wysiwyg://60/http://homezdnet.com/pcmag/issues/1611/pcmg0072.htm.
4" Think Modular", PC Magazine, Jun. 10, 1997, wysiwyg://60/http://homezdnet.com/pcmag/issues/1611/pcmg0072.htm.
5"Acqis LLC's Disclosure of Proposed Terms and Claim Elements for Construction Pursuant to Patent Rule 4-1," Case No. 6:09-cv-00148-LED, filed Mar. 5, 2010, 3 pages.
6"Acqis, LLC's P.R.-4-2 Disclosure of Preliminary Claim Constructions and Extrinsic Evidence," Case No. 6:09-cv-00148-LED, filed Apr. 14, 2010, 10 pages.
7"Affidavit of Timothy P. Cremen in Support of NEC Corporation of America's Opposition to Plaintiff's Motion to Dismiss and Strike," Case No. 6:09-cv-00148-LED, filed Oct. 9, 2009, 4 pages.
8"Amended Joint Claim Construction Statement," Case No. 6:09-cv-00148-LED, filed May 5, 2010, 44 pages.
9"Answer to Plaintiffs Second Amended Complaint and Counterclaims of Defendant Fujitsu Computer Systems Corp., n/k/a/ Fujitsu America, Inc. to Acqis LLC's Second Amended Complaint for Patent Infringement," Case No. 6:09-cv-00148-LED, filed Aug. 10, 2009, 34 pages.
10"Answer, Affirmative Defenses, and Counterclaims of Defendant Hewlett-Packard Company to Acqis LLC's Second Amended Complaint for Patent Infringement," Case No. 6:09-cv-148-LED, filed Aug. 10, 2009, 40 pages.
11"Appendix 6A—Disclosure of Asserted Claims and Infringement Contentions", submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, 14 pages.
12"Astro Sciences Corp. Announces Results for Second Quarter," Astro Sciences Corporation, Press Release, Nov. 17, 1995, 2 pages.
13"Astro Sciences Corp. Signs Agreement With Storage Computer Corp.," Astro Sciences Corporation, Press Release, Nov. 7, 1995, 2 pages.
14"Astro Sciences Corporation Announces Results for the First Quarter of the Fiscal Year," Astro Sciences Corporation, Press Release, Aug. 3, 1995, 1 page.
15"Astro Sciences Corporation Announces Results for the Fourth Quarter and the Fiscal Yeart," Astro Sciences Corporation, News Release, Jun. 26, 1995, 1 page.
16"Astro Sciences Corporation Announces Results for the Third Quarter," Astro Sciences Corporation, Press Release, Feb. 8, 1996, 23 pages.
17"Astro Sciences Corporation Announces Signing of $4 Million Credit Facility With Deutsche Financial Services," Astro Sciences Corporation, News Release, May 19, 1995, 1 page.
18"Astro Sciences Corporation Appoints Interim President/CEO Board Expanded by Two Seats," Astro Sciences Corporation, Press Release, Aug. 17, 1995, 1 page.
19"Astro Sciences Corporation Introduces New Generation of Products at PC Expo Show," Astro Sciences Corporation, Press Release, Jun. 23, 1995, 1 page.
20"Astro Sciences Corporation Receives Patent for Network Security and Management," Astro Sciences Corporation, News Release, Jun. 6, 1995, 2 pages.
21"Astro Sciences Corporation Retains Technology Strategies and Alliance Partners," Astro Sciences Corporation, News Release, Jun. 29, 19951 page.
22"Astro Sciences Corporation Shareholders Elect Two New Directors, and Vote to Change Corporate Name to ChatCom, Inc.," Astro Sciences Corporation, Press Release, Feb. 12, 1996, 2 pages.
23"Astro Sciences Corporation to Strengthen Management Team Board," Astro Sciences Corporation, News Release, Apr. 21, 1995, 1 page.
24"Astro Sciences Receives Microsoft Certification and Announces New Director," Astro Sciences Corporation, Press Release, Nov. 21, 1995, 2 pages.
25"Astro Sciences Shareholders Elect Two New Directors, and Vote to Change Corporate Name to Chatcom, Inc.," Astro Sciences Corporation, Press Release, Feb. 12, 1996, 2 pages.
26"Best of Show 97," LAN Times, undated, 1 page.
27"ChatCom Adds New Senior Management Team Members," ChatCom, Inc., Press Release, Jul. 2, 1996, 1 page.
28"ChatCom Announces Complete Line of Scaleable Application and Communication Servers," ChatCom,. Inc., Press Release, Aug. 30, 1996, 4 pages.
29"ChatCom Announces Comprehensive VAR Program, Commitment to VARs is Key to Corporate Strategy," ChatCom, Inc., Press Release, Jan. 13, 1997, 1 page.
30"ChatCom Announces Major Push into International Markets, Significant International Sales Opportunities for ChatCom's Consolidated Server Technology," ChatCom, Inc., Press Release, Mar. 18, 1997, 2 pages.
31"ChatCom Announces Mass Storage Subsystem, ChatRAID to Address Application Server Market," ChatCom, Inc., Press Release, Aug. 12, 1996, 1 page.
32"ChatCom Announces Mass Storage Subsystem, ChatRAID to Address Application Server Market," ChatCom, Inc., Press Release, Aug. 14, 1996, 2 pages.
33"ChatCom Books Additional Orders with Major Facilities-Based Carrier Companies, ChatCom Products Provide Internet Platforms for Carrier's Customers Worldwide," ChatCom, Inc., Press Release, Mar. 12, 1997, 2 pages.
34"ChatCom Defines Specification for Future Consolidated Server Products, RAINS™ Concept to Accelerate the Adoption of Consolidated Servers," ChatCom, Inc., Press Release, Mar. 31, 1997, 2 pages.
35"ChatCom Names James B. Mariner President/CEO," ChatCom, Inc., Press Relase, Mar. 7, 1996, 2 pages.
36"ChatCom Receives Product Award From LAN Times Magazine, Consolidated Server Product Comparison Puts ChatCom on Top," ChatCom, Inc., Press Release, Feb. 17, 1997, 2 pages.
37"ChatCom Receives Product Award From LAN Times Magazine, Consolidated Server Product Comparison Puts ChatCom on Top," ChatCom, Inc., Press Release, Feb. 20, 1997, 2 pages.
38"ChatCom Selected as Partner in Anixter Race '96 Program and Completes First Part of Financing," ChatCom, Inc., Press Release, Mar. 26, 1996, 2 pages.
39"ChatCom Strengthens Sales Management Team, Three New Sales Directors to Address Growing Demand for ChatCom's ChatterBox™," ChatCom, Inc., Press Release, Mar. 18, 1997, 2 pages.
40"ChatCom, Inc. Announces Highly Adaptable Intranet and Web Servers, Servers reduce costs associated with radical change," Press Release, Sep. 3, 1996, 1 page.
41"ChatCom, Inc. Announces PentiumPro/200 MHz Server Module, Server Module Offers Scalability and High Availability for File Server Environments," ChatCom, Inc., Press Release, Mar. 24, 1997, 3 pages.
42"ChatCom, Inc. Announces Results for the Dec. 31, 1996 Quarter," ChatCom, Inc., Press Release, Feb. 12, 1997, 2 pages.
43"ChatCom, Inc. Announces Results for the Jun. 30 Quarter," ChatCom, Inc., News Release, Aug. 16, 1996, 2 pages.
44"ChatCom, Inc. Reports Completion of $2.5 Million Private Placement," ChatCom, Inc., Press Release, Jan. 9, 1997, 2 pages.
45"ChatCom, Inc., (Formerly Astro Sciences Corporation) Trades Under New Symbol—NASDAQ/NMS: CHAT," ChatCom, Inc., News Release, Feb. 22, 1996, 1 page.
46"ChatCom, Inc., Announces Commitment to ISO 9001 Quality Certification, ISO 9001 Quality Control Programs are High Priority Company Imperative," ChatCom, Inc., Press Release, Aug. 1, 1996, 1 page.
47"ChatterBox Communications and Server Solutions Products," ChatCom, Inc., Apr. 24, 1996, 7 pages.
48"ChatterBox Communications and Server Solutions," ChatCom, Inc., Mar. 7, 1996, 12 pages.
49"ChatterBox/SAS™—Scaleable Access Server™," J&L Information Systems, Networks Expo—Boston '96, Dec. 22, 1995, 1 page.
50"Claim Chart for International Business Machines Corp.," Case No. 6:09-cv-00148-LED, filed Jun. 15, 2010, 12 pages.
51"ClusterDirector™ Product Description, Fault Tolerance for Industry Standard Processors, Operating Systems, and Applications," Network Engines, Inc., 1998, 4 pages.
52"Clustered Servers for Network Based Applications," Network Engines, Inc., undated, 27 pages.
53"Comparison [by NEC] of Rejected Elements in Office Action and Elements of Exemplary Claims of Acqis's Patents," Case No. 6:09-cv-00148-LED, filed Oct. 9, 2009, 7 pages.
54"Complaint for Patent Infringement," Acqis v. Appro Int'l, Inc. et al., Case No. 6:09-cv-00148, filed Apr. 2, 2009, 13 pages.
55"Corrected p. 13 of Plaintiff's Opening Brief Concerning Claim Construction (D.I. 261)," Case No. 6:09-cv-00148-LED, filed Jun. 2, 2010, 2 pages.
56"Declaration of Carolyn V. Juarez in Support of Plaintiff Acqis LLC's Opening Brief Regarding Claim Construction," Case No. 6:09-cv-00148-LED, filed Jun. 1, 2010, 3 pages.
57"Declaration of Jennifer Chen in Support of Defendants' Motion for Leave to Amend Defendants' Invalidity Contentions," Case No. 6:09-cv-00148-LED, Aug. 5, 2010, 3 pages.
58"Declaration of Monty McGraw in Support of Defendants' Motion for Leave to Amend Defendants' Invalidity Contentions," Case No. 6:09-cv-00148-LED, Aug. 5, 2010, 3 pages.
59"Defendant Appro's Answer, Affirmative Defenses, and Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement," Case No. 6:09-cv-148; filed Aug. 5, 2009, 43 pages.
60"Defendant Clearcube Technology, Inc.'s Answer, Counterclaims to Acqis LLC's First Amended Complaint for Patent Infringement, and Jury Demand," Case No. 6:08-cv-00148, filed Jul. 2, 2009, 28 pages.
61"Defendant Clearcube Technology, Inc.'s Answer, Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement, and Jury Demand," Case No. 6:08-cv-00148, filed Aug. 10, 2009, 39 pages.
62"Defendant Clearcube Technology, Inc.'s First Amended Answer, Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement and Jury Demand," Case No. 6:09-cv-00148, filed Aug. 11, 2009, 39 pages.
63"Defendant Clearcube Technology, Inc.'s Fourth Amended Answer to Acqis LLC's Second Amended Complaint for Patent Infringement and Jury Demand," Case No. 6:09-cv-00148, filed Jan. 8, 2010, 26 pages.
64"Defendant Clearcube Technology, Inc.'s Second Amended Answer Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement and Jury Demand," Case No. 6:09-CV-00148, filed Aug. 31, 2009, 45 pages.
65"Defendant Clearcube Technology, Inc.'s Third Amended Answer to Acqis LLC's Second Amended Complaint for Patent Infringement and Jury Demand," Case No. 6:09-cv-00148, filed Nov. 11, 2009, 26 pages.
66"Defendant Hitachi Ameirca, Ltd.'s, Answer to Acqis LLC's First Amended Complaint for Patent Infringement, and Affirmative Defenses and Counterclaims," Case No. 6:09-6v-00148-LED, filed Jul. 8, 2009, 22 pages.
67"Defendant International Business Machines Corp.'s Answer to Acqis LLC's First Amended Complaint, Affirmative Defenses, and Counterclaims," Case No. 6:09-cv-148-LED, filed Jul. 8, 2009, 22 pages.
68"Defendant International Business Machines Corp.'s Answer to Acqis LLC's Second Amended Complaint, Affirmative Defenses, and Counterclaims," Case No. 6:09-cv-148-LED, filed Aug. 10, 2009, 28 pages.
69"Defendant NEC Corporation of America's Opposition to Plaintiff's Motion to Dismiss and Motion to Strike," Case No. 6:09-cv-00148-LED, filed Oct. 9, 2010, 36 pages.
70"Defendant Nex Computers Technology, Inc.'s Answer to Acqis LLC's First Amended Complaint for Patent Infringement, and Jury Demand," Case No. 6:09-cv-00148-LED, filed Jul. 8, 2009, 16 pages.
71"Defendant Nex Computers Technology, Inc.'s Answer to Acqis LLC's Second Amended Complaint for Patent Infringement, and Jury Demand," Case No. 6:09-cv-00148-LED, filed Aug. 10, 2009, 28 pages.
72"Defendant Sun Microsystems, Inc.'s Answer and Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement," Case No. 6:09-cv-148, filed Aug. 10, 2009, 95 pages.
73"Defendant Sun Microsystems, Inc.'s Responses and Objections to Plaintiff Acqis LLC's Second Set of Common Interrogatories," Case No. 6:09-cv-00148-LED, filed May 12, 2010, 9 pages.
74"Defendant Super Micro Computer, Inc.'s Answer and Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement," Case No. 6:09-cv-148, filed Aug. 10, 2009, 96 pages.
75"Defendants' Amended Invalidity Contentions," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 18 pages.
76"Defendant's Amended List of Proposed Terms and Claim Elements for Construction," Case No. 6:09-cv-00148-LED, filed Mar. 31, 2010, 11 pages.
77"Defendant's Brief in Response to Plaintiff's Opening Brief Regarding Claim Construction," Case No. 6:09-cv-00148-LED, filed Jun. 15, 2010, 40 pages.
78"Defendant's Corrected List of Proposed Terms and Claim Elements for Construction," Case No. 6:09-cv-00148-LED, filed Apr. 2, 2010, 9 pages.
79"Defendant's List of Proposed Terms and Claim Elements for Construction," Case No. 6:09-cv-00148-LED, filed Mar. 5, 2010, 15 pages.
80"Defendants' Notice of Errata Relating to Defendants' P.R. 3-3 Invalidity Contentions," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 14 pages.
81"Defendant's P.R.-4-2 Disclosure of Preliminary Claim Constructions and Extrinsic Evidence," Case No. 6:09-cv-00148-LED, filed Apr. 14, 2010, 16 pages.
82"Dell's Answer and Counterclaims to Acqis LLC's Second Amended Complaint," Case No. 6:09-cv-00148-LED, filed Aug. 10, 2009, 36 pages.
83"Dell's First Amended Answer and Counterclaims to Plaintiff's Second Amended Complaint," Case No. 6:09-cv-00148-LED, filed Apr. 22, 2010, 38 pages.
84"Disclosure of Asserted Claims and Infringement Contentions", submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 5 pages.
85"Disclosure of Plaintiffs Reduced List of Asserted Claims ," submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-00148-LED, served on Jul. 30, 2010, 6 pages.
86"Engineering Design Proposal for RocketLogix, Inc.," Anigma, Inc., Apr. 19, 2000, 35 pages.
87"Enterprise Application Servers," Powerstation Technologies, Inc., undated, 4 pages.
88"Eversys Corporation System 8000 Consolidated Server Peripheral Sharing Switch," Eversys Corporation, undated, 1 page.
89"Exhibit 5—Disclosure of Asserted Claims and Infringement Contentions", submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, 14 pages.
90"Exhibit A (Asserted Claims)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 2 pages.
91"Exhibit B—Table 1," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 75 pages.
92"Exhibit C," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 2 pages.
93"Exhibit D," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 106 pages.
94"Exhibit E," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 2 pages.
95"Expanding the Reach of the Internet with a New Breed of Web Server Appliances," RocketLogix, Inc., May 2000, 10 pages.
96"Family of VME Technology Specifications," [online], date unknown, [retrieved on Dec. 29, 2010], Retrieved from the Internet: <URL: http://www.vita.com/specifications.html>, 1 page.
97"Final Judgement," Issued by the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2011, 1 page.
98"Firmware Interface Specification,Orbiter 1680, Orbiter 3360," Anigma, Inc., Aug. 17, 2000, 16 pages.
99"First Amended Complaint for Patent Infringement," Acqis v. Appro Int'l, Inc. et al., Case No. 6:09-cv-00148, filed May 18, 2009, 14 pages.
100"GMAC/EDS Case Study," Network Engines, Inc., undated, 1 page.
101"HMU—586 Card Guide (Mustang) Pentium PCI," Issue 0.0.14 Preliminary, HM Systems, Inc., Nov. 18, 1996, 57 pages.
102"IEEE STD 1355-1995 Standard for Heterogeneous InterConnect (HIC)," Open Microprocessor systems Initiative (OMI), [online], Oct. 30, 1998, [retrieved on Aug. 6, 2010], Retrieved from the Internet: <URL: http://grouper.ieee.org/groups/1355/index.html>, 6 pages.
103"iMod Pad," Wired Magazine, Mar. 2001, 1 page.
104"Introducing the new ChatterBox™ Corporate and Office Series . . . the Power Behind Your Network," ChatCom, Inc., May 31, 1996, 15 pages.
105"Invalidity Chart for Base Reference ChatCom," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 52 pages.
106"Invalidity Chart for Base Reference Compaq ProLiant Cluster," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 81 pages.
107"Invalidity Chart for Base Reference Cubix BC/Density," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 64 pages.
108"Invalidity Chart for Base Reference Ergo Moby Brick", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 5 pages.
109"Invalidity Chart for Base Reference Eversys 8000 System," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 60 pages.
110"Invalidity Chart for Base Reference Eversys CAPserver," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 59 pages.
111"Invalidity Chart for Base Reference Gallagher 068 and Gallagher 503," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 108 pages.
112"Invalidity Chart for Base Reference Hong 737;" submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 77 pages.
113"Invalidity Chart for Base Reference IBM 8260," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 53 pages.
114"Invalidity Chart for Base Reference IBM 8265," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 56 pages.
115"Invalidity Chart for Base Reference Japanese Patent Application Publication H6-289953 (Hitachi)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 5 pages.
116"Invalidity Chart for Base Reference Japanese Patent Application Publication H7-84675 (Hitachi)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 5 pages.
117"Invalidity Chart for Base Reference JP6-289956," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 62 pages.
118"Invalidity Chart for Base Reference Network Engines P6000 Server," Jun. 4, 2010, 64 pages.
119"Invalidity Chart for Base Reference Network Engines P6000 Server," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 59 pages.
120"Invalidity Chart for Base Reference Origin2000," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 56 pages.
121"Invalidity Chart for Base Reference QuantumNet," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 49 pages.
122"Invalidity Chart for Base Reference Tyuluman 536," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 76 pages.
123"Invalidity Chart for Base Reference U.S. 5,339,408," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 61 pages.
124"Invalidity Chart for Base Reference U.S. 5,436,857 (Nelson)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 6 pages.
125"Invalidity Chart for Base Reference U.S. 5,608,608 (Flint)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 6 pages.
126"Invalidity Chart for Base Reference U.S. 5,809,262," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 62 pages.
127"Invalidity Chart for Base Reference U.S. 5,978,821 (Freeny)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 6 pages.
128"Invalidity Chart for Base Reference U.S. 5,999,952 (Jenkins)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 6 pages.
129"Invalidity Chart for Base Reference U.S. Patent No. 4,453,215 (Reid)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 56 pages.
130"Invalidity Chart for Base Reference U.S. Patent No. 5,187,645 (Spalding)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 6 pages.
131"Invalidity Chart for Base Reference U.S. Patent No. 5,325,517 to Baker et al. (Appendix 1, Exhibit 15)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 59 pages.
132"Invalidity Chart for Base Reference U.S. Patent No. 5,463,742 (Kobayashi)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 5 pages.
133"Invalidity Chart for Base Reference U.S. Patent No. 5,577,205," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 60 pages.
134"Invalidity Chart for Base Reference U.S. Patent No. 5,802,391," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 61 pages.
135"Invalidity Chart for Base Reference U.S. Patent No. 6,564,274 (Heath)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 57 pages.
136"Invalidity Chart for Base Reference U.S. Patent No. 6,715,100," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 64 pages.
137"Invalidity Chart for Base Reference U.S. Patent No. 7,339,786 (Bottom et al.)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 57 pages.
138"Invalidity Chart for Base Reference WhiteCross 9800 System," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 62 pages.
139"Invalidity Chart for Base Reference WO 92/18924 (Wallsten)", submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 6 pages.
140"Invalidity Chart for Base Reference Ziatech Corp. Ketris 9000 System," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 68 pages.
141"Invalidity Chart for Base Reference Ziatech STD 32 Star System," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 62 pages.
142"Invalidity Chart for Base References RLX Patents, U.S. Patent Nos. 6,747,878, 6,411,506, 6,325,636, 6,757,748, and 6,985,967 (Hipp et al.)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 58 pages.
143"Invalidity Chart for Japanese Patent Application H7-64672 (Toshiba '672)," submitted by the Defendants in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Mar. 1, 2010, 55 pages.
144"J&L Announces ChatAccess/PC™, a PCMCIA Based Remote LAN Node Server," J&L Information Systems, Press Release, Jun. 19, 1995, 2 pages.
145"J&L Announces ChatExpress-P120 Rackmounted Applications Server at PC Expo, New York," J&L Information Systems, Press Release, Jun. 19, 1994, 2 pages.
146"J&L Announces the NRS-T10RS™ a Fault Tolerant Applications Server Platform at FOSE," J&L Information Systems, Press Release, Mar. 20, 1994, 2 pages.
147"J&L Announces their ChatAccess™ Family of Remote LAN Node Servers at Networld+Intertop Las Vegas," J&L Information Systems, Press Release, Mar. 27, 1994, 2 pages.
148"J&L Announces their ChatExpress-P100 Rackmounted Applications Server at Networks Expo. Boston," J&L Information Systems, Press Release, Feb. 13, 1994, 3 pages.
149"J&L Announces their ChatExpress-P75Applications Server at Networks Expo," J&L Information Systems, Press Release, Feb. 13, 1994, 3 pages.
150"J&L Announces Two Patents," J&L Information Systems, Press Release, Feb. 9, 1995, 1 page.
151"J&L Doubles the Rack-Mounted Communications Server Density with ChatVantage/486™," J&L Information Systems, Press Release, Sep. 11, 1995, 2 pages.
152"J&L Information Systems Announces ChatPower-Plus™ a Revolutionary Redundant Power Supply System," J&L Information Systems, Press Release, Jun. 19, 1995, 2 pages.
153"J&L Information Systems Announces two DX4 for their ChatterBox Family of Remote Access Servers," J&L Information Systems, Press Release, Feb. 13, 1994, 2 pages.
154"Joint Claim Construction Statement," Case No. 6:09-cv-00148-LED, filed Apr. 30, 2010, 46 pages.
155"Jury Verdict Form," Returned by the Jury in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Feb. 23, 2011, 2 pages.
156"Kognitio—Infrastructure Partners," Retrieved from the Internet on Sep. 8, 2010, Retrieved at URL: www.kognito.com/partners/infrastructure.php, 2 pages.
157"List of Representative Customers," Network Engines, Inc., undated, 1 page.
158"Logical Management Process," RocketLogix, Rev. 5, Apr. 5, 2000, 1 page.
159"Memorandum Opinion and Order Construing Claim Terms and Denying Defendants' Motion for Partial Summary Judgment," Issued by the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED on Aug. 2, 2010, 18 pages.
160"Memorandum Opinion and Order Construing Claim Terms," Issued by the U.S. District Court for the Eastern District of Texas, Tyler Division, Case No. 6:09-cv-148-LED, Document 602, Feb. 3, 2011, 12 pgs.
161"Microsoft Press Computer Dictionary, Third Edition," Microsoft Press, 1997, pp. 199 and 332, Kim Fryer ed.
162"Motion to Dismiss Counterclaim Pursuant to Rule 12(b)(6) and Motion to Strike Affirmative Defense Pursuant to Rule 12(f)," Case 6:09-00148-LED, filed Sep. 16, 2009, 18 pages.
163"Narus and Whitecross Join Forces to Deliver Comprehensive Usage Pattern Analysis Applications for IP Service Providers," Press Release, Palo Alto, CA, Mar. 27, 2000, 4 pages.
164"National Semiconductor Design Guide," LVDS Owner's Manual, Spring 1997, 65 pages.
165"NEC Corporation of America's Answer, Affirmative Defenses, and Counterclaims to Acqis LLC's Second Amended Complaint for Patent Infringement," Case No. 6:09-cv-00148-LED, filed Aug. 10, 2009, 38 pages.
166"Network Engines Announces New Clustered Application Servers for Web, Thin-Client and Windows NT Enterprise Environments," Network Engines, Inc., Press Release, Oct. 8, 1997, 3 pages.
167"Network Engines Announces Partnership With Telegration Associates, Inc.," Network Engines, Inc., Press Release, Dec. 10, 1997, 2 pages.
168"Network Engines Awarded Best of Show at Networld + Interop 97, New company debuts product and wins," Network Engines, Inc., Press Release, Oct. 14, 1997, 2 pages.
169"Network Engines Debuts ClusterDirector in Internet/Intranet Load Balanced Environment," Network Engines, Inc., Press Release, Jan. 27, 1998, 3 pages.
170"P6000 Fault-Tolerant Multiprocessor Application Server," Powerstation Technologies, Inc., 1996, 3 pages.
171"P6000 IP Application Server," Network Engines, undated, 1 page.
172"Plaintiff Acqis LLC's Answer to Defendant Appro International, Inc.'s Counterclaims," Case No. 6:09-00148-LED, filed Aug. 28, 2009, 16 pages.
173"Plaintiff Acqis LLC's Answer to Defendant Dell Inc.'s Counterclaims," Case No. 6:09-00148-LED, filed Sep. 2, 2009, 16 pages.
174"Plaintiff Acqis LLC's Answer to Defendant Dell Inc.'s First Amended Counterclaims," Case No. 6:09-00148-LED, filed May 10, 2010, 16 pages.
175"Plaintiff Acqis LLC's Answer to Defendant Fujitsu Computer Systems Corp., N/K/A Fujitsu America, Inc.'s Counterclaims," Case No. 6:09-00148-LED, filed Sep. 16, 2009, 7 pages.
176"Plaintiff Acqis LLC's Answer to Defendant Hewlett-Packard Company's Counterclaims," Case No. 6:09-00148-LED, filed Sep. 16, 2009, 14 pages.
177"Plaintiff Acqis LLC's Answer to Defendant International Business Machines Corp.'s Counterclaims," Case No. 6:09-00148-LED, filed Sep. 2, 2009, 11 pages.
178"Plaintiff Acqis LLC's Answer to Defendant NEC Corporation of America's Counterclaims," Case No. 6:09-00148-LED, filed Sep. 16, 2009, 8 pages.
179"Plaintiff Acqis LLC's Answer to Defendant Sun Microsystems, Inc.'s Counterclaims," Case No. 6:09-cv-00148-LED, filed Sep. 2, 2009, 14 pages.
180"Plaintiff Acqis LLC's Answer to Defendant Super Micro Computer, Inc.'s Counterclaims," Case No. 6:09-00148-LED, filed Sep. 2, 2009, 15 pages.
181"Plaintiff Acqis LLP's First Supplemental Objections and Responses to Defendants' Third Set of Interrogatories," Case No. 6:09-cv-00148-LED, filed Aug. 5, 2010, 14 pages.
182"Plaintiff Acqis LLP's Objections and Responses to Defendants' First Set of Interrogatories," Case No. 6:09-cv-00148-LED, filed Aug. 5, 2010, 21 pages.
183"Plaintiff Acqis LLP's Objections and Responses to Defendants' Third Set of Interrogatories," Case No. 6:09-cv-00148-LED, filed Aug. 5, 2010, 13 pages.
184"Plaintiff's Opening Brief Regarding Claim Construction," Case No. 6:09-cv-00148-LED, filed Jun. 1, 2010, 35 pages.
185"Plaintiff's Reply Brief Regarding Claim Construction," Case No. 6:09-cv-00148-LED, filed Jun. 28, 2010, 14 pages.
186"Plexnet™ Product Overview," Plexcom, Inc., 1992, 8 pages.
187"Proposed Claim Construction Statement," Case No. Case No. 6:09-cv-00148-LED, filed Jun. 15, 2010, 39 pages.
188"PTI Fault Tolerant System Working Document Specification," Rev 0, Feb. 26, 1996, 2 pages.
189"QuantumNet 6000 Sharing Modules," QuantumNet, Inc., 1996, Retrieved from the Internet on Oct. 22, 2008, Retrieved at URL: www.web.archive.org/web/19971011194326/www.quantumnet.com/ds60xx.htm, 3 pages.
190"Redefining Server Economics—Take Control," RLX Technologies, 2001, 2 pages.
191"RLX Control Tower™ Take Control," RLX Technologies, undated, 4 pages.
192"RLX System 324 Technical Guide: RLX Red Hat Installation," RLX Technologies, Inc., 2001, 22 pages.
193"RocketLogix Passive I/O Board Topology," RocketLogix, Inc., Revision 6, May 24, 2000, 1 page.
194"RocketLogix Switched I/O Board Topology," RocketLogix, Inc., Revision 6, May 24, 2000, 1 page.
195"Second Amended Complaint for Patent Infringement," Acqis v. Appro Int'l, Inc. et al., Case No. 6:09-cv-00148, filed Jul. 22, 2009, 49 pages.
196"Telecom Australia to Receive Astro Sciences/J&L 486 Services," Astro Sciences Corporatoin, Press Release, Jan. 4, 1996, 1 page.
197"Thin Client Servers High-Speed Data Switching Technical Summary," QuantumNet, Inc., Aug. 29, 2010, 28 pages.
198"TLD Queries Complete Call Detail Record Database with WhiteCross Data Exploration Server," Data Mining Product Reviews, Feb. 2000, 1 page.
199"Transcript of Videotaped Deposition of William Mangione-Smith," taken by the Defendants in connection with Case No. 6:09-cv-148-LED in the U.S. District Court for the Eastern District of Texas, Sep. 9, 2010, 192 pages.
200"Venture financing is fuel for Powerstation's Growth Plans," Mass High Tech Communications, Inc., Jun. 2, 1997, 1 page.
201"WhiteCross Data Exploration Announces ExplorationSTUDIO™," Press Release, New York, NY, Sep. 2, 1999, 2 pages.
202"WhiteCross Introduces ‘World's Most Powerful Exploration Warehouse System,’" Press Release, New York, NY, Sep. 2,1999, 2 pages.
2038260 ATM Product Architecture, IBM International Technical Support Organization, Raleigh Center, Sep. 1997, First Edition, International Business Machines Corporation, 220 pgs.
2048265 Nways ATM Switch, Product Description, Sep. 1998, Fifth Edition, International Business Machines Corporation, 141 pages.
205Accton, Gigabit Ethernet PCI Adapter (1999) (2 pp) (No. 122.pdf).
206Action Closing Prosecution in Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, mailed Feb. 15, 2011, 175 pages.
207Action Closing Prosecution in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, mailed Feb. 15, 2011, 136 pages.
208Action Closing Prosecution in Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, mailed Apr. 27, 2011, 184 pages.
209Advanced Micro Devices, Inc., "AMD-K6-III Processor Data Sheet," 21918B/0, Oct. 1999, 326 pages.
210Agerwala, T., "SP2 System Architecture," IBM Systems Journal, vol. 34, No. 2, pp. 152-184 (1995).
211Amendment filed with Continued Prosecution Application for U.S. Patent No. 6,345,330, filed Jan. 17, 2001, 5 pages.
212Amendment for U.S. Patent No. 6,345,330, filed Sep. 12, 2000, 5 pages.
213Amendment for U.S. Patent No. 7,818,487, filed May 11, 2010, 15 pages.
214Amendment Submitted After Notice of Allowance for U.S. Patent No. 7,818,487, filed Aug. 17, 2010, 14 pages.
215Amendment Submitted with RCE for RE 41,076, filed Aug. 4, 2009, 2 pages.
216Amendment Submitted with RCE for RE 41,076, filed Dec. 8, 2008, 44 pages.
217Amendment Submitted with RCE for RE 41,076, filed Nov. 5, 2007, 19 pages.
218Amendment Submitted with RCE for RE 41,294, filed May 27, 2008, 14 pages.
219Amendment Submitted with RCE for U.S. Appl. No. 10/963,825, filed Feb. 20, 2009, 24 pages.
220Amendment Submitted with RCE for U.S. Appl. No. 10/963,825, filed Jul. 27, 2006, 29 pages.
221Amendment Submitted With RCE for U.S. Patent No. 7,099,981, filed Mar. 1, 2006, 23 pages.
222Anderson, C.R. et al., "IEEE 1355 HS-Links: Present Status and Future Prospects," [online], 1998, [retrieved on Aug. 11, 2010], Retrieved from the Internet: <URL: http://www94.web.cern.ch/HIS/dshs/publications/wotug21/hslink/pdf/hslinkpaper.pdf>, 14 pages.
223Appellants' Brief for U.S. Appl. No. 10/963,825, filed Jan. 8, 2007, 31 pages.
224Applicant Summary of Interview, filed Mar. 24, 2009, 1 page.
225Athavale, A., "How to Lower the Cost of PCI Express Adoption by Using FPGAs," EETimes Design [online] Apr. 26, 2006, [retrieved on May 3, 2011]. Retrieved from the Internet at <URL: http://www.eetimes.com/General/DisplayPrintViewContent?contentitemID=4014824>, 6 pages.
226Bernal, Carlos, product brochure entitled: "PowerSMP Series 4000" (Mar. 1998) <<http://www.winnetmag.com/Windows/Article/ArticleID/3095//3095.html, downloaded from web on Jun. 22, 2004, 2 pgs.
227Berst, "Hope for the Modular PCs We all Really Want" (Dec. 5, 1997).
228Black Box Corporation, "Black Box Serve Switch Duo," Black Box Network Services Manual, Jul. 1998, 52 pages.
229Black Box Corporation, Black Box Network Services, Black Box ServSwitch Duo, Jul. 1998, 52 pages.
230Board Specifications for DataModule Board, DataStation Backplane, DataStation Front Bezel, and BaseStation Backplane, Rev. E, Anigma, Inc., Mar. 2, 2000, 5 pages.
231Boosten, "Transmission Overhead and Optimal Packet Size", Mar. 11, 1998, printed on: Jan. 28, 2011, 2 pgs.
232Boyd-Merritt, "Upgradable-PC Effort Takes Divergent Paths" (EE Times 1997) http://techweb.cmp/com/eet/news/971949news/effort.html.
233Burrow, M., "A Technical Overview of the WXDES/9800," Whitecross Data Exploration, Apr. 21, 1999, Software, 102 pages.
234Burrow, M., "A Technical Overview of the WXDES/9800," Whitecross Data Exploration, White Cross Systems Limited, Apr. 21, 1999, 90 pages.
235Burrow, M., WhiteCross Data Exploration, "A Technical Overview of the WXDES/9800," Apr. 21, 1999, White Cross Systems Limited, 222 pages.
236Burrow, M., WhiteCross Data Exploration, "A Technical Overview of the WXDES/9800," Mar. 2, 1999, Revision 2.00, White Cross Systems Limited, pp. 1-90.
237CETIA Brochure "CETIA Powerengine CVME 603e" pp. 1-6 downloaded from the internet at. http://www.cetia.com/ProductAddOns/wp-47-01.pdf on Feb. 15, 2006.
238Chapter 7: Designing a Data Protection Plan, (undated), pp. 170-171.
239Chapter 7: Maintaining the NetWare Server, "Supervising the Network," (undated), pp. 514-517.
240Charlesworth, I., "Technology Audit, Data Exploration Server," Butler Group, Sep. 1999, 8 pages.
241Chu, U.S. Appl. No. 12/322,858, filed Feb. 5, 2009 for "Password Protected Modular Computer Method and Device."
242Cisco Systems, Inc., "Cisco AS5800 Universal Access Server Dial Shelf Controller Card Installation and Replacement," Doc. No. 78/4653-02, 1997, 28 pages.
243Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit AA-1: Claims Charts with Respect to QuantumNet for New Claims 14-34, filed Aug. 23, 2010, 117 pages.
244Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit BB-1: Claims Charts with Respect to Chatcom for New Claims 14-34, filed Aug. 23, 2010, 88 pages.
245Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit CC-1: Claims Charts with Respect to Eversys for New Claims 14-34, filed Aug. 23, 2010, 44 pages.
246Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit DD-1: Claims Charts with Respect to Origin2000 Manual for New Claims 14-34, filed Aug. 23, 2010, 50 pages.
247Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit EE-1: Claims Charts with Respect to Gallagher for New Claims 14-34, filed Aug. 23, 2010, 104 pages.
248Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Aug. 23, 2010, 78 pages.
249Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310 filed Apr. 8, 2011, 32 pages.
250Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, filed Oct. 1, 2010, 42 pages.
251Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Apr. 8, 2011, 23 pages.
252Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Sep. 23, 2011, 27 pages.
253Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Nov. 2, 2010, 31 pages.
254Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, filed Jan. 31, 2011, 50 pages.
255Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, filed Mar. 4, 2011, 48 pages.
256Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, filed Jun. 24, 2011, 21 pages.
257Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, filed Mar. 18, 2011', 49 pages.
258Compaq Computer Corporation, Compaq ActiveAnswers Installation Guide, Installation and Configuration Guide for Linux and Apache Web Server on Compaq Prosignia and ProLiant Servers, May 1999, pp. 1-40.
259Compaq Computer Corporation, Compaq Performance Brief, ProLiant 1600 ServerBench Performance Summary, Aug. 1998, pp. 1-7.
260Compaq Computer Corporation, Compaq White Paper, "Accelerating Financial Spreadsheet Simulations with Workstation Clusters," Oct. 1998, pp. 1-14.
261Compaq Computer Corporation, Compaq White Paper, "Microsoft Internet Information Server 4.0 on the Compaq ProLiant 6500," Aug. 1998, pp. 1-14.
262Compaq Computer Corporation, Compaq White Paper, "ServerNet—A High Bandwith, Low Latency Cluster Interconnection," Sep. 1998, pp. 1-9.
263Compaq Computer Corporation, et al., "Universal Serial Bus Specification," Apr. 27, 2000, Revision 2.0, 650 pages.
264Compaq Computer Corporation, et al., "Universal Serial Bus Specification," Sep. 23, 1998, Revision 1.1, 327 pages.
265Compaq Computer Corporation, ProLiant 6500-PDC/O1000 C/S with 4 ProLiant 1850R, TPC-C Rev. 3.4, Report Date: Dec. 22, 1998, pp. 1-3.
266Compaq Computer Corporation, QuickSpecs, Compaq ProLiant Cluster Series F Model 100, (undated), pp. 8-36 to 8-37.
267Compaq Computer Corporation, White Paper, "Order and Configuration Guide for Compaq ProLiant Cluster Series F Model 100," Sep. 1998, pp. 1-8.
268Concepts, Disk Driver and Disk Duplexing, (undated), pp. 82-83.
269Cragle, Jonathan, "Density System 1100", May 1999) >, downloaded from web on Jun. 21, 2004, 3 pgs.
270Cragle, Jonathan, "Density System 1100", May 1999) <<http://www.winnetmag.com/Windows/Article/ArticleID/5199/5199.html>>, downloaded from web on Jun. 21, 2004, 3 pgs.
271Crystal Advertisement for "QuickConnect® Cable Management", (@2000-2004) > downloaded from web on Jun. 17, 2004, 4 pgs.
272Crystal Advertisement for "Rackmount Computers", (@2000-2004) >, downloaded from web on Jun. 17, 2004, 8 pgs.
273Crystal Advertisement for "QuickConnect® Cable Management", (@2000-2004) <<http://www.crystalpc.com/products/quickconnect.asp>> downloaded from web on Jun. 17, 2004, 4 pgs.
274Crystal Advertisement for "Rackmount Computers", (@2000-2004) <<http:/www.crystalpc.com/products/roservers.asp>>, downloaded from web on Jun. 17, 2004, 8 pgs.
275Cubix Corporation, BC Series, Processor Boards Installation Guide, DOC 800A, Aug. 1994, 149 pages.
276Cubix Corporation, Cubix ERS/FT II Systems [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: , 5 pages.
277Cubix Corporation, Cubix ERS/FT II Systems [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19980124213320/www.cubix.com/support/steps/ers-ft2/intro.htm>, 5 pages.
278Cubix Corporation, Cubix Pentium II Plug-In Computers for Density Series Systems, Sep. 15, 1998, 1 page.
279Cubix Corporation, Cubix Product Catalog, Summer 1995, 56 pages.
280Cubix Corporation, Datasheet: ERS/FT II Server Chassis [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: , 3 pages.
281Cubix Corporation, Datasheet: ERS/FT II Server Chassis [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19970716204623/www.cubix.com/corporate/data/ersft2.htm>, 3 pages.
282Cubix Corporation, Datasheet: Single-Board Computers with Pentium Processors [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: , 5 pages.
283Cubix Corporation, Datasheet: Single-Board Computers with Pentium Processors [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19970716204717/www.cubix.com/corporate/data/bcp5t.htm>, 5 pages.
284Cubix Corporation, Density Series Multi-Server Systems, Sep. 10, 1999, 4 pages.
285Cubix Corporation, Density Series Plug-In Servers, Plug-In Computers for Managed Server Farms, Sep. 15, 1998, 2 pages.
286Cubix Corporation, ERS/FT II-Enhanced Resource Subsystem/Fault Tolerant II, Nov. 1994, 4 pages.
287Cubix Corporation, ERS/FT II—Enhanced Resource Subsystem/Fault Tolerant II, Nov. 1994, 4 pages.
288Cubix Corporation, White Paper: Benefits of High-Density Servers [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: , 6 pages.
289Cubix Corporation, White Paper: Benefits of High-Density Servers [online], 1997 [retrieved on Jul. 31, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19970716204215/www.cubix.com/corporate/whitep/densit.htm>, 6 pages.
290Cubix Product Brochure entitled, "Density System", (@2000) > downloaded from web on Jun. 22, 2004, 3 pgs.
291Cubix Product Brochure entitled, "Density System, Technical Specifications", (@2000) > downloaded from web on Jun. 22, 2004, 2 pgs.
292Cubix Product Brochure entitled, "Density System, Technical Specifications", (@2000) <http://64.173.211.7/support/techinfo/system/density/info/spec.htm>> downloaded from web on Jun. 22, 2004, 2 pgs.
293Cubix Product Brochure entitled, "Density System", (@2000) <<http://64.173.211.7/support/techinfo/system/density/density10.htm>> downloaded from web on Jun. 22, 2004, 3 pgs.
294Cubix Product Manual entitled, "Density System", Chapter 3-Operation, (@2000), > downloaded from web on Jun. 22, 2004, 4 pgs.
295Cubix Product Manual entitled, "Density System", Chapter2-Installation, (@2000) > downloaded from web on Jun. 22, 2004, 9 pgs.
296Cubix Product Manual entitled, "Density System," Chapter 4-Maintenance and Repair, (@2000) > downloaded from web on Jun. 22, 2004, 5 pgs.
297Cubix Product Manual entitled, "Density System," Chapter 4—Maintenance and Repair, (@2000) <<http://64.173.211.7/support/techinfo/manuals/density/Chap4-htm>> downloaded from web on Jun. 22, 2004, 5 pgs.
298Cubix Product Manual entitled, "Density System", Chapter 3—Operation, (@2000), <<http://64.173.211.7/support/techinfo/manuals/density/Chap-3.htm>> downloaded from web on Jun. 22, 2004, 4 pgs.
299Cubix Product Manual entitled, "Density System", Chapter2—Installation, (@2000) <<http://64.173.211.7/support/techiknfo/manuals/density/Chap-2.htm>> downloaded from web on Jun. 22, 2004, 9 pgs.
300Cubix Product Manual entitled; "Density System", Chapter 1-Introduction, (@2000) > downloaded from web on Jun. 22, 2004, 5 pgs.
301Cubix Product Manual entitled; "Density System", Chapter 1—Introduction, (@2000) <<http://64.173.211.7/support/techinfo/manuals/density/Chap-1.htm>> downloaded from web on Jun. 22, 2004, 5 pgs.
302Cubix, "Click on the front panel that matches your system", (@2000) >, downloaded from web on Jun. 22, 2004, 1 pg.
303Cubix, "DP 6200 'D' Series Plug-in Computers" >, downloaded from web on Jun. 22, 2004, 2 pgs.
304Cubix, "Installing DP or SP Series Boards" (@2000) >, downloaded from web on Jun. 22, 2004, 2 pgs.
305Cubix, "Multiplexing Video, Keyboard & Mouse with Multiple Density Systems", (@2000) >, downloaded from web on Jun. 22, 2004, 2 pgs.
306Cubix, "Powering On/Off or Resetting Plug-in Computers in an Density System", (@2000) >, downloaded from web on Jun. 22, 2004, 2 pgs.
307Cubix, "SP 5200 Series" Chapter 1-Introduction, (@2000) >, downloaded from web on Jun. 22, 2004, 3 pgs.
308Cubix, "SP 5200 Series" Chapter 2-Switches & Jumpers, (@2000) >, downloaded from web on Jun. 22, 2004, 3 pgs.
309Cubix, "SP 5200 Series" Chapter3-Installation, (@2000) >, downloaded from web on Jun. 22, 2004, 4 pgs.
310Cubix, "SP 5200 Series" Chapter4-Technical Reference, (@2000) >, downloaded from web on Jun. 22, 2004, 3 pgs.
311Cubix, "SP 5200XS Series Plug-in Computers", (@2000) >, downloaded from web on Jun. 22, 2004, 2 pgs.
312Cubix, "SP 5200XS Series Technical Specifications", (@2000) >, downloaded from web on Jun. 22, 2004, 2 pgs.
313Cubix, "What are Groups?", (@2000) >, downloaded from web on Jun. 22, 2004, 3 pgs.
314Cubix, "Click on the front panel that matches your system", (@2000) <<http://64.173.211.7/support/techinfo/system/density/density.htm>>, downloaded from web on Jun. 22, 2004, 1 pg.
315Cubix, "DP 6200 ‘D’ Series Plug-in Computers" <<http://64.173.211.7/support/techinfo/bc/dp/6200d/Intro.htm>>, downloaded from web on Jun. 22, 2004, 2 pgs.
316Cubix, "Installing DP or SP Series Boards" (@2000) <<http://64.173.211.7/support/techinfo/system/density/info/pic-inst.htm>>, downloaded from web on Jun. 22, 2004, 2 pgs.
317Cubix, "Multiplexing Video, Keyboard & Mouse with Multiple Density Systems", (@2000) <<http://64.173.211.7/support/techinfo/system/density/info/vkm-mux.htm>>, downloaded from web on Jun. 22, 2004, 2 pgs.
318Cubix, "Powering On/Off or Resetting Plug-in Computers in an Density System", (@2000) <<http://64.173.211.7/support/techinfo/system/density/info/power.htm>>, downloaded from web on Jun. 22, 2004, 2 pgs.
319Cubix, "SP 5200 Series" Chapter 1—Introduction, (@2000) <<http://64.173.211.7/support/techinfo/manuals/sp5200/chap-1.htm>>, downloaded from web on Jun. 22, 2004, 3 pgs.
320Cubix, "SP 5200 Series" Chapter 2—Switches & Jumpers, (@2000) <<http://64.173.211.7/support/techinfo/manuals/sp5200/chap-2.htm>>, downloaded from web on Jun. 22, 2004, 3 pgs.
321Cubix, "SP 5200 Series" Chapter3—Installation, (@2000) <<http://64.173.211.7/support/techinfo/manuals/sp5200/chap-3.htm>>, downloaded from web on Jun. 22, 2004, 4 pgs.
322Cubix, "SP 5200 Series" Chapter4—Technical Reference, (@2000) <<http://64.173.211.7/support/techinfo/manuals/sp5200/chap-4.htm>>, downloaded from web on Jun. 22, 2004, 3 pgs.
323Cubix, "SP 5200XS Series Plug-in Computers", (@2000) <<http://64.173.211.7/support/techinfo/bc/sp5200xs/intro.htm>>, downloaded from web on Jun. 22, 2004, 2 pgs.
324Cubix, "SP 5200XS Series Technical Specifications", (@2000) <<http://64.173.211.7/support/techinfo/bc/sp5200xs/spec.htm>>, downloaded from web on Jun. 22, 2004, 2 pgs.
325Cubix, "What are Groups?", (@2000) <<http://64.173.211.7/support/techinfo/system/density/info/groups.htm>>, downloaded from web on Jun. 22, 2004, 3 pgs.
326Decision Dismissing Petition Under 37 C.F.R. §1.183 to Waive Page Limit Requirement for Third Party Requester Comments Under 37 C.F.R. §1.943(b) filed May 12, 2011 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, mailed Jul. 15, 2011, 4 pages.
327Decision Dismissing Petitions filed Nov. 17, 2010 and Dec. 16, 2010 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, mailed Apr. 18, 2011 3 pages.
328Decision Dismissing Petitions Filed Oct. 6, 2010 and Oct. 14, 2010 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, mailed Apr. 18, 2011, 3 pages.
329Decision Granting-in-Part Petition Under 37 C.F.R. §1.183 to Waive Page Limit Requirement for Third Party Requester Comments Under 37 C.F.R. §1.943(b) filed Aug. 23, 2010, and Expunging Improper Comments filed Aug. 23, 2010, in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, mailed Jul. 15, 2011, 8 pages.
330Decision on Appeal for U.S. Appl. No. 10/963,825, mailed Feb. 4, 2009, 13 pages.
331Defendant's Invalidty Chart for Base Reference RLX System 324, proposed on Jul. 15, 2010, 58 pages.
332Dell, Inc., White Paper, "PCI Express Technology," Feb. 2004, pp. 1-11.
333Desai, D. M. et al., "BladeCenter system overview," IBM Journal of Research and Development, vol. 49, No. 6, Nov. 2005, pp. 809-821, 13 pages.
334Digital Equipment Corporation, "Digital AlphaServer 4000 and 4100 systems," [Brochure], 1998, 4 pages.
335Digital Semiconductor Product Brief, "21152 PCI-to-PCI Bridge," Feb. 1996, 6 pages.
336Dirk S. Faegre et al., "CTOS Revealed", http://www.byte-.com/art/9412/sec13/art2.htm.
337Dirk S. Faegre et al., "CTOS Revealed", http://www.byte.com/art/9412/sec13/art2.htm.
338eBay Advertisement for "Total IT Group Network Engines", <<http://cgi.ebay.com/we/eBayISAPI.d11?ViewItem&Item=5706388046&sspagename+STRK%3AMDBI%3AMEBI3AIT&rd=1>>, downloaded from web on Jun. 25, 2004, 1 pg.
339EIA-422A-Standard (Superseded), Electrical Characteristics of Balanced Voltage Digital Interface Circuits (Dec. 1978) (20 pp) (No. 118a.pdf).
340EIA-422A—Standard (Superseded), Electrical Characteristics of Balanced Voltage Digital Interface Circuits (Dec. 1978) (20 pp) (No. 118a.pdf).
341Ellis, S., "Iris FailSafe™ Administrator's Guide," Document No. 007-3109-003, Apr. 6, 1997, 212 pages.
342Email Emanuel to Juarez regarding Invalidity Chart for Base Reference IBM BladeCenter, dated Aug. 20, 2010, 54 pages.
343Evergreen Systems, Inc., "CAPserver, The Communication/Application server for local area networks," Product Guide, (undated), 18 pages.
344Eversys CAPcard 9500/sa Product Brief [online], (undated), [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19961104093144/www.eversys.com/cc95sa—Brief.htm>, 3 pages.
345Eversys CAPserver Product Brief [online], (undated), [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19961104093115/www.eversys.com/CAPbrief.htm>, 10 pages.
346Eversys Corp., "Eversys System 8000 Consolidated Network Server Market and Product Overview," Slide Presentation, downloaded from >, 20 pages total.
347Eversys Corp., "Eversys System 8000 Consolidated Network Server Market and Product Overview," Slide Presentation, downloaded from <<http://eversys.com>>, 20 pages total.
348Eversys Corporation Business Plan, Eversys Corporation, Mar. 21, 1997, 53 pages.
349Eversys Corporation, Eversys System 8000 Peripheral Sharing Switch (PSS) User's Guide, 1st Edition—Jun. 1997, 2nd Edition—Jan. 1998, 17 pages.
350Eversys Corporation, S8000 Single Module Body Assemby, Oct. 9, 1998, 9 pages.
351Eversys Corporation, System 8000 Consolidated Network Server Product Brief, (undated), 2 pages.
352Eversys Corporation, System 8000 Consolidated Network Server, Pentium II Processor Module User's Guide for Module version P2D-BXT, Jan. 1998, 49 pages.
353Eversys Corporation, System 8000 Consolidated Server Presentation, (undated), 23 pages.
354Eversys Corporation, System 8000 Consolidated Server, (undated), [retrieved on Nov. 9, 2009], Retrieved from C: drive <path: file://C:\Documents and Settings\Daniel\M Documents\Eversys\Eversys Web Site Master...>, 6 pages.
355Eversys Corporation, WebView 8000 version 1.1 User's Guide, Web-Based Management Software fo the Eversys System 8000 Consolidated Server, Revision A—Nov. 1998, Revision B—Dec. 1998, 56 pages.
356Eversys, "CAPcard 9500/sa Product Brief," [online], [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archieve.org/web/19961104093144/www.eversys.com/cc95sa—Brief.htm>, 3 pages.
357Eversys, "CAPserver Product Brief" [online], [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archieve.org/web/19961104093115/www.eversys.com/CAPbrief.htm>, 10 pages.
358Eversys, "Products" [online], [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archieve.org/web/19961104093103/www.eversys.com/prodinfo.htm>, 2 pages.
359Eversys, "Welcome to EverSys" [online], [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archieve.org/web/19961104092834/www.eversys.com/index2.htm>, 1 page.
360Examiner Interview Summary Record, mailed Feb. 24, 2009, 4 pages.
361Examiner Interview Summary Record, mailed Jan. 15, 2009, 1 page.
362Examiner Interview Summary Record, mailed Sep. 22, 2009, 5 pages.
363Examiner's Amendment for RE 41,092, mailed Nov. 4, 2009, 4 pages.
364Examiner's Answer for U.S. Appl. No. 10/963,825, mailed Aug. 8, 2007, 30 pages.
365Excerpt from "Microsoft Computer Dictionary, 4th Edition", Microsoft Press, 1999, pp. 184-185, 241, 432 (7 pages).
366Excerpt from "Microsoft Computer Dictionary, 4th Edition"; Microsoft Press, 1999, pp. 40, 241, 432 (6 pages).
367Excerpt from "Microsoft Computer Dictionary, 5th Edition", Microsoft Press, 2002, pp. 96 and 547.
368Excerpt from "Microsoft Computer Dictionary, 5th Edition", Microsoft Press, 2002, pp. 96, 329, 624 and 625.
369Excerpt from IEEE 100: The Authoritative Dictionary of IEEE Standards Terms (7th Ed., 2000), pp. 181,304 and 771.
370Excerpt from IEEE 100: The Authoritative Dictionary of IEEE Standards Terms (7th Ed., 2000), pp. 78, 79 and 128.
371Excerpts of Transcript of "Videotaped Deposition of William W.Y. Chu," taken by the Defendants in connection with Case No. 6:09-cv-148-LED in the U.S. District Court for the Eastern District of Texas, Jun. 7, 2010, 20 pages.
372Exhibit 1, Disclosure of Asserted Claims and Infringement Contentions for Defendant Appro International, Inc., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 105 pages.
373Exhibit 2, Disclosure of Asserted Claims and Infringement Contentions for Defendant ClearCube Technology, Inc., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 163 pages.
374Exhibit 3, Disclosure of Asserted Claims and Infringement Contentions for Defendant Dell Inc., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 184 pages.
375Exhibit 4, Disclosure of Asserted Claims and Infringement Contentions for Defendant Fujitsu America, Inc., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 210 pages.
376Exhibit 5, Disclosure of Asserted Claims and Infringement Contentions for Defendant Hewlett-Packard Co., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 279 pages.
377Exhibit 6, Disclosure of Asserted Claims and Infringement Contentions for Defendant IBM Corp., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 242 pages.
378Exhibit 7, Disclosure of Asserted Claims and Infringement Contentions for Defendant NEC Corp. of America, submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 166 pages.
379Exhibit 8, Disclosure of Asserted Claims and Infringement Contentions for Defendant Sun Microsystems, Inc., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 243 pages.
380Exhibit 9, Disclosure of Asserted Claims and Infringement Contentions for Defendant Super Micro Computer, Inc., submitted by the Plaintiff in the U.S. District Court for the Eastern District of Texas, Case No. 6:09-cv-148-LED, served on Sep. 14, 2009, 220 pages.
381Facsimile from Procrass to Paunovich attaching "QuantumNet Network Computing Systems," Aug. 30, 2010, 8 pages.
382Faegre, et al., "Unisys' Best-Kept Secret Is an Operating System Built for Distributed Business Applications." BYTE (Dec. 1994).
383Feakes, L., "Disk Connector Card Functional Requirement Specification," Jan. 14, 1998; White Cross Systems Limited, pp. 1-4.
384Feakes, L., "Disk Connector Card Layout Specification," Jan. 14, 1998, White Cross Systems Limited, pp. 1-6.
385Feakes. L., "Fast Ethernet Switch Card Design Specification," Revision 4.00, White Cross Systems Limited, Jul. 27, 2010, 23 pages.
386Feibel, W., Encyclopedia of Networking, Third Edition, p. 265, The Network Press, 2000, 4 pages.
387Feldman, Jonathan, "Rack Steady: The Four Rack-Mounted Servers That Rocked Our Network", >, Jun. 23, 2004, 3 pgs.
388Feldman, Jonathan, "Rack Steady: The Four Rack-Mounted Servers That Rocked Our Network", <<http://www.networkcomputing.com/shared/printArticle.jhtml?article=910/910r3side1.htm...>>, Jun. 23, 2004, 3 pgs.
389Fetters, Dave, "Cubix High-Density Server Leads the Way With Standout Management Software", (Feb. 8, 1999) http://www.nwc.com/shared/printArticle.jhtml?article=/1003/1003r3full.html&pub=nwc, downloaded from web on Jun. 23, 2004, 5 pgs.
390Final Office Action in Ex Parte Reexamination of U.S. Patent No. 6,216,185, Control No. 90/010,816, mailed Mar. 3, 2011, 99 pages.
391Galles, M., "Spider: A Hide-Speed Network Interconnect," IEEE Micro, 1997, pp. 34-39. (6 pages).
392Gardner, Michael and Null, Christopher, "A Server Condominium", >, Jun. 23, 2004, 3 pgs.
393Gardner, Michael and Null, Christopher, "A Server Condominium", <<http://www.lantimes.com/testing/98jun/806a042a.html>>, Jun. 23, 2004, 3 pgs.
394Goldman, A, "ISP Profiles: RLX Technologies," ISP-Planet, May 17, 2001, retrieved from the Internet on Jul. 26, 2001, Retrieved at URL: www.isp-planet.com/profiles/2001/rlx.html, 3 pages.
395Grigonis, R., "Fault Resilient PC's," Flatiron Publishing, 1996, 314 pages.
396Grigonis, R., "Life-Saving Computers: Network Engines," Computer Telephony, Sep. 1997, 1 page.
397Groom, P., "WhiteCross 9800 pre-release configuration details and USA Pricing Information," WhiteCross Systems Limited, Nov. 3, 1998, 4 pages.
398Grow, R. et al., "Gigabit Media Independent Interface Proposal," Nov. 11, 1996, IEEE 802.3Z, Vancouver, 22 pages.
399Gruener, J., "Vendors pack in more servers," [retrieved on Oct. 22, 2009], Retrieved from the Internet: <URL: http://www.galenet.galegroup.com.ezproxy.sfpl.org.servlet/BCR...>, 2 pages.
400Gruener, J., "Vendors Pack in More Servers," PC Week, vol. 14, No. 1, Mar. 17, 1997, 2 pages.
401Haas, S., "The IEEE 1355 Standard: Developments, Performance and Application in High Energy Physics," Thesis for degree of Doctor of Philosophy, University of Liverpool, Dec. 1998, 138 pages.
402Harrison, Dave, "VME in the Military: The M1A2 Main Battle Tank Upgrade Relies on COTS VME" >>, (Feb. 9, 1998), pp. 1-34.
403Harrison, Dave, "VME in the Military: The M1A2 Main Battle Tank Upgrade Relies on COTS VME" <<http://www.dy4.com>>>, (Feb. 9, 1998), pp. 1-34.
404High Bandwidth Synchronization Bus Arbiter FPGA Implementation, Network Engines, Inc., undated, 49 pages.
405Hill, Goff (editor), "The Cable and Telecommunications Professional's Reference: vol. 1," Third Edition, Focal Press, 2007, pp. 227-229, 5 pages.
406HotDock and Orbiter 3360—Technical Specifications, Product Overview, and Configurations, RocketLogix, Inc., 2000, 4 pages.
407HP: HDPM 1636, Gigabit Ethernet Transceiver Chip, Preliminary Technical Data (May 1997) (No. 123.pdf).
408Huq et al. "An Overview of LVDS Technology" National Semiconductor Corp. (Jul. 1998) (6 pp.) (No. 118d.pdf).
409IBM Corporation, "Grounding Spring for Peripheral Device and Bezel Bracket," IBM Technical Disclosure Bulletin, Nov. 1, 1993, vol. 36, No. 11, 2 pages.
410IBM Dictionary of Computing, Tenth Ed., pp. 139, 439, 480 and 629, George McDaniel ed., McGraw-Hill, Inc., Aug. 1993, 16 pages.
411IBM Thinkpad Product Information Guide, IBM PC Company, Apr. 28, 1998, 26 pages.
412IEEE 100: The Authoritative Dictionary of IEEE Standards Terms, Seventh Ed., pp. 703, 704, 856 and 1064, The Institute of Electrical and Electronics Engineers, Inc., 2000, 13 pages.
413IEEE Standard for a High Performance Serial Bus, IEEE Std 1394-1995, The Institute of Electrical and Electronics Engineers, Inc., 1996, 392 pages.
414Intel Corporation Advance Information, "Intel 440LX AGPSET: 82443LX PCI A.G.P. Controller (PAC)," Aug. 1997, 4 pages.
415Intel Corporation Architectural Overview, "Intel 430TX PCISET: 82439TX System Controller (MTXC)," Feb. 1997, 4 pages.
416Intel Corporation Architectural Overview, "Intel 82371AB PCI-to-ISA/IDE Xcelerator (PIIX4)," Apr. 1997, 3 pages.
417Intel Corporation, "PCI Express* to PCI-X* Bridge Architecture: Where Interface Standards Meet," 2003, 8 pages.
418Intel Corporation, Intel 82559 Fast Ethernet Controller, [retrieved on Mar. 14, 2011], Retrieved from the Internet: <URL: http://www.intel.com/design/network/products/lan/controllers/82559.htm>, 1 page.
419Intel Corporation, Intel 82559 Fast Ethernet Multifunction PCI/Cardbus Controller, Networking Silicon, Preview Datasheet, Jan. 1999, 56 pgs.
420Intel, "Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz, Datasheet," Order No. 243657-003, Aug. 1998, 83 pages.
421Intel, 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller, Product Datasheet (Oct. 1998) (8 pp.) (No. 127.pdf).
422Intel, 82559 Fast Ethernet Multifunction PCI/Cardbus Controller (Jan. 1999) (56 pp.) (No. 128.pdf).
423International Preliminary Examination Report for International Patent Application No. PCT/US99/09369, report completed Jul. 5, 2000, 4 pages.
424International Search Report for International Patent Application No. PCT/US99/09369, report mailed Nov. 16, 1999, 7 pages.
425Internet Telephone Roundup, "Industrial Computers", http://www.tmcnet.com/articles/itmag,/0499/0499roundup.htm, downloaded from the web on Jun. 23, 2004, 5 pgs.
426J&L Introduces Twin Pentium for ChatterBox Systems, J&L Information Systems, Press Release, Jan. 29, 1996, 1 page.
427Jesse Berst's Anchor Desk, http://www.zdnet.com/anchordesk/story/story-1504.html.
428Jesse Berst's Anchor Desk, http://www.zdnet.com/anchordesk/story/story—1504.html.
429Jesse Berst's Anchor Desk, http://www.zdnet.com/anchordesk/talkback/talkback-56555.html.
430Jesse Berst's Anchor Desk, http://www.zdnet.com/anchordesk/talkback/talkback—56555.html.
431JL ChatCom, Inc., "ChatExpress PB5 Series P166 Pentium PCI/ISA CPU Card," 1996 [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104222157/www.jlchatcom.com/chatp599.htm>, 2 pages.
432JL ChatCom, Inc., "ChatExpress—2 Slot," [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104222644/www.jlchatcom.com/exp2ill.gif>, 1 page.
433JL ChatCom, Inc., "ChatPower Plus," 1996 [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104222122/www.jlchatcom.com/chatplus.htm>, 3 pages.
434JL ChatCom, Inc., "ChatterBox ChatPower Plus," (undated) [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104222556/www.jlchatcom.com/cpp1.gif>, 1 page.
435JL ChatCom, Inc., "ChatTwin," [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104222644/www.jlchatcom.com/chattwin.htm>, 2 pages.
436JL ChatCom, Inc.—Highly Adaptable Intranet and Web Servers, "ChatCom, Inc. Announces Highly Adaptable Intranet and Web Servers," Sep. 3, 1996 [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104221941/www.jlchatcom.com/chat4int.htm>, 2 pages.
437JL ChatCom, Inc.—Scaleable Application and Communication Servers, "ChatCom, Inc. Announces Complete Line of Scaleable Application and Communication Servers," Aug. 30, 1996 [retrieved on Dec. 2, 2009], JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104221932/www.jlchatcom.com/cpofrel.htm>, 4 pages.
438JL ChatCom, Inc.—Web Site, JL ChatCom, Inc., ChatterBox Communications and Server Solutions [online], 1996 [retrieved on Dec. 2, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19970104221841/http://www.jlchatcom.com/>, 1 page.
439Kelly Spang, "Component House: Design Technology for PCs in a snap'-NeoSystmes Offers Building Blocks", Computer Reseller News, Apr. 21, 1997, Issue 732, Section: Channel Assembly, http://www.techweb.com/se/directlink.cgi?CRN19970421S0054.
440Kelly Spang, "Component House: Design Technology for PCs in a snap'—NeoSystmes Offers Building Blocks", Computer Reseller News, Apr. 21, 1997, Issue 732, Section: Channel Assembly, http://www.techweb.com/se/directlink.cgi?CRN19970421S0054.
441Khan, M. F., "Ethernet Switch Card Design Specification," Mar. 8, 2001, White Cross Systems Limited, pp. 1-32.
442Khan, M. F., "Ethernet Switch Card Layout Specifications," Mar. 8, 2001, pp. 1-31.
443KTI Networks, Installation Guide 10/100 Dual-speed Fast Ethernet PCI Adapters (1999) (24 pp.) (No. 126.pdf).
444Kunzman, A. J., et al., "1394 High Performance Serial Bus: The Digital Interface for ATV," IEEE Transactions on Consumer Electronics, vol. 41, No. 3, Aug. 1995, pp. 893-900, 9 pages.
445Lazik, G., "Remote Access—a Historical Perspective," Network News, vol. 3, No. 7, NPA The Network Professional Association, Jul. 1994, 6 pages.
446Lazik, G., "Remote Access—Part II, Cost Analysis," Network News, vol. 3, No. 8, NPA The Network Professional Association, Sep. 1994, 5 pages.
447Letter Martiniak to Byers regarding Proposed Amendment to the Invalidity Contentions based on products from RLX Systems and a description of RLX products, dated Jul. 15, 2010, 2 pages.
448Letter to Barac from Pacotti, Jr. with attachments on WhiteCross Data Exploration, undated, 12 pages.
449Liquorman, "Convergent Technologies Had This Idea" (Dec. 5, 1997).
450Maintenance and Service Guide, Compaq Armada 4100 and 4200 Families of Personal Computers, 190 pages.
451Mamakos, L. et al., "Request for Comments 2516—A method for Transmitting PPP Over Ethernet (PPPoE)," [online], 1999, [retrieved on Aug. 18, 2010], Retrieved from the Internet: <URL: http://ttols.ietf.org/html/rfc2516>, 35 pages.
452McKenzie, L., "Fujitsu Reaches Deal in Acqis Blade Server IP Spat," Law360 [online], [retrieved on Jun. 16, 2010], Retrieved from the Internet at <URL: http://ip.law360.com/print—article/175004>, 2 pages.
453Miastkowski, S. (Editor), "A Whale of a System," BYTE, Aug. 1991, 4 pages, vol. 16, No. 8.
454Micronet SP2500R Series Etherfast 10/100 MBPS Adapter, User's Guide (1999) (10 pp.) (No. 136.pdf).
455Microsoft Cluster Service Center, "MSCS Basics," downloaded from >, Feb. 7, 2005, 4 pages total.
456Microsoft Cluster Service Center, "MSCS Basics," downloaded from <http://www.nwnetworks.com/mscsbasics.htm>>, Feb. 7, 2005, 4 pages total.
457Microsoft Cluster Service Center, MSCS Basics, downloaded from <<http://www.networks.com/mscsbasics.htm. Feb. 7, 2005, 6 pages.
458Microsoft Press Computer Dictionary, Second Edition, pp. 82, 92, 93 and 260, Alice Smith ed., Microsoft Press, 1994, 13 pages.
459Microsoft Press Computer Dictionary, Third Ed., pp. 96, 313, and 355, Kim Fryer ed., Microsoft Press, 1997, 5 pages.
460Microsoft Press Computer User's Dictionary, pp. 232, 262, and 275, Kim Fryer ed., Microsoft Press, 1998, 12 pages.
461Microsoft Press Computer User's Dictionary, pp. 82 and 232, Kim Fryer ed., Microsoft Press, 1998, 5 pages.
462MP700 User Guide, Issue 0.0.89, Network Engines, Inc., Oct. 16, 1997, 29 pages.
463MPL Brochure "1st Rugged All in One Industrial 486FDX-133 MHz PC" pp. 1-2, downloaded from the internet at. http://www.mpl.ch/DOCs/ds-48600.pdf on Feb. 15, 2006.
464MPL Brochure "IPM 486 Brochure/IPM5 User manual" pp. 1-9 downloaded from the internet at http://www.mpl.ch/DOCs/u48600xd.pdf on Feb. 15, 2006.
465MPL, "The First Rugged All-in-One Industrial 486FDX-133 MHz PC"IPM 486 Brochure/IPM5 User manual, 1998, pp. 1-52.
466National Semiconductor Product Folder, "DS90CR215 Plus-3.3V Rising Edge Data Strobe LVDS 21-Bit Channel and Link—66 MHz," National Semiconductor Corporation [online], [retrieved on Oct. 30, 1997]. Retrieved from the Internet at <URL: http://www.national.com/search/search.cgi/design?keywords=DS90CR215>, 2 pages.
467National Semiconductor, DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-66 MHz, Jul. 1997, 2 pages.
468NEC, "Server HX4500 User's Guide," PN: 456-00005-000, Dec. 1998, 160 pages.
469Network Engines ClusterDirectbr Users' Manual, Revision B, Network Engines, Inc., Jun. 1998, 88 pages.
470Network Engines ClusterDirector Users' Manual, Network Engines, Inc., Jan. 1998, 52 pages.
471Network Engines Network, Network Engines, Inc., Jun. 22, 1999, 20 pages.
472Network Engines P6000 System Guide, Revision C, Network Engines, Inc., Jul. 1998, 89 pages.
473Network Engines P6000EXP System Guide, Revision A, Network Engines, Inc., Jan. 1998, 106 pages.
474Network Engines Website, NetWork Engines, Inc., retrieved on Feb. 27, 1998, URL: http://www.networkengines.com/, 12 pages.
475Network Engines, "P6000EXP Fault-tolerant Load-balanced Clustered Server," 1997, 3 pages.
476Network Engines, Inc., Company Overview, Aug. 26, 2010, 21 pages.
477Network Engines, Inc., Network Engines ClusterDirector User's Manual, Jun. 1998, 32 pages.
478Network Engines: P6000EXP Fault-Tolerant Load-Balanced Cluster Server (NEI00095) (1997) (4 pp.) (No. 22a.pdf).
479Network Engines™ SBC1000 User's Manual, Rev. E Draft, Network Engines, Inc., Jun. 1998, 78 pages.
480Network Engines™ SBC2000 User's Manual, Rev. 1.0, Network Engines, Inc., Jul. 1998, 140 pages.
481Network Engines™ SBC2000S Reference Guide, Rev. 1.0, Network Engines, Inc., Sep. 1998, 156 pages.
482Network.Engines™ SBC2000ST Reference Guide, Rev. A, Network Engines, Inc., Oct. 1998, 178 pages.
483Nicholls, T., "9800 First level design," White Cross Systems Limited, Mar. 26, 1997, 26 pages.
484Nicholls, T., "9800 System Architecture," White Cross Systems Limited, Mar. 27, 1997, 28 pages.
485Nonfinal Office Action in Ex Parte Reexamination of U.S. Patent No. 6,216,185, Control No. 90/010,816, mailed Jun. 14, 2011, 31 pages.
486Novell, Inc., "Novell's NetWare 4.1 Momentum Continues—NetWare 4 Now World's Best-Selling Network Operating System," [online], Mar. 21, 1996, [retrieved on Nov. 16, 2009]. Retrieved from the Internet: <URL: http://www.novell.com/news/press/archive/1996/03/pr96056.html>, 2 pages.
487Office Action for RE 41,076, mailed Dec. 30, 2008, 8 pages.
488Office Action for RE 41,076, mailed Feb. 11, 2008, 62 pages.
489Office Action for RE 41,076, mailed Jul. 13, 2007, 38 pages.
490Office Action for RE 41,076, mailed Jun. 9, 2008, 25 pages.
491Office Action for RE 41,076, mailed Oct. 17, 2007, 55 pages.
492Office Action for RE 41,092, mailed Sep. 17, 2008, 8 pages.
493Office Action for RE 41,294, mailed Apr. 15, 2008, 10 pages.
494Office Action for RE 41,294, mailed Nov. 16, 2007, 10 pages.
495Office Action for RE 41,294, mailed Sep. 16, 2008, 11 pages.
496Office Action for U.S. Appl. No. 09/312,199, mailed Mar. 26, 2003, 5 pages.
497Office Action for U.S. Appl. No. 09/642,628, mailed Apr. 5, 2001, 9 pages.
498Office Action for U.S. Appl. No. 10/963,825, mailed May 14, 2009, 5 pages.
499Office Action for U.S. Appl. No. 10/963,825, mailed May 31, 2006, 29 pages.
500Office Action for U.S. Appl. No. 10/963,825, mailed Oct. 20, 2006, 28 pages.
501Office Action for U.S. Appl. No. 10/963,825, mailed Oct. 27, 2005, 25 pages.
502Office Action for U.S. Appl. No. 10/963,825, mailed Sep. 15, 2009, 14 pages.
503Office Action for U.S. Appl. No. 11/545,056, mailed Mar. 12, 2010, 26 pages.
504Office Action for U.S. Appl. No. 12/322,858, mailed Feb. 3, 2011, 28 pages.
505Office Action for U.S. Appl. No. 12/322,858, mailed Jun. 25, 2010, 22 pages.
506Office Action for U.S. Appl. No. 12/322,858, mailed Mar. 4, 2010, 24 pages.
507Office Action for U.S. Appl. No. 12/561,138, mailed Mar. 17, 2011, 5 pages.
508Office Action for U.S. Appl. No. 12/561,138, mailed Sep. 29, 2010, 4 pages.
509Office Action for U.S. Appl. No. 12/577,074, mailed Apr. 13, 2010, 7 pages.
510Office Action for U.S. Appl. No. 12/577,074, mailed Nov. 10, 2010, 6 pages.
511Office Action for U.S. Patent No. 6,216,185, mailed Apr. 12, 2000, 9 pages.
512Office Action for U.S. Patent No. 6,216,185, mailed Aug. 25, 2000, 9 pages.
513Office Action for U.S. Patent No. 6,345,330, mailed Jun. 15, 2000, 7 pages.
514Office Action for U.S. Patent No. 6,345,330, mailed Mar. 23, 2001, 6 pages.
515Office Action for U.S. Patent No. 6,718,415, mailed Jan. 29, 2003, 7 pages.
516Office Action for U.S. Patent No. 6,718,415, mailed Oct. 10, 2002, 7 pages.
517Office Action for U.S. Patent No. 7,328,297, mailed Feb. 8, 2007, 5 pages.
518Office Action for U.S. Patent No. 7,328,297, mailed Jul. 12, 2007, 13 pages.
519Office Action for U.S. Patent No. 7,363,415, mailed on Apr. 12, 2007, 23 pages.
520Office Action for U.S. Patent No. 7,363,416, mailed Apr. 12, 2007, 23 pages.
521Office Action for U.S. Patent No. 7,376,779, mailed Sep. 28, 2007, 24 pages.
522Office Action for U.S. Patent No. 7,676,624, mailed Dec. 1, 2008, 8 pages.
523Office Action for U.S. Patent No. 7,818,487, mailed Sep. 29, 2009, 10 pages.
524Office Action for U.S. Patent. No. 6,718,415, mailed Jun. 4, 2003, 8 pages.
525Office Action for U.S. Publication No. 2010/0174844, mailed Oct. 28, 2010, 11 pages.
526Office Action in Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, mailed Jul. 27, 2010, 103 pages.
527Office Action in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, mailed May 26, 2010, 39 pages.
528Office Action in Inter Partes Reexamination of US Patent No. 7,099,981; Control No. 95/001,310, mailed Jul. 6, 2010, 83 pages.
529Office Action in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, mailed Jun. 24, 2010, 86 pages.
530Office Action in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, mailed Aug. 4, 2010, 95 pages.
531Office Action in Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, mailed Nov. 1, 2010, 75 pages.
532Office Action in Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, mailed Dec. 6, 2010, 63 pages.
533Office Action in Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, mailed Dec. 20, 2010, 105 pages.
534Origin and Onyx Theory of Operations Manual, Document No. 007-3439-002, 1997, Silicon Graphics, Inc., 124 pages.
535Origin2000 Rackmount Owner's Guide, Document No. 007-3456-003, 1997, Silicon Graphics, Inc., 146 pages.
536P6000 System Price Guide, Network Engines, Inc., Feb. 24, 1998, 9 pages.
537Parkes, S. M., "High-Speed, Low-Power, Excellent EMC: LVDS for On-Board Data Handling," Proceedings of 6th International Workshop on Digital Signal Processing Techniques for Space Applications, IEEE, Sep. 1998, 13 pages.
538Patent Owner's Comments Under 37 C.F.R. §1.95(a) in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Mar. 15, 2011, 29 pages.
539Patent Owner's Comments Under 37 C.F.R. §1.951(a) in Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, filed Mar. 15, 2011, 37 pages.
540Patent Owner's Response to Action Closing Prosecution in Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, filed May 26, 2011, 37 pages.
541Patent Owner's Response to Final Office Action in Ex Parte Reexamination of U.S. Patent No. 6,216,185, Control No. 90/010,816, filed May 3, 2011, 20 pages.
542Patent Owner's Response to Office Action in Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, filed Sep. 27, 2010, 55 pages.
543Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit A, Declaration of William Henry Mangione-Smith under 37 C.F.R. 1.132, filed Jul. 27, 2010, 29 pages.
544Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Jul. 27, 2010, 41 pages.
545Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, Exhibit A, Declaration of William Henry Mangione-Smith under 37 C.F.R. 1.132, filed Sep. 3, 2010, 63 pages.
546Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, filed Sep. 3, 2010, 52 pages.
547Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, Exhibit A, Declaration of William Henry Mangione-Smith under 37 C.F.R. 1.132, filed Sep. 3, 2010, 61 pages.
548Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Aug. 24, 2010, 45 pages.
549Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, Exhibit A, Declaration of William Henry Mangione-Smith under 37 C.F.R. 1.132, filed Oct. 4, 2010, 61 pages.
550Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Oct. 4, 2010, 49 pages.
551Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, Exhibit A, Declaration of William Henry Mangione-Smith filed Dec. 30, 2010, 63 pages.
552Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, filed Dec. 30, 2010, 45 pages.
553Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, filed Feb. 4, 2011, 43 pages.
554Patent Owner's Response to Office Action in Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, filed Feb. 18, 2011, 45 pages.
555Patent Owner's Supplemental Response to Office Action in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Apr. 12, 2011, 33 pages.
556Patent Owner's Supplemental Response to Office Action in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Apr. 12, 2011, 29 pages.
557PC Magazine, "Think Modular" (Jun. 10, 1997).
558PCI Local Bus Specification (Rev. 2.2, Dec. 1998) (322 pp.) (No. 135.pdf).
559PCI Local Bus Specification, Rev. 2.1, The PCI Special Interest Group, Jun. 1, 1995, 298 pages.
560Pentium Processor™ Network Engines™ P586 Guide, Issue 0.0.20 Preliminary, Network Engines, Inc., Nov. 10, 1997, 58 pages.
561Pentium Processor™ Network Engine™ Manual, Network Engines, Inc., undated, 56 pages.
562Petition Under 37 C.F.R. §1.181 Requesting Denial of the Petition Filed May 12, 2011 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed May 18, 2011, 8 pages.
563Petition Under 37 C.F.R. §1.181 Requesting Denial of the Petition Filed May 17, 2011 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed May 25, 2011, 8 pages.
564Petition Under 37 C.F.R. §1.181 Requesting Denial of the Petition Filed Nov. 17, 2010 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Dec. 16, 2010, 9 pages.
565Petition Under 37 C.F.R. §1.181 Requesting Denial of the Petition Filed Oct. 28, 2010 in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Nov. 12, 2010, 8 pages.
566Petition Under 37 C.F.R. §1.181 Requesting Denial of the Petition Filed Oct. 6, 2010 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Oct. 14, 2010, 8 pages.
567Petition Under 37 C.F.R. §1.181 Requesting Expungement of Third Party Comments Filed Sep. 23, 2010 in Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Oct. 28, 2010, 7 pages.
568Petition Under 37 C.F.R. §1.181 Requesting Expungement of Third Party Supplemental Comments Filed May 12, 2011 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Jul. 12, 2011, 5 pages.
569Petition Under 37 C.F.R. §1.181 Requesting Expungement of Third Party Supplemental Comments Filed May 12, 2011 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Jul. 12, 2011, 5 pages.
570Petition Under 37 C.F.R. §1.181 Requesting Return of Third Party Comments Filed Aug. 23, 2010 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Oct. 6, 2010; 7 pages.
571Petition Under 37 C.F.R. §1.181 Requesting Return of Third Party Comments Filed Nov. 2, 2010 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Nov. 17, 2010, 8 pages.
572Petition Under 37 C.F.R. §1.183 to Waive Page Limit Requirement for Third Party Requester Comments Under 37 C.F.R. §1.943(b) in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Aug. 23, 2010, 3 pages.
573Petition Under 37 C.F.R. §1.183 to Waive Page Limit Requirement for Third Party Requester Comments Under 37 C.F.R. §1.943(b) in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed May 12, 2011, 2 pages.
574Petition Under 37 C.F.R. §1.183 to Waive Page Limit Requirement for Third Party Requester Comments Under 37 C.F.R. §1.943(b) in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed May 12, 2011, 2 pages.
575Phillips, J., "9800 Auxiliary PSU Design Specification," Revision 1.00, White Cross Systems Limited, Oct. 27, 1997, 13 pages.
576Phillips, J., "9800 Disk Card Design Specification," May 26, 1998, White Cross Systems Limited, pp. 1-44.
577Phillips, J., "9800 Disk Card Layout Specification," Apr. 6, 1998, White Cross Systems Limited, pp. 1-22.
578Phillips, J., "9800 Power System Backplane Design Specification," Revision 1.00, White Cross Systems Limited, Oct. 22, 1997, 11 pages.
579Phillips, J., "9800 Processor Card Design Specification," Feb. 25, 1998, White Cross Systems Limited, pp. 1-41.
580Phillips, J., "9800 Processor Card Layout Specification," Sep. 29, 1997, White Cross Systems Limited, pp. 1-13.
581Powerstation Technologies P6000 System Guide, Powerstation Technologies, Inc., 1996, 65 pages.
582Press Release: Hiawatha, Iowa, (Mar. 1, 1997) entitled "Crystal Group Products Offer Industrial PCs with Built-in Flexibility", >, downloaded from web on May 14, 2004, 2 pgs.
583Press Release: Hiawatha, Iowa, (Mar. 1, 1997) entitled "Crystal Group Products Offer Industrial PCs with Built-in Flexibility", <<http://www.crystalpc.com/news/pressreleases/prodpr.asp>>, downloaded from web on May 14, 2004, 2 pgs.
584Press Release: Kanata, Ontario, Canada, (Apr. 1998) entitled "Enhanced COTS SBC from DY 4 Systems features 166MHz Pentium(TM) Processor" >, 2 pgs.
585Press Release: Kanata, Ontario, Canada, (Apr. 1998) entitled "Enhanced COTS SBC from DY 4 Systems features 166MHz Pentium™ Processor" <<http://www.realtime-info.be/VPR/layout/display/pr.asp?/pr.asp?PRID=363>>, 2 pgs.
586Product Brochure entitled "ERS/FT II System", (@2000) http://64.173.211.7/support/techinfo/system/ersft2/ersft2.htm, downloaded from web on Jun. 22, 2004, 4 pgs.
587Product Brochure entitled "SVME/DM-192 Pentium® II Single Board Computer" (Jun. 1999) pp. 1-9.
588Product Brochure entitled "System 8000", http://www.bomara.com/Eversys/briefDefault.htm, downloaded from web on Jun. 22, 2004, 4 pgs.
589Product Manual entitled "ERS II and ERS/FT II", Chap. 3, System Components, >, downloaded from web on Jun. 22, 2004, 21 pgs.
590Product Manual entitled "ERS II and ERS/FT II", Chap. 3, System Components, <<http://64.173.211.7/support/techinfo/manuals/ers2/ers2-c3.htm>>, downloaded from web on Jun. 22, 2004, 21 pgs.
591Product Manual entitled: "ERS II and ERS/FT II," Chap. 6, Component Installation, >, downloaded from web on Jun. 22, 2004, 18 pgs.
592Product Manual entitled: "ERS II and ERS/FT II," Chap. 6, Component Installation, <<http://64.173.211.7/support/techinfo/manuals/ers2/ers2-c6.htm>>, downloaded from web on Jun. 22, 2004, 18 pgs.
593QuantumNet, Inc., QuantumNet 6000 Sharing Modules [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19971011194326/www.quantumnet.com/dsq60xx.htm>, 3 pages.
594QuantumNet, Inc., QuantumNet 6500 Processor Modules [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: , 4 pages.
595QuantumNet, Inc., QuantumNet 6500 Processor Modules [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL:http://web.archive.org/web/19971011194317/www.quantumnet.com/ds6500.htm>, 4 pages.
596QuantumNet, Inc., QuantumNet Product Overview [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: , 1 page.
597QuantumNet, Inc., QuantumNet Product Overview [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19971011194003/www.quantumnet.com/products.htm>, 1 page.
598QuantumNet, Inc., QuantumNet: The Next Generation Computing and Networking Environment [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: , 7 pages.
599QuantumNet, Inc., QuantumNet: The Next Generation Computing and Networking Environment [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19971011194123/www.quantumnet.com/qnetovw.htm>, 7 pages.
600QuantumNet, Inc., QuantumServer Chassis [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: , 3 pages.
601QuantumNet, Inc., QuantumServer Chassis [online], 1996 [retrieved on Nov. 16, 2009], Retrieved from the Internet: <URL: http://web.archive.org/web/19971011194309/www.quantumnet.com/dsq6000.htm>, 3 pages.
602Radigan, J., "A Solution to the Power Shortage?" CFO.com, Jan. 17, 2001, [online] Retrieved from the Internet on Dec. 14, 2007, Retrieved at URL: www.cfo.com/article.cfm/2991376?f=singlepage, 3 pages.
603Redrafted Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Jul. 26, 2011, 75 pages.
604Renewed Petition Under 37 C.F.R. §1.182 Requesting Return of Third Party Comments Filed Aug. 23, 2010 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed May 12, 2011, 9 pages.
605Renewed Petition Under 37 C.F.R. §1.182 Requesting Return of Third Party Comments Filed Nov. 2, 2010 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed May 17, 2011, 8 pages.
606Reply Brief for U.S. Appl. No. 10/963,825, filed Sep. 4, 2007, 4 pages.
607Request for Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, filed Jan. 8, 2010, 39 pages.
608Request for Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, filed Jan. 8, 2010, Exhibit AA to Request Claim Charts with respect to the Hitachi '953 for Anticipation and Obviousness, 136 pages.
609Request for Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, filed Jan. 8, 2010, Exhibit BB Claim Charts with respect to Kobayashi for Anticipation and Obviousness, 128 pages.
610Request for Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, filed Jan. 8, 2010, Exhibit CC Claim Charts with respect to Byte for Anticipation and Obviousness, 122 pages.
611Request for Ex Parte Reexamination of US Patent No. 6,216,185, Control No. 90/010,816, filed Jan. 8, 2010, Exhibit DD Claim Charts with respect to the Hitachi '675 for Anticipation and Obviousness, 119 pages.
612Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Dec. 2, 2009, 44 pages.
613Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Dec. 2, 2009, Exhibit O, Declaration Under 37 CFR 1.132 of Vincent P. Conroy, Nov. 24, 2009, 3 pages.
614Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Replacement Exhibit AA, Claim Charts with respect to QuantumNet for Anticipation and Obviousness, filed Jan. 5, 2010, 109 pages.
615Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Replacement Exhibit BB, Claim Charts with respect to Chatcom for Anticipation and Obviousness, filed Jan. 5, 2010, 91 pages.
616Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Replacement Exhibit CC, Claim Charts with respect to QuantumNet for Anticipation and Obviousness, filed Jan. 5, 2010, 85 pages.
617Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Replacement Exhibit DD, Claim Charts with respect to the Origin2000 Manual for Obviousness, filed Jan. 5, 2010, 72 pages.
618Request for Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Replacement Exhibit EE, Claim Charts with respect to Gallagher for Anticipation and Obviousness, filed Jan. 5, 2010, 107 pages.
619Request for Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, Exhibit AA, Claim Charts with respect to Gallagher for Anticipation and Obviousness, filed Feb. 9, 2010, 164 pages.
620Request for Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, Exhibit BB, Claim Charts with respect to QuantumNet for Anticipation and Obviousness, filed Feb. 9, 2010, 158 pages.
621Request for Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, Exhibit CC, Claim Charts with respect to Chatcom for Anticipation and Obviousness, filed Feb. 9, 2010, 167 pages.
622Request for Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, Exhibit DD, Claim Charts with respect to the Eversys for Obviousness, filed Feb. 9, 2010, 111 pages.
623Request for Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, filed Dec. 2, 2009, Exhibit O, Declaration Under 37 CFR 1.132 of Vincent P. Conroy, Nov. 24, 2009, 3 pages.
624Request for Inter Partes Reexamination of US Patent No. 7,099,981, Control No. 95/001,310, filed Feb. 9, 2010, 33 pages.
625Request for Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, Exhibit AA (Part 1), Claim Charts with respect to Gallagher for Anticipation and Obviousness, filed Mar. 19, 2010, 186 pages.
626Request for Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, Exhibit AA (Part 2), Claim Charts with respect to Gallagher for Anticipation and Obviousness, filed Mar. 19, 2010, 161 pages.
627Request for Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, Exhibit BB (Part 1), Claim Charts with respect to QuantumNet for Anticipation and Obviousness, filed Mar. 19, 2010, 139 pages.
628Request for Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, Exhibit BB (Part 2), Claim Charts with respect to QuantumNet for Anticipation and Obviousness, filed Mar. 19, 2010, 128 pages.
629Request for Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, Exhibit CC, Claim Charts with respect to Chatcom for Anticipation and Obviousness, filed Mar. 19, 2010, 68 pages.
630Request for Inter Partes Reexamination of US Patent No. 7,146,446, Control No. 95/001,328, filed Mar. 19, 2010, 35 pages.
631Request for Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, Exhibit BB, Claim Charts with respect to QuantumNet for Obviousness, filed Apr. 19, 2010, 139 pages.
632Request for Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, Exhibit CC, Claim Charts with respect to Chatcom for Obviousness, filed Apr. 19, 2010, 114 pages.
633Request for Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Apr. 19, 2010, 33 pages.
634Request for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, Exhibit AB, Claim Charts with respect to Gallagher and Other References for Obviousness, filed Aug. 25, 2010, 92 pages.
635Request for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, Exhibit BA, Claim Charts with respect to QuantumNet and Other References for Obviousness, filed Aug. 25, 2010, 121 pages.
636Request for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, Exhibit CA, Claim Charts with respect to Chatcom and Other References for Obviousness, filed Aug. 25, 2010, 91 pages.
637Request for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, Exhibit CB, Claim Charts with respect to Chatcom and Other References for Obviousness, filed Aug. 25, 2010, 94 pages.
638Request for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, filed Aug. 25, 2010, 34 pages.
639Request for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424; Exhibit AA, Claim Charts with respect to Gallagher and Other References for Obviousness, filed Aug. 25, 2010, 114 pages.
640Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, Exhibit AA, Claim Charts with respect to Gallagher and Other References for Obviousness, filed Oct. 27, 2010, 70 pages.
641Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, Exhibit AB, Claim Charts with respect to Gallagher and Other References for Obviousness, filed Oct. 27, 2010, 64 pages.
642Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, Exhibit BA, Claim Charts with respect to QuantumNet and Other References for Obviousness, filed Oct. 27, 2010, 64 pages.
643Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, Exhibit BB, Claim Charts with respect to QuantumNet and Other References for Obviousness, filed Oct. 27, 2010, 71 pages.
644Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, Exhibit CA, Claim Charts with respect to Chatcom and Other References for Obviousness, filed Oct. 27, 2010, 64 pages.
645Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, Exhibit CB, Claim Charts with respect to Chatcom and Other References for Obviousness, filed Oct. 27, 2010, 67 pages.
646Request for Inter Partes Reexamination of US Patent No. 7,363,416, Control No. 95/001,476, filed Oct. 27, 2010, 37 pages.
647Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, Exhibit AA, Claim Charts with respect to Gallagher and Other References for Obviousness, filed Oct. 27, 2010, 128 pages.
648Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, Exhibit AB, Claim Charts with respect to Gallagher and Other References for Obviousness, filed Oct. 27, 2010, 153 pages.
649Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, Exhibit BA, Claim Charts with respect to QuantumNet and Other References for Obviousness, filed Oct. 27, 2010, 108 pages.
650Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, Exhibit BB, Claim Charts with respect to QuantumNet and Other References for Obviousness, filed Oct. 27, 2010, 112 pages.
651Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, Exhibit CA, Claim Charts with respect to Chatcom and Other References for Obviousness, filed Oct. 27, 2010, 112 pages.
652Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, Exhibit CB, Claim Charts with respect to Chatcom and Other References for Obviousness, filed Oct. 27, 2010, 118 pages.
653Request for Inter Partes Reexamination of US Patent No. 7,376,779, Control No. 95/001,475, filed Oct. 27, 2010, 35 pages.
654Request for Inter Partes Reexamination of US. Patent No. 7,328,297, Control No. 95/001,336, Exhibit AA, Claim Charts with respect to Gallagher for Obviousness, filed Apr. 19, 2010, 131 pages.
655Requst for Inter Partes Reexamination of US Patent No. 7,363,415, Control No. 95/001,424, Exhibit BB, Claim Charts with respect to QuantumNet and Other References for Obviousness, filed Aug. 25, 2010, 99 pages.
656Response for RE 41,076, filed Apr. 7, 2008, 18 pages.
657Response for RE 41,076, filed Jan. 16, 2009, 14 pages.
658Response for RE 41,076, filed Sep. 26, 2007, 18 pages.
659Response for RE 41,092, filed Oct. 27, 2008, 27 pages.
660Response for RE 41,294, filed Dec. 20, 2007, 21 pages.
661Response for RE 41,294, filed Oct. 30, 2008, 14 pages.
662Response for U.S. Appl. No. 09/312,199, filed Jun. 11, 2003, 5 pages.
663Response for U.S. Appl. No. 10/963,825, filed Jan. 9, 2006, 22 pages.
664Response for U.S. Appl. No. 10/963,825, filed May 22, 2009, 2 pages.
665Response for U.S. Appl. No. 10/963,825, filed Oct. 1, 2009, 7 pages.
666Response for U.S. Appl. No. 11/545,056, filed Jun. 14, 2010, 18 pages.
667Response for U.S. Appl. No. 12/322,858, filed Jun. 4, 2010, 15 pages.
668Response for U.S. Appl. No. 12/322,858, filed May 3, 2011, 20 pages.
669Response for U.S. Appl. No. 12/322,858, filed Oct. 25, 2010, 12 pages.
670Response for U.S. Appl. No. 12/561,138, filed Jan. 31, 2011, 19 pages.
671Response for U.S. Appl. No. 12/577,074, filed Jul. 13, 2010, 3 pages.
672Response for U.S. Patent No. 6,216,185, filed Aug. 3, 2000, 15 pages.
673Response for U.S. Patent No. 6,216,185, filed Oct. 24, 2000, 10 pages.
674Response for U.S. Patent No. 6,718,415, filed Mar. 6, 2003, 8 pages.
675Response for U.S. Patent No. 6,718,415, filed Nov. 7, 2002, 9 pages.
676Response for U.S. Patent No. 6,718,415, filed Sep. 4, 2003, 10 pages.
677Response for U.S. Patent No. 7,328,297, filed Apr. 19, 2007, 32 pages.
678Response for U.S. Patent No. 7,328,297, filed Jul. 23, 2007, 20 pages.
679Response for U.S. Patent No. 7,363,415, filed on Apr. 24, 2007, 25 pages.
680Response for U.S. Patent No. 7,363,416, filed Apr. 24, 2007, 23 pages.
681Response for U.S. Patent No. 7,376,779, filed Oct. 16, 2007, 23 pages.
682Response for U.S. Patent No. 7,676,624, filed Jan. 13, 2009, 14 pages.
683Response for U.S. Patent No. 7,818,487, filed Nov. 6, 2009, 3 pages.
684Response Submitted with RCE for U.S. Appl. No. 12/561,138, filed Jun. 17, 2011, 30 pages.
685Response to Office Action for U.S. Patent No. 6,345,330, filed Jul. 19, 2001, 5 pages.
686Restriction Requirement for U.S. Patent No. 6,345,330, mailed Dec. 19, 2000, 5 pages.
687Resubmission of Patent Owner's Response to Final Office Action in Ex Parte Reexamination of U.S. Patent No. 6,216,185, Control No. 90/010,816, filed Jun. 2, 2011, 20 pages.
688Revised Appellants' Brief for U.S. Appl. No. 10/963,825, filed Apr. 20, 2007, 34 pages.
689Rick Boyd-Merritt, "Ungradeable-PC effort takes divergent paths", http://techweb.cmp.com/eet/news/97/949news.effort.html.
690Rick Boyd-Merritt, "Upgradable-PC effort takes divergent paths", http://techweb.cmp.com/eet/news/97/949news/effort.html.
691RLX Blade, RLX Technologies, 2001, 2 pages.
692RLX System 324 Hardware Installation Guide, RLX Technologies, Inc., 2001, 80 pages.
693RLX System 324 Platform Guide: RLX Linux Web Server, RLX Technologies, Inc., 2001, 73 pages.
694RLX System 324 Platform Guide—Windows Powered Web Server—Online, undated, 39 pages.
695RLX System 324 Technical Guide: RLX Control Tower Backup/Restore, Draft, RLX Techologies, May 18, 2001, 8 pages.
696RLX System 324 Technical Guide: RLX Control Tower SNMP Implementation, RLX Techologies, 2001, 32 pages.
697RLX System 324 Technical Guide: RLX Control Tower SNMP Implementation, Supplementary Document, Draft, RLX Techologies, May 26, 2001, 48 pages.
698RLX Technologies Presentation, RLX Technologies, Inc., Apr. 27, 2001, 44 pages.
699RLX Technologies Presentation, RLX Technologies, Inc., Apr. 27, 2001, 53 pages. Plus Additional photos of RLX products.
700RocketLogix Presentation, RocketLogix, Inc., Apr. 6, 2000, 84 pages.
701Rodgers, A., "NT Clustering Hardware Readied, Vendor Racks up Windows NT Clustering Options at NetWorld+Interop," Internetweek, Oct. 20, 1997, 1 page.
702Rosencrance, L., "IBM agrees to resell RLX high-density servers," Computerworld, May 8, 2001, retrieved from the Internet on Jul. 25, 2001, Retrieved at URL: www.itworld.com/Comp/1362/CWD010508STO60353/pfindex.html, 3 pages.
703San Jose Mercury News, "Business & Stocks—Top Stories from the Mercury News," Jun. 28, 2001, [online], [retrieved on Jun. 30, 2001], Retrieved from the Internet at <URL: http://www0.mercurycenter.com/premium/business/docs—technews28.htm>, 5 pages.
704Silicon Graphics International, "Additional Information for: IRIS FailSafe Administrator's Guide (IRIX 6.4)," [online], Document No. 007-3109-003, Published Apr. 6, 1997, [retrieved on Nov. 5, 2009], Retrieved from the Internet: <URL: http://techpubs.sgi.com/library/tpl/cgi-bin/summary.cgi?coll=0640&db=bks&docnumber=...>, 2 pages.
705Smith, B., "Processor Backplane Design Specification," Feb. 3, 1998, White Cross Systems Limited, pp. 1-16.
706Smith, B., "Processor Backplane Layout Specification," Nov. 12, 1997, White Cross Systems Limited, pp. 1-7.
707Smith, B., Processor Backplane Functional Requirement Specification, Jul. 31, 1997, White Cross Systems Limited, pp. 1- 11.
708Snyder, J., "Better Management through consolidation" pp. 1-6 downloaded from the internet at http://www.opus1.com/www/jms/nw-con-0818rev.html.
709Spang, "Component House: Design Technology for ‘PCs in a snap’—NeoSystems Offers Building Blocks" Techweb (Apr. 21, 1997:732).
710Spring, T., "Top of the News—Broadband Users Still Sing the Blues," PC World, Jun. 2001, pp. 42-54, 13 pages.
711Stallings, W., "Computer Organization and Architecture—Designing for Performance," Sixth Edition, Pearson Education, Inc., 2003, pp. 69-89.
712Sun Microsystems Computer Company, "Sun™ Enterprise™ 250 Server Owner's Guide," Jun. 1998, Part No. 805-5160-10, Revision A, 324 pages.
713Sun Microsystems, Inc., "UltraSPARC™ II CPU Module, Datasheet 400 MHz CPU, 2.0 MP E-Cache," Jul. 1999, 28 pages.
714Sun Microsystems, Inc., White Paper, "Netra™ ft 1800," Apr. 1999, Revision 09, 50 pages.
715Supplemental Amendment Submitted with RCE for RE 41,294, filed Jul. 8, 2008, 12 pages.
716Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit AA-2: Claim Charts with respect to QuantumNet, filed May 12, 2011, 120 pages.
717Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit BB-2: Claim Charts with respect to Chatcom, filed May 12, 2011, 94 pages.
718Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit CC-2: Claim Charts with respect to Eversys, filed May 12, 2011, 165 pages.
719Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit DD-2: Claim Charts with respect to Origin2000 Manual, filed May 12, 2011, 108 pages.
720Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, Exhibit EE-2: Claim Charts with respect to Gallagher, filed May 12, 2011, 91 pages.
721Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed May 12, 2011, 45 pages.
722Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, Exhibit AA-1: Claim Charts with Respect to Gallagher, filed May 12, 2011, 38 pages.
723Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, Exhibit BB-1: Claim Charts with Respect to QuantumNet, filed May 12, 2011, 59 pages.
724Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, Exhibit CC-1: Claim Charts with Respect to Chatcom, filed May 12, 2011, 38 pages.
725Supplemental Comments by Third Party Requester Pursuant to 37 C.F.R. §1.947 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed May 12, 2011, 32 pages.
726Supplemental Response for RE 41,294, filed Aug. 17, 2009, 3 pages.
727Supplemental Response for RE 41,294, filed Feb. 20, 2009, 13 pages.
728Supplemental Response for U.S. Patent No. 7,676,624, filed on Feb. 6, 2009, 13 pages.
729System 8000 Web Product Brief, Eversys Corporation, [retrieved on Oct. 22, 2009], Retrieved from the Internet: <URL: http://www.web.archive.org/web/1997052509465/www.eversys.com/Products/S8000/Brief/Index/htm, 6 pages.
730System 8000, Consolidated Network Server, Product Brief, Eversys Corporation, undated, 2 pages.
731System 8000, Consolidated Server, Presentation, Eversys Corporation, undated, 23 pages.
732The American Heritage Dictionary, pp. 536, 607 and 770, Dell Publishing, 1994, 5 pages.
733The New IEEE Standard Dictionary of Electrical and Electronics Terms, Fifth Ed., p. 1236, The Institute of Electrical and Electronics Engineers, Inc., 1993, 3 pages.
734Third-Party Requester's Petition Requesting Denial of Entry of the Patent Owner's Supplemental Response Filed Apr. 12, 2011 to Office Action Mailed Aug. 4, 2010 in Inter Partes Reexamination of US Patent No. 7,328,297, Control No. 95/001,336, filed Apr. 26, 2011, 3 pages.
735Third-Party Requester's Petition Requesting Denial of Entry of the Patent Owner's Supplemental Response Filed Apr. 12, 2011, to Office Action Mailed Aug. 4, 2010 in Inter Partes Reexamination of US Patent No. 6,718,415, Control No. 95/001,276, filed Apr. 26, 2011, 3 pages.
736Thoms, I., "IBM Hit with $9M Judgment in Server Patent Suit," Law360 [online], [retrieved on May 3, 2011], Retrieved from the Internet at <URL: http://www.law360.com/articles/229575/print?section=ip>, 2 pages.
737TIA/EIA (644) Standard Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits (Mar. 1996) (42 pp) (No. 118c.pdf).
738Video Electronics Standards Association (VESA), Plug and Display (P&D) Standard, P&D and Digital Transition Minimized Differential Signaling (TMDS) Video Transmission Overview, 1997, Version 1, Revision 0, pp. 13 & 31-34.
739Whitecross Data Exploration Configuration and Maintenance Manual. Draft. (Jul 2000) (699 pp.) (No. 26e.pdf).
740Whitecross WX-DES Hardware Maintenance (2000) (284 pp) (No. 26g.pdf).
741Whitecross WX-DES Technical Overview (2000) (211 pp) (No. 26h.pdf).
742Williams, Dennis "EVERSYS Corp. System 8000", Feb. 17, 1997) http://www.lantimes.com/testing/97feb/702b070b.html, downloaded from web on Jun. 22, 2004, 4 pgs.
743Williams, Dennis, "ChatCom Inc. Chatterbox", (Feb. 17, 1997) http://www.lantimes.com/testing/97feb/702b066a.html,downloaded from web on Jun. 23, 2004, 3 pgs.
744Williams, Dennis, "Consolidated Servers", (Feb. 17, 1997) http://www.lantimes.com/testing/97compare/pcconsol.html, downloaded from web on Jun. 23, 2004, 2 pgs.
745Williams, Dennis, "Cubix Corp. ERS/FT II", (Feb. 17, 1997) http://www.lantimes.com/testing/97feb/702b068b.html, downloaded from web on Jun. 23, 2004, 4 pgs.
746Williams, Dennis, "Executive Summary: Consolidate Now", (Feb. 17, 1997) htttp://ww.lantimes.com/testing/97feb/702b064a.html, downloaded from web on Jun. 23, 2004, 2 pgs.
747Williams, Dennis, "Top Scores for Useability and Openness", (Feb. 17, 1997) > downloaded from web on Jun. 23, 2004, 2 pgs.
748Williams, Dennis, "Top Scores for Useability and Openness", (Feb. 17, 1997) <<http://www.lantimes.com/testing/97feb/702b064a.html>> downloaded from web on Jun. 23, 2004, 2 pgs.
749Windows Magazine, "Cubix PowerSMP Series 4000", Nov. 1997, http://www.techweb.com/winmag/library/1997/1101/ntent008.htm, downloaded from the web on Jun. 22, 2004, p. NT07.
750Wolfpack or Microsoft Cluster Services on STAR System, (undated), 3 pgs.
751World Wide System Price Guide, Network Engines, Inc., Sep. 26, 1997, 10 pages.
752Ziatech Corp. Industrial BIOS for CompacktPCI and STD 32 Systems Software Manual (Jul. 1998) (134 pp) No. 19h.pdf) .
753Ziatech Corp. Press Release (Feb. 1996) (2 pp.) (No. 19i.pdf).
754Ziatech Corp. System Designer's Guide: Hot Swap Capability on STD 32 Computers (Jan. 1996) (6 pp) (No. 19e.pdf).
755Ziatech Corp. ZT 8907 Product Description (1998) (4 pp) (No. 19b.pdf).
756Ziatech Corp. ZT 8908 Product Description (1998)+A249 (6 pp) (No. 19c.pdf).
757Ziatech Corp.System Designers Guide: Expanding STD Bus Performance Through Multiprocessing. (Apr. 1996) (6 pp.) (No. 19d.pdf).
758Ziatech Corporation, "New STD 32 Fault Tolerant Computer Provides Modular Platform for ‘Non-Stop’ Applications," Feb. 5, 1996, 2 pgs.
759Ziatech Corporation, STD 32 zVID2 Local Bus Super VGA/FPD Adapter, Apr. 1996, 2 pgs.
760Ziatech Corporation-Ketris9000 Product Manual (2000) (159 pp.) (No. 18.pdf).
761Ziatech Corporation—Ketris9000 Product Manual (2000) (159 pp.) (No. 18.pdf).
762Ziatech, STD 32 Star System Product Description(6 pp) (No. 19a.pdf).
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Classifications
U.S. Classification713/193, 726/18, 726/28, 710/301, 726/9
International ClassificationG06F21/00, G06F1/16, H04L9/00
Cooperative ClassificationG06F21/34, G06F1/181, G06F1/16, G06F21/88, G06F1/1613, G06F1/18
European ClassificationG06F1/18E, G06F1/18, G06F1/16P, G06F1/16, G06F21/34, G06F21/88
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Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CHU, WILLIAM W.Y.;REEL/FRAME:025013/0829
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