USRE39426E1 - Thermally enhanced flip chip package and method of forming - Google Patents
Thermally enhanced flip chip package and method of forming Download PDFInfo
- Publication number
- USRE39426E1 USRE39426E1 US09/379,985 US37998599A USRE39426E US RE39426 E1 USRE39426 E1 US RE39426E1 US 37998599 A US37998599 A US 37998599A US RE39426 E USRE39426 E US RE39426E
- Authority
- US
- United States
- Prior art keywords
- flip chip
- thermally conductive
- planar member
- substrate
- chip package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000003989 dielectric material Substances 0.000 claims abstract description 14
- 238000004891 communication Methods 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims description 7
- 239000000853 adhesive Substances 0.000 claims description 6
- 230000001070 adhesive effect Effects 0.000 claims description 6
- 239000004519 grease Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005382 thermal cycling Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/379,985 USRE39426E1 (en) | 1996-06-19 | 1999-08-24 | Thermally enhanced flip chip package and method of forming |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US66615596A | 1996-06-19 | 1996-06-19 | |
US08/715,212 US5726079A (en) | 1996-06-19 | 1996-09-17 | Thermally enhanced flip chip package and method of forming |
US09/379,985 USRE39426E1 (en) | 1996-06-19 | 1999-08-24 | Thermally enhanced flip chip package and method of forming |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/715,212 Reissue US5726079A (en) | 1996-06-19 | 1996-09-17 | Thermally enhanced flip chip package and method of forming |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE39426E1 true USRE39426E1 (en) | 2006-12-12 |
Family
ID=27099394
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/379,985 Expired - Lifetime USRE39426E1 (en) | 1996-06-19 | 1999-08-24 | Thermally enhanced flip chip package and method of forming |
Country Status (1)
Country | Link |
---|---|
US (1) | USRE39426E1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090218703A1 (en) * | 2008-02-29 | 2009-09-03 | Soo Gil Park | Lamination Tape for Reducing Chip Warpage and Semiconductor Device Containing Such Tape |
US20140335655A1 (en) * | 2008-09-27 | 2014-11-13 | Rui Huang | Integrated circuit package system with mounting structure |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5289346A (en) * | 1991-02-26 | 1994-02-22 | Microelectronics And Computer Technology Corporation | Peripheral to area adapter with protective bumper for an integrated circuit chip |
US5359768A (en) * | 1992-07-30 | 1994-11-01 | Intel Corporation | Method for mounting very small integrated circuit package on PCB |
US5404273A (en) | 1993-03-23 | 1995-04-04 | Shinko Electric Industries Co., Ltd. | Semiconductor-device package and semiconductor device |
US5405809A (en) * | 1992-10-02 | 1995-04-11 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device, an image sensor device, and methods for producing the same |
US5410451A (en) * | 1993-12-20 | 1995-04-25 | Lsi Logic Corporation | Location and standoff pins for chip on tape |
JPH07202064A (en) | 1993-12-28 | 1995-08-04 | Toshiba Corp | Semiconductor device |
US5471027A (en) * | 1994-07-22 | 1995-11-28 | International Business Machines Corporation | Method for forming chip carrier with a single protective encapsulant |
JPH07321248A (en) | 1994-05-26 | 1995-12-08 | Nec Corp | Ball grid array semiconductor device and manufacture thereof |
US5490324A (en) * | 1993-09-15 | 1996-02-13 | Lsi Logic Corporation | Method of making integrated circuit package having multiple bonding tiers |
US5510956A (en) | 1993-11-24 | 1996-04-23 | Fujitsu Limited | Electronic part unit or assembly having a plurality of electronic parts enclosed within a metal enclosure member mounted on a wiring layer |
US5625226A (en) | 1994-09-19 | 1997-04-29 | International Rectifier Corporation | Surface mount package with improved heat transfer |
US5672548A (en) | 1994-07-11 | 1997-09-30 | International Business Machines Corporation | Method for attaching heat sinks directly to chip carrier modules using flexible-epoxy |
-
1999
- 1999-08-24 US US09/379,985 patent/USRE39426E1/en not_active Expired - Lifetime
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5289346A (en) * | 1991-02-26 | 1994-02-22 | Microelectronics And Computer Technology Corporation | Peripheral to area adapter with protective bumper for an integrated circuit chip |
US5359768A (en) * | 1992-07-30 | 1994-11-01 | Intel Corporation | Method for mounting very small integrated circuit package on PCB |
US5405809A (en) * | 1992-10-02 | 1995-04-11 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device, an image sensor device, and methods for producing the same |
US5404273A (en) | 1993-03-23 | 1995-04-04 | Shinko Electric Industries Co., Ltd. | Semiconductor-device package and semiconductor device |
US5490324A (en) * | 1993-09-15 | 1996-02-13 | Lsi Logic Corporation | Method of making integrated circuit package having multiple bonding tiers |
US5510956A (en) | 1993-11-24 | 1996-04-23 | Fujitsu Limited | Electronic part unit or assembly having a plurality of electronic parts enclosed within a metal enclosure member mounted on a wiring layer |
US5410451A (en) * | 1993-12-20 | 1995-04-25 | Lsi Logic Corporation | Location and standoff pins for chip on tape |
JPH07202064A (en) | 1993-12-28 | 1995-08-04 | Toshiba Corp | Semiconductor device |
US5619070A (en) | 1993-12-28 | 1997-04-08 | Kabushiki Kaisha Toshiba | Semiconductor device which radiates heat and applies substrate potential from rear surface of semiconductor chip |
JPH07321248A (en) | 1994-05-26 | 1995-12-08 | Nec Corp | Ball grid array semiconductor device and manufacture thereof |
US5989940A (en) * | 1994-05-26 | 1999-11-23 | Nec Corporation | Semiconductor device capable of accomplishing a high moisture proof |
US5672548A (en) | 1994-07-11 | 1997-09-30 | International Business Machines Corporation | Method for attaching heat sinks directly to chip carrier modules using flexible-epoxy |
US5471027A (en) * | 1994-07-22 | 1995-11-28 | International Business Machines Corporation | Method for forming chip carrier with a single protective encapsulant |
US5625226A (en) | 1994-09-19 | 1997-04-29 | International Rectifier Corporation | Surface mount package with improved heat transfer |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090218703A1 (en) * | 2008-02-29 | 2009-09-03 | Soo Gil Park | Lamination Tape for Reducing Chip Warpage and Semiconductor Device Containing Such Tape |
US20140335655A1 (en) * | 2008-09-27 | 2014-11-13 | Rui Huang | Integrated circuit package system with mounting structure |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES U.S. 2 LLC, NEW YORK Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INTERNATIONAL BUSINESS MACHINES CORPORATION;REEL/FRAME:036550/0001 Effective date: 20150629 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES INC., CAYMAN ISLANDS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GLOBALFOUNDRIES U.S. 2 LLC;GLOBALFOUNDRIES U.S. INC.;REEL/FRAME:036779/0001 Effective date: 20150910 |
|
AS | Assignment |
Owner name: WILMINGTON TRUST, NATIONAL ASSOCIATION, DELAWARE Free format text: SECURITY AGREEMENT;ASSIGNOR:GLOBALFOUNDRIES INC.;REEL/FRAME:049490/0001 Effective date: 20181127 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES INC., CAYMAN ISLANDS Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:WILMINGTON TRUST, NATIONAL ASSOCIATION;REEL/FRAME:054636/0001 Effective date: 20201117 |
|
AS | Assignment |
Owner name: GLOBALFOUNDRIES U.S. INC., NEW YORK Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:WILMINGTON TRUST, NATIONAL ASSOCIATION;REEL/FRAME:056987/0001 Effective date: 20201117 |