US7994626B2 - Multi-layer semiconductor package with vertical connectors and method of manufacture thereof - Google Patents
Multi-layer semiconductor package with vertical connectors and method of manufacture thereof Download PDFInfo
- Publication number
- US7994626B2 US7994626B2 US12/559,432 US55943209A US7994626B2 US 7994626 B2 US7994626 B2 US 7994626B2 US 55943209 A US55943209 A US 55943209A US 7994626 B2 US7994626 B2 US 7994626B2
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- substrate
- die
- major planar
- planar surface
- semiconductor package
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Combinations Of Printed Boards (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (34)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/559,432 US7994626B2 (en) | 2006-12-07 | 2009-09-14 | Multi-layer semiconductor package with vertical connectors and method of manufacture thereof |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/608,164 US7608921B2 (en) | 2006-12-07 | 2006-12-07 | Multi-layer semiconductor package |
US12/559,432 US7994626B2 (en) | 2006-12-07 | 2009-09-14 | Multi-layer semiconductor package with vertical connectors and method of manufacture thereof |
Related Parent Applications (1)
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US10361177B2 (en) | 2017-08-28 | 2019-07-23 | Samsung Electronics Co., Ltd | Semiconductor package having a molding layer including a molding cavity and method of fabricating the same |
TWI838944B (en) | 2017-09-15 | 2024-04-11 | 新加坡商星科金朋私人有限公司 | Semiconductor device and method of forming embedded die substrate, and system-in-package modules with the same |
US10867974B2 (en) | 2018-07-03 | 2020-12-15 | Samsung Electronics Co., Ltd. | Semiconductor package and method of fabricating the same |
US11101253B2 (en) | 2018-07-03 | 2021-08-24 | Samsung Electronics Co., Ltd. | Semiconductor package |
US11862570B2 (en) | 2020-04-10 | 2024-01-02 | Samsung Electronics Co., Ltd. | Semiconductor package |
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TWI366910B (en) | 2012-06-21 |
JP5620956B2 (en) | 2014-11-05 |
JP5383024B2 (en) | 2014-01-08 |
TWI495082B (en) | 2015-08-01 |
US20100007002A1 (en) | 2010-01-14 |
US7608921B2 (en) | 2009-10-27 |
KR101517541B1 (en) | 2015-05-04 |
JP2008147628A (en) | 2008-06-26 |
JP2012235170A (en) | 2012-11-29 |
US20080136003A1 (en) | 2008-06-12 |
KR20080052482A (en) | 2008-06-11 |
TW201130110A (en) | 2011-09-01 |
TW200828563A (en) | 2008-07-01 |
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