US6732262B1 - Method and system for controlling reset of IEEE 1394 network - Google Patents
Method and system for controlling reset of IEEE 1394 network Download PDFInfo
- Publication number
- US6732262B1 US6732262B1 US09/551,572 US55157200A US6732262B1 US 6732262 B1 US6732262 B1 US 6732262B1 US 55157200 A US55157200 A US 55157200A US 6732262 B1 US6732262 B1 US 6732262B1
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- United States
- Prior art keywords
- network
- communication
- completion
- node
- control circuit
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/64—Hybrid switching systems
- H04L12/6418—Hybrid transport
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40078—Bus configuration
Definitions
- the present invention relates to a method and system for controlling a network, and more particularly, to a method and system for a network having an IEEE 1394 hot plugging function.
- a data communication system having an interface that complies with the IEEE 1394 standard includes a hot plugging function which permits new devices to be connected to an already active network. When a new device is connected, the system automatically reconfigures the network to recognize the new device.
- a personal computer and peripheral equipment such as a digital video camera and a color page printer, are each provided with an interface controller for transferring data in compliance with the IEEE 1394 standard.
- an interface controller detects the connection of a new node (device) to its port (socket)
- the controller provides a reset command to each of the nodes in the network.
- the interface controller of each of the nodes connected to the network remaps the network configuration (topology), consequently reconfiguring the network.
- FIG. 1 illustrates an example of a network formed by a plurality of nodes 1 - 4 . If a node 5 is newly connected to the node 1 while data is being transferred between the nodes 2 , 4 , the node 1 detects the connection of the node 5 and provides a reset command to each of the nodes 2 - 5 . This resets all of the nodes 1 - 5 and interrupts and stops the data transfer occurring between the nodes 2 and 4 .
- data is transferred by a plurality of packets in an interface complying with the IEEE 1394 standard.
- all of the data packets are transferred again upon restarting. This is because the receipt of the data packets which were interrupted during transfer cannot be confirmed. As a result, the transfer of data packets must be performed once more from the beginning.
- the present invention provides a method for controlling a network having a configuration including a plurality of nodes.
- the method includes the steps of recognizing the connection of a new node to the network, determining whether a communication is being performed in the network prior to the recognizing step, completing the communication, and reconfiguring the network, which includes the new node, subsequent to completion of the communication based on the determination result.
- a further aspect of the present invention provides a method for controlling a network having a configuration including a plurality of nodes.
- the method includes the steps of recognizing the connection of a new node to the network, determining whether communication is being performed in the network, interrupting the communication based on the determination result, reconfiguring the network including the new node, and restarting the interrupted communication.
- Another aspect of the present invention provides an apparatus for controlling a network having a configuration including a plurality of nodes.
- the system includes a data transfer determination circuit for determining whether communication is being performed in the network.
- a reset control circuit connected to the determination circuit, recognizes the connection of a new node to the network and reconfigures the network to include the new node, subsequent to completion of the communication based on the determination result of the data transfer determination circuit.
- a further aspect of the present invention provides an apparatus for controlling a network having a configuration including a plurality of nodes.
- the system includes a data transfer determination circuit for determining whether communication is being performed in the network.
- a reset control circuit connected to the determination circuit, recognizes the connection of a new node to the network and interrupts the communication based on the determination result of the data transfer determination circuit, reconfigures the network, which includes the new node, subsequent to the interruption of the communication, and restarts the interrupted communication.
- FIG. 1 is a schematic diagram showing a typical network
- FIG. 2 is a schematic diagram showing a network configured with IEEE 1394 buses
- FIG. 3 is a schematic block diagram showing a network device
- FIG. 4 is a schematic block diagram showing a protocol controller, which is used in the device of FIG. 3, according to a first embodiment of the present invention
- FIG. 5 is a flowchart illustrating the bus reset control performed by the protocol controller of FIG. 4;
- FIG. 6 is a schematic diagram showing a network to describe the bus reset control
- FIG. 7 is a schematic diagram showing a temporary network and an existing network
- FIG. 8 is a schematic block diagram showing a protocol controller according to a second embodiment of the present invention.
- FIG. 9 is a flowchart illustrating the bus reset control performed by the protocol controller of FIG. 8.
- FIG. 10 is a diagram for describing packet communication.
- FIG. 2 is a schematic diagram showing a network using serial interfaces that comply with the IEEE 1394 standard.
- the network includes personal computers 11 , 12 , a digital VTR 13 , and a printer 14 , which are connected to one another with IEEE 1394 bus cables (hereafter referred to as IEEE 1394 buses) 15 .
- the personal computers 11 , 12 , the digital VTR 13 , and the printer 14 each have an IEEE 1394 protocol controller, which transfers data in compliance with the IEEE 1394 standard and serves as an interface controller.
- a video camera 16 and a hard disk 17 each have an IEEE 1394 protocol controller and are also connected to the network with IEEE 1394 buses 15 .
- the protocol controller of each system functions as a node of the network.
- FIG. 3 is a schematic block diagram showing the personal computer 11 .
- the personal computer 11 includes an IEEE 1394 protocol controller (hereafter referred to as IPC) 21 and a microprocessing unit (hereafter referred to as MPU) 22 .
- IPC IEEE 1394 protocol controller
- MPU microprocessing unit
- FIG. 4 is a schematic block diagram showing the IPC 21 .
- the IPC 21 has three ports 31 a , 31 b , 31 c , a 1394 driver/receiver 32 , a data transfer determination circuit 33 , a reset control circuit 34 , an existing network information retaining circuit 35 , and a time counter 36 .
- the driver/receiver 32 receives data from other devices (nodes) via the ports 31 a - 31 c and determines whether the data is addressed to it. If the data is addressed to it, the driver/receiver 32 provides the data to the MPU 22 . The driver/receiver 32 also transfers the data received from the MPU 22 to the other nodes via the ports 31 a - 31 c . If the received data is not addressed to it, the driver/receiver 32 transfers the data to the other nodes via ports other than the port through which the data was received.
- the driver/receiver 32 monitors the connections at the ports 31 a - 31 c and provides a monitor signal S 1 , which indicates a change in the topology, to the reset control circuit 34 when a new device is connected to the ports 31 a - 31 c or when a device is disconnected from the ports 31 a - 31 c . Further, the driver/receiver 32 provides a bus reset signal S 5 to the reset control circuit 34 upon receipt of a bus reset signal from one of the other nodes.
- the data transfer determination circuit 33 determines whether its node is in the process of communication (busy) based on the state of the driver/receiver 32 and provides a determination signal S 2 to the reset control circuit 34 . Further, the data transfer determination circuit 33 provides a count reset signal S 3 to the time counter 36 when it determines that no signals are being transmitted over the IEEE 1394 bus (indicating a blank period between the transfer of packets) based on the state of the driver/receiver 32 .
- the reset control circuit 34 controls bus reset when hot plugging occurs. When a change in the topology is detected based on the monitor signal S 1 from the driver/receiver 32 , the reset control circuit 34 determines whether data is being transferred based on the determination signal S 2 . If data is being transferred, the reset control circuit 34 inhibits bus reset until the transfer of data is completed. This prevents interruption of data transfer and allows the transfer of data to be completed.
- the existing network information retaining circuit 35 has a section (register section) for retaining information of the devices connected to the network by the IEEE 1394 buses 15 and information of the connection at the ports 31 a - 31 c.
- the time counter 36 detects completion of data transfer when its node is not involved with the transfer of data.
- the time counter 36 is provided since the data transfer determination circuit 33 is not capable of detecting the completion of data transfer when its node is not involved with the data transfer. More specifically, when a node is involved with the transfer of data, it transmits or receives packets containing information related with the transferred data (the amount of the transferred data) or packets indicating the completion of the data transfer. However, when a node is not involved with the transfer of data (including cases when data is transferred via the node), it does not transmit or receive packets.
- the time counter 36 counts the number of the blank periods and resets its count value when the count value reaches a predetermined value. In this manner, the time counter 36 detects the completion of data transfer when its node is not involved with the data transfer.
- the time counter 36 clears the count value in response to the reset signal S 3 from the data transfer determination circuit 33 .
- the time counter 36 provides a time-up signal S 4 to the reset control circuit 34 .
- the reset control circuit 34 detects completion of the data transfer using the time-up signal S 4 and then performs bus reset. Even when the time counter 36 is performing a counting operation, the reset control circuit 34 performs bus reset in response to the bus reset signal S 5 from the driver/receiver 32 and reconfigures the network to include the newly connected node in response to a bus reset signal from other nodes.
- FIG. 5 is a flowchart showing the operation of the IPC 21 when a new node is added to the network by connection to the IPC 21 .
- the flowchart also illustrates the operation of the IPC 21 when an existing node is disconnected from it.
- the IPC 21 detects whether data is being transferred. If data is being transferred, the IPC 21 proceeds to step 42 . If data is not being transferred, the IPC 21 proceeds to step 43 . At step 42 , the IPC 21 continues the transfer of data and waits until the data transfer is completed. When completion of the data transfer is detected, the IPC 21 proceeds to step 43 .
- the IPC 21 performs bus reset, which resets all of the nodes. Then, at step 44 , the IPC 21 performs various processes such as tree identification to reconfigure the network.
- FIG. 6 illustrates a network including nodes 11 a , 12 a , 13 a , 14 a that are incorporated in the devices 11 , 12 , 13 , 14 , respectively, and connected to one another by the IEEE 1394 buses 15 .
- Data is being transferred between the nodes 13 a and 14 a via the node 12 a (node 12 a acts as a repeater).
- the nodes 11 a , 12 a each have the IPC 21 which inhibit bus reset during the transfer of data when hot plugging is performed.
- the nodes 13 a , 14 a each have a conventional IPC.
- a new node 16 a of the video camera 16 is connected to the node 11 a and a new node 17 a of the hard disk 17 is connected to the node 12 a .
- the nodes 16 a , 17 a each have a conventional IPC.
- the nodes 11 a , 12 a determine whether data is currently being transferred. In this case, data is being transferred between the nodes 13 a , 14 a , Thus, the IPCs 21 of the nodes 11 a , 12 a inhibit bus reset.
- the nodes 11 a , 12 a each start time count. For example, if the count value reaches the predetermined value in the node 11 a , the node 11 a outputs a bus reset signal to include the newly connected node 16 a in the network.
- the node 12 a which is also performing the count operation, detects the bus reset signal generated by the node 11 a , stops its count operation in response to the bus reset signal, and includes the newly connected node 17 a in the network.
- the IPC 21 determines whether data is being transferred in the network. If data is being transferred, the IPC 21 inhibits bus reset until the data transfer is completed and reconfigures the network after completion of the data transfer. Accordingly, the transfer of data is guaranteed. Further, retransmission of data due to bus reset or confirmation of data transfer are not needed. This facilitates the transfer of data.
- an IPC 51 of a node 11 b which is shown in FIG. 7, has an existing network information retaining circuit 35 having a plurality (in this case, two) of sections 35 a , 35 b (FIG. 8 ).
- the first section 35 a stores information of the devices forming the existing network.
- the existing network information retaining circuit 35 stores information of its own node and new nodes in the second section 35 b .
- a temporary network which is independent from the existing network, is formed by the node 11 b and the new node 16 a as shown in FIG. 7 . This enables communication between the two nodes 11 b , 16 a.
- the IPC 21 inhibits bus reset and ensures completion of the transfer of data.
- the bus reset may be performed to reconfigure the network and restart the transfer of data afterward. In this case, the transfer of data is completed from the point at which it was stopped, without having to transfer the data again from the beginning.
- the bus reset is performed when the user permits the bus reset.
- the node performing data transfer is instructed to temporarily step transferring data so that bus reset can be performed safely.
- a reset control circuit 34 a of an IPC 21 a provides a display device 61 with message data inquiring whether the network should be reconfigured to account for connection of the node.
- the reset control circuit 34 a receives permission for reconfiguring the network from an input device 62 , the reset control circuit 34 a performs bus reset.
- the IPC 21 determines whether data is being transferred (step 71 ) and, if data is being transferred, requests permission to reconfigure (step 72 ). Then, the IPC 21 determines whether reconfiguring permission has been given by the input device 62 (step 73 ) and, if the permission has not been given, waits for the completion of data transfer (step 74 ). If reconfiguration is permitted, the IPC 21 a performs bus reset and resets all of the nodes (step 75 ), and the network is reconfigured (step 76 ). Afterward, when the user cancels the temporary data transfer interruption, the transfer of data is restarted. Accordingly, data is not required to be transferred again from the beginning.
- the reset control circuit 34 a provides the node that is transferring data with a packet instructing temporary interruption of the data transfer.
- the packets transferred when data is being transferred include Iso (isochronous) packets 81 and Async (asynchronous) packets 82 .
- the Iso packets 81 are reserved during data communication, and the Async packets 82 contain data.
- the Async packets 82 are used to provide temporary interruption instructions.
- the IPC 21 a monitors the transfer of data and, when detecting an interruption in the data transfer, performs bus reset and resets all of the nodes.
- the IPC 21 a requests restart of the data transfer to the data transferring and data receiving nodes to restart the transfer of data. Accordingly, although the interruption of data transfer is required, the data does not have to be transferred from the beginning.
- the generation of the message inquiring whether reconfiguring is necessary, the receipt of the reconfiguring permission, and the interruption and restarting of data transfer may be performed by nodes other than the node that detects connection of the new node. More specifically, the node detecting the newly connected node transmits an Async packet 82 with the detection information contained therein.
- a system including the display device 61 and the input device 62 e.g., a personal computer receives the packet 82 , generates a message requesting reconfiguring permission, receives reconfiguring permission, and provides the results to the node that detected the new node.
- the data transferring node, the data receiving node, and the data transfer controlling node control the interruption and restart of the data transfer in response to the new node connection information contained in the packet 82 . In this manner, error-free interruption and restart of the data transfer is ensured.
- each of the nodes may retain a physical node number that was allocated prior to the reset.
- the data transfer is easily restarted. More specifically, the data transfer is designated by the physical node numbers of the data transferring and receiving nodes.
- a physical node number differing from that prior to reset may be allocated to a node.
- the node that performs bus reset may holds a first physical node number allocated prior to the reset and a second physical allocated after the reset. In this case, the node that performs bus reset associates the first physical node number with the second physical node number and the other nodes perform normal reset.
- the present invention may be applied to an interface controller other than the IEEE 1394 protocol controller 21 having a hot plugging function.
Abstract
Description
Claims (32)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP28811799A JP4481401B2 (en) | 1999-10-08 | 1999-10-08 | Network control method and apparatus |
JP11-288117 | 1999-10-08 |
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US6732262B1 true US6732262B1 (en) | 2004-05-04 |
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US09/551,572 Expired - Lifetime US6732262B1 (en) | 1999-10-08 | 2000-04-18 | Method and system for controlling reset of IEEE 1394 network |
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JP (1) | JP4481401B2 (en) |
TW (1) | TW469715B (en) |
Cited By (8)
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---|---|---|---|---|
US20030088652A1 (en) * | 2001-11-07 | 2003-05-08 | Matsushita Electric Industrial Co., Ltd. | Network reconfiguration control device and network reconfiguration control method |
US20030115389A1 (en) * | 2001-12-17 | 2003-06-19 | Matsushita Electric Industrial Co., Ltd. | Digital data processing device, bus controlling method, bus controlling program and recording medium |
US6938243B1 (en) * | 2000-09-22 | 2005-08-30 | Dell Products L.P. | Diagnostic architecture for use with an interface between an operating system and platform firmware |
KR100553867B1 (en) * | 1998-07-04 | 2006-05-25 | 삼성전자주식회사 | Bus reset processing method in network connected with IEEE 1394 bus |
US20060294265A1 (en) * | 2003-05-05 | 2006-12-28 | Lefevre Chad A | Method and apparatus for controlling an external device using auto-play/auto-pause functions |
US20070043884A1 (en) * | 2005-08-19 | 2007-02-22 | Hideyuki Watanabe | Data transfer apparatus and image forming apparatus |
US20070061407A1 (en) * | 2003-09-12 | 2007-03-15 | Koninklijke Philips Electronics N.V. | Setting distribution in a home network |
US20070143337A1 (en) * | 2002-12-03 | 2007-06-21 | Mangan John P | Method For Simplifying Databinding In Application Programs |
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- 1999-10-08 JP JP28811799A patent/JP4481401B2/en not_active Expired - Fee Related
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- 2000-04-18 US US09/551,572 patent/US6732262B1/en not_active Expired - Lifetime
- 2000-04-27 TW TW089108047A patent/TW469715B/en not_active IP Right Cessation
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Cited By (11)
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KR100553867B1 (en) * | 1998-07-04 | 2006-05-25 | 삼성전자주식회사 | Bus reset processing method in network connected with IEEE 1394 bus |
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US20070143337A1 (en) * | 2002-12-03 | 2007-06-21 | Mangan John P | Method For Simplifying Databinding In Application Programs |
US20060294265A1 (en) * | 2003-05-05 | 2006-12-28 | Lefevre Chad A | Method and apparatus for controlling an external device using auto-play/auto-pause functions |
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US20070043884A1 (en) * | 2005-08-19 | 2007-02-22 | Hideyuki Watanabe | Data transfer apparatus and image forming apparatus |
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Also Published As
Publication number | Publication date |
---|---|
JP4481401B2 (en) | 2010-06-16 |
JP2001111567A (en) | 2001-04-20 |
TW469715B (en) | 2001-12-21 |
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