BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of buffering video data in a video compression system, and more particularly to a buffering method for transmitting a video bit stream compressed on the basis of an international standard.
2. Description of the Prior Art
In the international standardization of mobile communication techniques centering around a wideband code division multiplexing access (W-CDMA) technique, a mobile video data communication standard has been proposed recently by a recommendation of the International Telecommunications Union Telecommunications Standard (hereinafter “ITU-T”) on a television transmission line and audio broadcast transmission line.
In such international standards on the mobile video data communication, a video buffering technique is commonly used.
The video buffer temporarily stores the compression-coded variable-rate video data for a predetermined time period prior to outputting the data at a rate matching the communication channel. If a communication channel is a variable bit rate (VBR) type in which data is processed regardless of a variation in the rate of compressed video data, no buffering is required. However, in most wire/wireless digital communications, the communication channels have a constant bit rate (CBR). As a result, a video buffering technique capable of controlling the variable-rate video data adaptively to a constant-bit rate communication channel is required.
Also, even in the case where a communication channel is the variable bit rate type, a network is congested upon inputting video data of a rate higher than the maximum variable rate of the communication channel. In order to prevent such a congestion, a video buffering technique which limits the rate of video data or a rate control technique similar thereto is required.
FIG. 1 is a block diagram showing a conventional video data compression apparatus in the related art. This video data compression apparatus is a basic model defined in an international standard on video compression coding, or ITU-T H.263, MPEG-1, MPEG-2 and MPEG-4. As shown in FIG. 1, the video data compression apparatus comprises a discrete cosine transform (DCT) unit 1 inputting macro block-unit video data before compression, a quantizer 2, an inverse quantizer 3, an inverse discrete cosine transform (IDCT) 4, and a frame memory 5 for video storage. The video data compression apparatus further comprises a variable length coder (VLC) 6 converting video data quantized by the quantizer 2 into variable-length data, a video multiplexer 7 multiplexing the variable-length codes from the VLC 6, and a buffer 8 transmitting the compressed video data from the video multiplexer 7 externally via the channel.
The buffer 8 acts as a single port for input/output of video data. The buffer 8 has an occupancy which is periodically monitored on the basis of an address difference between a read pointer and a write pointer. Also, the buffer 8 notifies a video rate controller 9 coupled with the quantizer 2 of the monitored occupancy. The buffer 8 forms a feedback loop with the video rate controller 9. Also, the buffer 8 inputs the compressed variable-rate variable-length video data and outputs constant-rate variable-length video data.
The video rate controller 9 judges the occupancy O (k) of the buffer 8 and transfers a proper quantization coefficient Q (k) to the quantizer 2 according to the judged result.
The quantization coefficient Q (k) is a quantization step size of any one of 31 integers from 1 to 31. When the quantization coefficient Q (k) is large, the amount of output data from the quantizer 2 is reduced. If the quantization coefficient Q (k) is small, the amount of output data from the quantizer 2 is increased.
Variable-rate and variable-length video data, compression-coded by the quantizer 2, the VLC 6 and the video multiplexer 7, are serially input to the buffer 8. From the buffer 8, the data is serially output at a constant-rate variable-length video data in the input order. FIG. 2 shows an internal structure of a conventional buffer 8 in FIG. 1.
As shown in FIG. 2, the conventional buffer is configured in a first-in first-out (FIFO) manner where compressed video data are serially input and output in the input order. Such a FIFO memory is subjected to a serial input/output control operation which does not allow a random access operation. This FIFO memory usually has functional pins usable to indicate an occupancy full or occupancy empty state.
In the conventional buffer as discussed above, an overflow or underflow may occur due to a difference between the amounts of input/output data because it employs a FIFO memory with a serial input/output function. Also, because the step size of the quantizer is a main factor for controlling the data amounts, the buffer may perform a faulty operation even under a correct control. In particular, upon occurrence of an overflow, the buffer is unable to store new input video data, resulting in a disconnection with a communication channel. Recovering of the connection requires resynchronization and a considerable amount of processing time.
The above problem may be compensated by increasing the size of the buffer to reduce the faulty operation rate thereof. However, this causes a transfer delay, resulting in a degradation in service quality.
Another issue is to prevent a degradation in picture quality when the flow amount to the buffer is increased due to an abrupt increase in the video data amount. To minimize the degradation effect, the degradation in the picture quality should be distributed to the surroundings. However, because variation cannot be applied to video data previously stored in the buffer, the picture quality degradation appears mostly on new input video data. This causes an abrupt variation in picture quality and thus, a degradation in service quality.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to solve at least the problems and disadvantages of the related art.
An object of the present invention is to provide a buffering of video data in a video compression system, in which the memory locations are divided according to variable-length elements to define the boundary between input variable-length codes in order to permit individual accesses.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the objects and in accordance with the purposes of the invention, as embodied and broadly described herein, a video data buffering in a video compression system comprises the step of performing a discrete orthogonal transform operation with respect to the input video data in the block units and storing the resultant coefficients in the unit of discrete orthogonal transform components.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will be described in detail with reference to the following drawings in which like reference numerals refer to like elements wherein:
FIG. 1 is a block diagram of a conventional video data compression apparatus;
FIG. 2 is a view showing an internal structure of a buffer in FIG. 1;
FIG. 3 is a block diagram showing a video data compression apparatus according to the present invention;
FIG. 4 is a block diagram showing an internal structure of a buffer in FIG. 3;
FIG. 5 shows a status of the DCT quantized video data according to the present invention;
FIG. 6 is a schematic view illustrating an interconnection between a plurality of buffers according to the present invention;
FIG. 7 is a view showing an internal structure of a general variable length coder; and
FIG. 8 is a view illustrating the transfer of video data from the buffer in FIG. 3 to a communication channel.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 3 shows a video data compression apparatus according to the present invention comprising a DCT unit 1 inputting macro block-unit video data before compression, a quantizer 2, an inverse quantizer 3, an IDCT 4, and frame memory 5 for video storage. The video data compression apparatus further comprises a VLC 10 converting video data quantized by the quantizer 2 into variable-length data; a buffer 20 functioning as the single input/output port for transmitting compressed video data from the VLC 10; a video multiplexer 7 multiplexing output video data from the buffer 20; and a video rate controller 30 varying a quantization coefficient Q (k) according to an occupancy of the buffer 20.
The DCT unit 1 may be replaced with any other discrete orthogonal transform unit having the same function. For example, the DCT unit 1 may be replaced with any one of a discrete sine transform, a Hadamard transform, a KL transform or a Walsh transform units.
The video data compression apparatus in FIG. 3 is substantially the same in construction as the video data compression apparatus in FIG. 1, with the exception that the buffer 20 has a different internal structure from the buffer 8 and a further control parameter is fed back. Also, the video rate controller 30 applies a zonal quantization parameter as well as the quantization step size to the quantizer 2 according to the occupancy of the buffer 20. The zonal quantization parameter is a value for designating a position of a DCT coefficient to be quantized by the quantizer 2. As a result, the DCT range to be quantized by the quantizer 2 is controlled based upon the zonal quantization parameter.
The occupancy of the conventional buffer is an instantaneous value adaptive only to an absolute memory size.
However, the occupancy of the present buffer is flexible.
As shown in FIG. 4, the present buffer is configured, not in a FIFO memory manner, but in a manner in which the memory locations are divided according to variable-length elements. This division defines the boundary between input variable-length codes and allows individual accesses to the divided memory locations.
FIG. 4 shows an internal structure of the buffer 20 in FIG. 3. A header buffer 22 separately stores a picture header 23 and group of block (GOB) header 24. A macro block header unit 25 also separately stores a variable-length code of a macro block header. In the preferred embodiment, a CONTRAXPAND™ buffer 26 is used as the kernel of the present buffer 20.
The CONTRAXPAND™ buffer 26 includes a plurality of blocks, each of which has code regions for storing variable-length codes from the VLC 10, length regions for indicating bit lengths of the code regions, and run regions for indicating the number of direct current (DC) components or alternating current (AC) components of the corresponding block which have quantized values of 0. Noticeably, the CONTRAXPAND™ buffer 26 does not store components which were not quantized.
For example, if the first, second and eleventh of a DC component and AC components arranged in the zigzag scanning order have quantized values other than 0, the components are stored and output in the regions AC1, AC2 and AC3 of the block 1 in the CONTRAXPAND™ buffer 26. Alternatively, the DC and AC components may be stored with a one-to-one correspondence to a DC and an AC regions in the buffer 20, even if they have quantized values other than 0. For a more efficient construction of the buffer 20, flag bits may be separately stored indicating whether the values stored in the DC and AC regions in the buffer 20 are 0. The picture header unit 23 and the GOB header unit 24 are not included in the CONTRAXPAND™ buffer 26 because they store fixed-length codes.
Also, a read pointer and a write pointer are implemented with the CONTRAXPAND™ buffer 26 to control the quantizer 2. Particularly, the video rate controller 9 includes an Rqs controller 27 controlling the quantization step size Qs according to the occupancy of the buffer 20 and applying Qs to the quantizer 2. The video rate controller 9 further includes an Rzs controller 28 controlling a zonal sampling parameter Zs according to the read pointer and write pointer of the buffer 20 and applying Zs to the quantizer 2. The zonal sampling parameter Zs is an index of a DCT coefficient to be quantized.
Another aspect of the video data buffering method of the present invention as shown in FIG. 4 is to output variable-length video data from the VLC 10 adaptively to a state of a communication channel and/or the picture frame rate. This can be achieved by dividing and storing the video data according to the positions of DC and AC values. Particularly, the data of lower importance among the video data stored in the buffer 20 may be abandoned in transmission.
Rather than remedying an overflow due to a high occupancy of the buffer 20, the present invention selectively transmits data of higher importance among the quantized DCTs (DCTQs) stored in the buffer 20 while abandoning the remaining DCTQs.
FIG. 5, shows the “transmitted” DCTQs among all DCTQs processed by the VLC 10. Thus, a potential overflow may be prevented and the transmission can continuously be maintained even at the higher occupancy state. As s result, the degradation in the picture quality is distributed to the surroundings.
The selective transmission can be performed according to the read range obtained by the read pointer and write range obtained by the write pointer. The write range is the level of data written into the buffer 8 and is dependent upon the output level of the quanizer 2. The read range is the level of data read from the buffer 8 and is a function of both the channel transmission rate and/or the picture frame rate. As the channel transmission rate and the picture frame rate fluctuates, the output level or the read range is controlled by the selective transmission.
After a selective transmission, a difference between the transmitted DCTQs and the abandoned DCTQs is transferred to the Rzs controller 28 by the read pointer and the write pointer. As a result, the quantizer 2 is controlled in response to the zonal sampling parameter Zs and quantization step size Qs in such a manner that the occupancy of the buffer 20 can rapidly be readjusted to a lower value such that a difference between the read pointer and write pointer can become 0. At this time, the quantization parameter Qs (k) and the zonal sampling parameter Zs (k) can be expressed by the following equations:
Qs (k)=f(occ(k)):function f( ), Linear or Non-Linear occ (k)=rbn (k)−wbn (k)
where, “occ (k)” is the occupancy of the buffer, “rbn (k)” is a
read block number, “wbn (k)” is a write block number, “jread” and “jwrite” are positions of read and write codes respectively, and “k1,2,3,4” is a block position.
The function f (occ(k)) is used to change the occupancy occ (k) of the buffer to Qs (k). This function f (occ(k)) may be of various types according to video data amount control methods. A linear function or sigmoidal function is generally used as the function f (occ(k)). Alternatively, a unimoidal function, which is a combination of logarithmic and exponential functions, may also be used as the function f (occ(k)).
Also the zonal sampling parameter Zs (k) can be expressed as follows,
Zs (k)=q (dptr (k))
wptr (k)=Σrun (Bk)
rptr (k)=Σrun (Bk)
dptr (k)=int{(wptr (k)-rptr (k))/NMB}
where, “rptr (k)” is the read pointer, “wptr (k)” is the write pointer, “dptr (k)” is a difference between the read pointer and the write pointer, “NMB” is the total number of blocks in each macro block of the buffer 20, “int” signifies the use of an integer, and “run” signifies the number of preceding zeros of a non-zero DCT coefficient.
The “write block” signifies the total number of DC to ACn components stored in each block in each macro block of the buffer 20, and the “read block” signifies the total number of DC to ACn components output from each block in each macro block of the buffer 20.
Also, the “rptr (k)”, “wptr (k)” and “dptr (k)” are binary addresses. The “occ (k)” is determined according to the size of the CONTRAXPAND™ buffer 26 of the buffer 20. This “occ (k)” can be expressed by either an integer or a real number according to the embodiments. In the preferred embodiment, “Zs (k)” is at least one of integers from 1 to 63.
The video data from the buffer 20 are multiplexed by the video multiplexer 7 and output according to a bit stream syntax. The output variable-length codes from the video multiplexer 7 are passed through a parallel-in serial-output (PISO) shift register allowing the codes to be transmitted as one bit stream according to the speed of a connected channel.
Referring to FIG. 6, the buffer 20 may be provided with a plurality of CONTRAXPAND™ buffers 26 to increase the entire buffer capacity. With an increased buffer capacity, a data write operation is performed with respect to one buffer while a data read operation is performed with respect to another buffer. The value “TR” is a temporal reference corresponding to a time stamp, which has any integer within the range from 0 to 255.
FIG. 7 shows a general VLC including a bit packer for converting variable-length codes into fixed-length codes. If the general VLC does not include a bit packer, connection with a clock signal to connect with a communication channel cannot easily be performed. For this reason, a bit packer is conventionally used in implementing the VLC. However, in the video data compression apparatus of the present invention, the VLC need not include the bit packer because the buffer 20 is able to buffer the variable-length code data. According to the present invention, the final bit stream output is connected to the communication channel, even without a bit packer in the VLC.
Referring to FIG. 8, variable-length codes M and N with lengths of I (M) and I (N) are multiplexed by the video multiplexer 7 and output respectively to a first and a second registers 41 and 42 in a shift register 40. The length information I (M) and I (N) indicating the lengths of the codewords are transferred respectively to the first and second registers 41 and 42. As a result, a bit stream corresponding to the transferred length information is output in response to a clock which is synchronized with an output channel.
Thus, a 7-bit output is provided by the first register 41 and a 3-bit output is provided by the second register 42. Such operation is continuously performed with respect to all the subsequent input data, thereby the final output is not disconnected with the communication channel. Moreover, this operation can be achieved without using a bit packer which occupies more than half of the function of the VLC, resulting in a reduction in the complexity of the VLC.
As discussed above, according to the present invention, a potential overflow in the buffer of a video data compression apparatus is prevented. Thus, a communication discontinuance cannot occur in the entire system. Because the input/output operation is not performed in the FIFO manner, the variable-length code information can selectively be transmitted even after the coding is performed. The current input data is not limited to being transmitted only after transmitting the previously stored data. Therefore, the transfer delay can be minimized, resulting in an increase in quality of video communication.
Moreover, the complexity of the VLC can be reduced to less than half of the conventional VLC, relatively reducing the complexity of the buffer. Therefore, the entire system can be simplified in construction. Moreover, the mutual relation between the quantizer and the VLC is used to control the entire system according to the state of the transmission channel. This increases the communication quality as compared with the conventional apparatus where the transmission rate is controlled depending on the quantizer. Furthermore, because the variable-length video data are separately processed, the present invention can efficiently be coupled with any other technique capable of maintaining a high error resilience under a communication channel environment where a bit error generation rate is high.
The foregoing embodiments are merely exemplary and are not to be construed as limiting the present invention. The present teachings can be readily applied to other types of apparatuses. The description of the present invention is intended to be illustrative, and not to limit the scope of the claims. Many alternatives, modifications, and variations will be apparent to those skilled in the art.