US6408367B2 - Data path architecture and arbitration scheme for providing access to a shared system resource - Google Patents
Data path architecture and arbitration scheme for providing access to a shared system resource Download PDFInfo
- Publication number
- US6408367B2 US6408367B2 US09/291,851 US29185199A US6408367B2 US 6408367 B2 US6408367 B2 US 6408367B2 US 29185199 A US29185199 A US 29185199A US 6408367 B2 US6408367 B2 US 6408367B2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
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Claims (12)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US09/291,851 US6408367B2 (en) | 1995-12-01 | 1999-04-14 | Data path architecture and arbitration scheme for providing access to a shared system resource |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/566,047 US5983327A (en) | 1995-12-01 | 1995-12-01 | Data path architecture and arbitration scheme for providing access to a shared system resource |
US09/291,851 US6408367B2 (en) | 1995-12-01 | 1999-04-14 | Data path architecture and arbitration scheme for providing access to a shared system resource |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US08/566,047 Continuation US5983327A (en) | 1995-12-01 | 1995-12-01 | Data path architecture and arbitration scheme for providing access to a shared system resource |
Publications (2)
Publication Number | Publication Date |
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US20010042178A1 US20010042178A1 (en) | 2001-11-15 |
US6408367B2 true US6408367B2 (en) | 2002-06-18 |
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US08/566,047 Expired - Lifetime US5983327A (en) | 1995-12-01 | 1995-12-01 | Data path architecture and arbitration scheme for providing access to a shared system resource |
US09/291,851 Expired - Lifetime US6408367B2 (en) | 1995-12-01 | 1999-04-14 | Data path architecture and arbitration scheme for providing access to a shared system resource |
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US08/566,047 Expired - Lifetime US5983327A (en) | 1995-12-01 | 1995-12-01 | Data path architecture and arbitration scheme for providing access to a shared system resource |
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Cited By (31)
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US20020116438A1 (en) * | 2000-12-22 | 2002-08-22 | Steven Tu | Method and apparatus for shared resource management in a multiprocessing system |
US20060036819A1 (en) * | 2002-05-31 | 2006-02-16 | Hiroshi Suzuki | Interleaver for iterative decoder |
US20060150059A1 (en) * | 2004-11-16 | 2006-07-06 | Modlin Cory S | Error free dynamic rate change in DSL with constant delay |
US20120297396A1 (en) * | 2011-05-20 | 2012-11-22 | Soft Machines, Inc. | Interconnect structure to support the execution of instruction sequences by a plurality of engines |
US9766893B2 (en) | 2011-03-25 | 2017-09-19 | Intel Corporation | Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines |
US9811342B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for performing dual dispatch of blocks and half blocks |
US9811377B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for executing multithreaded instructions grouped into blocks |
US9823930B2 (en) | 2013-03-15 | 2017-11-21 | Intel Corporation | Method for emulating a guest centralized flag architecture by using a native distributed flag architecture |
US9842005B2 (en) | 2011-03-25 | 2017-12-12 | Intel Corporation | Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines |
US9858080B2 (en) | 2013-03-15 | 2018-01-02 | Intel Corporation | Method for implementing a reduced size register view data structure in a microprocessor |
US9886279B2 (en) | 2013-03-15 | 2018-02-06 | Intel Corporation | Method for populating and instruction view data structure by using register template snapshots |
US9886416B2 (en) | 2006-04-12 | 2018-02-06 | Intel Corporation | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
US9891924B2 (en) | 2013-03-15 | 2018-02-13 | Intel Corporation | Method for implementing a reduced size register view data structure in a microprocessor |
US9898412B2 (en) | 2013-03-15 | 2018-02-20 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
US9921845B2 (en) | 2011-03-25 | 2018-03-20 | Intel Corporation | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
US9934042B2 (en) | 2013-03-15 | 2018-04-03 | Intel Corporation | Method for dependency broadcasting through a block organized source view data structure |
US9940134B2 (en) | 2011-05-20 | 2018-04-10 | Intel Corporation | Decentralized allocation of resources and interconnect structures to support the execution of instruction sequences by a plurality of engines |
US9965281B2 (en) | 2006-11-14 | 2018-05-08 | Intel Corporation | Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer |
US9971395B2 (en) | 2014-08-20 | 2018-05-15 | Microchip Technology Incorporated | Low power connection detect method and system for USB charging |
US10042784B2 (en) | 2014-10-13 | 2018-08-07 | Microchip Technology Incorporated | Side channel access through USB streams |
US10127181B2 (en) | 2014-04-30 | 2018-11-13 | Microchip Technology Incorporated | Port disconnect charging function for USB hub |
US10140138B2 (en) | 2013-03-15 | 2018-11-27 | Intel Corporation | Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation |
US10146548B2 (en) | 2013-03-15 | 2018-12-04 | Intel Corporation | Method for populating a source view data structure by using register template snapshots |
US10162788B2 (en) | 2016-08-19 | 2018-12-25 | Microchip Technology Incorporated | USB on the go (OTG) multi-hub endpoint reflector hub |
US10169045B2 (en) | 2013-03-15 | 2019-01-01 | Intel Corporation | Method for dependency broadcasting through a source organized source view data structure |
US10191746B2 (en) | 2011-11-22 | 2019-01-29 | Intel Corporation | Accelerated code optimizer for a multiengine microprocessor |
US10191874B2 (en) | 2015-12-22 | 2019-01-29 | Microchip Technology Incorporated | Method and apparatus for providing USB power delivery negotiated through a dedicated transmission channel |
US10198266B2 (en) | 2013-03-15 | 2019-02-05 | Intel Corporation | Method for populating register view data structure by using register template snapshots |
US10228949B2 (en) | 2010-09-17 | 2019-03-12 | Intel Corporation | Single cycle multi-branch prediction including shadow cache for early far branch prediction |
US10282313B2 (en) | 2015-04-28 | 2019-05-07 | Microchip Technology Incorporated | Universal serial bus smart hub |
US10521239B2 (en) | 2011-11-22 | 2019-12-31 | Intel Corporation | Microprocessor accelerated code optimizer |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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TW360823B (en) * | 1996-09-30 | 1999-06-11 | Hitachi Ltd | Data processor and graphic processor |
US6996656B2 (en) * | 2002-10-31 | 2006-02-07 | Src Computers, Inc. | System and method for providing an arbitrated memory bus in a hybrid computing system |
US6622201B1 (en) * | 2000-01-28 | 2003-09-16 | Advanced Micro Devices, Inc. | Chained array of sequential access memories enabling continuous read |
US6906978B2 (en) * | 2002-03-19 | 2005-06-14 | Intel Corporation | Flexible integrated memory |
US20040064662A1 (en) * | 2002-09-26 | 2004-04-01 | Analog Devices, Inc. | Methods and apparatus for bus control in digital signal processors |
US7421545B1 (en) * | 2002-12-27 | 2008-09-02 | Unisys Corporation | Method and apparatus for multiple sequence access to single entry queue |
EP1477903A3 (en) * | 2003-05-13 | 2004-12-29 | Freescale Semiconductor, Inc. | Memory system for a radiotelephone |
US20050265378A1 (en) * | 2004-05-26 | 2005-12-01 | Microchip Technology Incorporated | Streaming input-output ports in a digital device |
US7225306B2 (en) * | 2004-06-23 | 2007-05-29 | Texas Instruments Incorporated | Efficient address generation for Forney's modular periodic interleavers |
DE102004038211A1 (en) * | 2004-08-05 | 2006-03-16 | Robert Bosch Gmbh | Message manager and method for controlling the access to data of a message memory of a communication module |
FR2888017B1 (en) * | 2005-07-01 | 2007-08-31 | Atmel Nantes Sa Sa | ASYNCHRONOUS ARBITRATION DEVICE AND MICROCONTROLLER COMPRISING SUCH AN ARBITRATION DEVICE |
US10268604B2 (en) | 2015-07-09 | 2019-04-23 | Oracle International Corporation | Adaptive resource management in a pipelined arbiter |
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- 1995-12-01 US US08/566,047 patent/US5983327A/en not_active Expired - Lifetime
-
1999
- 1999-04-14 US US09/291,851 patent/US6408367B2/en not_active Expired - Lifetime
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Cited By (56)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020116438A1 (en) * | 2000-12-22 | 2002-08-22 | Steven Tu | Method and apparatus for shared resource management in a multiprocessing system |
US20060136925A1 (en) * | 2000-12-22 | 2006-06-22 | Steven Tu | Method and apparatus for shared resource management in a multiprocessing system |
US7124224B2 (en) * | 2000-12-22 | 2006-10-17 | Intel Corporation | Method and apparatus for shared resource management in a multiprocessing system |
US7464208B2 (en) * | 2000-12-22 | 2008-12-09 | Intel Corporation | Method and apparatus for shared resource management in a multiprocessing system |
US20060036819A1 (en) * | 2002-05-31 | 2006-02-16 | Hiroshi Suzuki | Interleaver for iterative decoder |
US7360040B2 (en) * | 2002-05-31 | 2008-04-15 | Broadcom Corporation | Interleaver for iterative decoder |
US20060150059A1 (en) * | 2004-11-16 | 2006-07-06 | Modlin Cory S | Error free dynamic rate change in DSL with constant delay |
US7457993B2 (en) | 2004-11-16 | 2008-11-25 | Texas Instruments Incorporated | Error free dynamic rate change in a digital subscriber line DSL with constant delay |
US10289605B2 (en) | 2006-04-12 | 2019-05-14 | Intel Corporation | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
US11163720B2 (en) | 2006-04-12 | 2021-11-02 | Intel Corporation | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
US9886416B2 (en) | 2006-04-12 | 2018-02-06 | Intel Corporation | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
US10585670B2 (en) | 2006-11-14 | 2020-03-10 | Intel Corporation | Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer |
US9965281B2 (en) | 2006-11-14 | 2018-05-08 | Intel Corporation | Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer |
US10228949B2 (en) | 2010-09-17 | 2019-03-12 | Intel Corporation | Single cycle multi-branch prediction including shadow cache for early far branch prediction |
US9990200B2 (en) | 2011-03-25 | 2018-06-05 | Intel Corporation | Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines |
US9934072B2 (en) | 2011-03-25 | 2018-04-03 | Intel Corporation | Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines |
US9842005B2 (en) | 2011-03-25 | 2017-12-12 | Intel Corporation | Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines |
US9921845B2 (en) | 2011-03-25 | 2018-03-20 | Intel Corporation | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
US10564975B2 (en) | 2011-03-25 | 2020-02-18 | Intel Corporation | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
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US10372454B2 (en) | 2011-05-20 | 2019-08-06 | Intel Corporation | Allocation of a segmented interconnect to support the execution of instruction sequences by a plurality of engines |
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US20120297396A1 (en) * | 2011-05-20 | 2012-11-22 | Soft Machines, Inc. | Interconnect structure to support the execution of instruction sequences by a plurality of engines |
CN103649931B (en) * | 2011-05-20 | 2016-10-12 | 索夫特机械公司 | For supporting to be performed the interconnection structure of job sequence by multiple engines |
US9940134B2 (en) | 2011-05-20 | 2018-04-10 | Intel Corporation | Decentralized allocation of resources and interconnect structures to support the execution of instruction sequences by a plurality of engines |
US9442772B2 (en) * | 2011-05-20 | 2016-09-13 | Soft Machines Inc. | Global and local interconnect structure comprising routing matrix to support the execution of instruction sequences by a plurality of engines |
US10031784B2 (en) | 2011-05-20 | 2018-07-24 | Intel Corporation | Interconnect system to support the execution of instruction sequences by a plurality of partitionable engines |
US10521239B2 (en) | 2011-11-22 | 2019-12-31 | Intel Corporation | Microprocessor accelerated code optimizer |
US10191746B2 (en) | 2011-11-22 | 2019-01-29 | Intel Corporation | Accelerated code optimizer for a multiengine microprocessor |
US9811377B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for executing multithreaded instructions grouped into blocks |
US10255076B2 (en) | 2013-03-15 | 2019-04-09 | Intel Corporation | Method for performing dual dispatch of blocks and half blocks |
US11656875B2 (en) | 2013-03-15 | 2023-05-23 | Intel Corporation | Method and system for instruction block to execution unit grouping |
US10140138B2 (en) | 2013-03-15 | 2018-11-27 | Intel Corporation | Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation |
US10146576B2 (en) | 2013-03-15 | 2018-12-04 | Intel Corporation | Method for executing multithreaded instructions grouped into blocks |
US10146548B2 (en) | 2013-03-15 | 2018-12-04 | Intel Corporation | Method for populating a source view data structure by using register template snapshots |
US9811342B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for performing dual dispatch of blocks and half blocks |
US10169045B2 (en) | 2013-03-15 | 2019-01-01 | Intel Corporation | Method for dependency broadcasting through a source organized source view data structure |
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US10198266B2 (en) | 2013-03-15 | 2019-02-05 | Intel Corporation | Method for populating register view data structure by using register template snapshots |
US9934042B2 (en) | 2013-03-15 | 2018-04-03 | Intel Corporation | Method for dependency broadcasting through a block organized source view data structure |
US10248570B2 (en) | 2013-03-15 | 2019-04-02 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
US9858080B2 (en) | 2013-03-15 | 2018-01-02 | Intel Corporation | Method for implementing a reduced size register view data structure in a microprocessor |
US10275255B2 (en) | 2013-03-15 | 2019-04-30 | Intel Corporation | Method for dependency broadcasting through a source organized source view data structure |
US9886279B2 (en) | 2013-03-15 | 2018-02-06 | Intel Corporation | Method for populating and instruction view data structure by using register template snapshots |
US9904625B2 (en) | 2013-03-15 | 2018-02-27 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
US9898412B2 (en) | 2013-03-15 | 2018-02-20 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
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US10042784B2 (en) | 2014-10-13 | 2018-08-07 | Microchip Technology Incorporated | Side channel access through USB streams |
US10282313B2 (en) | 2015-04-28 | 2019-05-07 | Microchip Technology Incorporated | Universal serial bus smart hub |
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Also Published As
Publication number | Publication date |
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US5983327A (en) | 1999-11-09 |
US20010042178A1 (en) | 2001-11-15 |
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