US6364669B1 - Spring contact for providing high current power to an integrated circuit - Google Patents

Spring contact for providing high current power to an integrated circuit Download PDF

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Publication number
US6364669B1
US6364669B1 US09/614,817 US61481700A US6364669B1 US 6364669 B1 US6364669 B1 US 6364669B1 US 61481700 A US61481700 A US 61481700A US 6364669 B1 US6364669 B1 US 6364669B1
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Prior art keywords
contact
semiconductor die
coupled
circuit assembly
base
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Expired - Lifetime
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US09/614,817
Inventor
Anthony Andric
Ruel Hill
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GlobalFoundries Inc
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Advanced Micro Devices Inc
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Assigned to ADVANCED MICRO DEVICES, INC. reassignment ADVANCED MICRO DEVICES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ANDRIC, ANTHONY, HILL, RUEL
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Publication of US6364669B1 publication Critical patent/US6364669B1/en
Assigned to GLOBALFOUNDRIES INC. reassignment GLOBALFOUNDRIES INC. AFFIRMATION OF PATENT ASSIGNMENT Assignors: ADVANCED MICRO DEVICES, INC.
Assigned to WILMINGTON TRUST, NATIONAL ASSOCIATION reassignment WILMINGTON TRUST, NATIONAL ASSOCIATION SECURITY AGREEMENT Assignors: GLOBALFOUNDRIES INC.
Anticipated expiration legal-status Critical
Assigned to GLOBALFOUNDRIES INC. reassignment GLOBALFOUNDRIES INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: WILMINGTON TRUST, NATIONAL ASSOCIATION
Assigned to GLOBALFOUNDRIES U.S. INC. reassignment GLOBALFOUNDRIES U.S. INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: WILMINGTON TRUST, NATIONAL ASSOCIATION
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/32Holders for supporting the complete device in operation, i.e. detachable fixtures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • This invention relates generally to the field of electrical connectors for semiconductor devices and, more particularly, to a spring contact for providing high current power to an integrated circuit.
  • CMOS complementary metal-oxide-semiconductor
  • IC integrated-circuit
  • PC printed-circuit
  • ZIF zero-insertion-force
  • a ZIF socket is useful in that very little downward force need be exerted as the device is being inserted or latched into the connector. Because virtually no force is required, the potential for damage to the delicate signal pins of the component being inserted is reduced.
  • the type of semiconductor device package that interfaces with a ZIF socket is referred to a pin grid array (PGA).
  • PGA pin grid array
  • a PGA package has a plurality of signal and power pins extending from the package, typically in a single plane.
  • One problem associated with a PGA package is the limited current carrying capacity of each pin. Accordingly, many pins are needed to provide sufficient power and ground supplies for the semiconductor device. As the complexity of current microprocessors increases, the power demands typically also increase. In addition, the number of pins needed for signals also increases (e.g., a 64-bit microprocessor required more pins than a 32-bit microprocessor). Due to the current requirements of typical microprocessors, as many as 2 ⁇ 3 of the total number of pins may be dedicated for supplying power. This domination of the pins count constrains the number of pins remaining for signals. Additional pins equate to additional size and cost. The use of larger pins for power supply contacts to boost their current carrying capacity is impractical as it increases the complexity of the assembly process.
  • the present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
  • an integrated circuit package including a semiconductor die, a base, and a plurality of external contacts.
  • the base is coupled to the semiconductor die and includes at least one contact pad coupled to the semiconductor die.
  • the plurality of external contacts extend from the base and are coupled to the semiconductor die.
  • a circuit assembly including a printed circuit board, an integrated circuit package, and a socket.
  • the integrated circuit package includes a semiconductor die, a base coupled to the semiconductor die, and a plurality of external contacts extending from the base and being coupled to the semiconductor die.
  • the base includes at least one contact pad coupled to the semiconductor die.
  • the socket is coupled to the printed circuit board and adapted to receive the base.
  • a contact is adapted to interface with the contact pad and one of the printed circuit board and the socket.
  • FIG. 1 is side view of a circuit assembly in accordance with the present invention
  • FIG. 2 is side view of a circuit assembly in accordance with an alternative embodiment of the present invention.
  • FIGS. 3A and 3B are end and cross section views, respectively, of two embodiments of a spring contact and retaining tab of the circuit assembly of FIG. 1 for providing high current power to a semiconductor device.
  • the circuit assembly 10 includes a printed circuit board 20 , to which a socket 30 is mounted.
  • the socket 30 is a ZIF socket adapted to receive a pin grid array package, although other types of sockets may be used.
  • An integrated circuit package 40 including a ceramic base 50 and a semiconductor die 60 , is coupled to the socket 30 .
  • the ceramic base 50 includes a plurality of contact pins 65 that engage the socket 30 using a conventional pin grid array configuration.
  • the semiconductor die 60 is coupled to the ceramic base 50 using one of a number of conventional flip chip bonding processes well known to those of ordinary skill in the art.
  • the contact pins 65 communicate logic signals between the printed circuit board 20 and the semiconductor die 60 .
  • a heat sink 70 is coupled to the semiconductor die 60 for dissipating heat generated therein.
  • contact pads 80 , 90 are formed on an upper surface 100 of the ceramic base 50 .
  • the contact pads 80 , 90 are coupled to the semiconductor die 60 as represented by the dashed line connection.
  • the contact pads 80 , 90 are solder pads formed during the soldering of other circuitry (not shown) on the upper surface 100 .
  • Spring contacts 110 , 120 are coupled to the printed circuit board 20 and interface with the contact pads 80 , 90 . It is also contemplated that the spring contacts 110 , 120 may be mounted to the contact pads 80 , 90 and interface with the printed circuit board 20 . In an alternative embodiment, illustrated in FIG. 2, the spring contacts 110 , 120 extend from the socket 30 to interface with the contact pads 80 , 90 .
  • the spring contacts 110 , 120 may be constructed of a spring metal. Although the contacts 110 , 120 are is illustrated as being spring type contacts, the application of the present invention is not so limited, and other contact types may be used.
  • the spring contacts 110 , 120 have a higher current-carrying capacity than the contact pins 65 of the ceramic base 50 , and, hence, are useful for providing power and ground signals to the semiconductor die 60 . Supplying power and ground signals through the spring contacts 110 , 120 , as opposed to the contact pins 65 of the ceramic base 50 , frees up contact pin resources for carrying additional logic signals without requiring an increase in die size.
  • the particular number of contact pads 80 , 90 and corresponding spring contacts 110 , 120 is application dependent, and may vary, depending on factors such as the layout of the semiconductor die 60 and the power requirements of the semiconductor die 60 . To enhance the corrosion resistance of the spring contacts 110 , 120 , they may be gold plated. Many different constructs for the spring contacts 110 , 120 are possible.
  • the illustrated exemplary spring contacts 110 , 120 of FIG. 1 have a roughly s-shaped cross section. Other cross sections, such as c-shaped (as shown in FIG. 2) or rectangular may be used.
  • alignment tabs 130 extend from the socket 30 to engage the spring contacts 110 , 120 to inhibit lateral motion thereof.
  • FIGS. 3A and 3B alternative embodiments of the alignment tabs 130 are shown.
  • the alignment tab 130 comprises a pin 140 extending from the socket 30 to engage a corresponding notch 150 defined in the spring contact 110 .
  • the pin 140 and notch 150 are shown having rectangular shapes, other shapes, such as circular, may be used.
  • the alignment tab 130 comprises a pair of clips 160 having ramped ends 170 extending from the socket 30 to engage the sides 180 of the spring contact 110 .
  • the ramped ends 170 cause the clips 160 to deflect, allowing the spring contact 110 to be inserted past the ends 170 .
  • the deflection force is removed, and the ends 170 retain the spring contact 110 in place.
  • the spring contact 120 associated with the ground power supply signal has an upwardly turned tip 190 that interfaces with the heat sink 70 .
  • the heat sink 70 is grounded to reduce electromagnetic emissions. Using the tip 190 of the spring contact 120 accomplishes this function without requiring an additional connection.
  • the spring contact 110 associated with the power signal is insulated from the heat sink 70 by an insulative layer 200 .
  • An insulating tape such as Mylar® tape is one material suitable for acting as the insulative layer 200 .
  • the insulative layer 200 may be attached to either the spring contact 110 or to the heat sink 70 . Of course, any number of other suitable insulative layers may be used. If sufficient clearance exists between the heat sink 70 and the spring contact 110 , the insulative layer 200 may be omitted.
  • the circuit assembly 10 described herein is advantageous in that the spring contacts 110 , 120 allow transmission of power and ground supply signals to the semiconductor die 60 without tying up a large number of contact pins in the socket 30 .
  • Conserving contact pins allows for increased capabilities of the semiconductor die 60 without consuming valuable real estate for the multitude of power and ground contacts.

Abstract

An integrated circuit package includes a semiconductor die, a base, and a plurality of external contacts. The base is coupled to the semiconductor die and includes at least one contact pad coupled to the semiconductor die. The plurality of external contacts extend from the base and are coupled to the semiconductor die. A circuit assembly includes a printed circuit board, an integrated circuit package, and a socket. The integrated circuit package includes a semiconductor die, a base coupled to the semiconductor die, and a plurality of external contacts extending from the base and being coupled to the semiconductor die. The base includes at least one contact pad coupled to the semiconductor die. The socket is coupled to the printed circuit board and adapted to receive the base. A contact is adapted to interface with the contact pad and one of the printed circuit board and the socket.

Description

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the field of electrical connectors for semiconductor devices and, more particularly, to a spring contact for providing high current power to an integrated circuit.
2. Description of the Related Art
Typically, electrical connectors having various configurations are employed for attaching integrated-circuit (IC) modules to printed-circuit (PC) boards. Such connectors provide versatility to computer platforms by allowing major components, such as microprocessors, to be easily removed and replaced with upgraded units. For example, one type of connector that is used for such a purpose is a zero-insertion-force (ZIF) sockets. A ZIF socket is useful in that very little downward force need be exerted as the device is being inserted or latched into the connector. Because virtually no force is required, the potential for damage to the delicate signal pins of the component being inserted is reduced. The type of semiconductor device package that interfaces with a ZIF socket is referred to a pin grid array (PGA). A PGA package has a plurality of signal and power pins extending from the package, typically in a single plane.
One problem associated with a PGA package is the limited current carrying capacity of each pin. Accordingly, many pins are needed to provide sufficient power and ground supplies for the semiconductor device. As the complexity of current microprocessors increases, the power demands typically also increase. In addition, the number of pins needed for signals also increases (e.g., a 64-bit microprocessor required more pins than a 32-bit microprocessor). Due to the current requirements of typical microprocessors, as many as ⅔ of the total number of pins may be dedicated for supplying power. This domination of the pins count constrains the number of pins remaining for signals. Additional pins equate to additional size and cost. The use of larger pins for power supply contacts to boost their current carrying capacity is impractical as it increases the complexity of the assembly process.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
One aspect of the present invention is seen in an integrated circuit package including a semiconductor die, a base, and a plurality of external contacts. The base is coupled to the semiconductor die and includes at least one contact pad coupled to the semiconductor die. The plurality of external contacts extend from the base and are coupled to the semiconductor die.
Another aspect of the present invention is seen in a circuit assembly including a printed circuit board, an integrated circuit package, and a socket. The integrated circuit package includes a semiconductor die, a base coupled to the semiconductor die, and a plurality of external contacts extending from the base and being coupled to the semiconductor die. The base includes at least one contact pad coupled to the semiconductor die. The socket is coupled to the printed circuit board and adapted to receive the base. A contact is adapted to interface with the contact pad and one of the printed circuit board and the socket.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention may be understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals identify like elements, and in which:
FIG. 1 is side view of a circuit assembly in accordance with the present invention;
FIG. 2 is side view of a circuit assembly in accordance with an alternative embodiment of the present invention; and
FIGS. 3A and 3B are end and cross section views, respectively, of two embodiments of a spring contact and retaining tab of the circuit assembly of FIG. 1 for providing high current power to a semiconductor device.
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS
Illustrative embodiments of the invention are described below. In the interest of clarity, not all features of an actual implementation are described in this specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.
Referring now to FIG. 1, a side view of a circuit assembly 10 in accordance with the present invention is shown. The circuit assembly 10 includes a printed circuit board 20, to which a socket 30 is mounted. In the illustrated embodiment, the socket 30 is a ZIF socket adapted to receive a pin grid array package, although other types of sockets may be used. An integrated circuit package 40, including a ceramic base 50 and a semiconductor die 60, is coupled to the socket 30. In the illustrated embodiment, the ceramic base 50 includes a plurality of contact pins 65 that engage the socket 30 using a conventional pin grid array configuration. The semiconductor die 60 is coupled to the ceramic base 50 using one of a number of conventional flip chip bonding processes well known to those of ordinary skill in the art. The contact pins 65 communicate logic signals between the printed circuit board 20 and the semiconductor die 60. A heat sink 70 is coupled to the semiconductor die 60 for dissipating heat generated therein.
In accordance with the present invention, contact pads 80, 90 are formed on an upper surface 100 of the ceramic base 50. The contact pads 80, 90 are coupled to the semiconductor die 60 as represented by the dashed line connection. In the illustrated embodiment, the contact pads 80, 90 are solder pads formed during the soldering of other circuitry (not shown) on the upper surface 100. Spring contacts 110, 120 are coupled to the printed circuit board 20 and interface with the contact pads 80, 90. It is also contemplated that the spring contacts 110, 120 may be mounted to the contact pads 80, 90 and interface with the printed circuit board 20. In an alternative embodiment, illustrated in FIG. 2, the spring contacts 110, 120 extend from the socket 30 to interface with the contact pads 80, 90.
The spring contacts 110, 120 may be constructed of a spring metal. Although the contacts 110, 120 are is illustrated as being spring type contacts, the application of the present invention is not so limited, and other contact types may be used. The spring contacts 110, 120 have a higher current-carrying capacity than the contact pins 65 of the ceramic base 50, and, hence, are useful for providing power and ground signals to the semiconductor die 60. Supplying power and ground signals through the spring contacts 110, 120, as opposed to the contact pins 65 of the ceramic base 50, frees up contact pin resources for carrying additional logic signals without requiring an increase in die size.
The particular number of contact pads 80, 90 and corresponding spring contacts 110, 120 is application dependent, and may vary, depending on factors such as the layout of the semiconductor die 60 and the power requirements of the semiconductor die 60. To enhance the corrosion resistance of the spring contacts 110, 120, they may be gold plated. Many different constructs for the spring contacts 110, 120 are possible. The illustrated exemplary spring contacts 110, 120 of FIG. 1 have a roughly s-shaped cross section. Other cross sections, such as c-shaped (as shown in FIG. 2) or rectangular may be used.
In the embodiment of FIG. 1, alignment tabs 130 extend from the socket 30 to engage the spring contacts 110, 120 to inhibit lateral motion thereof. Turning briefly to FIGS. 3A and 3B, alternative embodiments of the alignment tabs 130 are shown. In the embodiment of FIG. 3A, the alignment tab 130 comprises a pin 140 extending from the socket 30 to engage a corresponding notch 150 defined in the spring contact 110. Although, the pin 140 and notch 150 are shown having rectangular shapes, other shapes, such as circular, may be used.
In the embodiment of FIG. 3B, the alignment tab 130 comprises a pair of clips 160 having ramped ends 170 extending from the socket 30 to engage the sides 180 of the spring contact 110. When the spring contact 110 is inserted between the clips 160, the ramped ends 170 cause the clips 160 to deflect, allowing the spring contact 110 to be inserted past the ends 170. After the spring contact 110 passes the ends 170, the deflection force is removed, and the ends 170 retain the spring contact 110 in place.
Returning now to FIG. 1, the spring contact 120 associated with the ground power supply signal has an upwardly turned tip 190 that interfaces with the heat sink 70. The heat sink 70 is grounded to reduce electromagnetic emissions. Using the tip 190 of the spring contact 120 accomplishes this function without requiring an additional connection.
The spring contact 110 associated with the power signal is insulated from the heat sink 70 by an insulative layer 200. An insulating tape, such as Mylar® tape is one material suitable for acting as the insulative layer 200. The insulative layer 200 may be attached to either the spring contact 110 or to the heat sink 70. Of course, any number of other suitable insulative layers may be used. If sufficient clearance exists between the heat sink 70 and the spring contact 110, the insulative layer 200 may be omitted.
The circuit assembly 10 described herein is advantageous in that the spring contacts 110, 120 allow transmission of power and ground supply signals to the semiconductor die 60 without tying up a large number of contact pins in the socket 30. Conserving contact pins allows for increased capabilities of the semiconductor die 60 without consuming valuable real estate for the multitude of power and ground contacts.
The particular embodiments disclosed above are illustrative only, as the invention may be modified and practiced in different but equivalent manners apparent to those skilled in the art having the benefit of the teachings herein. Furthermore, no limitations are intended to the details of construction or design herein shown, other than as described in the claims below. It is therefore evident that the particular embodiments disclosed above may be altered or modified and all such variations are considered within the scope and spirit of the invention. Accordingly, the protection sought herein is as set forth in the claims below.

Claims (10)

What is claimed:
1. A circuit assembly, comprising:
a printed circuit board;
an integrated circuit package, comprising:
a semiconductor die;
a base having a first surface and a second surface, the first surface being coupled to the semiconductor die and including at least one contact pad electrically coupled to the semiconductor die; and
a plurality of external contacts extending from the second surface of the base and being electrically coupled to the semiconductor die;
a socket coupled between the printed circuit board and the base; and
a contact having a first end coupled to the contact pad and a second end coupled to the socket.
2. The circuit assembly of claim 1, wherein the contact coupled between the printed circuit board comprises a spring contact.
3. The circuit assembly of claim 1, further comprising a heat sink mounted to the semiconductor die.
4. The circuit assembly of claim 3, wherein the contact comprises a ground contact and is adapted to interface with the heat sink.
5. The circuit assembly of claim 3, wherein the contact comprises a power contact, and the circuit assembly further comprises an insulative layer disposed between the contact and the heat sink.
6. The circuit assembly of claim 1, wherein the external contacts comprise pin contacts.
7. The circuit assembly of claim 1, wherein the contact pad has a higher current-carrying capacity than individual external contacts.
8. The circuit assembly of claim 7, wherein the external contacts comprise signal contacts, and the contact pad comprises at least one of a power and a ground contact.
9. The circuit assembly of claim 1, wherein the base includes a plurality of contact pads.
10. The semiconductor device of claim 9, wherein the contact pads comprise power and ground contacts.
US09/614,817 2000-07-12 2000-07-12 Spring contact for providing high current power to an integrated circuit Expired - Lifetime US6364669B1 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6652291B2 (en) * 2000-02-14 2003-11-25 Infineon Technologies Ag Leadframe interposer
US20100126764A1 (en) * 2008-11-24 2010-05-27 Seagate Technology, Llc die ground lead
US20160035646A1 (en) * 2013-09-30 2016-02-04 Fuji Electric Co., Ltd. Semiconductor device, method for assembling semiconductor device, semiconductor device component, and unit module

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939570A (en) * 1988-07-25 1990-07-03 International Business Machines, Corp. High power, pluggable tape automated bonding package
US5061686A (en) * 1989-05-15 1991-10-29 Hewlett-Packard Company Superconducting power distribution structure for integrated circuits
US5239198A (en) * 1989-09-06 1993-08-24 Motorola, Inc. Overmolded semiconductor device having solder ball and edge lead connective structure
US5486723A (en) * 1993-05-27 1996-01-23 Ma Laboratories, Inc. Packaged integrated circuit add-on card
US5528083A (en) * 1994-10-04 1996-06-18 Sun Microsystems, Inc. Thin film chip capacitor for electrical noise reduction in integrated circuits
US5545045A (en) * 1993-09-01 1996-08-13 Kabushiki Kaisha Toshiba IC contactor
US5744863A (en) * 1994-07-11 1998-04-28 International Business Machines Corporation Chip carrier modules with heat sinks attached by flexible-epoxy
US5923086A (en) * 1997-05-14 1999-07-13 Intel Corporation Apparatus for cooling a semiconductor die
US5982018A (en) * 1997-05-23 1999-11-09 Micron Technology, Inc. Thin film capacitor coupons for memory modules and multi-chip modules

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939570A (en) * 1988-07-25 1990-07-03 International Business Machines, Corp. High power, pluggable tape automated bonding package
US5061686A (en) * 1989-05-15 1991-10-29 Hewlett-Packard Company Superconducting power distribution structure for integrated circuits
US5239198A (en) * 1989-09-06 1993-08-24 Motorola, Inc. Overmolded semiconductor device having solder ball and edge lead connective structure
US5486723A (en) * 1993-05-27 1996-01-23 Ma Laboratories, Inc. Packaged integrated circuit add-on card
US5545045A (en) * 1993-09-01 1996-08-13 Kabushiki Kaisha Toshiba IC contactor
US5744863A (en) * 1994-07-11 1998-04-28 International Business Machines Corporation Chip carrier modules with heat sinks attached by flexible-epoxy
US5528083A (en) * 1994-10-04 1996-06-18 Sun Microsystems, Inc. Thin film chip capacitor for electrical noise reduction in integrated circuits
US5923086A (en) * 1997-05-14 1999-07-13 Intel Corporation Apparatus for cooling a semiconductor die
US5982018A (en) * 1997-05-23 1999-11-09 Micron Technology, Inc. Thin film capacitor coupons for memory modules and multi-chip modules

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6652291B2 (en) * 2000-02-14 2003-11-25 Infineon Technologies Ag Leadframe interposer
US20100126764A1 (en) * 2008-11-24 2010-05-27 Seagate Technology, Llc die ground lead
US20160035646A1 (en) * 2013-09-30 2016-02-04 Fuji Electric Co., Ltd. Semiconductor device, method for assembling semiconductor device, semiconductor device component, and unit module
US9917031B2 (en) * 2013-09-30 2018-03-13 Fuji Electric Co., Ltd. Semiconductor device, and method for assembling semiconductor device

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