US5885854A - Method for application of de-wetting material for glob top applications - Google Patents

Method for application of de-wetting material for glob top applications Download PDF

Info

Publication number
US5885854A
US5885854A US08/823,214 US82321497A US5885854A US 5885854 A US5885854 A US 5885854A US 82321497 A US82321497 A US 82321497A US 5885854 A US5885854 A US 5885854A
Authority
US
United States
Prior art keywords
wetting agent
semiconductor device
applying
carrier substrate
wetting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US08/823,214
Inventor
Richard W. Wensel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
US Bank NA
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to US08/823,214 priority Critical patent/US5885854A/en
Application granted granted Critical
Publication of US5885854A publication Critical patent/US5885854A/en
Assigned to U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT reassignment U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MICRON TECHNOLOGY, INC.
Assigned to MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT reassignment MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT PATENT SECURITY AGREEMENT Assignors: MICRON TECHNOLOGY, INC.
Anticipated expiration legal-status Critical
Assigned to U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT reassignment U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Assignors: MICRON TECHNOLOGY, INC.
Assigned to MICRON TECHNOLOGY, INC. reassignment MICRON TECHNOLOGY, INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Assigned to MICRON TECHNOLOGY, INC. reassignment MICRON TECHNOLOGY, INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312Organic layers, e.g. photoresist
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Definitions

  • FIGS. 2-4 are oblique views of a technique of forming an encapsulant layer on a semiconductor device using the de-wetting technique of the present invention wherein a de-wetting agent is applied with a stencil;
  • FIG. 6 is an oblique view of a technique of forming an encapsulant layer on a semiconductor device using the de-wetting technique of the present invention wherein a de-wetting agent is applied as a film;
  • a thin film or layer of de-wetting agent 12 applied to the carrier substrate 14 causes the encapsulation material 16 to "bead up"
  • the encapsulation material 16 "beads” rather than flows. Therefore, an adequate amount or thickness of encapsulation material 16 remains disposed over exterior surfaces 18 of the semiconductor device 10 in order to protect the semiconductor device 10. In this situation, an angle of repose ⁇ b of the encapsulation material 16 may even be greater than 90 degrees, as shown in FIG. 1.
  • the de-wetting agent 12 is applied to the substrate 14 in such a manner to border the area to be encapsulated as show in FIG. 1.
  • the illustrated embodiment shows the de-wetting agent surrounding the semiconductor device, it is, of course, understood that the de-wetting agent need not completely surround the semiconductor device, although such a configuration is preferred as not requiring dams or other protrusions to contain a portion of the encapsulant.
  • the pattern in which the de-wetting agent is applied will, of course, depend on the particular application.
  • the de-wetting agent may be selected from a number of suitable commercially available materials including silicones, latex compounds, and high-molecular weight waxes.

Abstract

A method of forming high definition elements for electrical and electronic devices, substrates, and other components from or including viscous material. The method includes applying a de-wetting agent to a surface bordering the viscous material prior to applying the viscous material. The de-wetting agent causes the viscous material to "bead-up."

Description

PRIOR APPLICATION
This is a divisional of application Ser. No. 08/747,229, filed Nov. 12, 1996, pending.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to maintaining the structure of viscous materials applied to semiconductor components. More particularly, the present invention relates to glob top application wherein viscous encapsulant material is prevented from flowing when applied to semiconductor components by a layer of de-wetting agent.
2. State of the Art
Higher performance, lower cost, increased miniaturization of components, and greater packaging density of integrated circuits are goals of the computer industry. As components become smaller and smaller, tolerances for all semiconductor structures (circuitry traces, printed circuit board and flip chip bumps, adhesive structures for lead attachment, encapsulation structures, and the like) become more and more stringent. However, because of the characteristics of the materials (generally viscous materials) used in forming the semiconductor structures, it is becoming difficult to form smaller circuitry traces. conductive polymer bumps with closer pitches, adequate adhesive structures for leads attachment, and adequate encapsulation structures.
Material flow problems exist in the application of encapsulation materials. After a semiconductor device is attached to a printed circuit board ("PCB") by any known chip-on-board ("COB") technique, the semiconductor device is usually encapsulated with a viscous liquid or gel insulative material (e.g., silicones, polyimides, epoxies, plastics, and the like). This encapsulation (depending on its formulation) allows the semiconductor device to better withstand exposure to a wide variety of environmental conditions such as moisture, ion impingements, heat, and abrasion.
One technique used in the industry is illustrated in FIGS. 7-9. A stencil 50 is placed on a conductor-carrying substrate such as a PCB 52 such that an open area 54 in the stencil 50 exposes a semiconductor device 56 to be encapsulated as well as a portion of tile substrate 52 surrounding the semiconductor device 56, as shown in FIG. 7. An encapsulant material 58 is then extruded from a nozzle 60 into the open area 54, as shown in FIG. 8. However, when the stencil 50 is removed, the encapsulant material 58 sags or flows laterally under the force of gravity, as shown in FIG. 9. This flowing thins the encapsulant material 58 on the top surface 62 of the semiconductor device 56, which may result in inadequate protection for the semiconductor device 56, particularly in the vicinity of the upper peripheral edges 64. Using a thicker encapsulant material would help minimize the amount of flow; however, thicker encapsulant materials are difficult to extrude through a nozzle and are subject to the formation of voids such as air pockets. These voids can cause delamination of the encapsulant from the PCB 52 or the semiconductor device 56, and if the voids contain moisture, during subsequent processing steps the encapsulant material may be heated to the point at which the moisture, usually in condensed form, vaporizes. Vaporization causes what is known as a "popcorn effect" (i.e., a small explosion) which at least damages (i.e., cracks) the encapsulation material and more often results in contamination of the device and usually irreparable damage thereto, effectively destroying the semiconductor device as a usable assembly.
In an effort to cope with the encapsulant flow problem, the damming technique shown in FIGS. 10-12 has been used. A high viscosity material 66 is extruded through a nozzle 68 directly onto a PCB or other carrier substrate 70 to form a dam 72 around a semiconductor device 74, as shown in FIG. 10, or a stencil can be placed on the substrate 70 such that a continuous aperture in the stencil exposes an area around the semiconductor device 74 to be dammed. The high viscosity material 66 is then disposed into the stencil aperture to form the dam 72. A low viscosity encapsulation material 76 is then flowed into the area bounded by the dam 72 by a second nozzle 78 such as a syringe or spray applicator, as shown in FIG. 11. The dam 72 prevents the low viscosity encapsulation material 76 from flowing and defines the periphery of the dammed encapsulated structure 80, shown in FIG. 12, after curing of material 76. The dam 72 can be made with high viscosity material without adverse consequences since it does not directly contact the semiconductor device 74 or form any part, other than a damming function, of the encapsulation of the semiconductor device 74. Although this damming technique is an effective means of containing the low viscosity encapsulation material 76, it requires somewhat duplicative processing steps as well as additional material and equipment, all of which increase the cost of the fabricated component.
Thus, it can be appreciated that it would be advantageous to develop a technique to control viscous material flow in the formation of semiconductor components while using commercially-available, widely-practiced semiconductor device fabrication techniques.
SUMMARY OF THE INVENTION
The present invention relates to a method for maintaining viscous material boundary definition by using a de-wetting agent that causes the viscous material to "bead up" as it reaches the area that has been coated with the de-wetting agent.
The present invention comprises using standard techniques for applying viscous materials (e.g., spin on, spray on, roll on, screen printed, and the like) in the fabrication of semiconductor device elements, such as encapsulation structures and the like. A de-wetting agent is applied to the surface of a carrier substrate such as a PCB so that the de-wetting agent borders the area to be encapsulated. A stencil or other appropriate masking technique is used to define the area where the de-wetting agent is to be applied and to prevent the application of the de-wetting agent to other areas. Alternatively, a de-wetting film containing an aperture for the semiconductor device site may be applied to the surface of the carrier substrate. The encapsulating material is then applied to the area to be encapsulated. The de-wetting agent prevents the encapsulation material from flowing and causes the encapsulation material to "bead up," thus forming a large angle of repose with respect to the surface of the carrier substrate.
BRIEF DESCRIPTION OF THE DRAWINGS
While the specification concludes with claims particularly pointing out and distinctly claiming that which is regarded as the present invention, the advantages of this invention can be more readily ascertained from the following description of the invention when read in conjunction with the accompanying drawings in which:
FIG. 1 is a cross-sectional view of an encapsulated semiconductor device formed by the de-wetting method of the present invention;
FIGS. 2-4 are oblique views of a technique of forming an encapsulant layer on a semiconductor device using the de-wetting technique of the present invention wherein a de-wetting agent is applied with a stencil;
FIG. 5 is an oblique view of a technique of forming an encapsulant layer on a semiconductor device using the de-wetting technique of the present invention wherein a de-wetting agent is applied after the semiconductor device has been masked;
FIG. 6 is an oblique view of a technique of forming an encapsulant layer on a semiconductor device using the de-wetting technique of the present invention wherein a de-wetting agent is applied as a film;
FIGS. 7-9 are side cross-sectional views of a technique of forming an encapsulant layer on a semiconductor device using a stencil; and
FIGS. 10-12 are oblique views of a technique of forming an encapsulant layer on a semiconductor device using high viscosity material dams.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 1 illustrates a semiconductor device 10 encapsulated by the de-wetting method of the present invention. It is, of course, understood that any semiconductor device component, including not only semiconductor dice, but also conductive traces, resistors, capacitors, transistors, diodes, and other components requiring the protection of an encapsulant, may be encapsulated using the de-wetting method of the present invention. For the sake of convenience, however, the term "semiconductor device" will be used to encompass all such components. In the present invention, a thin film or layer of de-wetting agent 12 applied to the carrier substrate 14 causes the encapsulation material 16 to "bead up" Thus, where the encapsulation material 16 meets the de-wetting agent 12, the encapsulation material 16 "beads" rather than flows. Therefore, an adequate amount or thickness of encapsulation material 16 remains disposed over exterior surfaces 18 of the semiconductor device 10 in order to protect the semiconductor device 10. In this situation, an angle of repose αb of the encapsulation material 16 may even be greater than 90 degrees, as shown in FIG. 1. The de-wetting agent 12 is applied to the substrate 14 in such a manner to border the area to be encapsulated as show in FIG. 1.
The encapsulation method of the present invention is illustrated in FIGS. 2-4 (components common to both FIG. 1 and FIGS. 2-4 retain the same numeric designation). A stencil 20 is placed on a conductor-carrying substrate 14, such as a PCB, such that a continuous aperture 22 in the stencil 20 exposes an area of the substrate 14 around the semiconductor device to be encapsulated, as shown in FIG. 2. The de-wetting agent 12, such as silicone, latex, high-molecular weight wax, and the like, is then applied through the aperture 22 in the stencil 20 and onto the surface of the substrate 14. It is of course understood that the de-wetting agent 12 may be applied without a stencil by any means such as precision spraying, screen printing, pouring, extruding, stamping, rolling and the like. When the stencil 20 is removed, a thin film of de-wetting agent 12 remains on the surface of the substrate 14 and borders the area to be encapsulated, as shown in FIG. 3 (thickness of film 12 exaggerated for clarity). The encapsulation material 16, preferably having a low viscosity, is then extruded, flowed, or sprayed by a nozzle 24 into the area bounded by the de-wetting agent 12, as shown in FIG. 3. The encapsulation material 16 may also be stencil printed. The de-wetting agent 12 prevents the low viscosity encapsulation material 16 from flowing, to form the encapsulation structure 26 shown in FIG. 4. By preventing the flow of the encapsulant material 16, the encapsulant material 16 on the top and side surfaces 18 of the semiconductor device 10 (shown in FIG. 1) remains thick enough to provide adequate protection for the semiconductor device 10.
Alternatively, the encapsulation method of the present invention may be performed by masking the semiconductor device before applying the de-wetting agent as shown in FIG. 5. The encapsulation method illustrated in FIGS. 1-4 is similar to the method illustrated in FIG. 5, therefore components common to both FIGS. 1-4 and 5 retain the same numeric designation. FIG. 5 differs from FIGS. 1-4 only in the use of masking material rather than the use of a stencil. The semiconductor device 10 (shown in shadow) and an appropriate area surrounding the semiconductor device 10 is masked off with a masking material 28. The masking material 28 may be a physical masking material, such as a piece of masking tape, or a resist-type mask material.
After the masking material 28 is applied over the semiconductor device 10 and surrounding area, a liquefied de-wetting agent 16 (not shown) is applied over the surface of the substrate 14 and potentially all or a portion of the masking material 28, as by spraying. The masking material 28 is then removed either physically, for the physical masking material, or with an appropriate solvent, for the resist-type mask material, which will wash away the resist-type mask material without removing the de-wetting agent adhered to substrate 14. After the masking material 28 is removed, the encapsulation material is then applied over the semiconductor device 10 in a manner discussed above.
Alternatively, the encapsulation method of the present invention may be performed by using a de-wetting film to surround the semiconductor device instead of applying a liquid de-wetting agent as shown in FIG. 6. The encapsulation method illustrated in FIGS. 1-5 is similar to the method illustrated in FIG. 6, therefore components common to both FIGS. 1-5 and 6 retain the same numeric designation. FIG. 6 differs from FIGS. 1-5 only in the use of a predimensioned de-wetting agent in film form rather than the use of a stencil or masking to define a de-wetting agent boundary. A de-wetting film 30 is applied to the surface of the substrate 14. The de-wetting film 30 has an aperture 32 corresponding to the semiconductor device 10 and an appropriate surrounding area 34, the semiconductor device site 36. Although the de-wetting film 30 shown in FIG. 6 has a single aperture 32, it is, of course, understood that the film 30 may be large enough to cover the entire surface of the substrate 14 and contain multiple apertures corresponding to all semiconductor devices on the substrate. After the de-wetting film 30 has been applied to the surface of the substrate 14, a low viscosity encapsulation material 16 is then extruded, flowed, or sprayed into the area bounded by the de-wetting film 30.
Although the illustrated embodiment shows the de-wetting agent surrounding the semiconductor device, it is, of course, understood that the de-wetting agent need not completely surround the semiconductor device, although such a configuration is preferred as not requiring dams or other protrusions to contain a portion of the encapsulant. The pattern in which the de-wetting agent is applied will, of course, depend on the particular application.
The following brief explanation is intended to afford the reader a better understanding of the phenomena of "surface tension" and "wetting" as employed in the present invention. According to the theory of molecular attraction, molecules of liquid in the interior of the liquid are subject to equal forces of attraction from other molecules on all sides. Molecules on the surface of the liquid are subjected to these forces only on the liquid side. As a result, the molecules on the surface are pulled inward and closer together. Thus, the surface of the liquid can be described as behaving like a stretched membrane trying to contract to the smallest possible surface area. The liquid surface exerts tension on adjacent portions of the surface or on other objects in contact with the liquid. This tension is defined as surface tension. The magnitude of the surface tension at a liquid-solid interface depends on the relative amounts of attraction between the liquid molecules themselves and between the liquid and solid molecules.
A liquid is said to "wet" a solid when the attraction between the liquid and solid molecules, the adhesive force, is greater than the internal attraction between the liquid molecules themselves, the cohesive force. The surface of the liquid forms an angle of repose, α, with respect to the surface of the solid. When the angle of repose, α, is less than 90 degrees, wetting occurs. When the angle of repose, α, is equal to or greater than 90 degrees, non-wetting occurs. Non-wetting occurs when the attraction between the liquid and solid molecules, the adhesive force, is less than the internal attraction between the liquid molecules themselves, the cohesive force. Thus, a de-wetting agent is a substance such that the attraction between the encapsulant molecules and the de-wetting agent molecules, or the adhesive force, is less than the internal attraction between the encapsulation molecules themselves, or the cohesive force.
FIG. 9 illustrates a semiconductor device 56 encapsulated by the stencil method without the use of a de-wetting agent. The surface of the encapsulation material 58 forms an angle of repose, αA, with respect to the surface of the substrate 52. If the encapsulation material has a low viscosity, it flows or sags as shown in FIG. 9. In addition, the angle of repose, αA, is less than 90 degrees and the encapsulation material 58 is said to "wet" the substrate 52. This wetting or flowing thins the encapsulant material on the top surface of the semiconductor device 56 and on the upper edges thereof, which may result in inadequate protection for the semiconductor device.
A larger angle of repose, αA, may be obtained by using a higher viscosity encapsulation material. A higher viscosity encapsulation material, however, is subject to the formation of voids as previously noted, which voids can cause delamination from the semiconductor device and can cause a "popcorn effect" as trapped water condensation vaporizes during subsequent processing.
As previously noted, FIG. 1 illustrates a semiconductor device 10 encapsulated using the de-wetting agent of the present invention. The surface of the encapsulation material 16 forms an angle of repose, αB, with respect to the surface of the substrate 14. Because of the presence of de-wetting agent 12, the encapsulation material 16 beads up on the surface of the substrate 14 rather than flowing or sagging. In addition, the angle of repose, αb, is equal to or greater than 90 degrees and the encapsulation material 16 does not "wet" the substrate 14. Because the encapsulation material does not wet the substrate, the encapsulation material remains thicker over the surfaces 18 of the semiconductor device 10, which protects the semiconductor device. Thus, by forming a film or thin layer of de-wetting agent at the boundary of the encapsulation material, the encapsulation material does not wet the substrate surface and a low viscosity encapsulation material may be used.
The de-wetting agent may be selected from a number of suitable commercially available materials including silicones, latex compounds, and high-molecular weight waxes.
Having thus described in detail preferred embodiments of the present invention, it is to be understood that the invention defined by the appended claims is not to be limited by particular details set forth in the above description as many apparent variations thereof are possible without departing from the spirit or scope thereof.

Claims (10)

What is claimed is:
1. A method of encapsulating a semiconductor device, comprising:
providing a carrier substrate supporting said semiconductor device;
applying a de-wetting agent on said carrier substrate in a predetermined pattern; and
applying an encapsulant material over said semiconductor device in a volume sufficient to cause an angle or repose greater than 90 degrees to form at a periphery of said encapsulant material adjacent said de-wetting agent.
2. The method of claim 1, wherein said predetermined pattern includes an area bordering said semiconductor device.
3. The method of claim 2, wherein said de-wetting agent substantially surrounds said semiconductor device.
4. The method of claim 1, wherein applying said de-wetting agent includes:
placing a template, having at least one aperture, on said carrier substrate wherein said at least one aperture exposes a portion of said carrier substrate;
applying said de-wetting agent into said at least one template aperture; and
removing said template.
5. The method of claim 1, wherein applying said de-wetting agent includes:
masking an area to be encapsulated on said carrier substrate with a masking material;
applying said de-wetting agent onto said carrier substrate; and
removing said masking material.
6. The method of claim 5, wherein said masking material includes a physical mask material.
7. The method of claim 5, wherein said masking material includes a resist-type material.
8. The method of claim 7, wherein removing said masking material includes washing said masking material with a solvent.
9. The method of claim 1, wherein applying said de-wetting agent includes:
applying a predimensioned de-wetting agent film onto said carrier substrate.
10. The method of claim 1, wherein a cohesive force between molecules of said encapsulant material is greater than an adhesive force between the molecules of said encapsulant material and molecules of said de-wetting agent.
US08/823,214 1996-11-12 1997-03-24 Method for application of de-wetting material for glob top applications Expired - Lifetime US5885854A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US08/823,214 US5885854A (en) 1996-11-12 1997-03-24 Method for application of de-wetting material for glob top applications

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/747,229 US5936310A (en) 1996-11-12 1996-11-12 De-wetting material for glob top applications
US08/823,214 US5885854A (en) 1996-11-12 1997-03-24 Method for application of de-wetting material for glob top applications

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US08/747,229 Division US5936310A (en) 1996-11-12 1996-11-12 De-wetting material for glob top applications

Publications (1)

Publication Number Publication Date
US5885854A true US5885854A (en) 1999-03-23

Family

ID=25004193

Family Applications (2)

Application Number Title Priority Date Filing Date
US08/747,229 Expired - Lifetime US5936310A (en) 1996-11-12 1996-11-12 De-wetting material for glob top applications
US08/823,214 Expired - Lifetime US5885854A (en) 1996-11-12 1997-03-24 Method for application of de-wetting material for glob top applications

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US08/747,229 Expired - Lifetime US5936310A (en) 1996-11-12 1996-11-12 De-wetting material for glob top applications

Country Status (1)

Country Link
US (2) US5936310A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6040205A (en) * 1997-08-05 2000-03-21 Micron Technology, Inc. Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid
US6101098A (en) * 1998-02-17 2000-08-08 Nec Corporation Structure and method for mounting an electric part
US20020029743A1 (en) * 1997-08-05 2002-03-14 Moden Walter L. Method and apparatus for applying adhesives to a lead frame
US6459144B1 (en) * 2001-03-02 2002-10-01 Siliconware Precision Industries Co., Ltd. Flip chip semiconductor package
US6555412B1 (en) 1999-12-10 2003-04-29 Micron Technology, Inc. Packaged semiconductor chip and method of making same
US20030116085A1 (en) * 1997-08-05 2003-06-26 Moden Walter L. Apparatus for modifying the configuration of an exposed surface of a viscous fluid
US20050224936A1 (en) * 2004-04-12 2005-10-13 Jeng-Dah Wu Chip package structure
US20070187136A1 (en) * 2004-09-29 2007-08-16 Masahiro Higashiguchi Printed circuit board, method of producing the same, and electronic unit
US20080099139A1 (en) * 2006-09-13 2008-05-01 Shin-Etsu Chemical Co., Ltd. Method for sealing microcomponent
US20080142996A1 (en) * 2006-12-19 2008-06-19 Gopalakrishnan Subramanian Controlling flow of underfill using polymer coating and resulting devices
US20080157352A1 (en) * 2006-12-28 2008-07-03 Shripad Gokhale Reducing underfill keep out zone on substrate used in electronic device processing
US20120187583A1 (en) * 2009-12-23 2012-07-26 Intel Corporation Methods and apparatuses to stiffen integrated circuit package
US20140126161A1 (en) * 2012-11-02 2014-05-08 Universal Global Scientific Industrial Co., Ltd. Electronic pacakge module and method of manufacturing the same
US20150375260A1 (en) * 2013-01-08 2015-12-31 Hzo, Inc. Materials for masking substrates and associated methods

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6762509B2 (en) * 2001-12-11 2004-07-13 Celerity Research Pte. Ltd. Flip-chip packaging method that treats an interconnect substrate to control stress created at edges of fill material
JP3893301B2 (en) * 2002-03-25 2007-03-14 沖電気工業株式会社 Manufacturing method of semiconductor device and manufacturing method of semiconductor module
KR20030085868A (en) * 2002-05-02 2003-11-07 삼성전기주식회사 Method for mounting component by multi-layer and device thereby
US6904673B1 (en) 2002-09-24 2005-06-14 International Business Machines Corporation Control of flux by ink stop line in chip joining
US10847385B2 (en) 2018-10-09 2020-11-24 Nxp B.V. Glob top encapsulation using molding tape

Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143456A (en) * 1976-06-28 1979-03-13 Citizen Watch Commpany Ltd. Semiconductor device insulation method
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
US4300153A (en) * 1977-09-22 1981-11-10 Sharp Kabushiki Kaisha Flat shaped semiconductor encapsulation
US4507675A (en) * 1981-03-05 1985-03-26 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
JPS60161642A (en) * 1984-02-01 1985-08-23 Hitachi Ltd Semiconductor device
JPH01107562A (en) * 1987-10-20 1989-04-25 Cmk Corp Printed wiring board
US4843036A (en) * 1987-06-29 1989-06-27 Eastman Kodak Company Method for encapsulating electronic devices
JPH02102563A (en) * 1988-10-12 1990-04-16 Shindengen Electric Mfg Co Ltd Semiconductor device and manufacture thereof
US4921160A (en) * 1988-02-29 1990-05-01 American Telephone And Telegraph Company Personal data card and method of constructing the same
US4942140A (en) * 1987-03-25 1990-07-17 Mitsubishi Denki Kabushiki Kaisha Method of packaging semiconductor device
US5031022A (en) * 1989-05-02 1991-07-09 Nippon Steel Corporation Film carrier for mounting IC chips
US5051275A (en) * 1989-11-09 1991-09-24 At&T Bell Laboratories Silicone resin electronic device encapsulant
US5068712A (en) * 1988-09-20 1991-11-26 Hitachi, Ltd. Semiconductor device
US5085913A (en) * 1990-04-27 1992-02-04 At&T Bell Laboratories Silicone material
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package
JPH05109929A (en) * 1991-10-14 1993-04-30 Sony Corp Sealing method of semiconductor
JPH06169033A (en) * 1992-11-30 1994-06-14 Nec Corp Method for mounting semiconductor chips
US5386342A (en) * 1992-01-30 1995-01-31 Lsi Logic Corporation Rigid backplane formed from a moisture resistant insulative material used to protect a semiconductor device
US5577819A (en) * 1994-05-02 1996-11-26 Olsen; Danny H. Bathroom appliance cabinet

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5598034A (en) * 1992-07-22 1997-01-28 Vlsi Packaging Corporation Plastic packaging of microelectronic circuit devices
US5577319A (en) * 1995-03-31 1996-11-26 Motorola, Inc. Method of encapsulating a crystal oscillator

Patent Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143456A (en) * 1976-06-28 1979-03-13 Citizen Watch Commpany Ltd. Semiconductor device insulation method
US4300153A (en) * 1977-09-22 1981-11-10 Sharp Kabushiki Kaisha Flat shaped semiconductor encapsulation
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
US4507675A (en) * 1981-03-05 1985-03-26 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
JPS60161642A (en) * 1984-02-01 1985-08-23 Hitachi Ltd Semiconductor device
US4942140A (en) * 1987-03-25 1990-07-17 Mitsubishi Denki Kabushiki Kaisha Method of packaging semiconductor device
US4843036A (en) * 1987-06-29 1989-06-27 Eastman Kodak Company Method for encapsulating electronic devices
JPH01107562A (en) * 1987-10-20 1989-04-25 Cmk Corp Printed wiring board
US4921160A (en) * 1988-02-29 1990-05-01 American Telephone And Telegraph Company Personal data card and method of constructing the same
US5068712A (en) * 1988-09-20 1991-11-26 Hitachi, Ltd. Semiconductor device
JPH02102563A (en) * 1988-10-12 1990-04-16 Shindengen Electric Mfg Co Ltd Semiconductor device and manufacture thereof
US5031022A (en) * 1989-05-02 1991-07-09 Nippon Steel Corporation Film carrier for mounting IC chips
US5051275A (en) * 1989-11-09 1991-09-24 At&T Bell Laboratories Silicone resin electronic device encapsulant
US5085913A (en) * 1990-04-27 1992-02-04 At&T Bell Laboratories Silicone material
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package
JPH05109929A (en) * 1991-10-14 1993-04-30 Sony Corp Sealing method of semiconductor
US5386342A (en) * 1992-01-30 1995-01-31 Lsi Logic Corporation Rigid backplane formed from a moisture resistant insulative material used to protect a semiconductor device
JPH06169033A (en) * 1992-11-30 1994-06-14 Nec Corp Method for mounting semiconductor chips
US5577819A (en) * 1994-05-02 1996-11-26 Olsen; Danny H. Bathroom appliance cabinet

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6919229B2 (en) 1997-08-05 2005-07-19 Micron Technology, Inc. Method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid
US6336974B1 (en) 1997-08-05 2002-01-08 Micron Technology, Inc. Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid
US20020029741A1 (en) * 1997-08-05 2002-03-14 Ahmad Syed Sajid Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid
US20020029743A1 (en) * 1997-08-05 2002-03-14 Moden Walter L. Method and apparatus for applying adhesives to a lead frame
US7087116B2 (en) 1997-08-05 2006-08-08 Micron Technology, Inc. Apparatus for modifying the configuration of an exposed surface of a viscous fluid
US6040205A (en) * 1997-08-05 2000-03-21 Micron Technology, Inc. Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid
US20030116085A1 (en) * 1997-08-05 2003-06-26 Moden Walter L. Apparatus for modifying the configuration of an exposed surface of a viscous fluid
US6818460B2 (en) 1997-08-05 2004-11-16 Micron Technology, Inc. Method for applying adhesives to a lead frame
US6890384B2 (en) 1997-08-05 2005-05-10 Micron Technology, Inc Apparatus and method for modifying the configuration of an exposed surface of a viscous fluid
US6101098A (en) * 1998-02-17 2000-08-08 Nec Corporation Structure and method for mounting an electric part
US6555412B1 (en) 1999-12-10 2003-04-29 Micron Technology, Inc. Packaged semiconductor chip and method of making same
US6459144B1 (en) * 2001-03-02 2002-10-01 Siliconware Precision Industries Co., Ltd. Flip chip semiconductor package
US20050224936A1 (en) * 2004-04-12 2005-10-13 Jeng-Dah Wu Chip package structure
US20070187136A1 (en) * 2004-09-29 2007-08-16 Masahiro Higashiguchi Printed circuit board, method of producing the same, and electronic unit
US20080099139A1 (en) * 2006-09-13 2008-05-01 Shin-Etsu Chemical Co., Ltd. Method for sealing microcomponent
US20080142996A1 (en) * 2006-12-19 2008-06-19 Gopalakrishnan Subramanian Controlling flow of underfill using polymer coating and resulting devices
US8362627B2 (en) * 2006-12-28 2013-01-29 Intel Corporation Reducing underfill keep out zone on substrate used in electronic device processing
US20080157352A1 (en) * 2006-12-28 2008-07-03 Shripad Gokhale Reducing underfill keep out zone on substrate used in electronic device processing
US7875503B2 (en) 2006-12-28 2011-01-25 Intel Corporation Reducing underfill keep out zone on substrate used in electronic device processing
US20110084388A1 (en) * 2006-12-28 2011-04-14 Shripad Gokhale Reducing underfill keep out zone on substrate used in electronic device processing
US20120187583A1 (en) * 2009-12-23 2012-07-26 Intel Corporation Methods and apparatuses to stiffen integrated circuit package
US8502400B2 (en) * 2009-12-23 2013-08-06 Intel Corporation Methods and apparatuses to stiffen integrated circuit package
US20140126161A1 (en) * 2012-11-02 2014-05-08 Universal Global Scientific Industrial Co., Ltd. Electronic pacakge module and method of manufacturing the same
US9332646B2 (en) * 2012-11-02 2016-05-03 Universal Scientific Industrial (Shanghai) Co., Ltd. Electronic package module and method of manufacturing the same
US20150375260A1 (en) * 2013-01-08 2015-12-31 Hzo, Inc. Materials for masking substrates and associated methods
US10449568B2 (en) 2013-01-08 2019-10-22 Hzo, Inc. Masking substrates for application of protective coatings
US10744529B2 (en) * 2013-01-08 2020-08-18 Hzo, Inc. Materials for masking substrates and associated methods

Also Published As

Publication number Publication date
US5936310A (en) 1999-08-10

Similar Documents

Publication Publication Date Title
US5885854A (en) Method for application of de-wetting material for glob top applications
US6984545B2 (en) Methods of encapsulating selected locations of a semiconductor die assembly using a thick solder mask
KR101483419B1 (en) Method of packaging an integrated circuit die
US6664646B2 (en) Chip-on-board assemblies, carrier assemblies and carrier substrates using residual organic compounds to facilitate gate break
US5461197A (en) Electronic device having a chip with an external bump terminal equal or smaller than a via hole on a board
US6238223B1 (en) Method of depositing a thermoplastic polymer in semiconductor fabrication
US7446407B2 (en) Chip package structure
US6083768A (en) Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components
JP2001250889A (en) Mounting structure of optical element and its manufacturing method
US20050082686A1 (en) Circuitized substrate for fixing solder beads on pads
US11021786B2 (en) Copper passivation
JP2001244384A (en) Bare chip mounting printed wiring board
KR101443969B1 (en) Printed Circuit Board and Method for Manufacturing Thereof
KR102408126B1 (en) Electrical apparatus having electrical pattern capable of preventing solder bridge
JPH0290658A (en) Densely packaged circuit device
JP2928755B2 (en) Electronic component manufacturing method
JP3616657B2 (en) Printed wiring board and printed wiring board manufacturing method
KR100286808B1 (en) BGA resin barrier
JPH1074869A (en) Electronic part assembly and assembling method
JPH04118950A (en) Semiconductor device and its sealing method
JPH01107561A (en) Printed wiring board
JPH0582050U (en) Hybrid IC
JPH01107563A (en) Mounting method for chip component on printed wiring board
JPH0380348B2 (en)
JP2001223302A (en) Electronic parts and manufacturing method therefor

Legal Events

Date Code Title Description
STCF Information on status: patent grant

Free format text: PATENTED CASE

CC Certificate of correction
FPAY Fee payment

Year of fee payment: 4

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12

AS Assignment

Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT, CALIFORNIA

Free format text: SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038669/0001

Effective date: 20160426

Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGEN

Free format text: SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038669/0001

Effective date: 20160426

AS Assignment

Owner name: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT, MARYLAND

Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038954/0001

Effective date: 20160426

Owner name: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL

Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038954/0001

Effective date: 20160426

AS Assignment

Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT, CALIFORNIA

Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:043079/0001

Effective date: 20160426

Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGEN

Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:043079/0001

Effective date: 20160426

AS Assignment

Owner name: MICRON TECHNOLOGY, INC., IDAHO

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT;REEL/FRAME:047243/0001

Effective date: 20180629

AS Assignment

Owner name: MICRON TECHNOLOGY, INC., IDAHO

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT;REEL/FRAME:050937/0001

Effective date: 20190731