US5182801A - Apparatus and method for providing fast data transfer between multiple devices through dynamic reconfiguration of the memory space of the devices - Google Patents
Apparatus and method for providing fast data transfer between multiple devices through dynamic reconfiguration of the memory space of the devices Download PDFInfo
- Publication number
- US5182801A US5182801A US07/363,672 US36367289A US5182801A US 5182801 A US5182801 A US 5182801A US 36367289 A US36367289 A US 36367289A US 5182801 A US5182801 A US 5182801A
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- US
- United States
- Prior art keywords
- memory
- data
- bank
- devices
- memory bank
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
Abstract
Description
TABLE 1 ______________________________________ Device Requests REQUEST DESCRIPTION ______________________________________ Unused Bank Request The device requests any available memory bank to be mapped into a specific location of the device's own memory space. Highest Priority The device requests the memory Request bank that has the needed data with the highest priority. Bank from Device A request for a memory bank with data from a specified device in the system. Send to Device A request to reassign a particular memory bank to another device in a specified location. ______________________________________
TABLE 2 ______________________________________ Status Information STATUS DESCRIPTION ______________________________________ No Such Bank The device request is not honored, either because all memory banks are already attached to the other devices, or because the specified memory bank is not available. Bank Attached The control logic established a connection with a memory bank, and the connection is valid. Bank Reassigned Informs the requesting device that the request to send has been honored. Bank Pending A memory bank with data is queued for the device. ______________________________________
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/363,672 US5182801A (en) | 1989-06-09 | 1989-06-09 | Apparatus and method for providing fast data transfer between multiple devices through dynamic reconfiguration of the memory space of the devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/363,672 US5182801A (en) | 1989-06-09 | 1989-06-09 | Apparatus and method for providing fast data transfer between multiple devices through dynamic reconfiguration of the memory space of the devices |
Publications (1)
Publication Number | Publication Date |
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US5182801A true US5182801A (en) | 1993-01-26 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/363,672 Expired - Lifetime US5182801A (en) | 1989-06-09 | 1989-06-09 | Apparatus and method for providing fast data transfer between multiple devices through dynamic reconfiguration of the memory space of the devices |
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Cited By (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5440713A (en) * | 1992-05-29 | 1995-08-08 | Industrial Technology Research Institute | M-way N-port paged-interleaved memory system |
US5481736A (en) * | 1993-02-17 | 1996-01-02 | Hughes Aircraft Company | Computer processing element having first and second functional units accessing shared memory output port on prioritized basis |
US5548740A (en) * | 1992-02-10 | 1996-08-20 | Sharp Kabushiki Kaisha | Information processor efficiently using a plurality of storage devices having different access speeds and a method of operation thereof |
US5613151A (en) * | 1994-05-19 | 1997-03-18 | Dockser; Kenneth A. | Data processor with flexible register mapping scheme |
US5617537A (en) * | 1993-10-05 | 1997-04-01 | Nippon Telegraph And Telephone Corporation | Message passing system for distributed shared memory multiprocessor system and message passing method using the same |
US5649106A (en) * | 1991-03-14 | 1997-07-15 | Mitsubishi Denki Kabushiki Kaisha | Parallel computer with reconstruction of processor clusters |
EP0840234A2 (en) * | 1996-11-01 | 1998-05-06 | Nec Corporation | Programmable shared memory system and method |
US5761726A (en) * | 1993-11-30 | 1998-06-02 | Texas Instruments Incorporated | Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each processor |
US5768551A (en) * | 1995-09-29 | 1998-06-16 | Emc Corporation | Inter connected loop channel for reducing electrical signal jitter |
US5829034A (en) * | 1996-07-01 | 1998-10-27 | Sun Microsystems, Inc. | Method and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains |
US5835931A (en) * | 1995-12-29 | 1998-11-10 | Siemens Aktiengesellschaft | Arrangement for determining the configuration of a memory utilizing dedicated control devices and dedicated control lines |
US5841997A (en) * | 1995-09-29 | 1998-11-24 | Emc Corporation | Apparatus for effecting port switching of fibre channel loops |
US5845322A (en) * | 1996-09-17 | 1998-12-01 | Vlsi Technology, Inc. | Modular scalable multi-processor architecture |
US5860109A (en) * | 1996-07-01 | 1999-01-12 | Sun Microsystems, Inc. | Methods and apparatus for a coherence transformer for connecting computer system coherence domains |
WO1999013451A1 (en) * | 1997-09-09 | 1999-03-18 | Memtrax Llc | Computer system with switch and controller unit for allocating internal and external memory channels among a plurality of subsystems |
WO1999034294A1 (en) * | 1997-12-24 | 1999-07-08 | Creative Technology Ltd. | Optimal multi-channel memory controller system |
US5940860A (en) * | 1996-07-01 | 1999-08-17 | Sun Microsystems, Inc. | Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains |
US5968160A (en) * | 1990-09-07 | 1999-10-19 | Hitachi, Ltd. | Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory |
US6061754A (en) * | 1997-06-25 | 2000-05-09 | Compaq Computer Corporation | Data bus having switch for selectively connecting and disconnecting devices to or from the bus |
US6085276A (en) * | 1997-10-24 | 2000-07-04 | Compaq Computers Corporation | Multi-processor computer system having a data switch with simultaneous insertion buffers for eliminating arbitration interdependencies |
US20020059393A1 (en) * | 2000-11-15 | 2002-05-16 | Reimer Jay B. | Multicore DSP device having coupled subsystem memory buses for global DMA access |
US6418508B1 (en) * | 1995-02-22 | 2002-07-09 | Matsushita Electric Industrial Co., Ltd. | Information storage controller for controlling the reading/writing of information to and from a plurality of magnetic disks and an external device |
US20020124149A1 (en) * | 2001-03-02 | 2002-09-05 | Broadcom Corporation | Efficient optimization algorithm in memory utilization for network applications |
US20020166017A1 (en) * | 2001-05-02 | 2002-11-07 | Kim Jason Seung-Min | Cross bar multipath resource controller system and method |
US20040081190A1 (en) * | 2002-07-26 | 2004-04-29 | Lg Electronics Inc. | Router redundancy system and method |
US20050177674A1 (en) * | 2004-02-11 | 2005-08-11 | Infineon Technologies, Inc. | Configurable embedded processor |
US20060129742A1 (en) * | 2004-11-30 | 2006-06-15 | Broadcom Corporation | Direct-memory access for content addressable memory |
US20090024834A1 (en) * | 2007-07-20 | 2009-01-22 | Nec Electronics Corporation | Multiprocessor apparatus |
US20090106467A1 (en) * | 2007-07-20 | 2009-04-23 | Nec Electronics Corporation | Multiprocessor apparatus |
EP1189132B1 (en) * | 2000-09-13 | 2011-03-16 | STMicroelectronics, Inc. | Shared peripheral architecture |
US20110289258A1 (en) * | 2009-02-12 | 2011-11-24 | Rambus Inc. | Memory interface with reduced read-write turnaround delay |
CN111447154A (en) * | 2019-01-17 | 2020-07-24 | 瑞昱半导体股份有限公司 | Circuit arranged in switch and method for managing memory in switch |
US20220066931A1 (en) * | 2019-03-15 | 2022-03-03 | Intel Corporation | Dynamic memory reconfiguration |
US11934342B2 (en) | 2019-03-15 | 2024-03-19 | Intel Corporation | Assistance for hardware prefetch in cache access |
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-
1989
- 1989-06-09 US US07/363,672 patent/US5182801A/en not_active Expired - Lifetime
Patent Citations (12)
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US3737860A (en) * | 1972-04-13 | 1973-06-05 | Honeywell Inf Systems | Memory bank addressing |
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US4691280A (en) * | 1982-06-28 | 1987-09-01 | The Singer Company | High performance multi-processor system |
US4783731A (en) * | 1982-07-15 | 1988-11-08 | Hitachi, Ltd. | Multicomputer system having dual common memories |
US4485457A (en) * | 1983-05-31 | 1984-11-27 | Cbs Inc. | Memory system including RAM and page switchable ROM |
US4881164A (en) * | 1983-12-30 | 1989-11-14 | International Business Machines Corporation | Multi-microprocessor for controlling shared memory |
US4797853A (en) * | 1985-11-15 | 1989-01-10 | Unisys Corporation | Direct memory access controller for improved system security, memory to memory transfers, and interrupt processing |
US4814980A (en) * | 1986-04-01 | 1989-03-21 | California Institute Of Technology | Concurrent hypercube system with improved message passing |
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Cited By (52)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5968160A (en) * | 1990-09-07 | 1999-10-19 | Hitachi, Ltd. | Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory |
US5649106A (en) * | 1991-03-14 | 1997-07-15 | Mitsubishi Denki Kabushiki Kaisha | Parallel computer with reconstruction of processor clusters |
US5548740A (en) * | 1992-02-10 | 1996-08-20 | Sharp Kabushiki Kaisha | Information processor efficiently using a plurality of storage devices having different access speeds and a method of operation thereof |
US5440713A (en) * | 1992-05-29 | 1995-08-08 | Industrial Technology Research Institute | M-way N-port paged-interleaved memory system |
US5481736A (en) * | 1993-02-17 | 1996-01-02 | Hughes Aircraft Company | Computer processing element having first and second functional units accessing shared memory output port on prioritized basis |
US5617537A (en) * | 1993-10-05 | 1997-04-01 | Nippon Telegraph And Telephone Corporation | Message passing system for distributed shared memory multiprocessor system and message passing method using the same |
US5761726A (en) * | 1993-11-30 | 1998-06-02 | Texas Instruments Incorporated | Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each processor |
US5613151A (en) * | 1994-05-19 | 1997-03-18 | Dockser; Kenneth A. | Data processor with flexible register mapping scheme |
US6418508B1 (en) * | 1995-02-22 | 2002-07-09 | Matsushita Electric Industrial Co., Ltd. | Information storage controller for controlling the reading/writing of information to and from a plurality of magnetic disks and an external device |
US5841997A (en) * | 1995-09-29 | 1998-11-24 | Emc Corporation | Apparatus for effecting port switching of fibre channel loops |
US5768551A (en) * | 1995-09-29 | 1998-06-16 | Emc Corporation | Inter connected loop channel for reducing electrical signal jitter |
US5835931A (en) * | 1995-12-29 | 1998-11-10 | Siemens Aktiengesellschaft | Arrangement for determining the configuration of a memory utilizing dedicated control devices and dedicated control lines |
US5829034A (en) * | 1996-07-01 | 1998-10-27 | Sun Microsystems, Inc. | Method and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains |
US5860109A (en) * | 1996-07-01 | 1999-01-12 | Sun Microsystems, Inc. | Methods and apparatus for a coherence transformer for connecting computer system coherence domains |
US5940860A (en) * | 1996-07-01 | 1999-08-17 | Sun Microsystems, Inc. | Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains |
US5845322A (en) * | 1996-09-17 | 1998-12-01 | Vlsi Technology, Inc. | Modular scalable multi-processor architecture |
US5911149A (en) * | 1996-11-01 | 1999-06-08 | Nec Electronics Inc. | Apparatus and method for implementing a programmable shared memory with dual bus architecture |
EP0840234A2 (en) * | 1996-11-01 | 1998-05-06 | Nec Corporation | Programmable shared memory system and method |
EP0840234A3 (en) * | 1996-11-01 | 2002-07-10 | Nec Corporation | Programmable shared memory system and method |
US6061754A (en) * | 1997-06-25 | 2000-05-09 | Compaq Computer Corporation | Data bus having switch for selectively connecting and disconnecting devices to or from the bus |
US6118462A (en) * | 1997-07-01 | 2000-09-12 | Memtrax Llc | Computer system controller having internal memory and external memory control |
USRE41413E1 (en) | 1997-07-01 | 2010-07-06 | Neal Margulis | Computer system controller having internal memory and external memory control |
WO1999013451A1 (en) * | 1997-09-09 | 1999-03-18 | Memtrax Llc | Computer system with switch and controller unit for allocating internal and external memory channels among a plurality of subsystems |
US6085276A (en) * | 1997-10-24 | 2000-07-04 | Compaq Computers Corporation | Multi-processor computer system having a data switch with simultaneous insertion buffers for eliminating arbitration interdependencies |
WO1999034294A1 (en) * | 1997-12-24 | 1999-07-08 | Creative Technology Ltd. | Optimal multi-channel memory controller system |
US6643746B1 (en) | 1997-12-24 | 2003-11-04 | Creative Technology Ltd. | Optimal multi-channel memory controller system |
EP1189132B1 (en) * | 2000-09-13 | 2011-03-16 | STMicroelectronics, Inc. | Shared peripheral architecture |
US6892266B2 (en) | 2000-11-15 | 2005-05-10 | Texas Instruments Incorporated | Multicore DSP device having coupled subsystem memory buses for global DMA access |
US20020059393A1 (en) * | 2000-11-15 | 2002-05-16 | Reimer Jay B. | Multicore DSP device having coupled subsystem memory buses for global DMA access |
EP1207456A1 (en) * | 2000-11-15 | 2002-05-22 | Texas Instruments Incorporated | Multicore DSP device having coupled subsystem memory buses for global DMA access |
US7324509B2 (en) * | 2001-03-02 | 2008-01-29 | Broadcom Corporation | Efficient optimization algorithm in memory utilization for network applications |
US20020124149A1 (en) * | 2001-03-02 | 2002-09-05 | Broadcom Corporation | Efficient optimization algorithm in memory utilization for network applications |
US7996592B2 (en) * | 2001-05-02 | 2011-08-09 | Nvidia Corporation | Cross bar multipath resource controller system and method |
US20020166017A1 (en) * | 2001-05-02 | 2002-11-07 | Kim Jason Seung-Min | Cross bar multipath resource controller system and method |
US20040081190A1 (en) * | 2002-07-26 | 2004-04-29 | Lg Electronics Inc. | Router redundancy system and method |
EP1564646A3 (en) * | 2004-02-11 | 2006-03-22 | Infineon Technologies AG | Configurable embedded processor |
EP1564646A2 (en) * | 2004-02-11 | 2005-08-17 | Infineon Technologies AG | Configurable embedded processor |
US20050177674A1 (en) * | 2004-02-11 | 2005-08-11 | Infineon Technologies, Inc. | Configurable embedded processor |
US7739423B2 (en) * | 2004-11-30 | 2010-06-15 | Broadcom Corporation | Bulk transfer of information on network device |
US20060129742A1 (en) * | 2004-11-30 | 2006-06-15 | Broadcom Corporation | Direct-memory access for content addressable memory |
US20090024834A1 (en) * | 2007-07-20 | 2009-01-22 | Nec Electronics Corporation | Multiprocessor apparatus |
US20090106467A1 (en) * | 2007-07-20 | 2009-04-23 | Nec Electronics Corporation | Multiprocessor apparatus |
US8055882B2 (en) | 2007-07-20 | 2011-11-08 | Renesas Electronics Corporation | Multiplexing commands from processors to tightly coupled coprocessor upon state based arbitration for coprocessor resources |
US9152585B2 (en) * | 2009-02-12 | 2015-10-06 | Rambus Inc. | Memory interface with reduced read-write turnaround delay |
US20110289258A1 (en) * | 2009-02-12 | 2011-11-24 | Rambus Inc. | Memory interface with reduced read-write turnaround delay |
CN111447154A (en) * | 2019-01-17 | 2020-07-24 | 瑞昱半导体股份有限公司 | Circuit arranged in switch and method for managing memory in switch |
CN111447154B (en) * | 2019-01-17 | 2023-06-23 | 瑞昱半导体股份有限公司 | Circuit provided in a switch and method of managing memory in a switch |
US20220066931A1 (en) * | 2019-03-15 | 2022-03-03 | Intel Corporation | Dynamic memory reconfiguration |
US11899614B2 (en) | 2019-03-15 | 2024-02-13 | Intel Corporation | Instruction based control of memory attributes |
US11934342B2 (en) | 2019-03-15 | 2024-03-19 | Intel Corporation | Assistance for hardware prefetch in cache access |
US11954063B2 (en) | 2019-03-15 | 2024-04-09 | Intel Corporation | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format |
US11954062B2 (en) * | 2019-03-15 | 2024-04-09 | Intel Corporation | Dynamic memory reconfiguration |
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Owner name: DIGITAL EQUIPMENT CORPORATION, 146 MAIN ST., MAYNA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:ASFOUR, YOUSIF R.;REEL/FRAME:005166/0176 Effective date: 19891018 |
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