US4891684A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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US4891684A
US4891684A US07/081,231 US8123187A US4891684A US 4891684 A US4891684 A US 4891684A US 8123187 A US8123187 A US 8123187A US 4891684 A US4891684 A US 4891684A
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film
reaction
semiconductor device
insulating film
lower electrode
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Yasushiro Nishioka
Hiroshi Shinriki
Noriyuki Sakuma
Kiichiro Mukai
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Hitachi Ltd
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Hitachi Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors with potential-jump barrier or surface barrier
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/33Thin- or thick-film capacitors 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Definitions

  • the present invention relates to a semiconductor device, and particularly to a semiconductor device having a capacitor of a large capacity and a high reliability which uses a high dielectric constant insulating film as the capacitor insulating film.
  • a polycrystalline Si film which is most chemically stable during the course of production of a semiconductor device, is most widely used as the upper electrode of a capacitor.
  • a high dielectric constant insulating film such as the above-mentioned Ta 2 O 5 film, which is suitable for increasing the integration density of a semiconductor device, is used as a capacitor insulating film
  • Si of the polycrystalline Si film is diffused into the Ta 2 O 5 film and reacted with the Ta 2 O 5 film by the heat treatment in the course of production of the semiconductor device.
  • a high melting point metal or compounds thereof such as a silicide, having a concentration of Si lower than the stoichiometric one must be used in the upper electrode in order to prevent the reaction of Si in the upper electrode with the Ta 2 O 5 film.
  • the above-mentioned high-melting point metal or compounds thereof having a low Si concentration is so chemically unstable that it is readily oxidized by a heat treatment in the course of production or readily corroded by a chemical such as an etching solution.
  • U.S. Pat. No. 4,151,607 discloses that the use of a Si 3 N 4 film or a Ta 2 O 5 film instead of a SiO 2 film as the insulating film of a capacitor is effective in decreasing the required area.
  • a Si 3 N 4 film or a Ta 2 O 5 film instead of a SiO 2 film as the insulating film of a capacitor is effective in decreasing the required area.
  • An object of the present invention is to provide a semiconductor device wherein the reaction of a high dielectric constant insulating film such as Ta 2 O 5 with an upper electrode containing Si is prevented to enable the high dielectric constant insulating film to be used as a capacitor insulating film, whereby the increase in the integration density of a semiconductor device can be achieved.
  • a thin SiO 2 film or a thin silicon nitride (Si 3 N 4 ) is disposed as a reaction-preventing film between a high dielectric constant insulating film formed on a silicon substrate or a lower electrode containing silicon and an upper electrode consisting of Si or containing Si which is made of polycrystalline Si, a high melting point metal or its silicide, thereby preventing the reaction of an element such as Si contained in the upper electrode with the high dielectric constant insulating film due to a heat treatment in the course of production of a semiconductor device after formation of a capacitor.
  • the thickness of the above-mentioned reaction-preventing film is desirably about 10 to 100 ⁇ , preferably 20 to 100 ⁇ .
  • Si or the like contained in the upper electrode readily passes through the film and enters the above-mentioned high dielectric constant insulating film.
  • the reaction-preventing film cannot serve as such.
  • the thickness of the reaction-preventing film is too large, the capacity of the capacitor is decreased.
  • reaction-preventing film is a Si 3 N 4 film
  • oxidation of the Si 3 N 4 film after formation thereof extremely decreases the initial dielectric breakdown to provide a further excellent capacitor.
  • reaction-preventing film is a SiO 2 film
  • nitriding of the SiO 2 film after formation thereof provides the same effect.
  • Provision of the reaction-preventing film such as the SiO 2 film or the Si 3 N 4 film as a barrier layer between the high dielectric constant insulating film and the upper electrode can prevent diffusion of an element contained in the upper electrode, such as Si, into the high dielectric constant insulating film from the upper electrode due to a heat treatment in the course of production of a semiconductor device after formation of the capacitor to thereby prevent the reaction of the above-mentioned element with the high dielectric constant insulating film.
  • the high dielectric constant insulating film such as a Ta 2 O 5 film can be used as the capacitor insulating film without causing any lowering in the dielectric strength of the capacitor, whereby a capacitor having a high capacity and a high reliability can be realized, which is very effective in increasing the integration density of the LSI.
  • FIG. 1 is a cross-sectional view of an essential part of an example of the present invention and FIG. 2 is a graph showing an instance of the effects of the present invention.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor device having a capacitor as an example of the present invention.
  • numeral 1 referred to a Si substrate, numeral 2 to a SiO 2 film formed as a native oxide layer and having a thickness of about 20 ⁇ , numeral 3 to a Ta 2 O 5 film formed as a capacitor insulating film on the SiO 2 film 2 and having a high dielectric constant and a thickness of about 200 ⁇ , numeral 4 to a Si 3 N 4 film formed as a reaction-preventing film on the Ta 2 O 5 film 3 and having a thickness of about 30 ⁇ , and numeral 5 to a polycrystalline Si film formed as an upper electrode on the Si 3 N 4 film 4.
  • a semiconductor device as shown in FIG. 1 was formed according to the following procedure.
  • a Ta 2 O 5 film 3 was formed as a capacitor insulating film on a Si substrate 1 according to the well-known CVD method (chemical vapor deposition method).
  • CVD method chemical vapor deposition method
  • a SiO 2 2 having a thickness of about 20 ⁇ was formed as a native oxide film on the Si substrate 1 because the Si substrate is contacted with water vapor and heated.
  • Ta 2 O 5 film Other methods of forming a Ta 2 O 5 film include a reactive sputtering method in which a metallic target of Ta is sputtered in a mixed gas of argon and oxygen to form Ta 2 O 5 .
  • a SiO 2 film (native oxide layer) having a thickness of about 20 ⁇ is formed by a plasma of argon and oxygen.
  • a Si 3 N 4 film 4 having a thickness of about 30 ⁇ was formed on the Ta 2 O 5 film 3 according to the well-known CVD method. Thereafter, in order to reduce initial lowering in the dielectric strength of the Ta 2 O 5 film 3 as the capacitor insulating film, a heat treatment was conducted in a dry oxygen atmosphere at 1,000° C. for 30 minutes to thinly oxidize the surface of the Si 3 N 4 film 4 as the reaction-preventing film.
  • a polycrystalline Si film 5 is formed as the upper electrode on the Si 3 N 4 film 4 to form a capacitor.
  • provision of the Si 3 N 4 film 4 having a thickness of about 30 ⁇ as the reaction-preventing film between the Ta 2 O 5 film 3 as the high dielectric constant capacitor insulating film and the polycrystalline Si film 5 as the upper electrode can prevent diffusion of Si in the polycrystalline Si film 5 into the Ta 2 O 5 film 3 and, hence, the reaction of Si with the Ta 2 O 5 film 3 due to a heat treatment in the course of production of a semiconductor device after formation of the capacitor, whereby a lowering in the dielectric strength of the capacitor can be prevented.
  • formation of the SiO 2 film having a thickness of about 30 ⁇ as the native oxide layer between the Si substrate 1 and the Ta 2 O 5 film 3 can prevent diffusion of Si of the Si substrate 1 into the Ta 2 O 5 film 3 and, hence, the reaction of Si with the Ta 2 O 5 film 3 due to the above-mentioned heat treatment in the course of production of the semiconductor device, whereby a lowering in the dielectric strength of the capacitor can be prevented.
  • FIG. 2 is a diagram showing a relationship between the temperature of the heat treatment (annealing) after formation of the capacitor of this example and the leakage current in a comparison of the case where the reaction-preventing film was provided according to the present invention with the case where it was not provided.
  • line a is concerned with the case of the capacitor having the reaction-preventing film according to the present invention while line b is concerned with the case of the capacitor having no reaction-preventing film.
  • the conditions of the heat treatment involved a temperature range of 500° to 1,000° C. and a heat treatment time of 30 minutes.
  • the capacitor having the reaction-preventing film undergoes no increase in leakage current even when annealing was conducted at 1,000° C., which is a heat treatment temperature, for example, for doping with an impurity in the course of usual production of an LSI.
  • 1,000° C. which is a heat treatment temperature, for example, for doping with an impurity in the course of usual production of an LSI.
  • the leakage current drastically increases with elevation of the heat treatment temperature as is apparent from the line b in FIG. 2.
  • reaction-preventing film can prevent the reaction between the upper electrode containing Si or the like and the capacitor insulating film, whereby a high-capacity capacitor having a high thermal resistance can be realized.
  • the capacitor of this example had another significant effect. Specifically, even in the range of an annealing temperature of 500° C. or lower, different results were obtained as to the leakage current value depending on the presence or absence of the reaction-preventing film. As is apparent from FIG. 2, even when the annealing temperature is low, the capacitor of this example shows a far lower leakage current due to the presence of the reaction-preventing film just like when the annealing temperature is high, as compared with the capacitor having no reaction-preventing film. In this example, since the insulating film of the capacitor had a triple layer structure of Si 3 N 4 /Ta 2 O 5 /SiO 2 , the leakage current can be drastically decreased. Since the thickness of the Si 3 N 4 film 4 formed on the Ta 2 O 5 film was as small as about 30 ⁇ and the thickness of the SiO 2 film 2 formed on the Si substrate 1 was as small as about 20 ⁇ , a decrease in capacity is insignificant.
  • SiO 2 film was formed as the reaction-preventing film instead of the Si 3 N 4 film 4, a decrease in the leakage current was observed as well.
  • a SiO 2 film was used as an insulating film of a capacitor, said film was formed by, for example, the CVD method, and heat-treated in an atmosphere of ammonia at about 950° C. for 30 min to nitride the surface of the SiO 2 , whereby a lowering in the initial dielectric strength was prevented.
  • reaction-preventing film Besides the SiO 2 film and the Si 3 N 4 film, a phosphosilicate glass film or the like can be used as the reaction-preventing film in the present invention.
  • the thickness of the reaction-preventing film is chosen within a range of 10 to 100 ⁇ , preferably 20 to 100 ⁇ as described above.
  • Ta 2 O 5 tantalum oxide
  • TiO 2 titanium oxide
  • Zr 2 O 5 zirconium oxide
  • Al 2 O 3 aluminum oxide
  • hafnium oxide hafO
  • Y 2 O 3 yttrium oxide
  • the thickness of the capacitor insulating film is chosen within a range of 20 to 350 ⁇ .
  • various silicides such as WSi 2 , MoSi 2 , TaSi 2 and TiSi 2 can be used in the upper electrode.
  • a film of a conductive substance not containing silicon such as W, Mo, Ta, TiN, or Cr
  • a reaction similar to the aforementioned formula (1) occurs, whereby the dielectric strength of the capacitor is lowered.
  • a reaction-preventing film is formed between the capacitor insulating film and the upper electrode, the above-mentioned reaction is prevented.
  • a film of polycrystalline silicon or a silicide but also a film of the above-mentioned conductive substance not containing silicon can be used as the upper electrode.
  • a silicon substrate was used as the lower electrode in the above-mentioned example, needless to say, a film of polycrystalline silicon, one of silicides, and one of various conductive substances as mentioned above can be used as the lower electrode just like the upper electrode.
  • An oxide film is formed on the lower electrode when the capacitor insulating film is formed, and serves as a reaction-preventing film. Thus, formation of a reaction-preventing film before the formation of the capacitor insulating film is usually unnecessary.
  • a reaction-preventing film as a barrier layer between a high dielectric constant insulating film and an upper electrode can secure the thermal resistance of a capacitor using a high dielectric constant insulating film resistant to a heat treatment of up to about 1,000° C. required in the course of production of a usual LSI.
  • the present invention can be effectively applied to a device requiring a capacitor having a small area, such as a MOS dynamic memory.

Abstract

A reaction-preventing film is provided between a capacitor insulating film made of a material having a high dielectric constant, such as Ta2 O5, and an upper electrode in order to prevent a reaction of the upper electrode with the capacitor insulating film. This effectively prevents the reaction between the upper electrode and the capacitor caused by a heat treatment conducted after formation of the capacitor, and hence prevents an increase in leakage current caused by the reaction. Thus, the reliability of a semiconductor device is remarkably increased.

Description

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and particularly to a semiconductor device having a capacitor of a large capacity and a high reliability which uses a high dielectric constant insulating film as the capacitor insulating film.
With an increasing integration density of an LSI (large scale integrated circuit), miniaturization of a capacitor as the constituent of the LSI has been increasingly demanded. Thus, it was attempted to use a tantalum oxide (Ta2 O5) having a relative permittivity of 22, which is more than 6 times as high as that of silicon dioxide (SiO2) used as a conventional capacitor insulating film, for the purpose of increasing the capacitance of the capacitor, whereby the size of a semiconductor device is reduced, as described in, for example, Japanese Pat. Laid-Open Nos. 61,634/1983 and 4,152/1984.
However, part of the above-mentioned Ta2 O5 is chemically reacted with an element contained in an upper electrode, for example, silicon (Si), during a heat treatment conducted in the course of MOSLSI production after formation of a capacitor to give Ta, whereby the dielectric strength of the capacitor is lowered. This reaction is expressed by the following formula (1):
2Ta.sub.2 O.sub.5+ 5Si→4Ta+5SiO.sub.2               (1)
A polycrystalline Si film, which is most chemically stable during the course of production of a semiconductor device, is most widely used as the upper electrode of a capacitor. However, when a high dielectric constant insulating film such as the above-mentioned Ta2 O5 film, which is suitable for increasing the integration density of a semiconductor device, is used as a capacitor insulating film, Si of the polycrystalline Si film is diffused into the Ta2 O5 film and reacted with the Ta2 O5 film by the heat treatment in the course of production of the semiconductor device.
Accordingly, in the above-mentioned prior art technique, a high melting point metal or compounds thereof, such as a silicide, having a concentration of Si lower than the stoichiometric one must be used in the upper electrode in order to prevent the reaction of Si in the upper electrode with the Ta2 O5 film. However, the above-mentioned high-melting point metal or compounds thereof having a low Si concentration is so chemically unstable that it is readily oxidized by a heat treatment in the course of production or readily corroded by a chemical such as an etching solution.
Thus, a high dielectric constant insulating film is difficult to use in MOSLSI according to the prior art technique.
U.S. Pat. No. 4,151,607 discloses that the use of a Si3 N4 film or a Ta2 O5 film instead of a SiO2 film as the insulating film of a capacitor is effective in decreasing the required area. However, there is no description as to an increase in leakage current caused by the reaction of Ta2 O5 with silicon.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device wherein the reaction of a high dielectric constant insulating film such as Ta2 O5 with an upper electrode containing Si is prevented to enable the high dielectric constant insulating film to be used as a capacitor insulating film, whereby the increase in the integration density of a semiconductor device can be achieved.
In order to attain the above-mentioned object according to the present invention, a thin SiO2 film or a thin silicon nitride (Si3 N4) is disposed as a reaction-preventing film between a high dielectric constant insulating film formed on a silicon substrate or a lower electrode containing silicon and an upper electrode consisting of Si or containing Si which is made of polycrystalline Si, a high melting point metal or its silicide, thereby preventing the reaction of an element such as Si contained in the upper electrode with the high dielectric constant insulating film due to a heat treatment in the course of production of a semiconductor device after formation of a capacitor.
The thickness of the above-mentioned reaction-preventing film is desirably about 10 to 100Å, preferably 20 to 100Å. When the thickness of the film is too small, Si or the like contained in the upper electrode readily passes through the film and enters the above-mentioned high dielectric constant insulating film. Thus, the reaction-preventing film cannot serve as such. On the other hand, when the thickness of the reaction-preventing film is too large, the capacity of the capacitor is decreased.
Where the reaction-preventing film is a Si3 N4 film, oxidation of the Si3 N4 film after formation thereof extremely decreases the initial dielectric breakdown to provide a further excellent capacitor. Where the reaction-preventing film is a SiO2 film, nitriding of the SiO2 film after formation thereof provides the same effect.
Provision of the reaction-preventing film such as the SiO2 film or the Si3 N4 film as a barrier layer between the high dielectric constant insulating film and the upper electrode can prevent diffusion of an element contained in the upper electrode, such as Si, into the high dielectric constant insulating film from the upper electrode due to a heat treatment in the course of production of a semiconductor device after formation of the capacitor to thereby prevent the reaction of the above-mentioned element with the high dielectric constant insulating film. Accordingly, the high dielectric constant insulating film such as a Ta2 O5 film can be used as the capacitor insulating film without causing any lowering in the dielectric strength of the capacitor, whereby a capacitor having a high capacity and a high reliability can be realized, which is very effective in increasing the integration density of the LSI.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a cross-sectional view of an essential part of an example of the present invention and FIG. 2 is a graph showing an instance of the effects of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 1 is a schematic cross-sectional view of a semiconductor device having a capacitor as an example of the present invention.
In this figure, numeral 1 referred to a Si substrate, numeral 2 to a SiO2 film formed as a native oxide layer and having a thickness of about 20Å, numeral 3 to a Ta2 O5 film formed as a capacitor insulating film on the SiO2 film 2 and having a high dielectric constant and a thickness of about 200Å, numeral 4 to a Si3 N4 film formed as a reaction-preventing film on the Ta2 O5 film 3 and having a thickness of about 30Å, and numeral 5 to a polycrystalline Si film formed as an upper electrode on the Si3 N4 film 4.
A semiconductor device as shown in FIG. 1 was formed according to the following procedure. A Ta2 O5 film 3 was formed as a capacitor insulating film on a Si substrate 1 according to the well-known CVD method (chemical vapor deposition method). When the Ta2 O5 3 was formed, a SiO2 2 having a thickness of about 20Å was formed as a native oxide film on the Si substrate 1 because the Si substrate is contacted with water vapor and heated.
Other methods of forming a Ta2 O5 film include a reactive sputtering method in which a metallic target of Ta is sputtered in a mixed gas of argon and oxygen to form Ta2 O5. Where the Ta2 O5 is formed by the reactive sputtering method, a SiO2 film (native oxide layer) having a thickness of about 20Å is formed by a plasma of argon and oxygen.
Subsequently, a Si3 N4 film 4 having a thickness of about 30Å was formed on the Ta2 O5 film 3 according to the well-known CVD method. Thereafter, in order to reduce initial lowering in the dielectric strength of the Ta2 O5 film 3 as the capacitor insulating film, a heat treatment was conducted in a dry oxygen atmosphere at 1,000° C. for 30 minutes to thinly oxidize the surface of the Si3 N4 film 4 as the reaction-preventing film.
Subsequently, a polycrystalline Si film 5 is formed as the upper electrode on the Si3 N4 film 4 to form a capacitor.
In this example, provision of the Si3 N4 film 4 having a thickness of about 30Å as the reaction-preventing film between the Ta2 O5 film 3 as the high dielectric constant capacitor insulating film and the polycrystalline Si film 5 as the upper electrode can prevent diffusion of Si in the polycrystalline Si film 5 into the Ta2 O5 film 3 and, hence, the reaction of Si with the Ta2 O5 film 3 due to a heat treatment in the course of production of a semiconductor device after formation of the capacitor, whereby a lowering in the dielectric strength of the capacitor can be prevented. Further, in this example, formation of the SiO2 film having a thickness of about 30Å as the native oxide layer between the Si substrate 1 and the Ta2 O5 film 3 can prevent diffusion of Si of the Si substrate 1 into the Ta2 O5 film 3 and, hence, the reaction of Si with the Ta2 O5 film 3 due to the above-mentioned heat treatment in the course of production of the semiconductor device, whereby a lowering in the dielectric strength of the capacitor can be prevented.
FIG. 2 is a diagram showing a relationship between the temperature of the heat treatment (annealing) after formation of the capacitor of this example and the leakage current in a comparison of the case where the reaction-preventing film was provided according to the present invention with the case where it was not provided. In FIG. 2, line a is concerned with the case of the capacitor having the reaction-preventing film according to the present invention while line b is concerned with the case of the capacitor having no reaction-preventing film. The conditions of the heat treatment involved a temperature range of 500° to 1,000° C. and a heat treatment time of 30 minutes.
As is apparent from the line a in FIG. 2, the capacitor having the reaction-preventing film undergoes no increase in leakage current even when annealing was conducted at 1,000° C., which is a heat treatment temperature, for example, for doping with an impurity in the course of usual production of an LSI. In contrast, in the capacitor having no reaction-preventing film on the Ta2 O5 film, the leakage current drastically increases with elevation of the heat treatment temperature as is apparent from the line b in FIG. 2.
Thus, in this example, provision of the reaction-preventing film can prevent the reaction between the upper electrode containing Si or the like and the capacitor insulating film, whereby a high-capacity capacitor having a high thermal resistance can be realized.
Further, it was found from the results as shown in FIG. 2 that the capacitor of this example had another significant effect. Specifically, even in the range of an annealing temperature of 500° C. or lower, different results were obtained as to the leakage current value depending on the presence or absence of the reaction-preventing film. As is apparent from FIG. 2, even when the annealing temperature is low, the capacitor of this example shows a far lower leakage current due to the presence of the reaction-preventing film just like when the annealing temperature is high, as compared with the capacitor having no reaction-preventing film. In this example, since the insulating film of the capacitor had a triple layer structure of Si3 N4 /Ta2 O5 /SiO2, the leakage current can be drastically decreased. Since the thickness of the Si3 N4 film 4 formed on the Ta2 O5 film was as small as about 30Å and the thickness of the SiO2 film 2 formed on the Si substrate 1 was as small as about 20Å, a decrease in capacity is insignificant.
When a SiO2 film was formed as the reaction-preventing film instead of the Si3 N4 film 4, a decrease in the leakage current was observed as well. Where a SiO2 film was used as an insulating film of a capacitor, said film was formed by, for example, the CVD method, and heat-treated in an atmosphere of ammonia at about 950° C. for 30 min to nitride the surface of the SiO2, whereby a lowering in the initial dielectric strength was prevented.
Besides the SiO2 film and the Si3 N4 film, a phosphosilicate glass film or the like can be used as the reaction-preventing film in the present invention. The thickness of the reaction-preventing film is chosen within a range of 10 to 100Å, preferably 20 to 100Å as described above.
Although Ta2 O5 (tantalum oxide) was used as the material of the high dielectric constant insulating film, the same effects were obtained when a metallic oxide such as niobium oxide (Nb2 O5), titanium oxide (TiO2), zirconium oxide (Zr2 O5), aluminum oxide (Al2 O3), hafnium oxide (HfO), or yttrium oxide (Y2 O3) was used.
The smaller the thickness of the capacitor insulating film, the larger the capacitance. However, it is difficult to form an insulating film of the above-mentioned material having a thickness of less than 20Å without pinholes. When the thickness exceeds 350Å, the subsequent crystal growth becomes notable, leading to a remarkable reduction in the characteristics of the insulating film. Thus, the thickness of the capacitor insulating film is chosen within a range of 20 to 350Å.
Besides the polycrystalline silicon, various silicides such as WSi2, MoSi2, TaSi2 and TiSi2 can be used in the upper electrode. Where a film of a conductive substance not containing silicon, such as W, Mo, Ta, TiN, or Cr, is used in the upper electrode, a reaction similar to the aforementioned formula (1) occurs, whereby the dielectric strength of the capacitor is lowered. When a reaction-preventing film is formed between the capacitor insulating film and the upper electrode, the above-mentioned reaction is prevented. Thus, not only a film of polycrystalline silicon or a silicide but also a film of the above-mentioned conductive substance not containing silicon can be used as the upper electrode.
Although a silicon substrate was used as the lower electrode in the above-mentioned example, needless to say, a film of polycrystalline silicon, one of silicides, and one of various conductive substances as mentioned above can be used as the lower electrode just like the upper electrode.
An oxide film is formed on the lower electrode when the capacitor insulating film is formed, and serves as a reaction-preventing film. Thus, formation of a reaction-preventing film before the formation of the capacitor insulating film is usually unnecessary.
However, it is a matter of course that the formation of a SiO2 film, a Si3 N4 film, or a phosphosilicate glass film as a second reaction-preventing film after the formation of the lower electrode and before the formation of the capacitor insulating film does not present any troubles and provides a further improved reliability.
As discussed above, according to the present invention, provision of a reaction-preventing film as a barrier layer between a high dielectric constant insulating film and an upper electrode can secure the thermal resistance of a capacitor using a high dielectric constant insulating film resistant to a heat treatment of up to about 1,000° C. required in the course of production of a usual LSI. Thus, the present invention can be effectively applied to a device requiring a capacitor having a small area, such as a MOS dynamic memory.

Claims (39)

What is claimed is:
1. A semiconductor device having a capacitor, which comprises a lower electrode, a capacitor insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulating film, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and material of said upper electrode, the capacitor insulating film being made of a member selected from the group consisting of Ta2 O5, Nb2 O5, TiO2, ZrO2, Al2 O3, HfO and Y2 O3.
2. A semiconductor device as claimed in claim 1, wherein a silicon dioxide film is interposed between the lower electrode and the capacitor insulating film.
3. A semiconductor device as claimed in claim 2, wherein the lower electrode is a polycrystalline silicon film.
4. A semiconductor device as claimed in claim 1, wherein the lower electrode is a polycrystalline silicon film.
5. A semiconductor device ax claimed in claim 1, wherein said reaction-preventing film is made of a member selected from the group consisting of SiO2, Si3 N4, and phosphosilicate glass.
6. A semiconductor device as claimed in claim 5, wherein the thickness of said reaction-preventing film is 10 to 100 Å.
7. A semiconductor device as claimed in claim 6, wherein the thickness of said reaction-preventing film is 20 to 100Å.
8. A semiconductor device as claimed in claim 1, wherein said upper electrode is made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, TiSi2, W, Mo, Ta, TiN and Cr.
9. A semiconductor device as claimed in claim 1, wherein said lower electrode comprises a silicon substrate.
10. A semiconductor device as claimed in claim 1, wherein said lower electrode is a film made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, TiSi2, W, Mo, Ta, TiN and Cr.
11. A semiconductor device as claimed in claim 9 or 10, wherein an oxide film is formed on said lower electrode by oxidation of the surface of said lower electrode.
12. A semiconductor device as claimed in claim 9 or 10, wherein material of the capacitor insulating film can react with material of the lower electrode, and wherein a second reaction-preventing film is formed on said lower electrode, interposed between the lower electrode and the capacitor insulating film.
13. A semiconductor device as claimed in claim 12, wherein said second reaction-preventing film is made of a member selected from the group consisting of SiO2, Si3 N4, and phosphosilicate glass.
14. A semiconductor device as claimed in claim 1, wherein the thickness of said capacitor insulating film is 20 to 350Å.
15. A semiconductor device having a capacitor, which comprises a lower electrode, a capacitor insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulating film, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and material of said upper electrode, wherein said reaction-preventing film is a SiO2 film or a phosphosilicate glass film and wherein a Si3 N4 film is formed on said SiO2 film or said phosphosilicate glass film by nitriding the surface of said SiO2 film or said phosphosilicate glass film.
16. A semiconductor device as claimed in claim 15, wherein a silicon dioxide film is interposed between the lower electrode and the capacitor insulating film.
17. A semiconductor device as claimed in claim 16, wherein the lower electrode is polycrystalline silicone film.
18. A semiconductor device as claimed in claim 15, wherein the lower electrode is a polycrystalline silicon film.
19. A semiconductor device as claimed in claim 15, wherein said upper electrode is made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, TiSi2, W, Mo, Ta, TiN and Cr.
20. A semiconductor device as claimed in claim 15, wherein said lower electrode comprises a silicon substrate.
21. A semiconductor device as claimed in claim 15, wherein said lower electrode is a film made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, TiSi2, W, Mo, Ta, TiN and Cr.
22. A semiconductor device as claimed in claim 20 or 21, wherein an oxide film is formed on said lower electrode by oxidation of the surface of said lower electrode.
23. A semiconductor device as claimed in claim 20 or 21, wherein material of the capacitor insulating film can react with material of the lower electrode, and wherein a second reaction-preventing film is formed on said lower electrode, interposed between the lower electrode and the capacitor insulating film.
24. A semiconductor device as claimed in claim 23, wherein said second reaction-preventing film is made of a member selected from the group consisting of SiO2, Si3 N4, and phosphosilicate glass.
25. A semiconductor having a capacitor, which comprises a lower electrode, a capacitor insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulating film, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and material of said upper electrode, wherein said reaction-preventing film is a Si3 N4 film and a SiO2 film is formed on said Si3 N4 film by oxidizing the surface of said Si3 N4 film.
26. A semiconductor device as claimed in claim 25, wherein a silicon dioxide film is interposed between the lower electrode and the capacitor insulating film.
27. A semiconductor device as claimed in claim 26, wherein the lower electrode is a polycrystalline silicon film.
28. A semiconductor device as claimed in claim 25, wherein the lower electrode is a polycrystalline silicon film.
29. A semiconductor device as claimed in claim 25, wherein said upper electrode is made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, TiSi2, W, Mo, Ta, TiN and Cr.
30. A semiconductor device as claimed in claim 25, wherein said lower electrode comprises a silicon substrate.
31. A semiconductor device as claimed in claim 25, wherein said lower electrode is a film made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, TiSi2, W, Mo, Ta, TiN and Cr.
32. A semiconductor device as claimed in claim 30 or 31, wherein an oxide film is formed on said lower electrode by oxidation of the surface of said lower electrode.
33. A semiconductor device as claimed in claim 30 or 31, wherein material of the capacitor insulating film can react with material of the lower electrode, and wherein a second reaction-preventing film is formed on said lower electrode, interposed between the lower electrode and the capacitor insulating film.
34. A semiconductor device as claimed in claim 33, wherein said second reaction-preventing film is made of a member selected from the group consisting of SiO2, Si3 N4, and phosphosilicate glass.
35. A semiconductor device having a capacitor, which comprises a lower electrode, a capacitor insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulating film, said capacitor insulating film being made of a material that reacts with material of which the upper electrode is made, selected from the group consisting of Ta2 O5, Nb2 O5, TiO2, ZrO2, Al2 O3, HfO and Y2 O3, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and the material of said upper electrode.
36. A semiconductor device having a capacitor, which comprises a lower electrode, a capacitor, insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulating film, said capacitor insulating film being made of a material that reacts with material of which the upper electrode is made, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film being a SiO2 film or a phosphosilicate glass film, with a Si3 N4 film being provided on said SiO2 film or said phosphosilicate glass film by nitriding the surface of said SiO2 film or said phosphosilicate glass film, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and the material of said upper electrode.
37. A semiconductor device having a capacitor, which comprises a lower electrode, a capacitor insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulating film, said capacitor insulating film being made of a material that reacts with material of which the upper electrode is made, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film being a Si3 N4 film and a SiO2 film provided on said Si3 N4 film by oxidizing the surface of said Si3 N4 film, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and the material of said upper electrode.
38. A semiconductor device having a capacitor, which comprises a lower electrode, a capacitor insulating film formed on said lower electrode and made of a high dielectric constant material, an upper electrode formed on said capacitor insulting film, said capacitor insulating film being made of a high dielectric constant metal oxide that reacts with material of which the upper electrode is made, and a reaction-preventing film interposed between said capacitor insulating film and said upper electrode, said reaction-preventing film having a thickness so as to prevent a reaction between material of said capacitor insulating film and the material of said upper electrode.
39. A semiconductor device as claimed in claim 38, wherein said upper electrode is made of a member selected from the group consisting of polycrystalline silicon, WSi2, MoSi2, TaSi2, W, Mo, Ta, TiN and Cr.
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CN102097299A (en) * 2010-11-16 2011-06-15 无锡中微晶园电子有限公司 Saturated doping process of thick polycrystalline resistor
CN102097299B (en) * 2010-11-16 2012-11-07 无锡中微晶园电子有限公司 Saturated doping process of thick polycrystalline resistor

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