US4645733A - High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates - Google Patents

High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates Download PDF

Info

Publication number
US4645733A
US4645733A US06/720,354 US72035485A US4645733A US 4645733 A US4645733 A US 4645733A US 72035485 A US72035485 A US 72035485A US 4645733 A US4645733 A US 4645733A
Authority
US
United States
Prior art keywords
substrate
polymer
indentations
conductors
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US06/720,354
Inventor
Donald F. Sullivan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/550,379 external-priority patent/US4528259A/en
Application filed by Individual filed Critical Individual
Priority to US06/720,354 priority Critical patent/US4645733A/en
Application granted granted Critical
Publication of US4645733A publication Critical patent/US4645733A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/241Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/117Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09436Pads or lands on permanent coating which covers the other conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845Stepped hole, via, edge, bump or conductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09927Machine readable code, e.g. bar code
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09936Marks, inscriptions, etc. for information
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981Metallised walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025Abrading, e.g. grinding or sand blasting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/054Continuous temporary metal layer over resist, e.g. for selective electroplating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0548Masks
    • H05K2203/056Using an artwork, i.e. a photomask for exposing photosensitive layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0571Dual purpose resist, e.g. etch resist used as solder resist, solder resist used as plating resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0577Double layer of resist having the same pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/066Transfer laminating of insulating material, e.g. resist as a whole layer, not as a pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0759Forming a polymer layer by liquid coating, e.g. a non-metallic protective coating or an organic bonding layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0023Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor

Definitions

  • This invention relates to printed circuits and more particularly it relates to high density, high conductivity, high reliability printed wiring over substrates with surface irregularities.
  • a general object of this invention therefore is to correct the general deficiencies of the prior art.
  • I describe a process for achieving high density printed wiring by photographically forming deeply (0.006 in., 0.015 cm) indented channels in a photopolymer layer on a suitable substrate, electrochemically depositing a thin layer of conductive material on the photopolymer surface and removing conductive material from the outer polymer surface by sanding, thereby to assure photopolymer insulation of specified distance between adjacent conductors.
  • the deep channels are filled with conductive material to provide greater conductivity, thereby removing the significant low conductivity disadvantage of densely packed wiring spaced by as little as 0.003 in. (0.008 cm) center to center, thus significantly improving conventional printed wiring separations of at least three times that.
  • the simplified process thus simply comprises covering a printed wiring substrate with a layer, typically 0.006 in. (0.015 cm) thick, of liquid paste consistency photopolymer, photographically producing a wiring pattern in surface, filling the channels with a conductive mixture and hardening it, and sanding the surface to assure that the conductors in the channels are always spaced by the insulation of the intervening thickness of polymer provided in the wiring pattern.
  • the liquid polymer layer is photodeveloped by a flat glass plate in contact therewith to produce a flat flush surface, which is readily sanded to remove surface contaminants, such as smeared conductor left when a conductive paste is squeezed into the indentations.
  • the sanding could not occur with thin coatings because of the irregularities of inexpensive fabric base printed wiring board substrates.
  • the conductors are preferably of a suitable conductive polymer ink, but may also be of a resistive material to form resistive circuit components, if desired. Multi-layer circuits of the additive type are readily formed by this process since the finished product may be used as a substrate for a further layer.
  • FIG. 1 shows in fragmental cross section a printed wiring board assembly comprising a substrate with a superimposed liquid photopolymer layer used to photodevelop a pattern of circuit indentations;
  • FIG. 2 shows in fragmental cross section the assembly following photodevelopment of a desired circuit pattern leaving selected indentations in the polymer layer
  • FIG. 3 shows in fragmental cross section the assembly further processed to fill the indentations with conductive material
  • FIG. 4 shows in fragmental cross section the assembly after a sanding step to remove surface contaminants
  • FIG. 5 shows in fragmental cross section the assembly used as a substrate for additively constructing a multiple layer circuit board by repeated processing of a further liquid photopolymer layer superimposed on the assembly;
  • FIG. 6 is a variation of FIG. 5 wherein a further circuit layer is added to a conventional circuit board.
  • an inexpensive nonprecision substrate 10 such as a fiberglass laminate with an irregular surface pattern represented by weave irregularities, etc. 12, may be used to attain precision wiring patterns.
  • a layer of paste consistency liquid photopolymer 11 is superimposed on the substrate, preferably of a thickness of about 0.006 in. (0.015 cm). This layer is photodeveloped by contact printing of a phototool pattern 9 to produce high resolution printed wiring patterns.
  • the glass plate 8 is important in achieving a flat top surface, irrespective of the surface irregularities 12, which after photo curing produces a glossy surface to which contaminants do not as readily cling as with a matte surface.
  • the pattern of FIG. 2 is achieved, where uncured photopolymer is washed out leaving indentations 13 between polymer insulation in a pattern defining the indentations as the desired wiring pattern.
  • the outer surface 15 is flat and glossy so that a squeegee can ride thereupon and deposit a conductive material 14 such as conductive polymer ink into the indentations as seen in FIG. 3.
  • a thin residue layer 16 formed on the resulting flat outer surface, which is sanded off as represented in FIG. 4 to produce known distances of the polymer insulation layer 11 between adjacent conductors without smears that could cause short circuiting.
  • the flat top is important, since the sanding step therefore removes only a thin layer of contamination, which of itself does not readily adhere to the glossy surface of the polymer if made with the glass 8 phototool.
  • Other equivalent mechanical removal steps may, of course, be used.
  • the conductors present much higher conductivity than thin plated conductors, and this is an unexpected synergistic feature when conductors are placed closer together with higher packing density yet exhibit higher conductivity.
  • These conductors also offer the significant advantage of higher integrity in handling the finished printed wiring board product.
  • the conventional conductor is deposited on the surface and extends perhaps 0.001 in. (0.003 cm) above the surface of the substrate. Thus, when handled, it is easily scratched or damaged. These indented conductors avoid that problem.
  • FIG. 6 the advantage of the invention of working with surface irregularities is illustrated.
  • a conventional wiring pattern 25 upon substrate 10 has conductors extending from the surface.
  • the paste consistency of the liquid polymer layer 22 covers these conductors in air bubble free contact.
  • a second printed circuit layer can be added, for example, to connect a resistive material between selected conductors 25 on the substrate.
  • this invention has provided an improved process which provides significantly thicker conductors of above 0.002 in. (0.005 cm) to about 0.006 in. (0.015 cm), and thus lower conductivity while permitting the packing density to be improved by closer together, narrower conductors which nevertheless unexpectedly do not suffer from low conductivity.
  • the basic process steps comprise forming a patterned polymer layer over an inexpensive substrate probably having surface irregularities with a substantially flat outer surface defining an indentation pattern for receiving conductors, filling the indentations with a paste consistency conductive material to form a conductor pattern, hardening in place and machining off any residual contaminants on the outer surface to assure designed polymer insulating distances between adjacent conductors.
  • the channels are filled with a conductive polymer ink applied with a doctor blade and then hardened thereby forming electrical conductors. Residual conductive material remaining on the flat top surface is removed by sanding.
  • the surface irregularities 12 on the surface of insulation base 10 have no effect on the formation of high integrity conductors, for the thickness of photopolymer patterns 11 are of the order of 0.006 inches thick and this thickness overcomes the effects of surface irregularities which are inherent in printed wiring laminates.
  • unclad fiberglass laminate has a surface topology which reproduces the pattern or weave in the fiberglass cloth reinforcement, and the effects of the weave pattern is completely overcome by this instant disclosure.
  • a silver filled liquid conductive polymer ink is available from the ACME Chemicals and Insulation Company, as product E-KOTE 3030.
  • Printed circuits are made using this product by coating an insulation substrate with a layer of liquid photopolymer in paste-like consistency of the order of 0.003 inches thick; one suitable method is to use a coarse mesh screen printing fabric without a stencil.
  • a glass plate phototool is also similarly coated and the two layers are joined in face to face contact in an air free union.
  • a suitable photopolymer is available from M & T Chemicals, Inc. as product CNF 1075. While so cojoined a UV light source which need not be collimated hardens light struck photopolymer and adheres it firmly to the substrate.
  • the phototool is separated from the substrate and unpolymerized photopolymer is washed out in a mild solvent such as a semi-aqueous mixture of butyl cellosolve and water.
  • a mild solvent such as a semi-aqueous mixture of butyl cellosolve and water.
  • the conductive polymer ink of Example 1 is dried thermally there is a photopolymer made by W. R. Grace Co., product F-1782, which is hardened by exposure to UV light. While formulated to be applied in the desired pattern by screen printing, the resolution of this material can be greatly improved when used in this instant process.
  • the conductive silver paste is applied by doctor blade then cured by exposure to a strong UV light source, for example using a 200 watts per inch lamp with the substrate conveyed thereunder at a speed of 5 feet per minute.
  • a strong UV light source for example using a 200 watts per inch lamp with the substrate conveyed thereunder at a speed of 5 feet per minute.
  • the disclosed process surprisingly affords an improved method for forming multi-layer printed wiring boards.
  • a layer of insulation can be photopatterned in a thick pinhole free layer following the process of Example 1, using a phototransparency containing opaque areas where interconnections are to be made between adjacent layers. See FIG. 5.
  • this insulation layer another pattern of deep channels are formed and these channels and interconnection holes are then filled with conductive polymer ink and dried, etc.
  • the process permits underlying irregularities, that is, the interconnection holes to be accommodated so that each layer is of a uniform controlled thickness, enabling many layers to be built up with no loss of electrical integrity.
  • Current art dry film photopolymers cannot produce such uniform layers, for the dry film is of a predetermined thickness and cannot be easily formed into a flat top surface irrespective of the underlying topology.
  • FIG. 5 wherein the basic bottom two layers are similar to FIG. 4.
  • superimposed thereon is thin insulation layer 20 with gaps or voids 21 at circuit positions where connections are to be made.
  • the liquid polymer layer 21 is superimposed and flows into gaps 21 also (although not so shown to illustrate the layer interconnection method).
  • an appropriate wiring or resistor circuit pattern proceeds as before by the photodevelopment, filling, curing and sanding steps.
  • the deeply indented channels can be filled with a resistor paste material available from many suppliers, then dried and excess resistor material removed from the flush outer surface by sanding, so as to produce resistive electrical components whose ohmic resistance is more accurate than achievable with current art screen printing processes.
  • the resistor pastes are applied by screen printing in the current art, the resistor ohmic value is determined by the cross section area and length, and insofar as the low resolution obtainable by screenprinting has a pronounced effect on conductor width, the achievable accuracy is limited. Resistors reduced by this instant disclosure uses these same resistor pastes to produce much more accurate components, while achieving increased packing density.

Abstract

High resolution, high packing density printed circuit wiring with high conductivity wiring is achieved by putting down thick (0.006 in., 0.015 cm) liquid photopolymer insulator layers on an inexpensive substrate and photodeveloping conductor pattern indentations in the layer for filling with conductive materials. Thus, 0.003 in. (0.008 cm) line to line spacings can be achieved with high conductivity conductors 0.006 in. (0.015 cm) thick. A flush top layer of polymer is readily cleaned of contaminants by light surface sanding to assure designed insulation spacings of polymer between conductors without interfering smears. The finished circuits are not subject to damage in handling from surface scratches since the conductors are indented.

Description

This is a continuation-in-part of my copending application Ser. No. 681,686 filed Dec. 14, 1984 for High Density Printed Wiring, which in turn is a continuation-in-part of my copending application Ser. No. 550,379 filed Nov. 10, 1983, now U.S. Pat. No. 4,528,259 for Printed Wiring Boards With Solder Mask Over Bare Copper Wires Having Large Area Thickened Circuit Pad Connections.
TECHNICAL FIELD
This invention relates to printed circuits and more particularly it relates to high density, high conductivity, high reliability printed wiring over substrates with surface irregularities.
BACKGROUND ART
Many problems of conductivity and reliability are posed in circuit patterns which are more dense and more closely packed together. For example, low resolution screen printing and etching methods provide edge smears which tend to short together adajcent wires, thus limiting spacing between conductors to more than about 0.01 inch (0.025 cm). Also, the conventional methods of plating or depositing printed wires, which usually are thinner than 0.001 inch (0.003 cm), results in very low conductivity wiring when the conductor widths are less than about 0.006 inch (0.015 cm).
Even more restrictive in practical low cost systems is the nature of the substrates. Conventional substrates have significant surface irregularities from their fibrous construction, and thus the surface irregularities significantly increase the chance for defects in high density printed wiring patterns directly placed thereupon.
Attempts have been made to photographically reproduce high resolution printed wiring patterns as shown by U.S. Pat. No. 2,585,700 to S. W. Strickman of Feb. 12, 1952, wherein photographically processed gelatin layer patterns are processed as a mold to receive conductors which are threafter, when the gelatin is removed, cast into a resin which serves as a substrate. Not only is this a tedious and costly process but the conductors are very thin and thus very low in conductivity.
A general object of this invention therefore is to correct the general deficiencies of the prior art.
It is therefore a more specific objective of this invention to produce printed circuits in an inexpensive process using performed printed wiring board substrates of a conventional nature to obtain reliable and precise circuits which may be densely packed and yet have high conductivity.
DISCLOSURE OF THE INVENTION
In my above-mentioned parent applications, I describe a process for achieving high density printed wiring by photographically forming deeply (0.006 in., 0.015 cm) indented channels in a photopolymer layer on a suitable substrate, electrochemically depositing a thin layer of conductive material on the photopolymer surface and removing conductive material from the outer polymer surface by sanding, thereby to assure photopolymer insulation of specified distance between adjacent conductors.
In accordance with this invention, the deep channels are filled with conductive material to provide greater conductivity, thereby removing the significant low conductivity disadvantage of densely packed wiring spaced by as little as 0.003 in. (0.008 cm) center to center, thus significantly improving conventional printed wiring separations of at least three times that.
The simplified process thus simply comprises covering a printed wiring substrate with a layer, typically 0.006 in. (0.015 cm) thick, of liquid paste consistency photopolymer, photographically producing a wiring pattern in surface, filling the channels with a conductive mixture and hardening it, and sanding the surface to assure that the conductors in the channels are always spaced by the insulation of the intervening thickness of polymer provided in the wiring pattern.
Preferably the liquid polymer layer is photodeveloped by a flat glass plate in contact therewith to produce a flat flush surface, which is readily sanded to remove surface contaminants, such as smeared conductor left when a conductive paste is squeezed into the indentations. The sanding could not occur with thin coatings because of the irregularities of inexpensive fabric base printed wiring board substrates.
The conductors are preferably of a suitable conductive polymer ink, but may also be of a resistive material to form resistive circuit components, if desired. Multi-layer circuits of the additive type are readily formed by this process since the finished product may be used as a substrate for a further layer.
BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings:
FIG. 1 shows in fragmental cross section a printed wiring board assembly comprising a substrate with a superimposed liquid photopolymer layer used to photodevelop a pattern of circuit indentations;
FIG. 2 shows in fragmental cross section the assembly following photodevelopment of a desired circuit pattern leaving selected indentations in the polymer layer;
FIG. 3 shows in fragmental cross section the assembly further processed to fill the indentations with conductive material;
FIG. 4 shows in fragmental cross section the assembly after a sanding step to remove surface contaminants;
FIG. 5 shows in fragmental cross section the assembly used as a substrate for additively constructing a multiple layer circuit board by repeated processing of a further liquid photopolymer layer superimposed on the assembly; and
FIG. 6 is a variation of FIG. 5 wherein a further circuit layer is added to a conventional circuit board.
THE PREFERRED EMBODIMENTS
As may be seen from FIG. 1, an inexpensive nonprecision substrate 10, such as a fiberglass laminate with an irregular surface pattern represented by weave irregularities, etc. 12, may be used to attain precision wiring patterns. A layer of paste consistency liquid photopolymer 11 is superimposed on the substrate, preferably of a thickness of about 0.006 in. (0.015 cm). This layer is photodeveloped by contact printing of a phototool pattern 9 to produce high resolution printed wiring patterns. The glass plate 8 is important in achieving a flat top surface, irrespective of the surface irregularities 12, which after photo curing produces a glossy surface to which contaminants do not as readily cling as with a matte surface.
Thus, after a photodevelopment step the pattern of FIG. 2 is achieved, where uncured photopolymer is washed out leaving indentations 13 between polymer insulation in a pattern defining the indentations as the desired wiring pattern. The outer surface 15 is flat and glossy so that a squeegee can ride thereupon and deposit a conductive material 14 such as conductive polymer ink into the indentations as seen in FIG. 3. There is a thin residue layer 16 formed on the resulting flat outer surface, which is sanded off as represented in FIG. 4 to produce known distances of the polymer insulation layer 11 between adjacent conductors without smears that could cause short circuiting.
The flat top is important, since the sanding step therefore removes only a thin layer of contamination, which of itself does not readily adhere to the glossy surface of the polymer if made with the glass 8 phototool. Other equivalent mechanical removal steps may, of course, be used.
The conductors present much higher conductivity than thin plated conductors, and this is an unexpected synergistic feature when conductors are placed closer together with higher packing density yet exhibit higher conductivity. On conventional flat surface plated circuit boards, the more dense the circuits the lower the conductivity because of the reduced area for putting down the conductor. These conductors also offer the significant advantage of higher integrity in handling the finished printed wiring board product. The conventional conductor is deposited on the surface and extends perhaps 0.001 in. (0.003 cm) above the surface of the substrate. Thus, when handled, it is easily scratched or damaged. These indented conductors avoid that problem.
In FIG. 6, the advantage of the invention of working with surface irregularities is illustrated. Thus, a conventional wiring pattern 25 upon substrate 10 has conductors extending from the surface. The paste consistency of the liquid polymer layer 22 covers these conductors in air bubble free contact. Then by the hereinbefore decribed process a second printed circuit layer can be added, for example, to connect a resistive material between selected conductors 25 on the substrate.
It is thus to be recognized that this invention has provided an improved process which provides significantly thicker conductors of above 0.002 in. (0.005 cm) to about 0.006 in. (0.015 cm), and thus lower conductivity while permitting the packing density to be improved by closer together, narrower conductors which nevertheless unexpectedly do not suffer from low conductivity.
The basic process steps comprise forming a patterned polymer layer over an inexpensive substrate probably having surface irregularities with a substantially flat outer surface defining an indentation pattern for receiving conductors, filling the indentations with a paste consistency conductive material to form a conductor pattern, hardening in place and machining off any residual contaminants on the outer surface to assure designed polymer insulating distances between adjacent conductors.
In my parent application Ser. No. 550,379 the process is described for photopatterning insulation layer 11 using a liquid photopolymer to produce deep conductor channels extending below a flat top surface which is molded to conform to the surface characteristics of a glass plate phototool.
After unexposed photopolymer is washed out in a solvent the channels are filled with a conductive polymer ink applied with a doctor blade and then hardened thereby forming electrical conductors. Residual conductive material remaining on the flat top surface is removed by sanding. It should be noted that the surface irregularities 12 on the surface of insulation base 10 have no effect on the formation of high integrity conductors, for the thickness of photopolymer patterns 11 are of the order of 0.006 inches thick and this thickness overcomes the effects of surface irregularities which are inherent in printed wiring laminates. For example, unclad fiberglass laminate has a surface topology which reproduces the pattern or weave in the fiberglass cloth reinforcement, and the effects of the weave pattern is completely overcome by this instant disclosure.
There are several types of conductive polymer inks which are commercially available which can be used with the disclosed process. Specific materials and processes are included in the following examples.
EXAMPLE #1
A silver filled liquid conductive polymer ink is available from the ACME Chemicals and Insulation Company, as product E-KOTE 3030. Printed circuits are made using this product by coating an insulation substrate with a layer of liquid photopolymer in paste-like consistency of the order of 0.003 inches thick; one suitable method is to use a coarse mesh screen printing fabric without a stencil. A glass plate phototool is also similarly coated and the two layers are joined in face to face contact in an air free union. A suitable photopolymer is available from M & T Chemicals, Inc. as product CNF 1075. While so cojoined a UV light source which need not be collimated hardens light struck photopolymer and adheres it firmly to the substrate. Next, the phototool is separated from the substrate and unpolymerized photopolymer is washed out in a mild solvent such as a semi-aqueous mixture of butyl cellosolve and water. It should be noted that the ability to achieve thick photopatterns, of the order of 0.006 inches having spacings of the order of 0.003 inches, can be attributed to the emulsion to emulsion contact of the phototool and the liquid paste consistency photopolymer, and this exceptional resolution with extremely thick coating allows the flat top surface to be mechanically sanded to remove excess photopolymer without damaging or otherwise disturbing the conductor traces contained within the indented channels.
EXAMPLE #2
Whereas the conductive polymer ink of Example 1 is dried thermally there is a photopolymer made by W. R. Grace Co., product F-1782, which is hardened by exposure to UV light. While formulated to be applied in the desired pattern by screen printing, the resolution of this material can be greatly improved when used in this instant process. Thus, after channel formation as described in Example 1, the conductive silver paste is applied by doctor blade then cured by exposure to a strong UV light source, for example using a 200 watts per inch lamp with the substrate conveyed thereunder at a speed of 5 feet per minute. The process steps hereinbefore described are followed to complete the printed wiring.
EXAMPLE #3
The disclosed process surprisingly affords an improved method for forming multi-layer printed wiring boards. After the formation of deep channel printed wiring as described in Example 1, a layer of insulation can be photopatterned in a thick pinhole free layer following the process of Example 1, using a phototransparency containing opaque areas where interconnections are to be made between adjacent layers. See FIG. 5. Onto this insulation layer another pattern of deep channels are formed and these channels and interconnection holes are then filled with conductive polymer ink and dried, etc. Thus, the process permits underlying irregularities, that is, the interconnection holes to be accommodated so that each layer is of a uniform controlled thickness, enabling many layers to be built up with no loss of electrical integrity. Current art dry film photopolymers cannot produce such uniform layers, for the dry film is of a predetermined thickness and cannot be easily formed into a flat top surface irrespective of the underlying topology.
Reference is made to FIG. 5, wherein the basic bottom two layers are similar to FIG. 4. Superimposed thereon is thin insulation layer 20 with gaps or voids 21 at circuit positions where connections are to be made. Then the liquid polymer layer 21 is superimposed and flows into gaps 21 also (although not so shown to illustrate the layer interconnection method). Then an appropriate wiring or resistor circuit pattern proceeds as before by the photodevelopment, filling, curing and sanding steps.
EXAMPLE #4
In a similar process, the deeply indented channels can be filled with a resistor paste material available from many suppliers, then dried and excess resistor material removed from the flush outer surface by sanding, so as to produce resistive electrical components whose ohmic resistance is more accurate than achievable with current art screen printing processes. When the resistor pastes are applied by screen printing in the current art, the resistor ohmic value is determined by the cross section area and length, and insofar as the low resolution obtainable by screenprinting has a pronounced effect on conductor width, the achievable accuracy is limited. Resistors reduced by this instant disclosure uses these same resistor pastes to produce much more accurate components, while achieving increased packing density.
Having therefore improved the state of the art, those novel features believed descriptive of the nature and spirit of this invention are defined with particularity in the following claims.

Claims (9)

I claim:
1. The process of producing high resolution closely spaced printed circuits on a substrate which may have surface irregularities, comprising the steps of:
forming a patterned polymer layer over said substrate having a substantially flat outer surface with conductor receiving indentations therein to a depth of at least 0.002 in. (0.005 cm),
filling the indentations flush with the substantially flat outer surface with a conductive material defining circuit patterns on the substrate, and
machining the substantially flat outer surface to remove a thin layer thereby to remove any spillover conductive material on the flat surface of the polymer layer to confine the conductive material within said indentations with the insulating polymer separating adjacent conductive areas.
2. The process defined in claim 1 wherein the conductive material is a metal filled conductive polymer.
3. The process defined in claim 1 wherein the conductive material forms a wiring pattern of conductors on the substrate.
4. The process defined in claim 1 wherein the substrate upon which said polymer layer is formed has a printed wiring pattern upon its surface contributing to surface irregularities, further comprising the step of:
producing a multiple layer circuit board wherein the conductive material in said pattern forms other circuit components.
5. The process defined in claim 1 wherein the substantially flat outer surface is formed by depositing the polymer layer on the substrate as a photopolymer and photographically forming the pattern by means of a flat glass plate carrying an image thereon in contact with the surface while photocuring, thereby to produce therein by means of a flat glass plate photo image a glossy outer surface.
6. The product made by the process of claim 1.
7. The process of making printed circuits comprising the steps of making a photopolymer pattern overlying the surface of a printed wiring board substrate to define therein circuit pattern indentations substantially thicker than 0.001 in. (0.003 cm), and filling said indentations with conductive materials to form a wiring pattern.
8. The process of claim 7 further comprising the step of mechanically removing contaminants on the polymer exposed surface to assure a predetermined spacing of polymer between adjacent conductors.
9. The product made by the process of claim 7.
US06/720,354 1983-11-10 1985-04-05 High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates Expired - Fee Related US4645733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US06/720,354 US4645733A (en) 1983-11-10 1985-04-05 High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/550,379 US4528259A (en) 1983-11-10 1983-11-10 Printed wiring boards with solder mask over bare copper wires having large area thickened circuit pad connections
US06/720,354 US4645733A (en) 1983-11-10 1985-04-05 High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US06/681,686 Continuation-In-Part US4756929A (en) 1983-11-10 1984-12-14 High density printing wiring

Publications (1)

Publication Number Publication Date
US4645733A true US4645733A (en) 1987-02-24

Family

ID=27069435

Family Applications (1)

Application Number Title Priority Date Filing Date
US06/720,354 Expired - Fee Related US4645733A (en) 1983-11-10 1985-04-05 High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates

Country Status (1)

Country Link
US (1) US4645733A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2230871A (en) * 1989-04-11 1990-10-31 Coates Brothers Plc Making metal patterns.
US5049134A (en) * 1989-05-08 1991-09-17 The Cleveland Clinic Foundation Sealless heart pump
US5324177A (en) * 1989-05-08 1994-06-28 The Cleveland Clinic Foundation Sealless rotodynamic pump with radially offset rotor
US5531020A (en) * 1989-11-14 1996-07-02 Poly Flex Circuits, Inc. Method of making subsurface electronic circuits
US5948533A (en) * 1990-02-09 1999-09-07 Ormet Corporation Vertically interconnected electronic assemblies and compositions useful therefor
WO2001037622A2 (en) * 1999-11-18 2001-05-25 Orga Kartensysteme Gmbh Printed conductor support layer for laminating into a chip card, method for producing a printed conductor support layer and injection molding tool for carrying out the method for producing a printed conductor support layer
US6611053B2 (en) * 2000-06-08 2003-08-26 Micron Technology, Inc. Protective structure for bond wires
US20030194655A1 (en) * 2002-04-10 2003-10-16 Compeq Manufacturing Company Limited Method for fabricating resistors on a printed circuit board
WO2005041626A1 (en) * 2003-10-22 2005-05-06 Koninklijke Philips Electronics N.V. A method of producing a conductive layer on a substrate
WO2008105867A1 (en) 2007-01-02 2008-09-04 Ormet Circuits, Inc. Methods to produce high density, multilayer printed wiring boards from parallel-fabricated circuits and filled vias
US9005330B2 (en) 2012-08-09 2015-04-14 Ormet Circuits, Inc. Electrically conductive compositions comprising non-eutectic solder alloys
WO2015153777A1 (en) * 2014-04-01 2015-10-08 General Electric Company X-ray detector panel
US9583453B2 (en) 2012-05-30 2017-02-28 Ormet Circuits, Inc. Semiconductor packaging containing sintering die-attach material

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2585700A (en) * 1949-02-12 1952-02-12 Charles E Bloom Method of making conductive designs
US3605260A (en) * 1968-11-12 1971-09-20 Gen Motors Corp Method of making multilayer printed circuits
US3791858A (en) * 1971-12-13 1974-02-12 Ibm Method of forming multi-layer circuit panels
US4307179A (en) * 1980-07-03 1981-12-22 International Business Machines Corporation Planar metal interconnection system and process
US4374457A (en) * 1980-08-04 1983-02-22 Wiech Raymond E Jr Method of fabricating complex micro-circuit boards and substrates
US4521449A (en) * 1984-05-21 1985-06-04 International Business Machines Corporation Process for forming a high density metallurgy system on a substrate and structure thereof
US4532152A (en) * 1982-03-05 1985-07-30 Elarde Vito D Fabrication of a printed circuit board with metal-filled channels

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2585700A (en) * 1949-02-12 1952-02-12 Charles E Bloom Method of making conductive designs
US3605260A (en) * 1968-11-12 1971-09-20 Gen Motors Corp Method of making multilayer printed circuits
US3791858A (en) * 1971-12-13 1974-02-12 Ibm Method of forming multi-layer circuit panels
US4307179A (en) * 1980-07-03 1981-12-22 International Business Machines Corporation Planar metal interconnection system and process
US4374457A (en) * 1980-08-04 1983-02-22 Wiech Raymond E Jr Method of fabricating complex micro-circuit boards and substrates
US4532152A (en) * 1982-03-05 1985-07-30 Elarde Vito D Fabrication of a printed circuit board with metal-filled channels
US4521449A (en) * 1984-05-21 1985-06-04 International Business Machines Corporation Process for forming a high density metallurgy system on a substrate and structure thereof

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2230871A (en) * 1989-04-11 1990-10-31 Coates Brothers Plc Making metal patterns.
US5049134A (en) * 1989-05-08 1991-09-17 The Cleveland Clinic Foundation Sealless heart pump
US5324177A (en) * 1989-05-08 1994-06-28 The Cleveland Clinic Foundation Sealless rotodynamic pump with radially offset rotor
US5531020A (en) * 1989-11-14 1996-07-02 Poly Flex Circuits, Inc. Method of making subsurface electronic circuits
US5948533A (en) * 1990-02-09 1999-09-07 Ormet Corporation Vertically interconnected electronic assemblies and compositions useful therefor
WO2001037622A2 (en) * 1999-11-18 2001-05-25 Orga Kartensysteme Gmbh Printed conductor support layer for laminating into a chip card, method for producing a printed conductor support layer and injection molding tool for carrying out the method for producing a printed conductor support layer
WO2001037622A3 (en) * 1999-11-18 2002-05-23 Orga Kartensysteme Gmbh Printed conductor support layer for laminating into a chip card, method for producing a printed conductor support layer and injection molding tool for carrying out the method for producing a printed conductor support layer
US7087984B2 (en) 2000-06-08 2006-08-08 Micron Technology, Inc. Methods for protecting intermediate conductive elements of semiconductor device assemblies
US6946378B2 (en) 2000-06-08 2005-09-20 Micron Technology, Inc. Methods for fabricating protective structures for bond wires
US20030186496A1 (en) * 2000-06-08 2003-10-02 Salman Akram Methods for protecting intermediate conductive elements of semiconductor device assemblies
US6611053B2 (en) * 2000-06-08 2003-08-26 Micron Technology, Inc. Protective structure for bond wires
US20040032020A1 (en) * 2000-06-08 2004-02-19 Salman Akram Protective structures for bond wires
US20050014323A1 (en) * 2000-06-08 2005-01-20 Salman Akram Methods for protecting intermediate conductive elements of semiconductor device assemblies
US20050042856A1 (en) * 2000-06-08 2005-02-24 Salman Akram Programmed material consolidation processes for protecting intermediate conductive structures
US7084012B2 (en) 2000-06-08 2006-08-01 Micron Technology, Inc. Programmed material consolidation processes for protecting intermediate conductive structures
US6890787B2 (en) 2000-06-08 2005-05-10 Micron Technology, Inc. Methods for protecting intermediate conductive elements of semiconductor device assemblies
US6913988B2 (en) 2000-06-08 2005-07-05 Micron Technology, Inc. Methods for fabricating semiconductor device test apparatus that include protective structures for intermediate conductive elements
US20050173790A1 (en) * 2000-06-08 2005-08-11 Salman Akram Protective structures for bond wires
US20030180974A1 (en) * 2000-06-08 2003-09-25 Salman Akram Methods for fabricating semiconductor device test apparatus that include protective structures for intermediate conductive elements
US6963127B2 (en) 2000-06-08 2005-11-08 Micron Technology, Inc. Protective structures for bond wires
US20030194655A1 (en) * 2002-04-10 2003-10-16 Compeq Manufacturing Company Limited Method for fabricating resistors on a printed circuit board
WO2005041626A1 (en) * 2003-10-22 2005-05-06 Koninklijke Philips Electronics N.V. A method of producing a conductive layer on a substrate
WO2008105867A1 (en) 2007-01-02 2008-09-04 Ormet Circuits, Inc. Methods to produce high density, multilayer printed wiring boards from parallel-fabricated circuits and filled vias
US9003648B2 (en) 2007-01-02 2015-04-14 Ormet Circuits, Inc. Methods to produce high density, multilayer printed wiring boards from parallel-fabricated circuits and filled vias
US9583453B2 (en) 2012-05-30 2017-02-28 Ormet Circuits, Inc. Semiconductor packaging containing sintering die-attach material
US9005330B2 (en) 2012-08-09 2015-04-14 Ormet Circuits, Inc. Electrically conductive compositions comprising non-eutectic solder alloys
WO2015153777A1 (en) * 2014-04-01 2015-10-08 General Electric Company X-ray detector panel
EP3126876A1 (en) * 2014-04-01 2017-02-08 General Electric Company X-ray detector panel
CN106461794A (en) * 2014-04-01 2017-02-22 通用电气公司 X-ray detector panel
US9684083B2 (en) 2014-04-01 2017-06-20 General Electric Company X-ray detector panel

Similar Documents

Publication Publication Date Title
US4775611A (en) Additive printed circuit boards with flat surface and indented primary wiring conductors
US4706167A (en) Circuit wiring disposed on solder mask coating
US4157407A (en) Toning and solvent washout process for making conductive interconnections
US4528259A (en) Printed wiring boards with solder mask over bare copper wires having large area thickened circuit pad connections
US3791858A (en) Method of forming multi-layer circuit panels
US4645733A (en) High resolution printed circuits formed in photopolymer pattern indentations overlaying printed wiring board substrates
CN1185918C (en) Polymer thick-film resistor printed on planar circuit board surface
US4336320A (en) Process for dielectric stenciled microcircuits
US4529477A (en) Process for the manufacture of printed circuit boards
US4608274A (en) Method of manufacturing circuit boards
US4631111A (en) Dichromic process for preparation of conductive circuit
CA1196731A (en) Process and device for the manufacture of printed circuit boards
GB2033667A (en) Improvements in circuit boards
GB2244867A (en) Printed circuit boards
JPH035078B2 (en)
US4487828A (en) Method of manufacturing printed circuit boards
US3447960A (en) Method of manufacturing printed circuit boards
US4556627A (en) Transferring polymer from thin plastic films to photodevelop insulation patterns on printed wiring boards
JPS6012791A (en) Method of producing printed circuit board
GB2176942A (en) Making printed circuit boards
JPH0918154A (en) Circuit board preparation
US5151299A (en) Method for forming a carbon resistance in a printed wiring board
US5151300A (en) Method for forming a carbon resistance in a printed wiring board
JPS5877287A (en) Method of producing printed circuit board
JPS59114889A (en) Method of forming conductor pattern

Legal Events

Date Code Title Description
REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Expired due to failure to pay maintenance fee

Effective date: 19910224