US3769632A

US3769632A - Digital phase control for an ink jet recording system

Info

Publication number: US3769632A
Application number: US00313914A
Authority: US
Inventors: H Julisburger; P Lowy
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1972-12-11
Filing date: 1972-12-11
Publication date: 1973-10-30
Anticipated expiration: 1990-10-30
Also published as: FR2210144A5; CA1001211A; IT998916B; BR7309675D0; JPS5234331B2; AR212071A1; DE2360013A1; JPS49102756A; GB1399066A; DE2360013C2

Abstract

The present invention comprises a digital logic system for controlling the synchronization of drop production and charging signals in an ink jet recording system utilizing electrostatic deflection of individual ink jet droplets. The control circuitry is particularly well adapted to utilize an inductive charge sensing element to provide the input information into the phase control logic section. Synchronization measurements are made during a special test cycle phase which is separate from the print cycle and which occurs periodically during the operation of the system. Adjustments of the phase of the charging circuitry are made in accordance with the sensing and phase information of the last adjustment which is stored to be used as the starting position in the subsequent test cycle.

Description

[ DIGITAL PHASE CONTROL FOR AN INK JET RECORDING SYSTEM Inventors: Hans Yohanan Julisburger, Putnam 7 Valley; Paul Lowy, P'eekskill, both of N.Y.

Assignee:

[73] International Business Machines Corporation, Armonk, N.Y.

Filed: Dec. 11, 1972 Appl. No.: 313,914

U.S. Cl. 346/75 Oct. 30, 1973 Primary Examiner-Joseph W. Hartary AttorneyRoy R. Schlemmer, Jr. et al.

[57] v ABSTRACT The present invention comprises a digital logic system for controlling the synchronization of drop production and charging signals in an ink jet recording system utilizing electrostatic deflection of individual ink jet droplets. The control circuitry is particularly well adapted to utilize an inductive charge sensing element to provide the input information into the phase con- 52 trol logic section. Synchronization measurements are 51 int. Cl. G01d 15/18 made during a Special test cycle Phase which is p [58] Field of Search 346/75 rate from the P i cycle and which Occurs p cally during the operation of the system. Adjustments 5 References Cited of the phase of the charging circuitry are made in ac- UNITED STATES PATENTS cordance with the sensing and phase information of the last adjustment which is stored to be used as the 3:22: 3 a1 starting position in the subsequent test cycle. 3,681,778 8/1972 Keur 346/75 11 Claims, 6 Drawing Figures JEST lJAIA "2 1 Q ATL SELECTOR TEST TEST 72 MODE PHASE 8 I e l 44 0g DECODER i m [1m 1 L T O A La. T

V m 90 94 RR A8 TJ l F8 A 8O 82 PRINT PHASE 1 g SELECTOR 74 \SAMPLE SET TO "0" PRINT A1 GATE PULSE PHASE (INITIALIZATION) UMBER B TEST DATA PULSE F1 l 1 76 F ATAR ARA AMPLIFIER CHARACTER 32 GENERATOR 77 RAMP RARRRN CHARGE Q EN AMPLIFIER PULSES 34 AMP.

- SHEET 1 CF 5 F IG. 1

TRANSDUCER DRIVER SENSE D CHARACTER AMPLIFIER 32 GENERATOR AND PHASE CONTROL LOGIC PAIENIEIJIIcI 30 I975 SHEET 2 OF 5 sEPIIIIIIIOII F IG. 2 TIMES TRANSDUCER IIIIIIIE III I *-'--------*-I PERl0D--- I 1 PULSE I P I I 2PULSE I I I I I I I l 3PULSE I F I I I PHASEI) 4 PULSE I I I I I 0LOCK I I I OUTPUT 5PUL3E I I I e PULSE I P I I I 7 PULSE I I I I I I.

I IIISI I w I I I I NT I I PRI PULSE I I I I I FIG. 4

TEST CYCLE 0 I I j I l I I PRINT cYcIE I I I I I I I 16 TEST DROPS TEST DATA I I IIWIIIIIIIIIIII I DELAY- SAMPLE IIAIE I RECOVERY I AHRESHOLD SENSE I *T*Z RESPONSE PATENTEHBUSO-ISM 3.769.632

sIIEE 3 BF 5 I START FIG. 3 1 50 TEST MODE PHASE 0E CHARGE PULSE ENCODED BY 51 PHASE SELECT LOGIC 66 7 I I INITIALIZATION TIIIE I PRINT IIoIIE YES] NO I 52 sE PHASE coIIIIT ACCESS STORED coIIIIT To ZERO GENERATE 16 TEsT 54 mm PULSES I y SENSOR OUTPUT I 56 YES NO I IIEcREIIEIIT 6 INCREMENT PHASE couIIT 0 PHASE coIIIIT 58 BY 1 BY 1 Is INITIALIZATION 62 TIME OVER YES N0 PATENTED DU 30 I975 3.769.632 3m 5m 5 r I FIG. 6

PHASED CLOCK 51 *5 I I *F CRYSTAL CLOCK osc. (8 STAGE RING) v 6 TEST DATA SAMPLE GATE PUlfE PULSE LSSEMS M ssz sss ss4 1 DIGITAL PHASE CONTROL FOR AN INK RECORDING SYSTEM CROSS-REFERENCE TO RELATED APPLICATIONS The present application is related to U.S. Patent application Ser. No. 313,913 filed concurrently with the present application of 'J. Ghougasian et al entitled Drop Charge Sensing Apparatus for an Ink Jet Printing System. This referenced patent application discloses an inductive drop charge sensing element which is suitable for use with the presently disclosed synchronization system. The utilization of said inductive sensing element with the present apparatus provides a very accurate and maintenance-free overall system which would be required in any high reliability application such as a computer printout device.

BACKGROUND OF THE-INVENTION The need for improved high speed printers has increased drastically in recent years. A particular application'for such printers is for producing computer printout records wherein the actual printing devices utilized to produce human readable records has long been a major bottleneck in the overall computer system. In such computer systems, data which is produced by the system must often be held in temporary storage such as magnetic tapes, discs, drums, etc. for many hours before the particular printing devices attached to the system can'produce the required readable outputs. Most currently available printers in this general area today are of the impact type where a printing element must actually be moved forceably against a record member to produce a visible letter or symbol.

In recent years ink jet printing has been developed wherein ink is applied under pressure to a suitable nozzle. The ink is caused to break up into individual droplets which must be controllably directed onto the recording medium. The droplet formation may be controlled by a number of different methods available in the art including physical vibration of the nozzle, pressure perturbations introduced into the ink supply feed to the'nozzle, etc. The result of applying such external perturbations to the ink jet'apparatus is to cause the jet JET stream emerging from the nozzle to break up into uniform droplets at a predetermined frequency and at a somewhat variable distance from the tip of the nozzle. It is necessary, however, that the precise time of droplet formation and the application of video charging signals to the ink droplet stream be synchronized. The rate of drop formation in such systems is determined by the signal applied to the physical perturbation means, e.g., vibrating the nozzle. A means for applying an electrostatic charge to each droplet produced by the nozzle is provided in such systems adjacent to the location where the ink stream begins to form such droplets. conventionally, this means is a hollow tube or electrode surrounding the emerging stream and connected to a suitable charging circuit. Video signals are applied between the nozzle and the charging electrode in response to which a drop will assume a charge determined by theamplitude of the particular signal on the charging electrode at the time that the drop breaks away from the jet stream.

The drop thereafter passes through a fixed electric field and the amount of deflection is determined by the amplitude of the charge on the drop at the time it passesthrough said deflecting field. A suitable recording surface is positioned downstream from the deflecting means with the result that the droplet strikes such recording surface and forms a small spot. As will be appreciated, the position of the drop on the writing surfaceis determined by the deflection the drop experiences which in turn is determined by the charge on the droplet. Thus, by suitably varying the charge, the location at which the droplet strikes the recording surface may be controlled with the result that by applying suitable video signals to such a system, a visible human readable printed record may be formed upon the recording surface. U.S. Pat. No. 3,596,275 of Richard G. sweet entitled Fluid Droplet Recorder discloses such a recording or printing system.

As will be further appreciated with such a system, the time that the drop separates from the fluid stream emerging from the nozzle is quite critical since the charge carried by the droplet is produced by electrostatic induction. The field established by thecharging signal is maintained while the drop separates. The drop will carry a charge determined by this signal and proportional to the magnitude thereof. However, if at the time of separation the charging signal is in the process of either rising or falling or is not present at all at the time of drop separation, the exact charge on the drop will be some time function of the maximum signal rather than being proportional thereto in accordance with some predetermined and fixed relationship. It is thus necessary in order to place exact predetermined charges on individual droplets in accordance with successive video signals, to know exactly the time of droplet separation in relationship to the timing of the video signal. Stated differently, the droplet separation time and the application of the video signal must be very precisely synchronized. Failure to properly synchronize droplet formation and the video signal results in very imprecise control of the printing process with attendant severe degradation of the uniformity, clarity, and generally the quality of the final printer result.

U.S. Pat. No. 3,465,351 of Keur et a1 entitled Ink Drop Writing Apparatus discloses a system for broadly detecting whether or not the drop producing.

transducer and the charging signals are in synchronization and for introducing a corrective signal to the system.

U.S. Pat. No. 3,596,276 of K. T. Lovelady entitled Ink Jet Printer with Droplet Phase Control Means discloses another system for detecting synchronization and establishing a phase change to maintain said synchronization. The former patent utilizes a very coarse control over the transducer vibrating means and the latter Lovelady patent discloses a consideraby more complex analog control system for controlling the phase of the charging signal generating means.

What is required in such systems for optimum performance is very precise control of the synchronization of the drop producing means and the charging means which is also very reliable so as to require the minimum amount of adjustment, recalibration, etc.

In summation, what would be desirable in such a phase control circuit is a digital control system which is inherently suitable for large scale integration circuit techniques, said digital system being both very accurate in terms of fineness of control and very reliable in the nature of the circuitry itself.

SUMMARY AND OBJECTS OF THE INVENTION It has now been found that an improved synchronization and control circuit for maintaining the synchronization between the ink droplet formation means and the drop charging means may be effected by utilizing digital control circuitry for determining the relative time of a droplet formationand the application of the chargingsignal to an individual droplet including further digital means for, in effect, applying necessary phase correction to the droplet charging circuitry. It has further been found that the required time for effecting the necessary testing and control of said system may be reduced by temporarily storing the last detected phase information and beginning new phase checking operations at said previsouly stor'ed time reference.

It is accordingly a primary object of the present invention to provide a highly accurate and reliable phase sensing circuit for utilization with an ink jet recording system.

It is yet another object of the invention to provide such a phase controlling system which is both highly accurate and reliable.

It is a still further object of the invention to provide such a control system utilizing digital circuitry for both the measurement and phase selecting operations.

It is a still further object of the invention to provide such a control system which is particularly well suited for large scale integration circuit technologies.

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view ofa greatlysimplified ink jet recording system showing the phase control circuitry as a functionalblock'in the overall system.

FIG. 2 comprises aseries of graphs representing waveforms'utilized with the present invention for pur poses of charging the ink droplets during both testing and printing cycles.

FIG. 3 is a flow chart showing the sequences of steps of the present control and synchronizing system.

FIG. 4 comprises a series of waveforms illustrating a number of additional pulses and signals utilized in the presently disclosed embodiment.

FIG. 5 comprises a logical schematic diagram of the disclosed synchronization system of the present invention. v

FIG. 6 is a functional schematic of the synchronization system clock shown in FIG. 5.

DESCRIPTION OF THE DISCLOSED EMBODIMENT The objects of the present invention are accomplished in general by a digital control circuit for controlling the synchronization between the droplet forming means and the droplet charging means in an ink jet printing system including means operative during a test cycle for supplying a series of test pulses to the droplet charging circuit having a predetermined known phase relationship with respect to pulses supplied to the drop forming means, means for determining if the test pulses result in full charging of the ink droplets, and means for selecting a charging pulse phase for printing in accordance with said determination. Storage means are provided for storing the phase information of the current test cycle to provide a starting point for a subsequent test. The droplet forming and charging period are divided into a predetermined number of time divisions and the phase of charging signal adjusted in accordance with a predetermined timed division.

In accordance with the preferred embodiment of the invention, this period is broken into a power of two (i.e., 2x) time periods; i.e., 8, whereby various control circuitry utilizing digital logic is readily applicable. Further, in accordance with the disclosed embodiment, the zero or reference datum against which phase comparisons are made is the basic frequency applied to the droplet forming transducer. A phased clock is provided which produces eight separate phased pulse sequences, all at the basic drop forming frequency F but separated in time one-eighth of a period.'Thus, when the charge detection circuitry determines that the proper charge is occurring during some given phase relationship with respect to the basic or reference phase, the desired clock output from said phased clock is selected and gated into the printing circuitry.

Having thus generally described the overall features and organization of the present control system the disclosed embodiment of the invention will now be set forth in greater detail with reference to the drawings.

Referring first to FIG. 1, a very generalized perspective view of an ink jet recording system is shown together with functional blocks indicating the primary control circuitry. Ink is ejected from the nozzle 10 which is supplied thereto by a high pressure ink source 11. A transducer 12 such as a piezoelectric crystal introduces mechanical vibrations or perturbations in the fluid stream causing same to break up into ink droplets downstream from the nozzle at a predetermined or synchronized frequency. These droplets are charged with a desired potential by the electrostatic charging electrode shown in 14. The ink droplet stream 13 then proceeds past a sensing station l6'whose function will be described subsequently and thence to a pair of deflecting plates 18 wherein, conventionally, a fixed deflection signal supplied by a power supply 20 deflects the stream a predetermined distance to either allow it;to

strike the record receiving member 24 or an ink gutter 22. It should be noted that the charge placed on the droplets by the charging station 14 determines the amount of deflection and depending upon the particular type of character generation scheme used, may alternatively either allow a droplet to strike the record member or be deflected to the gutter or may alsoincrementally deflect the given droplet'stream as will be well understood by those skilled in the art. The overall organization of such an ink jet recording system is relatively well known as exemplified by the previously referenced Sweet U.S. Pat. No. 3,596,275.

The basic control circuitry comprises the character generator and phase control logic 28 whose output produces the requisite signals to the charge amplifier 34. As will be appreciated, it is the signals supplied to the charge amplifier that selectively cause droplets to either reach the record or to be deflected into the gutter 22. It should be noted in passing that ink striking the gutter is conventionally returned to the system via a return mechanism as shown schematically at 23 which is a scavenging means which normally-resupplies the ink to the ink reservoir and pressure means 11. Both blocks 28 and the transducer driver 32 are driven by the system clock 30. As will be remembered from the previous description of the system, it is required that the signals applied to the charging means 14 and to the transducer 12 which are supplied by the charge amplifier 34 and the transducer driver 32, respectively, must be precisely synchronized in order for proper control of the ink droplets to occur. The phase control logic portion of block 28 selects the proper phase relationship for the clock pulse which ultimately is to reach the charge amplifier 34. i

In accordance with the present system the sensing means 16 picks up a suitable signal from the charged ink droplets which signal is suitably amplified by the sense amplifier 26 and fed into the phase control logic. The phase control logic selects the proper phase of the clock 30 in accordance with the signals received from sense amplifier 26 to insure that the desired synchronization of the droplet formation and charging signal occurs.

For typical means of generating the character signals together with the charging pulse for controlling the charging means 14 reference may either be made to the aforementioned Sweet Pat. No. 3,596,275, or to US. Pat. No. 3,298,030 of A. M. Lewis et al. entitled Electrically Operated Character Printer." The specific method of generating characters is not considered germane to the present invention, it being emphasized that it is the synchronization of the signal fed to the charge amplifier with signals fed to the transducer driver 32 which forms the subject matter of the present invention. Similarly, while a single nozzle is shown as in the Sweet patent, it will be understood that the present invention would apply to a muIti-nozzle array such as exemplified in the above-referenced Lewis et al. patent.

In accordance with the principles of the present invention, it has been found that the synchronization of the driver and the charging means may best be checked during a special test cycle wherein it is known that a predetermined signal is supposed to be on a particular droplet or series of droplets. For the purposes of the present invention, the test cycle and print cycle signals are assumed to be produced elswhere in the system as indeed they would'be. For example, in a line printer a typical test cycle might come at the end of every line during the carriage return and would normally be completed during the time taken for said carriage return. By utilizing such a test cycle, more efficient operation is obtained than by trying to build the logic circuitry to operate during normal printing operations.

Thus, during the test cycle, the'sensing element 16 attempts to detect a charge signal on a droplet or series of droplets passing same during the test cycle and if such charge is present and sensed, the sense amplifier produces a signal which signals the phase control logic to the effect that the current synchronization setting is correct. Alternately, if during a particular test cycle no signal is detected, the absence of the signalfrom .the sense amplifier may indicate to the phase control logic that the synchronization is incorrect and an adjustment must be made. The particular manner in which this adjustment is made according to the principles of the present invention will be set forth subsequently.

The operation of the system will now be explained with reference to the wave forms shown in FIGS. 2 and 4. The timing circuitry which produces these wave forms is shown on FIG. 6. Referring briefly to FIG. 6, the Clock 30 is essentially an 8-stage ring counter having eight tap points wherein each tap receives a single output pulse for every eight pulses received from the basic crystal oscillator 31. Assume then that the period of the clock is equal to eight times that of the oscillator. With this relationship each of the tap points denoted in FIG. 6 as F -F is displaced one-eighth of a period from the adjacent tap point. The four single shots SS1-SS4 are timing flip-flops which are turned on by the rising of the test mode" signal wherein SS1 serves the purpose of providing a first recovery period which in effect allows any charge built up on the sensing element from a previous printing cycle to be dissipated. SS2 turns on and provides the Test Data Pulse which enables a predetermined number of pulses from the clock l6 pulses in the present embodiment) to reach the test phase data selector. Upon its turn off single shot SS3 is enabled which is for the purpose of delay and allows the sensing element to build up a charge and for said signal to reach the sense amplifier 26 whereuon the Sample Gate Pulse emanating from single shot SS4 is produced. The operation of this section will be explained more fully with the description of FIGS. 3 and 5.

Referring back to FIG. 2, it will be noticed that the first curve entitled Transducer Excitation Frequency shows the pulse F which is supplied directly during both test and print cycles to the transducer which produces the droplets. This pulse and phase determines the 0 datum or reference for the timing of the present control system. The eight pulses designated 1 pulse through 8 pulse from the Phased Clock Output show the phase relationship of the eight output lines F -F emanating the clock circuit 30. The bottom curve entitled Print Pulse indicates by way of example the shape and length of the print pulse which is subsequently applied to the charging electrode during a printing cycle as opposed to a testing cycle. It will be noted in passing that the print pulse is substantially longer in duration than the test pulse. This shape is obtained by means of the single shot 40 which passes through the OR circuit 42 and finally into the charge amplifier 34. The single shot merely lengthens the clock pulse for printing.

What the detection circuitry must do is determine the particular phase of the phased clock during which drop separation actually occurs. Looking at the upper curve on FIG. 2 the two arrows a and b indicate two different drop separation times. In the case of the drop separation time a assuming that testing started with the 1 pulse, no sensing of a charge could occur during 1 pulse or 2 pulse" as in each case these pulses have fallen to 0 before the actual drop separation occurs. However, upon the application of the third phase 3 pulse to the system, a sensed output would occur which would indicate that this is the particular phase of the clock duringwhich drop separation first was detected. It will also be noted that

clock pulses

4, 5 and 6 would also produce an output assuming that a particular test cycle began with one of these series of pulses as will be explained later. In the case of drop separation time b the detection would first occur during phase 2 or the production of the 2 pulse" from the system clock.

It may thus be seen that it is possible to determine when the drop separation time coincides with a particular phase of the clock. It is then necessary to utilize this information to control the phased clock selection circuitry which releases the clock pulse to the charging amplifier 34. The way that this is done will be apparent from the functional schematic diagram of FIG. and the system flow chart of FIG. 3.

Before proceeding with a detailed description of the disclosed embodiment of FIG. 5, and its method of operation set forth in the flow chart of FIG. 3, reference should first be made to FIG. 4 which comprises an overall timing chart for the present system. This FIG. essentially shows five waveforms illustrating significant control signals utilized in the system. It should first be understood that the time base of FIG. 4 bears substantially no relationship scalewise to that of FIG. 2. For example, in the waveform denoted Test Data it will be noted that under the raised portion essentially 16 test drops are produced by the system. These 16 test drops require 16 drop forming periods of the scale of FIG. 2. The two waveforms denoting this test cycle and print cycle are developed by the overall system controls which are not shown and which could readily be produced by one skilled in the art depending upon how often it is desired to enter a test cycle. Basically, when the machine is not in test cycle, it will be in print cycle. For example, in a line printer as set forth previously, the test cycle could be sandwiched into a carriage return in the case of a print head which in effect scans across a line of the record receiving member. It is also possible that it might not be considered necessary to have a test cycle every line or alternately it might be desired to have more than one test cycle per line. In any event the timing for this would be relatively straightforward, it being understood obviously the actual printing cycle of operations could not proceed concurrently with testing.

The curve marked Test Data is developed from the series of timing elements illustrated on FIG. 6 wherein the second single shot SS2 produces the Test Data pulse. This pulse which is developed from the test cycle originating pulse enables the system to produce the unique series of test pulses disclosed and described herein. The pulse itself is applied to various portions of the hardware disclosed in FIG. 5 to appropriately gate test pulses to the charge amplifier 34 and thence to the charging means to appropriately charge selected droplets. It will be noted that this pulse is delayed somewhat from the beginning of the originating test cycle pulse. This, as indicated previously, is to allow the effects of previous droplets during printing which might have partially charged the sensing means to dissipate.

The waveform indicated as Sample Gate is for the purpose of sampling the sense amplifier at an appropriate time after the series of test pulses have been produced and have been allowed to, in effect, accumulate on the sensing means to produce a maximum signal free of noise and other disturbances. It should be noted that a delay period is allowed between the fall of the test drop or test data pulse and the rise of the sample gate pulse. This single shot SS4 on FIG. 6 produces theSampie Gate pulse and as will be noted, is applied to the two AND

circuits

44 and 94 on FIG. 5 to produce the incrementing and decrementing signals to the phase counter 48 when the sense amplifier 26 produces an appropriate output.

Finally, the waveform entitled Sense Response merely illustrates the signal produced by the sense amplifier at the time of application of the sample gate pulse. The dotted line marked threshold indicates that it is possible to adjust the threshold of the sense amplifier to control various transient effects such as noise, signal due to partial charging, stray fields, etc.

From the previous description of FIGS. 1, 2, 4 and 6, it will be apparent that the broad concept of the invention involves determining during which phase of the clock the actual drop breakaway is occurring and having once detected this phase, it is utilized to control the phase utilized during printing operations and also to subsequently specify the starting point of the next test cycle. The way that this is accomplished in the disclosed embodiment of the invention will now be set forth relative to the flow chart of FIG. 3 and the functional block diagram of FIG. 5. In the description of FIG. 3 which follows, appropriate references will be made to the specific hardware of FIG. 5 as is necessary. However, a specific description of FIG. 5 will also follow the broad description of the process accompanying FIG. 3.

Referring now specifically to FIG. 3, it will be noted that the process starts with a signal provided from the console designated as Start. This enters block 50 which is labeled Test Mode. As will be appreciated, this block is actually entered by the application either of the Start signal or by the Test Mode signal coming from the main system clock. From block 50 the process proceeds to block 51 which is a test for initialization. Initialization-is a start-up procedure which may be accomplished by holding the console button down to assure the continuous running of a plurality of test cycles before the first print cycle is entered. This could be done by a simple switch held by the operator or by a timed flip-flop which stays on for a certain minimum number of cycles or by some other appropriate means. Assuming for the purposes of this description the initialization time is being entered, the system then proceeds to block 52 which states that the phase count is to be set to 0. Referring to'FIG. 5, the phase counter is denoted by the reference numeral 48. It should be noted that the phase count does not have to be set to 0, but is shown for clarity of explanation.

After setting the phase count to 0 in block 52, the process proceeds to block 54 wherein 16 test phase pulses are gated from the system clock wherein the particular phase selected is that determined from the count currently stored in the phase counter which in this initial case would be 0. Thus, 16 pulses of phase 0 which would be on the lines F from the clock are selected by the'test data selector and the test phase, decoder to cause the F1 pulses to be placed on the charging electrode to charge or attempt to charge the 16 droplets being produced by the printer. The process then proceeds to block 56 where the test for the sensor output is made. As will be remembered, if'the droplet is breaking away during the current charging phase, a

I charge will be placed on the droplet which will cause a sensor output. If there is no output, block 58 is entered which causes the phase counter to be incremented by l whereupon the process proceeds to block 62 wherein a test is made as to whether ornot the ini tialization time is over. Assuming it is not over, the process goes to block 64 to re-access the phase count and returns to block 54 which generates 16 new test phase pulses, it being remembered that any time the test phase pulses are generated the particular phase selected depends on the current setting of the phase 3 counter 48. In the last cycle, it had been incremented by I.

This process will continue through initialization time until there is a sensor output. At this point the system will branch to block 60 wherein the phase counter is decremented by 1. However, in either' case block 62 is again entered and the system disclosed will thus oscillate between a sensor output and no sensor output until the initialization time is over. It is to be noted that when initialization time is over, that even if the last cycle indicated there was no sensor output the system timing circuit'will be off by no more than one clock phase. As will be mentioned subsequently, the print cycle decoder actually backs up three phases of the clock from the current setting of the phase counter to give a somewhat broader printing cycle charging pulse than is used with the test cycle. Therefore, the effect of being off by only one phase count does not cause problems with the system.

With the above factors in mind it will now be assumed that initialization time is over. This causes block 66 to be entered whereupon a print cycle for the system will ensue. This might, for example, cause several hundred or maybe even several thousand droplets to be charged before the next Test Mode is entered. Again, this is determined by the system master clock and when the next test cycle comes up, block 50 is enabled which then proceeds to block 51 and since initialization time is over proceeds to block 64 whereupon the current count in the phase counter 48 is used to control the gating of the next 16 phased clock pulses to the printer. At this point the system will go to block 54, block 56 and depending upon the sensor output will branch to

blocks

58 or 60 and at this point regardless of whether there is or is not a sensor output since initialization time will be over, the system will return to the print mode shown in block 66.

At this point it will be apparent that if there is no sensor output, the phase counter is incremented by l and the print mode is automatically re-entered before a sense output is obtained. This has been found satisfactory in practice since the synchronization once obtained tends todrift relatively slowly and if the sense output is not obtained on an immediately following phase check, it will usually be found within one or two further phase checks. It will, of course, be apparent that by a very simple alteration of the controls, the system can stay in the test phase until the sense output is' obtained. This could be done, for example, by causing

blocks

58 and 60 to go immediately by 64 to generate 16 new test pulses, etc., until the droplet is sensed. This, of course, would require that the master print test clock be altered so that the print mode cannot be reentered until a successful sensing of the charged droplet occurs as will be readily-understood.

The preceding description of FIG. 3 clearly illustrates the manner in which the disclosed embodiment of the invention operates. The individual functions performed by the various blocks of FIG. are essentially'obvious when considered together with the description-of FIG. 3. The control circuitry as shown in FIG. 5 is complete insofar as all of the' necessary circuits are shown for producing the basic transducer excitation frequency, the charging pulses both for test and printing cycles and also the phased clock. The basic system clock which produces the test mode and print mode cycles is not shown as these pulses could be produced any number of ways but would in all probability be essentially electromechanial in origin or at least initiation. The relative shape and duration of these pulses is shown clearly in FIG. 4. It is noted in passing that for the initialization phase a series of test mode pulses would be produced during initialization which would be predetermined by the system designer and once the initialization phase is complete, the test mode and print mode pulses are the only ones necessary to the operation of the system shown in FIG. 5. It should be clearly understood that the crystal oscillator 31 which drives the basic clock 30 at a frequency eight times the desired basic clock frequency F is essentially independent of the other system clock which provides the test mode and print mode pulses. The crystal oscillator 31 may be any convenient form of oscillator such as is well known in the art and the clock 30 which has been described with reference to FIG. 6 consists primarily of the eight-stage ring counter having the appropriate eight output taps and also desired wave shaping characteristics to produce pulses of the desired shape and duration. The primary output of the clock 30 is the eight output phases appearing on the lines F1-'Fg making up the cable 70. These are supplied to the test data selector 72 and the print phase selector 74. The operation of these two units will be described subsequently. It will also be noted that the line F, is shown coming off of the cable adjacent to the clock 30 which provides the requisiteseries of clock pulses to the power amplifier 32 which drives the transducer which causes the droplets to be formed. This line is also fed into the character generator 76 and provides appropriate gating synchronization pulses thereto. The operation of the character generator is to accept an incoming data pulse train usually in parallel form and convert it into a serial binary output which can be appropriately displayed on the recording surface. The operation of such character generators is well known in the ink jet printing art particular reference being again made to US. Pat. No. 3,298,030 of Lewis et al., and also to US. Pat. No. 3,373,437 entitled Fluid Droplet Recorder with a Plurality of Jets" of Sweet et al. Essentially the signals on the output line from the character generator is a series of binary pulses wherein a 1 would represent a droplet to be recorded and a 0 would represent a droplet which is not to reach the marking or recording surface. This binary data string is fed into the AND circuit 78, the other two inputs of which come from the print mode pulse from the main system clock and from the print phase selector 74. As will be apparent, the AND circuit 78 produces an output during the print mode pulses when a binary 1 appears on the output of character generator 76 and when a selected print phase pulse is received from the print phase selector 74. The output of AND circuit 78 is then fed to single shot 40 which .is for the purpose of giving a prolonged pulse to the charging amplifier 34. The effect of the single shot is illustrated in FIG. 2 in the bottom curve as mentioned previously. Assuming that the "2 pulse from the phased clock is utilized to initiate the AND circuit, in-

stead of the print pulse falling at the termination of the clock pulse, it is extended to almost the end riod.

To complete the explanation of the operation of the print cycle, let it be assumed that the separation phase counter 48 has been set to some arbitrary value between 1 and 8 (0-7 in binary format). The output from of the pethis counter is applied to the print phase decoder 80 which is a conventional decoder and will bring up one of the lines l-8 depending upon the setting of the counter and its own internal circuitry. As mentioned briefly previously, as a preferred embodiment of the invention, it has been found convenient to cause the print phase decoder to decode approximately three test phase cycles less than the actual setting of the counter. Thus, if the number stored in the counter were five, the print phase decoder would bring up line 2. This, as stated previously allows the print pulse to straddle the actual drop separation time which allows some relaxation on the constraints of the system without materially affecting the performance. It will be noted that the wiring of the print phase decoder would be fixed; i.e., it would decode with a fixed ratio relative to the setting of the counter. As will be noted, each of the AND circuits Al-A8 included in the print phase selector 74 are continuously being fed various outputs from the phase clock 30 on lines F -F However, only the particular AND circuit enabled by the output of the print phase decoder will allow that particular clock sequence to pass therethrough and through the OR gate 84 and then into the AND circuit 78.

The operation of the circuitry which produces a test data pulse is essentially the same as that just described for the print phase with several minor exceptions which are apparent. Thus, the output of the phase counter 48 is supplied to the test phase decoder 86. In accordance with the setting of the counter, one of the lines 1-8 coming from the test phase decoder will be brought up which will in turn energize one of the AND circuits 88 forming a part of the testdata selector 72. The particular AND circuit selected by the decoder 86 will cause that phase of the clock connected thereto to pass through OR gate 90 into AND gate 92. The other input to the AND gate 92 is the test data pulse which will allow the test data pulses from the selector 72 to pass through the OR gate 42 into the charge amplifier 34 whereby all subsequent droplets produced during the next 16 periods will be charged or at least the charging will be attempted, i.e., if the drop separation time is before or after the occurrence of the test charging pulse, obviously the associated droplet will receive no charge.

It will be noted that AND circuit 92 has only two inputs whereas AND circuit 78 has three. This will be obvious as during the test all consecutive droplets are to be charged; i.e., there is no data input during this phase.

Referring now to the upper left hand portion of the drawing, the sensor 16 attempts to pick up the charge on the droplets passing same. lf, in fact, the droplets are charged a signal will be detected and amplified by the amplifier 26 which will produce an appropriate signal. This signal will produce an input to the AND Circuit 94, the output of which causes a decrementing or stepping down of the separation phase counter 48. AND circuit 94 has two other inputs, the first being the test mode which is brought up by the basic system clock and the other of which is the sample gate pulse which emanates from the single shot SS4 within the clock 30. The test mode" and sample gate pulses are, as will be apparent, for the purpose of preventing any unwarranted stepping of the phase counter at any time other than during the test cycle.

In the event that the amplifier has no output, the inverter 96 will be enabled to produce an output which forms one of the inputs to the AND circuit 44. The other inputs to AND circuit 44 are the test mode pulse and the sample gate pulse which, as will be noted, are also applied to AND circuit 94. Thus, the condition of the output from sense amplifier 26 determines whether AND circuit 44 or AND circuit 94 is enabled to step the phase counter up or down, respectively. It should be noted in passing that the phase counter is adapted to count from 1 through 8 (0-7 in binary) to correspond with the 8 phases of the phased clock 30.

The above description of the operating details of the disclosed embodiment of the invention of FIG. 5 completes the overall description of the operation of the presently disclosed phase synchronization system for phasing drop formation and charging of the individual ink droplets in an ink jet printing system. As stated previously, one of the primary advantages of the present system is that the controls are essentially digital in nature. This may be readily seen by examining the various functional blocks of FIG. 5. Thus, the phase counter 48, the test phase decoder, print phase decoder, and the clock 30 are all digital in nature, operating essentially on a 3-bit binary code capable of representing numbers from l-8 (0-7 in binary). All ofthe remaining circuitry including the AND gates, OR gates, single shot 40, the character generator 76, etc. are binary in nature and the two

amplifiers

26 and 32 are essentially binary in nature wherein a fixed magnitude output pulse is produced upon the receipt of an input pulse. This type of circuitry is readily adaptable to large scale integration which in turn makes the circuitry extremely reliable, low in price and also compact wherein the control circuitry is readily adaptable to multijet printing systems wherein a matrix of jets are utilized to form the various characters as will be well understood.

As stated a number of times in the specification, the present embodiment represents a number of engineering trade-offs and compromises to provide acceptable printing quality with a minimum of time used in the test phase. The following comments apply to some of the design alternatives which could be utilized within the spirit and scope of the present invention, it being noted that the broader concepts of the invention involve the storing of the phase count for the last test operation.

' Also basic to the concepts of the invention are the use of digital control circuitry. Possible design alternatives include some of the following considerations. The phase counter 48 is stepped down in theevent of a successful sensing of drop charging during a test phase and stepped up in the absence of same. These two operations could, however, be simply reversed. Also, a single phase increment and decrement are disclosed while obviously an increment or decrement of more than one could be utilized, especially after an unsuccessful sensing in a previous test cycle.

As mentioned previously, the system controls could be readily changed insofar as the basic systemclock is concerned whereby test operations could continue until a successful sensing output occurs before the print cycle is re-entered. Also, 16 test droplets are indicated as being sufficient to provide a reliable sensor output. However, this number of droplets could be either increased or decreased. In the latter case, a larger test signal pulse could be utilized to reduce the number of droplets possibly to a few as one test droplet for the purpose of sensing. Further, the number of phases of the clock could be either increased or decreased depending upon experience. It is, however, to be noted that the number of phases are optimally kept to some power of two for the most efficient use of the digital and sensing circuitry; i.e., four or sixteen phases would fully utilize two and four binary digit positions whereas five phases would require three bit positions wherein all of the possible combinations in the logic circuitry would not actually be used.

What is claimed is:

1. In an ink jet printing system which comprises an ink supply means, nozzle mean for forming an ink droplet stream as ink emanates therefrom, drop forming means associated with said nozzle causing said ink droplets to form at a substantially predetermined rate, charging means for selectively charging droplets emanating from said nozzle, sensing means for detecting the presence of a charge on said droplets, deflecting means for electrostatically deflecting said droplets, record receiving means for receiving said droplet stream, and synchronizing means for synchronizing the application of an electrostatic charge on individual ink droplets with the formation of said ink droplets, the improvement in said drop forming and charge application synchronization means which comprises:

means for supplying at least one test pulse to the droplet charging means having a predetermined known phase relationship with respect to pulses supplied to the drop forming means,

means for specifying the phase of at least one test pulse,

said sensing means including means operable to determine if the test pulses result in full charging of the ink droplets, storage means for storing phase information related to the last generated at least one test pulse, and

said specifying means including means for utilizing the phase information in said storage means for generating the next series of charging pulses during the next subsequent test cycle.

2. An ink jet printing system as set forth in claim 1 including means for accessing the stored phase relationship from said storage means and :means utilizing said accessed information to control the phase of the pulses applied to said charging means during a subsequent printing cycle.

3. An ink jet printing system as set forth in claim 2 including means for altering the phase information contents of said storage means in a first manner in the case of a successful charging of individual ink droplets and means for altering the phase relationship information in said storage means in a different manner when said ink droplets are not successfully charged.

4. An ink jet printing system as set forth in claim 3 wherein said means for supplying a series of testpulses includes a system clock which produces a predetermined number of phased pulse output sequences including the pulses supplied to the drop forming means and means for selecting only a predetermined phase sequence of said pulses at any one time for aupplying to said electrostatic drop charging means.

5. An ink jet printing system as set forth in claim 4 wherein said selecting means includes a digital decoder and gating circuit means controlled thereby, said digital decoder including means for gating the contents of said storage means in digital form thereto and means for storing said phase information in said storage means in digital fonn.

6. An ink jet recording system as set forth in claim 5 wherein said means for producing said at least one test pulse includes means for producing a series of test pulses to be supplied to said charging means whereby the signal-to-noise ratio in the sensing circuitry is improved.

7. An ink jet recording system as set forth in claim 5 including means associated with said synchronization circuitry for initiating further test cycles wherein, during each test cycle, test pulses are generated having different phase relationships until a successful charging of said ink droplets is detected and means for activating a print cycle subsequent to said successful sensing operation.

8. An ink jet printing system as set forth in claim 5 including means for incrementing the phase relationship number in said storage means in the event that a given series of test pulses does not result in the successful sensing of a charge and means for decrementing said stored phase number in the event that successful charging of the pulses does occur.

9. An ink jet printing system as set forth in claim 2 including a decoder for controlling the application of the stored phase information during a print cycle and means causing an automatic and fixed decrement of said phase information number whereby the print cycle charging pulse is placed on the charging means at an earlier point in time than the test pulse derived from the same signal.

10. In an ink jet printing system which comprises an ink supply means, nozzle means for forming an ink droplet stream as ink emanates therefrom, drop forming means associated with said nozzle causing said ink droplets to form at a substantially predetermined rate, charging means for selectively charging droplets emanating from said nozzle, sensing means for detecting the presence of a charge on said droplets, deflecting means for deflecting said droplets, record receiving means for receiving said droplet stream, and synchronizing means for synchronizing the application of an electrostatic charge on individual ink droplets with the formation of said ink droplets, the improvement in said drop forming and charging synchronization means which comprises:

means for supplying a plurality of test pulses to the droplet charging means having a predetermined known phase relationship with respect to pulses supplied to the drop forming means; said means including a system clock which produces a predetermined number of phased pulse output sequences including the pulses supplied to the drop forming means,

means for selecting only a predetermined phase sequence of said clock pulses at any one time for supplying to said electrostatic drop charging means;

said sensing means including means operable to determine if the test pulses result in full charging of the ink droplets, storage means for storing phase information related to the phase of the last generated test pulses;

means for accessing the stored phase relationship from said storage means and means utilizing said accessed information to control the phase of the pulses applied to said charging means during a subsequent printing cycle,

said last named means including means for controlling the application of the stored phase information during a print cycle, said means including a digital decoder for causing an automatic and fixed decrement of said phase information quantity whereby the print cycle charging pulse is placed on the charging means at an earlier point in time than the test pulse derived from the same signal;

means for incrementing the phase relationship number in said storage means in the event that a given series of test pulses does not result in the successful sensing of a charge and means for decrementing said stored phase information quantity in the event that successful charging of the pulses does occur; and

means for utilizing the phase information in said storage means for selecting the proper phased test pulse sequences as charging pulses during a test cycle.

11. An ink jet printing system as set forth in claim 10 wherein storage means comprises means for storing said phase information in digital form.

pulse output sequences from said system clock.

Claims

1. In an ink jet printing system which comprises an ink supply means, nozzle means for forming an ink droplet stream as ink emanates therefrom, drop forming means associated with said nozzle causing said ink droplets to form at a substantially predetermined rate, charging means for selectively charging droplets emanating from said nozzle, sensing means for detecting the presence of a charge on said droplets, deflecting means for electrostatically deflecting said droplets, record receiving means for receiving said droplet stream, and synchronizing means for synchronizing the application of an electrostatic charge on individual ink droplets with the formation of said ink droplets, the improvement in said drop forming and charge application synchronization means which comprises: means for supplying at least one test pulse to the droplet charging means having a predetermined known phase relationship with respect to pulses supplied to the drop forming means, means for specifying the phase of at least one test pulse, said sensing means including means operable to determine if the test pulses result in full charging of the ink droplets, storage means for storing phase information related to the last generated at least one test pulse, and said specifying means including means for utilizing the phase information in said storage means for generating the next series of charging pulses during the next subsequent test cycle.

2. An ink jet printing system as set forth in claim 1 including means for accessing the stored phase relationship from said storage means and means utilizing said accessed information to control the phase of the pulses applied to said charging means during a subsequent printing cycle.

4. An ink jet printing system as set forth in claim 3 wherein said means for supplying a series of test pulses includes a system clock which produces a predetermined number of phased pulse output sequences including the pulses supplied to the drop forming means and means for selecting only a predetermined phase sequence of said pulses at any one time for supplying to said electrostatic drop charging means.

5. An ink jet printing system as set forth in claim 4 wherein said selecting means includes a digital decoder and gating circuit means controlled thereby, said digital decoder including means for gating the contents of said storage means in digital form thereto and means for storing said phase information in said storage means in digital form.

10. In an ink jet printing system which comprises an ink supply means, nozzle means for forming an ink droplet stream as ink emanates therefrom, drop forming means associated with said nozzle causing said ink droplets to form at a substantially predetermined rate, charging means for selectively charging droplets emanating from said nozzle, sensing means for detecting the presence of a charge on said droplets, deflecting means for deflecting said droplets, record receiving means for receiving said droplet stream, and synchronizing means for synchronizing the application of an electrostatic charge on individual ink droplets with the formation of said ink droplets, the improvement in said drop forming and charging synchronization means which comprises: means for supplying a plurality of test pulses to the droplet charging means having a predetermined known phase relationship with respect to pulses supplied to the drop forming means; said means including a system clock which produces a predetermined number of phased pulse output sequences including the pulses supplied to the drop forming means, means for selecting only a predetermined phase sequence of said clock pulses at any one time for supplying to said electrostatic drop charging means; said sensing means including means operable to determine if the test pulses result in full charging of the ink droplets, storage means for storing phase information related to the phase of the last generated test pulses; means for accessing the stored phase relationship from said storage means and means utilizing said accessed information to control the phase of the pulses applied to said charging means during a subsequent printing cycle, said last named means including means for controlling the application of the stored phase information during a print cycle, said means including a digital decoder for causing an automatic and fixed decrement of said phase information quantity whereby the print cycle charging pulse is placed on the charging means at an earlier point in time than the test pulse derived from the same signal; means for incrementing the phase relationship number in said storage means in the event that a given series of test pulses does not result in the successful sensing of a charge and means for decrementing said stored phase information quantity in the event that successful charging of the pulses does occur; and means for utilizing the phase information in said storage means for selecting the proper phased test pulse sequences as charging pulses during a test cycle.

11. An ink jet printing system as set forth in claim 10 wherein storage means comprises means for storing said phase information in digital form, means for gating said digital phase information to said digital decoders in said selecting and controlling means, said storage means also including a digital counter having as many digits in its output as necessary to represent said predetermined number of phased pulse output sequences from said system clock.