US3754164A

US3754164A - Electronic combination lock

Info

Publication number: US3754164A
Application number: US00130201A
Authority: US
Inventors: P Zorzy
Original assignee: Individual
Current assignee: Individual
Priority date: 1971-04-01
Filing date: 1971-04-01
Publication date: 1973-08-21
Anticipated expiration: 1990-08-21

Abstract

An electrically operated combination lock mechanism. A person desiring to operate the lock, actuates switches at an entrance encoder in sequence. If he enters the correct code within a predetermined time, each switch sets a bistable stage in a control unit. When all stages are set, other circuits in the control unit open a latch unit and unlock the door. If an incorrect code is entered or a code is not entered within a predetermined time, the control unit resets all the control unit stages and inhibits operation of the latch unit. Time penalty means reduces the time remaining to enter the correct code, when an initial incorrect switch is entered.

Description

[ Aug. 21, 1973 ABSTRACT 9 Claims, 2 Drawing An electrically operated combination lock mechanism. A person desiring to operate the lock, actuates switches at an entrance encoder in sequence. If he enters the correct code within a predetermined time, each switch sets a bistable stage in a control unit. When all stages are set, other circuits in the control unit open a latch unit and unlock the door. If an incorrect code is entered or a code is not entered within a predetermined time, the control unit resets all the control unit stages and inhibits operation of the latch unit.

Time penalty means reduces the time remaining to enter the correct code, when an initial incorrect switch is entered.

References Cited Plato Zorzy, 189 W. Shore Dr., Marblehead, Mass. 01945 Apr. 1, 1971 O United States Patent Zorzy ELECTRONIC COMBINATION LOCK [76] Inventor:

[22] Filed:

[21] Appl. No.: 130,201

[52] US. [51] Int. [58] Field of UNITED STATES PATENTS Primary Examiner-L. T. Hix Attorney-Pearson & Pearson SOLENOID OPERATED LATCH UNiT Patented Aug. 21 1973 2 Shets-Sheet 1 In"); (or Fla 0 Z orzy By P A Harvey:

. 1 ELECTRONIC COMBINATION LOCK BACKGROUND OF THE INVENTION This invention generally relates to code actuated systems and more specifically to electrically operated combination lock systems.

There are several ways to lock a door. In the simplest manner, the key-operated or mechanical combination lock performs this function. However, it is relatively easy for someone to break open one of these locks.

More complex and secure mechanical locks are also available, but these are extremely expensive.

Recently, more sophisticated, electrically-operated systems have been developed. In a charge transfer systent, for example, a person desiring to Open a lock depresses and releases numberedpush-button switches in sequence. During each operation, the switches sequentiallytransfer a charge from one capacitor to another capacitor. When the last switch is actuated in the sequence', the last'capacitor discharges through a coil to energize a relay andactuate the locking mechanism. If a person pushes the right switches, but in the wrong sequence, the switches do not transfer the electrical charge. All push-button switches which are not part of the actuating circuitry inhibit the system if one of them is pushed. Usually, a bleeder resistor across each capacitor additionally dissipates the charge somewhat so the push-button switches must be actuated within a given time period. If they are not, the last'capacitor does not store enough energy to operate the relay.

These systems have several limitations. For one, the controlsa'nd push buttons are generally housed in a single cabinet. If someone trying to gain admittance unlawfully forces the housing, he can actuate the latch mechanism manually and directly.

From another standpoint, charge transfer systems tend to be expensive to manufacture. Expensive capacitors must be used to insure thatthe stored energy at the end of the proper sequence is sufficient to actuate the latch mechanism.

These systems are also prewired. It is difficult to alter the code. Anyalteration requires system rewiring.

. Therefore, it is an: object of this invention to provide a locking system which has greater security than previous locking systems.

It is another object of this invention to provide a locking system with improved security which makes unauthorized entry more difiicult.

Another object of this invention is to provide a locking system in which the numbers in the code and their sequence can be varied easily.

SUMMARY I My locking system comprises three separate parts. One is a solenoid operated latch unit which performs the mechanical locking operation. A second is a pushbutton entrance encoder unit actuated by anyone seeking admittance. The third unit is a control unit which responds to the proper operation of the encoder unit to open the latch unit.

When a person depresses each push-button properly,

he sets successive bistable stages in the control unit. At

The control unit and entrance encoder are separate units and are adapted to be located in different locations. As the entrance encoder only contains the pushbutton switches, someone who opens the entrance encoder still cannot open the latch unit because all the operating circuits are in the remote control unit. Hence, the system is more secure.

By using several digital techniques, I eliminate the expense of prior capacative charge transfer circuits. Other circuitry associated with prior systems is also simplified. Furthermore, by locating the control unit remotely, I am able to facilitate code alteration without diminishing the overall security provided by the system.

This invention is pointed out with particularity in the appended claims. A more thorough understanding of the above and further objects of this invention may be attained by referring to the following description taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates a typical installation of a locking system incorporating my invention; and

FIG. 2 is a schematic diagram of a typical locking system.

DECRIPTIQN OF AN ILLUSTRATIVE EMBODIMENT Referring to FIG. 1, whenever a person desires to gain entrance into an area 10, he must pass through a normally locked door 12. In accordance with my invention, he approaches an entrance encoder 14 which contains numbered push-button switches 16 and an indicating unit 18. Each time he actuates a switch 16, a signal, transmitted through cables (not shown), is applied to a control unit 20. If he actuates the proper push buttons in the right sequence and within a predetermined time, the control unit 20 energizes and opens a solenoid-operated latch unit 22. Other cables (not shown) couple the latch unit 22 and the control unit 20.

As described more fully later, if a person enters the sequence improperly or too slowly, the control unit 20 does not energize the latch unit 22. Therefore, the door remains locked. If someone attempts to gain entrance unlawfully, he may succeed in dismantling the entrance encoder 14. However, the entrance encoder l4 merely contains the push-button switches and associated wires and terminals. He cannot ascertain the code or operate the latch unit 22 from the entrance encoder 14. Therefore, separating the control unit 20 and the entrance encoder l4 improves the overall security of the system.

Now referring to FIG. 2, the entrance encoder 14 includes l0 switches numbered 0" through 9" and indicated by reference numerals 24 (0) through 24 (9). One terminal on each switch is grounded, so depressing a given switch produces an assertive (ground) signal at its other terminal. Each Of these other terminals are connected to corresponding contacts of encoding switches.

A first encoding switch 26 has ten contacts 26(0) through 26(9) connected to push-button switches 24(0) through 24(9), respectively. An arm 28 on the encoding switch 26 selects one push button (in this example, the 0 push button) to ground a clocking (C) input of a J-K flip-flop circuit 30 when the 0" push button 24(0) is depressed. A power supply 31 normally maintains a C input at a positive potential by means of a resistor 32 when the push-button switch 24(0) is not depressed.

As known in the art, when the potential at the C input drops from a positive level to a ground level, the flipflop circuit 30 assumes a state dependent upon the signals applied to its J and K inputs. In this case, an assertive signal (1) and a non-assertive signal continuously energize the J and K inputs, respectively. Hence, depressing the 0 push button 24(0) sets the flip-flop circuit 30 to provide assertive and non-assertive signals at the set (1) and reset (0) outputs, respectively. Depressing any other push button does not produce this result because a resultant signal is blocked by the encoding switch 26.

The set and reset outputs of the flip-flop circuit 30 energize the J and K inputs of the succeeding flip-flop circuit 34 which is the next stage in the control unit. The clocking input is coupled through a second encoder switch 36, similar to the encoding switch 26, and to the power supply 31 through another resistor 38. If a person depresses the 2" push button immediately after depressing the 0 push button, the push-button switch 24(2) grounds the C input of the flip-flop circuit 34, so it sets. it some other switch were closed, the flipflop circuit 34 would remain reset.

Any number of digits can be used in the code. It is merely necessary to include one stage containing circuitry similar to that associated with the flip-flop circuit 34 for each digit or position in the code. This is repre-- sented by the broken lines between the flip-flop circuit 34 and a last flipflop circuit 40. For example, if the code has four digits, four stages are necessary.

The C input of the flip-flop circuit 40 is also connected to the "0 push button through another encoding switch 42 and to the positive power supply 31 through a resistor 44. Depressing the 0 push button closes the push-button switch 24(0) when the preceding flip-flop circuit is set. This sets the flip-flop circuit 40.

This particular example illustrates another feature of this invention. Depressing'the 0 push button the first time does not set the flip-flop circuit 40 because the preceding flip-flop circuit is reset. As a result, the clocking input signal to the flip-flop circuit 40 occurs when non-assertive and assertive signal energize the J and K inputs, respectively.

Whenever a push-button switch closes, it also energizes an OR circuit represented by a NAND circuit 46 and an inverter 48 in series with the E input of a timing flip-flop circuit 50. The resulting assertive signal energizes the SET(S) input of the flip-flop circuit 50. When the flip-flop circuit 50 sets, it energizes a signal device 52 which may take one of several forms. For example, it may comprise a lamp which lights to indicate that someone is operating the unit. Such a device may also comprise alarm circuitry which is actuated when the flip-flop circuit 50 subsequently resets if the latch unit When the flip-flop circuit resets, it also applies reset pulses to each stage in the control unit 20 (i.e., the flip-

flop circuits

30, 34 and 40). If a correct code has been entered, the flip-flop circuit 40 actually resets and thepositive voltage at the ONE (1) output shifts to a ground level. This signal change appears at the C input of another flip-flop circuit 58 and sets it because assertive and non-assertive signals continuously energize the J and K inputs, respectively. 1

When the flip-flop circuit 58 sets, the positive voltag at its (1) output turns on a transistor 60. Another transistor 62 also conducts because its base electrode is coupled to the collector electrode of the transistor 60 by a resistor 64. The collector circuit of the transistor 62 contains a diode 66 for minimizing transients, a coil 68 for the solenoid operated latch unit 22 and the indicating device for the entrance encoder (FIG. 1), such as a lamp 18, all in parallel. The breaks in the lines connecting the coil 68 and lamp 18 in the emitter circuit indicate that these components are separated from the control unit 20. Hence, when the flip-flop circuit 58 sets, the indicating device (FIG. 1) comprising the lamp 18 lights to indicate that the latch unit is open.

The (1) output of the flip-flop circuit 58 also energizes a latch unit timing circuit comprising a resistor 70 and a capacitor 72 in series. This circuit is analogous to the timing circuit comprising the capacitor 56 and the resistor 54. It resets the flip-flop circuit 58 after a controlled time delay. This de-energizes the coil 68 and relocks the latch unit 22. Hence, the resistor 70 varies the time during which a person must open the door.'

If a person does not know the combination, the stages do not become set in sequence. If he attempts several combinations, he must reach the correct combination within the time defined by the flip-flop circuit 50. If that time exceeds the time required for the capacitor 56 to charge and reset the flip-flop circuit 50, the flipflop circuit resets the control unit stages and inhibits the operation of any previously set latch unit. Further, a time penalty means is provided such that the time period during which the code can enter is significantly reduced when someone pushes the wrong switch 16 initially. A time'penalty means including

capacitors

56 and 72 normally charges to some steady-state value during the quiescent state because the non-assertive output voltage of a flip-flop circuit has a finite value.

Germanium diodes

74 and 76, connected to the "C input of the flip-flop circuit 40 and to the

capacitors

56 and 72, substantially discharge those capacitors when someone actuates the first switch 16 correctly. If the someone pushes the wrong switch, the capacitors do not discharge so the voltage across the capacitors does not change. This reduces the time to charge to the reset voltage and reset the flip-

flop circuits

50 and 58 significantly. An alarm circuit could respond to the reduced time interval.

Several advantages of my system are now apparent. First, the code can be altered easily. The encoding switch for each position in the sequence is easily changed to any of 10 numbers for that position in the sequence. A prior system would require one switch for each push button and a pole in that switch for each position in the sequence. That is, a four-position sequence with each position having ten possible values requires .four ten position switches in my system. 10 fourposition switches are required in prior circuits.

Referring to FIG. 1, it will also be noted that the push button switches 16 may be mounted on a recessed panel, or spy shield" 100 in the entrance encoder 14.

Side panels

102 and 104, a top panel 106 and a bottom panel 108 restrict the view of these switches. Therefore, the combination can be pressed with little chance of its being seen by unauthorized personnel.

It is apparent that various modifications can be made to this system shown in FIGS. 1 and 2. For example, the flip-flop circuit 50 must time out and reset before the latch unit 22 opens. Hence, there is a delay between the 1 time a person actuates the last switch in sequence and the time the latch 22 opens. This delay can be eliminated by energizing the C input of the flip-flop circuit 58 with a 0 or RESET output rather than the 1 output of the flip-flop circuit 40. In this configuration, the flip-flop circuit 40 sets the flip-flop circuit 58 whenever it is set. However, if the flip-flop circuit 50 resets after timing out, it still resets the control unit stages and inhibits operation.

In this embodiment, I have also shown capacitor 56 energizing the reset (R) input of the flip-flop circuit 50 directly. Various gating or inverter circuits may be added or necessary to provide the proper signal levels for the flip-flop circuit 50. The flip-flop circuit 50 may also comprise a JK flip-flop circuit rather than the standard flip-flop circuit. A mechanical OR circuit may replace the NAND circuit 46 and inverter 48. For example, the switches 24 may have two separate sets of contacts. In this case, the second set of contacts might energize the timing circuit directly. These modifications will require other changes in the circuit which are all apparent to those skilled in the art. Therefore it is the object of the appended claims to cover all such modifications and variations as come within the true spirit and scope of this invention,

What I claim as new and desire to secure by Letters Patent of the United States is:

1. An actuating system responsive to a coded combination comprising:

A. an entrance encoder unit including a plurality of switches,

B. an electrically operated latch actuating unit, and

C. a control unit including:

1. a plurality of interconnected clocked bistable stages,

2. means coupling selected ones of the said switches to individual stages, the closure of a switch connected through said coupling means generating a clocking signal for a selected clocked bistable stage, whereby a given stage assumes a first state when a switch connected to that stage is acuated and the preceeding stage has assumed the same state,

3. means responsive to all stages assuming the first state for energizing said latch actuating unit 4. a timing circuit actuated by the first closure of a switch for defining a normal time period before which said timing circuit disables said stages, and

5. time penalty means responsive to the initial incorrect selection of a switch for reducing the the normal time period set by said timing circuit.

2. A system as recited in claim 1, additionally including signal means connected to said actuating means for indicating that the encoder unit is being operated and for indicating the regular, or irregular, operation plurality of entry switches", an electrically operated latch actuating unit, and a control unit for energizing the latch actuating unit in response to a proper sequence of entry switch closures, the improvement in the control unit comprising:

A. a shift register with a plurality of interconnected clocked stages,

B. a plurality of encoding switch means, each switch means being connected between one stage in said shift register and all switches in the entrance encoder to selectively couple one entrance encoder switch means to each of said stages, the actuation of an entry switch generating a clock signal which said encoding switch means selectively couples to a stage, said stages being interconnected so a given stage assumes a first stage when a switch connected to that stage is actuated and the preceding stage has assumed the same state,

C. energizing means responsive to all stages in said shift register assuming the first state energizing the latch actuating unit, and

D. first timing means for defining a first interval connected to the entry switches for beginning the interval upon the first actuation of an entry switch, said timing means resetting all stages in said shift register after the interval to disable said energizing means.

4. A system as recited in claim 3 wherein each said stage comprises a flip-flop circuit with a level reset in put, a clocking input, first and second clocked inputs said outputs and coupling means connecting a selected switch to each of said clocking inputs and the outputs of each'stage being connected to the clocked inputs of a succeeding stage whereby actuating a given switch sets a flip-flop circuit if that switch connected to the clocking input and the preceding stage is set.

5. A system as recited in claim 4 wherein each of said coupling means comprises a selector switch connected between said switches and said clocking input for each stage in said control unit.

6. A system as recited in claim 5, wherein said timing means is adapted'for generating signals of a duration and a second, longer duration, said system additionally comprising means responsive to proper mutual actuation of said encoder switches for causing said timing means to generate a signal with the second duration and responsive to improper initial actuation of said encoder switches for causing said timing means to generate the first duration time signal.

7. A system as recited in claim 3 wherein said timing means includes means for varying the interval.

8. A system as recited in claim 3 wherein the entrance encoder includes a given number of entry switches, each of said encoding switch means comprising a single-pole switch with a number of positions equal to the given number of switches.

9. A system as recited in claim 5 additionally comprising a second timing circuit for limiting the time the latch unit is actuated and means for indicating when the latch unit is actuated, said first and second timing means each including means for varying the respective time intervals, respectively.

Claims

1. An actuating system responsive to a coded combination comprising: A. an entrance encoder unit including a plurality of switches, B. an electrically operated latch actuating unit, and C. a control unit including: 1. a plurality of interconnected clocked bistable stages, 2. means coupling selected ones of the said switches to individual stages, the closure of a switch connected through said coupling means generating a clocking signal for a selected clocked bistable stage, whereby a given stage assumes a first state when a switch connected to that stage is acuated and the preceeding stage has assumed the same state, 3. means responsive to all stages assuming the first state for energizing said latch actuating unit , 4. a timing circuit actuated by the first closure of a switch for defining a normal time period before which said timing circuit disables said stages, and 5. time penalty means responsive to the initial incorrect selection of a switch for reducing the the normal time period set by said timing circuit.

2. A system as recited in claim 1, additionally including signal means connected to said actuating means for indicating that the encoder unit is being operated and for indicating the regular, or irregular, operation thereof.

3. means responsive to all stages assuming the first state for energizing said latch actuating unit ,

3. In an actuating system responsive to a coded combination including an entrance encoder unit having a plurality of entry switches, an electrically operated latch actuating unit, and a control unit for energizing the latch actuating unit in response to a proper sequence of entry switch closures, the improvement in the control unit comprising: A. a shift register with a plurality of interconnected clocked stages, B. a plurality of encoding switch means, each switch means being connected between one stage in said shift register and all switches in the entrance encoder to selectively couple one entrance encoder switch means to each of said stages, the actuation of an entry switch generating a clock signal which said encoding switch means selectively couples to a stage, said stages being interconnected so a given stage assumes a first stage when a switch connected to that stage is actuated and the preceding stage has assumed the same state, C. energizing means responsive to all stages in said shift register assuming the first state energizing the latch actuating unit, and D. first timing means for defining a first interval connected to the entry switches for beginning the interval upon the first actuation of an entry switch, said timing means resetting all stages in said shift register after the interval to disable said energizing means.

4. A system as recited in claim 3 wherein each said stage comprises a flip-flop circuit with a level reset input, a clocking input, first and second clocked inputs said outputs and coupling means connecting a selected switch to each of said clocking inputs and the outputs of each stage being connected to the clocked inputs of a succeeding stage whereby actuating a given switch sets a flip-flop circuit if that switch connected to the clocking input and the preceding stage is set.

4. a timing circuit actuated by the first closure of a switch for defining a normal time period before which said timing circuit disables said stages, and

6. A system as recited in claim 5, wherein said timing means is adapted for generating signals of a duration and a second, longer duration, said system additionally comprising means responsive to proper mutual actuation of said encoder switches for causing said timing means to generate a signal with the second duration and responsive to improper initial actuation of said encoder switches for causing said timing means to generate the first duration time signal.