US3660751A - Dc-dc regulated inverter employing pulse-width modulation with a constant volt-second sensing transformer - Google Patents

Abstract

A static DC-DC inverter employs an output transformer utilizing core materials of different permeability characteristics. The transformer establishes a constant volt-second product as concerns the output waveform and establishes self-regulation on an open loop basis with inherent preventatives as concerns excessive output current spike generation.

Description

[451v May 2, 1972 [56] References Cited UNITED STATES PATENTS COMMON EPOXY ENCAPSULATION PTNTEDIIII 2 |912 SHEET 1 QI 3v FIG.

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CON STANT VOLTAGE (D4 f o LINE VOLTAGE 52| RATIO MAXIMUMy O cu AGENT DC-DC REGULATED INVERTER EMPLOYING PULSE- WIDTH MODULATION WITH A CONSTANT VOLT- SECOND SENSING TRANSFORMER This invention relates generally to power supplies and more particularly to an improved DC-DC static inverter which is inherently self-regulating on an open loop basis and in which the generation of excessive output current spikes due to core saturation is obviated.

Simple and inexpensive self-excited inverters could be .used in more applications if it were not for the excessive current spikes at saturation. Circuitries operating on a balanced basis and employing saturable cores areA subject to unbalance should the driving oscillator drift away from a central balanced condition. 4The resulting unbalance leads to saturation of the square wave high-p, core generally employed and thus the generation of high input current spikes.

Means have been employed in the art to in one way or another sense saturation of the core and employ means to cut off the driving current waveform as core saturation occurs or preferably prior to core saturation. For example, means are known to employ an auxiliary output core having a higher permeability which in response to any given driving voltage waveform inherently saturates prior to the main power core. Means sensing the saturation of the auxiliary core may then be employed to cut off the driving voltage waveform and thus prevent the output core from reaching saturation during'successive half cycles.

The present invention relates to a static inverter of the general type employing a pair of transistor switching elements to control the application of input power to a saturable core v output member. The present invention utilizes core materials of different permeability characteristics to provide, in effect, a sensing of a time at which magnetizing current to the main core should be cut off to prevent saturation thereof. The present invention employs a constant volt-second sensing transformer with a core member constructed of discreetly different magnetic materials having a high permeability ratio. In accordance with' the present invention the constant. voltsecond sensing transformer establishes a constant volt-second product as concerns the output waveform which is an inherent design constant of the transformer itself, thus no sensing of the secondary output is required for regulation.

A further object of the present invention is the provision of a static inverter power supply which provides good load regulation under open loop characteristics with only the output winding and subsequentrectifying diodes and filtering choke members being factors of load regulation.

Yet another object of the present invention is the provision of a static inverter wherein detrimental primary current spikes stemming from core saturation are limited since a secondary magnetic path is always present.

A still further object of the present invention is the provision of a static inverter which permits a reasonable amount of DC unbalance and ambient temperature variation with no detrimental effects on an inherently open loop regulated output.

The present invention is featured in the provision of a static inverter circuitry wherein the saturable core member is cornprised of a transformer having two cores so constructed as to provide a constant volt-second output in a manner requiring no sensing of secondary output, thus establishing good line regulation on an open loop basis.

These and other objects and features of the present invention will become apparent upon reading the following description with reference to the accompanying drawings in which;

FIG. l is a diagrammatic representation illustrating constant volt-second waveforms;

FIG. 2 is a schematic representation of a constant voltsecond sensing transformer in accordance with the present invention;

FIG. 3 shows typical, dynamic permeability curves of a twocore transformer as illustrated in FIG. 2;

FIG. 4 is a schematic diagram of an embodiment of a constant volt-second sensing transformer employed in a regulated inverter in accordance with the present invention;

FIGS. 5 and 6 represent typical operational waveforms of the inverter embodiment of FIG. 4; and

FIGS. 7 and 8 illustrate dynamic permeability curves of a typical two-core transformer as depicted in FIG. 2 illustrating At variation with core temperature variation.

The present invention might best be contemplated from a consideration of constant volt-.second waveforms as depicted in FIG. l. Waveforms (a) and (b) of FIG. 1 depict two square wave voltage waveforms having the same repetition rate but a decidedly different pulse duration and amplitude. Waveform (a) depicts, during the time le, a square waveform of magnitude El with `a duration t1. The volt-second product of waveform (a) is, therefore, E111. Waveform (b) depicts a square waveform of magnitude E2 with a shorter time duration t2. The magnitude E2 of waveform (b) exceeds the magnitude E1 of waveform (a). The average voltage for the waveform depicted in (a) may be expressed as Effi/1C (l) The average voltage for waveform (b) of FIG. l may be expressed as E2't2/tc (2) Expressions (l) and (2) illustrate that the average voltage of each of waveforms (a) and (b) will be a constant if during a fixed time period,` tc a constant volt-second product is induced. The ratio of the volt-second product factors E and l) has no influence on the average voltage. (It does influence the RMS voltage.) The volt-second area depicted in waveforms (a) and (b) of FIG. l illustrates waveforms having the same average value. The voltage induced in a square wave transformer may be expressed as l E= I`--Bvl-N-4-10s (3) By rewriting expression` (3), substituting l/l for F, the following expression results.

f E't B'A'N'4'l09 (F= l/t) tin seconds (4) A volt-second product appears on the left hand side of the equation (4) while, on the right side of the equation are the cross sectional core areaA and the number of turns N, which are designed constants for a particular transformer. lf the induction B could also be made constant, then it is seen that the volt-second product E't on the left side of equation (4) would be a design constant.

In accordance with the present invention this relationship is utilized to advantage in an application employing a constant volt-second square wave transformer in a saturable iron oscillator circuitry, since the induction B in such applications is always B, the saturation induction, which is a constant of the type of iron employed in the core. Thus, in a saturable core oscillator application the transformer iron is driven from -Blr to +B, or vice versa. Since the induction B in such an environment is a design constant, a constant volt-second product would be created in this time interval and a constant average voltage output achieved.

The present invention utilizes the above discussed considerations in a constant volt-second sensing transformer employed as an output transformer in a static inverter circuitry.

A constant volt-second sensing transformer based on the above discussed considerations is depicted diagrammatically in FIG. 2. The transformer is comprised of first and second core members 10 and l1. Core member l0vmight be comprised of iron and have a permeability u1 while core 11 is cornprised of ferrite having a considerably lower permeabilityl u2. Each of the core members l0 and l1 has an identical cross sectional area. A common center leg is comprised of equal areas of both the iron and ferrite cores.

For the transformer depicted in FIG. 2, it can be stated that 4,1 'l' 2 @or (5) (A: 'l' A2 Amr) The following relationships are assumed NPR=N1=N2=N3 el e2 A, A2 A i With the above assumption the term within the bracket of expression (13) is a constant, K, and for the transformer de- E=/12=1+fL./p,2v 18) Equation (17) shows that in the transformer of FIG. 2, the ratio of the voltages in the two outside legs is proportional to the ratio of the permeabilities of the materials from which the legs are constructed. The permeability of a ferro-magnetic material is a function of magnetic flux qb, but in the consideration of a saturable square wave transformer, the flux d: is proportional to the time t defining one half-cycle of the square wave. It can be shown, therefore, that the slope of p. with respect to magnetic flux Q over one half-cycle of a square wave is the same as the slope of ,u with respect to Kt, where K is a constant dimensionally equal to B/t.

The slopes (variation of magnitude with time) of the permeabilities y., and ,u.2 associated with the two-core materials obviously differ as depicted in the dynamic permeability curves of FIG. 3 which illustrate a curve 16 depicting the dynamic permeability function as concerns p., of the iron core leg l0 and the dynamic permeability of curve 17 depicting the variation of f1.2 of the ferrite core within a half-cycle square wave time period.

If the slopes of ,al and u2 differ, the individual slopes of the induced voltages El and E2 in the respective legs windings differ, and would not be half-cycle square waves, but the sum of the two slopes would be square waves because El E2 E2 E PR. With reference to expression (18) above, it is seen that E2 approaches E2 when ,um the permeability of the iron core, is very small in proportion to u2. FIG. 3 illustrates that at a point 18 approximately 90 percent through the duration of one halfcycle square wave time, the higher permeability iron core (pq) saturates and the permeability thereof decreases rapidly at saturation. Thus, at the time of saturation of the iron core, the condition that u, is small in proportion to u2 is met, and as above discussed, at this time E2 approaches E3 in magnitude. This concept is of paramount importance in considering the application of the above discussed constant volt-second square wave transformer in an inverter arrangement in accordance with the present invention.

FIG. 4 shows the embodiment of a driven inverter system in accordance with the present system which employs the aforedescribed constant volt-second transformer in a circuitry immune from high voltage, high transient input voltages which exhibits excellent line regulation over a wide input line voltage magnitude range under open loop operating conditions and inherently eliminates detrimental primary current spikes due to primary core saturation.

The circuitry of FIG. 4 may generally be defined as comprised of a master oscillator 23 followed by a power amplifier driving a constant volt-second transformer the constant average output of which is applied to a succeeding rectifier circuitry. The master oscillator 23 employs a saturable iron core 25 and, by conventional implementation of switching transistor pair 24, generates a constant frequency square wave output waveform. The oscillator 23 might thus be a conventional self-driven DC to AC converter circuitry. A constant voltage source 21 is employed for the master oscillator 23 in order to assure a constant output frequency.

The power amplifier circuitry, driven by the square wave output from oscillator 23 functions, by employing the above described constant volt-second transformer, a constant voltsecond output to the rectifier 42 that is, supplies a constant average output signal with wide variations in line voltage magnitude.

The power amplifier employs switching transistors 26 and 27 under the control of the constant frequency square wave signal from master oscillator 23 to appropriately switch a line voltage input on terminals 19 and 20 to the constant voltsecond transformer 40 from which an output is applied to the succeeding rectifier circuitry 4l.

ln the arrangement to be described, the line voltage might vary over a wide range (for example 5:1) in DC magnitude and a constant output voltage will be developed by the rectifier filter 41-42 for application to the load 43. The regulation, as will be described, is accomplished inherently with no output feedback and thus operates in an open loop mode to maintain excellent line regulation.

With reference to FIG. 4, the secondary winding 30 of the transformer of drive oscillator 23 is provided with a center tap 34 connected through a resistor 35 in common to the emitter electrodes of power amplifier switching transistors 26 and 27. The base electrodes of switching transistors 26 and 27 are respectively connected to symmetrical secondary winding taps 36 and 33. The end terminals 31 and 32 of the secondary winding 30 of the oscillator transformer are connected to the respective anode electrodes of first and second silicon controlled rectifiers 28 and 29. The cathodes of rectifiers 28 and 29 are connected to the respective emitters of switching transistors 26 and 27. The gate electrodes of silicon controlled rectifiers 28 and 29 are respectively connected through resistors 37 and 38 to the common emitter connection of the switching transistors 26 and 27. The collector electrodes of switching transistors 26 and 27 are connected to respective ends of the primary winding l5 on transformer 40, which is wound common to both the iron and ferrite core members. Terminal 19 of the DC line voltage input is connected to the center tap of the primary winding 15 of transformer 40. The other terminal 20 of the DC line voltage input is connected to the emitters of switching transistors 26 and 27 and to the center tap of a sensing winding 13 on the ferrite core 11 of transformer 40. Sensing'voltages are 'developed across resistors 44 and 45 which shunt the respective halves of centertapped-sensing winding 13. v f n One terminal of resistor 44 is connected through a diode member 46 and a reverse-polarized zener diode 48 to the control electrode of silicon controlled rectifier 28. The end terminal of resistor 45 is connected through a further diode member 47 and reverse-polarized Zener diode 49 to the control electrode of the other silicon controlled rectifier member 29. An output winding 14 is wound in common to both the iron and ferrite core members of transformer 40 and connected in a full-wave rectifying arrangement with rectifying diode-pair 41, and LC filter 42. A load 43 is connected to the filter output.

The operation of the inverter circuitry of FIG. 4 is based on the constant volt-second characteristics of the power transformer 40. As depicted in FIG. 3, the iron core member with permeability y2 saturates prior to the end of a half-cycle of the switching control waveform from oscillator 23. The ferrite core member 1 1 because of its low permeability does not saturate in this time interval. For example, nickel-iron might be employed having a permeability between 50,000 and 300,000 along with a ferrite core having a permeability between 2,000 3,000. High- ,u nickel-iron saturates at approximately 0.2 oersted while ferrite saturates at approximately 8.0 oersted. Winding 13 on the ferrite core 11 operates as a sensing winding to produce sense voltages E2 during successive half-cycles of the square wave oscillator waveform applied to the power amplifier.

ln operation, and neglecting for the moment the function of the sensing voltages E2 and their relationship with silicon controlled rectifier members 28 and 29, the power amplifier,

under control of the constant frequency square wave signal from the master oscillator 23, switches the line voltage from terminals 19 and 20 to the primary winding 15 of the power amplifier transformer. During one half-cycle switching transistor 26 is provided with base drive so as to be conductive and provide a low impedance path between one end of primary winding l5 of transformer 40 and terminal 20 of the line voltage source. In a successive half-cycle, switching transistor 29 is provided with base drive and conducts to provide a low impedance path between the other end of winding l5 and line l terminal 20. Line voltage terminal 19 is applied to the center tap of the primary winding l5 and thus line voltage is successively applied to the respective sides of the primary winding in a full-wave manner. The line voltage is, therefore, applied to the power amplifier transformer at the initiation of successive half-cycles of the oscillator 23 waveform.

Previous discussion with reference to FIG. 3 indicated that transformer 40 is so designed that iron core 10, having permeability pq, saturates at about 90 percent through the half-cycle of the oscillator waveform when excited with minimum input voltage. Because of the high permeability ratio between the two core members, while the iron core up to its point of saturation was supporting most of the primary voltage, upon saturation of the iron core, all of the input voltage is transferred to the ferrite core.

The sense winding 13 on the power amplifier transformer is wound about the ferrite core member l1 only, and produces the sense voltage E2. With reference to the waveforms of FIG. 5, the voltage E3 developed on secondary winding 14 of the power amplifier transformer is the sum (El E2) of the voltages induced by the flux in both the iron and ferrite cores. Thus the oscillator waveform Em at time to produces an output E:l prior to saturation of the iron at time tl which, due to the ratio of permeabilities of the iron and the ferrite, results from flux in the iron core which is supporting most of the primary voltage. Upon iron core saturation at time 1 the input voltage is transferred to the ferrite core and this sharply increases the sense voltage E2 for the ensuing portion of the oscillator half-cycle, that is, the time tl.- t2. Waveforms of FIG. 5 depictthe inverter operating on a 100 percent duty cycle without regulation, that is, with the sense voltage E2 not being used for firing the silicon controlled rectifiers. FIG. 5 illustrates that no current spike appears in the output E3 from the power amplifier transformer since, upon saturation of the iron core supplying E the unsaturated ferrite core supports the magnetizing current.

From FIG. 3 it can be assumed that the permeability p2 of the ferrite core is constant over the time period where the permeability y., of the nickel-iron core rapidly decreases. This indicates that the slope of the sensing voltage E2 at this instant is a function of only ,u.1, the permeability of the iron core.

Equation l 8) clearly illustrates this.

At the time of saturation of the iron core the input voltage is transferred to the ferrite core, increasing the sense voltage E2 to the point where it overcomes the threshold of one of the zener diodes 48 and 49 to fire the associated silicon controlled rectifier. The conducting one of the silicon controlled rectifiers 28 and 29 during a particular half-cycle of the oscillator waveform, raises the emitter voltage of the conducting power transistor above the base drive voltage thereof, effecting shut off of the conducting power transistor which in turn shuts off the excitation of the power transformer 40. The silicon controlled rectifier thus forced into conduction remains in its conducting condition until the oscillator 23 completes it half-cycle. This period of time is a dead time period during which no power is being applied to the output.

In the ensuing half-cycle, the iron core 10 of the power amplifier transformer is driven into saturation in the opposite direction until the sense voltage E2 again rises to a sufflciently high potential to overcome the threshold of the other one of zener diodes 48 and 49 and fire its associated silicon controlled rectifier. Thus in every half-cycle of the waveform of oscillator 23, a constant volt-second product is produced and a constant average voltage achieved. Should the line voltage rise in magnitude the iron core saturates at a proportionally earlier period of time within each successive'half-cycle such that the product of voltage and time remains constant. Since the voltage Ea on the output winding 14 of the power amplifier transformer has a constant volt-second product, a constant average voltage is achieved and the subsequently rectified waveform is a constant DC voltage.

Operational waveforms of the converter embodiment of FIG. 4 under regulating conditions where the sense voltage is applied back to control the application of power to the primary of transformer 40 are depicted in FIG. 6.

The above statement that a constant volt-second product is produced and a constant average voltage achieved is, of course, based on the assumption that BSH of the transformer is constant. In practice, BSM is a function of temperature. By using the same type of iron for core l0 of the power amplifier transformer as is employed in the core 25 of driving oscillator 23, the temperature factor is canceled out because the voltsecond product of the two-core transformer 40 decreases in the same ratio as the frequency of oscillator 23 increases with rising temperature.

By way of summary of design considerations, the foregoing discussion has indicated that the two transformer cores have a high permeability ratio. Permeability of the low permeability core for any application should be high enough to prevent a large current spike when the high permeability core saturates.

High-p. square-loop nickel-iron and square-loop ferrite fulfill the above requirement. Square-loop materials have a small stored energy release after each half-cycle, and thus the voltage spike at the start of each half-cycle may be minimized. This characteristic is of a special importance when considering the predetermined sensing voltage E2 threshold utilized to fire the silicon controlled rectifiers.

Some DC unbalance in the ferrite core is permissible in the inverter because of the high excitation current necessary to saturate the lowp. ferrite.

The high-u iron core should also have a square-loop characteristic. As above described, the voltage E2 utilized in firing the silicon controlled rectifiers increases to the firing level threshold when the permeability of the high-1.a. iron decreases to a certain point. It is at this point that the input voltage is transferred to the ferrite core. The discussion herein, for simplicity, has defined this point as being when the permeability of the iron and ferrite cores are equal (,u.l p2). The permeability 2 of the ferrite core varies noticeably with temperature. This variation in p2 with change in temperature has a greater influence lon the obtained volt-second product when employing round-loop iron than when employing square-loop iron. With reference to FIG. 7, the dynamic permeability curves of a typical round iron (,ul) and a typical square iron (u1) are plotted with that of a typical ferrite material (u2). The variation of the ferrite permeability p2 under different core temperature conditions is illustrated as a second u2 curve with distinctly different slope.

FIG. 8 illustrates an enlarged portion of that circled as View A in FIG. 7. It is noted that the variation in time (At round) is greater when a round iron core is utilized than the variation in time (At square) when a square iron core is utilized, due to the steeper fall off slope of the square iron characteristic. Therefore, for a given variation in the ferrite perrneability u2 with temperature, as depicted by the two f1.2 curves, the At interval is considerably less when employing square iron in the output transformer core than whenemploying a round iron material which exhibits a mofe gradual slope at saturation.

From a further design standpoint, since the average output voltage is a function of both the oscillator frequency and of the obtained volt-second product, and both in. turn are functions of temperature because of the iron employed in both transformers, the temperature of both transformers should be kept the same and to accomplish this requirement both transformers might preferably be encased in a heat conducting epoxy and mounted on a common heat sink, as depicted by the common epoxy encapsulation 50 of FIG. 4 and common heat sink 51.

The advantages of pulse width modulation with a constant volt-second sensing transformer may be summarized as follows:

The constant volt-second product is an inherent design constant of the transformer itself and easy to obtain. No sensing on the secondary output is required.

High transient input voltages do not reflect on the output voltage.

Excellent line regulation is obtainable over input ranges as great as five to one with open loop operation.

Detrimental primary current spikes through saturation of the iron are eliminated because the induction of the ferrite core is always present.

A reasonable amount of DC unbalance has no detrimental effect on operation.

. Although the present invention has been described with respect to a particular embodiment thereof, it is not to be so limited as changes might be made therein which fall within the scope of the invention as defined in the appended claims.

I claim:

1. A static inverter comprising a source of direct current line voltage, switching means; output transformer means, said transformer means comprising first and second core members, a primary winding wound common to each of said core members, a sensing winding wound about said second core member, an output winding wound common to each of said first and second core members, each of said core members having a square hysteresis characteristic with the permeability of said second core being appreciably less than that of said first core; said transformer primary, output, and sensing windings being comprised of a like number of turns, said first and second core members defining like mean magnetic path lengths, and said first and second core members having equal cross sectional areas whereby a constant volt-second product is established for the output waveform from said transformer output winding over a predetermined ratio of line voltage source magnitude; said switching means being adapted to periodically apply said line voltage source to said transfonner primary winding for a predetermined period of time the duration of which is less than the time between the initiation of said periodic applications, said primary winding and said line voltage source establishing a magnetizing current in said primary winding sufficient to saturate said first core within the time period between successive applications of said line source to said primary winding and insufficient to effect saturation of said second core during this time period, switching control means connected to said sensing winding and responsive to the voltage induced therein to disable said switching means at the time of saturation of said first core member, and said switching signal source comprising a further static inverter employing a further saturable core output transformer the core of which comprises the same material as that of said output transformer first core member.

2. A static inverter as defined in claim 1 wherein said further saturable transformer core and said output transformer first core member are embodied in a common ambient temperature environment.

3. A static inverter comprising a source of direct current line voltage switching means; output transformer means, said transformer means comprising first and second core members, a primary winding wound common to each of said core members, a sensing winding wound about said second core member, an output winding wound common to each` of said first and second core members, each of said core members having a square hysteresis characteristic with the permeability of said second core being appreciably less than that of said first core; said primary, output, and sensing windings being comprised of a like number of turns, said first and second core members defining like mean magnetic path lengths, and said first and second core members havin equal cross sectional areas whereby a constant volt-secon product is established for the output waveform from said transformer output winding over a predetermined ratio of line voltage source magnitude; said switching means comprising a source of alternating current square wave switching signal of predetermined frequency, transistor switching means receiving said switching signal and being rendered conductive thereby in synchronism with successive like half-cycle periods of said switching signal, said transistor means being serially connected with said line voltage source and said transformer primary winding and effecting a low impedance interconnection therebetween when conductive, the time duration of half-cycles of said switching signal being such as to effect saturation of said first core member prior to the termination of said half-cycles; and switching control means comprising means responsive to a predetermined level of the signal induced in said transformer sensing winding to render said transistor means non-conductive for the ensuing portion of said switching signal half-cycles, said switching coritrol means comprising silicon controlled rectifier means responsive to said predetermined sense winding signal level to conduct and disable a base drive interconnection between said transistor means and said switching signal source.

4. A static inverter as defined in claim 3 comprising zener diode means serially connected between said transformer sense winding and gating means associated with said silicon controlled rectifier means.

5. A static inverter as defined in claim 4 wherein said switching means is embodied as a further static inverter employing a further saturable core output transformer the core of which comprises the same material as that of said output transformer first core member.

6. A static inverter as defined in claim 5 wherein said further saturable transformer core and said output transformer first core member are embodied in a common ambient temperature environment.

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Claims (6)

1. A static inverter comprising a source of direct current line voltage, switching means; output transformer means, said transformer means comprising first and second core members, a primary winding wound common to each of said core members, a sensing winding wound about said second core member, an output winding wound common to each of said first and second core members, each of said core members having a square hysteresis characteristic with the permeability of said second core being appreciably less than that of said first core; said transformer primary, output, and sensing windings being comprised of a like number of turns, said first and second core members defining like mean magnetic path lengths, and said first and second core members having equal cross sectional areas whereby a constant volt-second product is established for the output waveform from said transformer output winding over a predetermined ratio of line voltage source magnitude; said switching means being adapted to periodically apply said line voltage source to said transformer primary winding for a predetermined period of time the duration of which is less than the time between the initiation of said periodic applications, said primary winding and said line voltage source establishing a magnetizing current in said primary winding sufficient to saturate said first core within the time period between successive applications of said line source to said primary winding and insufficient to effect saturation of said second core during this time period, switching control means connected to said sensing winding and responsive to the voltage induced therein to disable said switching means at the time of saturation of said first core member, and said switching signal source comprising a further static inverter employing a further saturable core output transformer the core of which comprises the same material as that of said output transformer first core member.

2. A static inverter as defined in claim 1 wherein said further saturable transformer core and said output transformer first core member are embodied in a common ambient temperature environment.

3. A static inverter comprising a source of direct current line voltage switching means; output transformer means, said transformer means comprising first and second core members, a primary winding wound common to each of said core members, a sensing winding wound about said second core member, an output winding wound common to each of said first and second core members, each of said core members having a square hysteresis characteristic with the permeability of said second core being appreciably less than that of said first core; said primary, output, and sensing windings being comprised of a like number of turns, said first and second core members defining like mean magnetic path lengths, and said First and second core members having equal cross sectional areas whereby a constant volt-second product is established for the output waveform from said transformer output winding over a predetermined ratio of line voltage source magnitude; said switching means comprising a source of alternating current square wave switching signal of predetermined frequency, transistor switching means receiving said switching signal and being rendered conductive thereby in synchronism with successive like half-cycle periods of said switching signal, said transistor means being serially connected with said line voltage source and said transformer primary winding and effecting a low impedance interconnection therebetween when conductive, the time duration of half-cycles of said switching signal being such as to effect saturation of said first core member prior to the termination of said half-cycles; and switching control means comprising means responsive to a predetermined level of the signal induced in said transformer sensing winding to render said transistor means non-conductive for the ensuing portion of said switching signal half-cycles, said switching control means comprising silicon controlled rectifier means responsive to said predetermined sense winding signal level to conduct and disable a base drive interconnection between said transistor means and said switching signal source.

4. A static inverter as defined in claim 3 comprising zener diode means serially connected between said transformer sense winding and gating means associated with said silicon controlled rectifier means.

5. A static inverter as defined in claim 4 wherein said switching means is embodied as a further static inverter employing a further saturable core output transformer the core of which comprises the same material as that of said output transformer first core member.

6. A static inverter as defined in claim 5 wherein said further saturable transformer core and said output transformer first core member are embodied in a common ambient temperature environment.

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