US20150194550A1 - Detachment of a self-supporting layer of silicon <100> - Google Patents

Detachment of a self-supporting layer of silicon <100> Download PDF

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US20150194550A1
US20150194550A1 US14/412,874 US201314412874A US2015194550A1 US 20150194550 A1 US20150194550 A1 US 20150194550A1 US 201314412874 A US201314412874 A US 201314412874A US 2015194550 A1 US2015194550 A1 US 2015194550A1
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silicon
self
substrate
supporting layer
implanted
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Carole Braley
Frédéric Mazen
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a method for detaching a self-supporting layer of silicon of crystalline orientation ⁇ 100>, in particular for applications in the field of photovoltaics.
  • Monocrystalline silicon of crystalline orientation ⁇ 100> is particularly interesting for applications in the field of photovoltaics.
  • This silicon is very easily textured and may advantageously lead to a surface including pyramidal conformations adapted for the manufacture of photovoltaic cells.
  • it is also easily passivated so that the cells made from such substrates exhibit good performance.
  • the plane ⁇ 111> is indeed the plane that contains the least inter-plane bonds in the crystalline structure of silicon. Yet, for the silicon ⁇ 100>, this plane is not parallel to the surface of the substrate of orientation ⁇ 100>: it is therefore not parallel anymore with the embrittlement plane obtained by implantation. The defects therefore develop preferably obliquely, along the plane ⁇ 111>, when the heat treatment is applied. Thus, the fracture propagates with greater difficulty along the plane embrittled by implantation.
  • the object of the invention is a method for detaching a self-supporting layer of silicon of crystalline orientation ⁇ 100>, particularly with the aim of applications in the photovoltaic field, the method comprising the steps consisting of:
  • self-supporting layer (or ‘free-standing’ according to the English terminology) a silicon layer which exhibits a sufficient thickness, given the mechanical properties of silicon, so that the layer is sufficiently rigid, in itself, to be grippable, manipulable and usable in later steps, particularly in the manufacture of photovoltaic devices, without requiring the assembling of the layer with a stiffening substrate.
  • These may be typically silicon layers of thickness greater than 10 or even 20 micrometers.
  • the implantation of the ionic species was carried out through a surface of the substrate and that the self-supporting layer is delimited between the embrittlement plane and said surface of the substrate through which the implantation was carried out.
  • embryonic plane it is meant a plane parallel to the surface of the implanted substrate in which is located the maximum concentration of implanted ionic species and which concentrates the plane of development of crystalline defects at the origin of the detachment of the self-supporting layer.
  • the term ‘negative’ designates the residue of the silicon substrate ⁇ 100> recovered after the detachment of the self-supporting layer of silicon and which forms a self-supporting substrate.
  • the negative exhibits indeed the thickness required to be able to be manipulated.
  • this detachment method comprising a rapid temperature ramp, it is possible to easily and quickly detach a self-supporting layer of silicon of crystalline orientation ⁇ 100>.
  • the hypothesis that can be put forward to explain this detachment is the following: the rapid temperature ramp leads to a very rapid rise in pressure in the cavities formed by the implanted species. Thanks to this phenomenon, the development of defects along a horizontal plane, usually competing with the development of oblique defects, is the major phenomenon.
  • the implantation is carried out uniformly across the entire surface of the silicon substrate of crystalline orientation ⁇ 100> so that the implanted dose is substantially similar at every point of the embrittlement plane.
  • the temperature ramp is comprised between 50° C./s and 100° C./s, which allows to effectively detach a self-supporting layer of silicon ⁇ 100> exhibiting a low surface roughness, for example a roughness in the order of 90 nm RMS. All roughness described in this document are determined by Atomic Force Microscopy AFM on fields of 20 ⁇ 20 micrometers.
  • the heat treatment is applied simultaneously on the entire implanted substrate, in particular by irradiation, conduction or convection so as to facilitate the implementation of the heat treatment.
  • the heat treatment is carried out by means of halogen lamps in a Rapid Thermal Annealing furnace RTA.
  • the application of the heat treatment comprises a step consisting of levitating the implanted substrate between two heating members, the application of the heat treatment being typically carried out in a Levitor furnace.
  • the heat treatment is applied in a flash furnace which allows applying a high heating power and reaching very rapid ramps of heat treatment.
  • the heat treatment is applied up to a temperature comprised between 550° C. and 800° C. so as to obtain an optimized detachment.
  • the temperature ramp is constant for the duration of the temperature rise.
  • the temperature ramp varies for the duration of the temperature rise.
  • step b) of the method comprises the steps consisting of
  • the implanted ionic species are obtained from hydrogen, the hydrogen leading to the formation of light ionic species, limiting the implantation energy required to reach the depth of the desired embrittlement plane and the obtaining of a self-supporting layer.
  • the dose of implanted ionic species is less than or equal to 1 ⁇ 10 17 atoms/cm 2 , preferably less than or equal to 8 ⁇ 10 16 atoms/cm 2 , and more preferably a dose less than or equal to 7 ⁇ 10 16 atoms/cm 2 , so that the dose of implanted ionic species is reduced by 30% compared to a detachment technique using a temperature ramp of less than 30° C./s and a dose of 10 17 atoms/cm 2 . Thanks to this method allowing the development of defects along a horizontal plane, usually competing with the development of oblique defects, it is not required to use such high implantation doses as in the prior art. The duration of the implantation being proportional to the dose of implanted ionic species, the time is reduced according to the same proportion. The overall cost of the detachment of the self-supporting layer is thus decreased.
  • the step of implantation is carried out with such an energy that the thickness of the detached layer is comprised between 10 and 100 micrometers and preferably between 15 and 50 micrometers, so as to exhibit the adapted and adjusted thickness for the future steps, to reduce losses of material and optimize the economic yield of the method.
  • the step of implantation of the ionic species is carried out with an energy greater than 1 MeV, for example comprised between 1 MeV and 3 MeV, so as to obtain thicknesses of silicon layers sufficient to be self-supporting.
  • the step of implantation is carried out in a silicon substrate of crystalline orientation ⁇ 100> exhibiting a thickness greater than or equal to 700 micrometers and preferably a thickness comprised between 1 and 50 millimeters so as to be able to reuse the silicon substrate several times and form several self-supporting layers.
  • the method comprises a step c) carried out after the step b) consisting of repeating the steps a) and b) in a negative of the silicon substrate of crystalline orientation ⁇ 100> obtained in the step b) previously carried out, so as to detach a new self-supporting layer of silicon of crystalline orientation ⁇ 100>.
  • steps a) and b) on the negative allows recycling the initial substrate and reducing costs of the method because from a single substrate, several self-supporting layers of reproducible qualities can be obtained, while limiting losses of material.
  • the step c) is repeated until the negative of the silicon substrate of crystalline orientation ⁇ 100> exhibits a thickness less than or equal to that of a self-supporting layer of silicon ⁇ 100> so as to optimize to the maximum yield obtained from the initial substrate.
  • step c) is repeated directly on the negative of the silicon substrate of crystalline orientation ⁇ 100> so as to limit the costs of the method by avoiding the steps of surface preparation.
  • the negative of the substrate is polished in order to reduce the surface roughness (for example until a value lower than 20 nm RMS AFM) before implementing the step c) of the method, so as to limit the irregularities of planarity in the embrittlement plane.
  • FIG. 1 schematically illustrates a step of implantation a) of ionic species through a main surface of a silicon substrate exhibiting a crystalline orientation ⁇ 100> according to one embodiment of the method according to the invention.
  • FIG. 2 schematically illustrates a step of rapid heat treatment b) applied to the implanted silicon substrate ⁇ 100> and leading to the detachment of a self-supporting layer of silicon according to an embodiment of the invention.
  • FIGS. 3 and 4 schematically illustrate a step c) consisting of reproducing the step a) of implantation of ionic species through a main surface of a negative of the silicon substrate ⁇ 100> and the step b) of rapid heat treatment allowing the detachment of a new self-supporting layer of silicon from the negative, according to one possible embodiment of the invention.
  • FIG. 1 illustrates a substrate 1 of silicon of crystalline orientation ⁇ 100> in which are implanted, homogeneously in the entire substrate 1 , the hydrogen-based ionic species with an energy of about 1.5 MeV and a dose of about 7 ⁇ 10 16 H/cm 2 .
  • An embrittlement plane 2 shown by the dotted lines is thus formed in the substrate 1 at a depth of about 30 micrometers.
  • the embrittlement plane 2 is parallel to the surface 3 of the substrate 1 which has been subject to the implantation and delimits on both sides a silicon layer 4 , between the surface 3 and the embrittlement plane 2 , which will be self-supporting and a negative 5 of the initial donor substrate 1 ⁇ 100>.
  • a deposited layer of oxide or of thermal oxide is formed over a thickness of about 20 nm on the surface 3 of the substrate 1 prior to step a) in order to limit the possible contamination of the material by the step of implantation.
  • This protective layer being very thin, has little impact on the depth of the implantation.
  • FIG. 2 illustrates the step of application of a heat treatment performed in a rapid annealing RTA furnace with a temperature ramp of 43° C./s until reaching a temperature of 700° C.
  • This heat treatment applied simultaneously across the entire surface 3 leads to the development of cavities along a plane parallel to the surface 3 .
  • the heat treatment can be applied on a substrate 1 exhibiting an ambient temperature or a heated substrate 1 due to the previous implantation step.
  • the detachment of a self-supporting layer 4 of silicon of crystalline orientation ⁇ 100> with a thickness of about 30 micrometers is thus obtained and forms a negative 5 of the initial donor substrate 1 .
  • the roughness of the surfaces of the self-supporting layer 4 and of the negative 5 originating from the fracture is about 90 nm RMS.
  • the possible layer of oxide SiO2 formed beforehand is etched before proceeding to other steps with the aim of the formation of devices on the self-supporting layer 4 .
  • FIG. 3 illustrates a first part of step c) consisting of repeating the step a) of implantation of the hydrogen-based ionic species with a dose of about 7 ⁇ 10 16 H/cm 2 and an energy of about 2 MeV through the surface 3 of the negative 5 obtained in the previous step b).
  • An embrittlement plane 2 parallel to the implanted surface 3 is obtained in the negative 5 at a depth of about 50 micrometers delimiting a new layer 4 of silicon and a new negative 5 of the initial donor substrate 1 .
  • the surface 3 of the negative 5 may undergo a polishing step, for example a chemical mechanical polishing (CMP) and/or a step of cleaning of the surface 3 prior to the implantation step so as to smooth the surface 3 .
  • CMP chemical mechanical polishing
  • a polishing step can also be carried out on the surface of the self-supporting layer 4 according to the desired use.
  • the surface 3 of the negative 5 can also be covered with a thin oxide layer as previously described.
  • FIG. 4 illustrates the second and last part of step c) consisting of repeating the step b) of application of a heat treatment performed in a rapid annealing RTA furnace with a temperature ramp of 60° C./s until reaching a temperature of 800° C.
  • the application of this rapid heat treatment and simultaneously across the entire surface 3 leads to the development of cavities along a plane parallel to the surface 3 .
  • the detachment of a new self-supporting layer 4 of silicon of crystalline orientation ⁇ 100> with a thickness of about 50 micrometers is thus obtained.
  • the roughness of the surfaces of the self-supporting layer 4 and of the new negative 5 originating from the fracture is about 130 nm RMS.
  • the step c) is applied with conditions of implantation and heat treatment similar to those used in the first steps a) and b) illustrated in FIGS. 1 and 2 .
  • the step c) is repeated on the negative 5 of the initial donor substrate 1 as many times as the negative 5 allows it, that is to say until the negative 5 is no longer self-supporting.
  • the method of the invention allows preparing, in a reproducible manner, from a silicon substrate 1 of crystalline orientation ⁇ 100>, self-supporting layers 4 of silicon ⁇ 100> with doses reduced by 30%, implantation durations also reduced by 30% and an accelerated heat treatment. In this way, the cycle time is reduced leading to reduction of the costs of implementation.
  • the method can be repeated several times on the same substrate 1 , which reduces as well manufacturing costs of the self-supporting layer 4 of Si ⁇ 100>, particularly of interest for photovoltaic applications.

Abstract

A method for detaching a self-supporting layer of silicon of crystalline orientation <100>, particularly with the aim of applications in the field of photovoltaics, wherein the method includes the steps of: a) Implanting ionic species in a substrate made of silicon having a crystalline orientation <100> so as to create an embrittlement plane in the substrate, delimiting on both sides a self-supporting layer and a negative of the substrate, and b) Applying a heat treatment to the substrate implanted at step a) with a temperature ramp greater than 30° C./s so as to detach the self-supporting layer of silicon.

Description

  • The present invention relates to a method for detaching a self-supporting layer of silicon of crystalline orientation <100>, in particular for applications in the field of photovoltaics.
  • Monocrystalline silicon of crystalline orientation <100> is particularly interesting for applications in the field of photovoltaics. This silicon is very easily textured and may advantageously lead to a surface including pyramidal conformations adapted for the manufacture of photovoltaic cells. In addition, it is also easily passivated so that the cells made from such substrates exhibit good performance.
  • Therefore, studies were conducted from ingots of silicon of crystalline orientation <100> in order to form self-supporting layers, namely easily manipulable and grippable layers, with a view to forming photovoltaic cells.
  • For example there is known a method for cutting by sawing silicon ingots, commonly used to form substrates of about 150 to 200 micrometres in thickness for photovoltaic applications. But this method results in large losses of material at the cutting plane, about 50% of the initial silicon raw material, due to the saw cut. In addition, this technique is hardly compatible when the desired thickness of the self-supporting layers varies from 10 to 100 micrometers because the thickness of the layers becomes too small to withstand the mechanical stresses of the sawing.
  • There is also known a technique of high-energy implantation of ionic species followed by a thermal annealing under nitrogen which leads to good results for the silicon of crystalline orientation <111>. But the silicon <111>, due to its crystalline orientation, does not texture as desired for photovoltaic applications which reduces the manufacturing yield and the efficiency of the devices thus formed.
  • The document of H. Hassaf et al. entitled “Transfer of thin silicon layers by MeV hydrogen implantation” published in Nucl. Instr. and Meth. in Phys. Res. B 240 (2005) 183-187 discloses that, to obtain the transfer of a layer of silicon <111>, doses between 5·1016 and 8·1016 H/cm2 are required for energies between 650 KeV and 2 MeV as well as a heat treatment at 600° C. for at least 30 minutes. Yet, such conditions do not allow to obtain a transfer for silicon <100>. It is necessary to use higher doses, of about 1·1017 H/cm2, to obtain the detachment of a self-supporting layer of orientation <100>, which increases manufacturing costs.
  • This can be explained by the fact that the most favorable plane for the development of microcracks is the plane <111>. This plane is indeed the plane that contains the least inter-plane bonds in the crystalline structure of silicon. Yet, for the silicon <100>, this plane is not parallel to the surface of the substrate of orientation <100>: it is therefore not parallel anymore with the embrittlement plane obtained by implantation. The defects therefore develop preferably obliquely, along the plane <111>, when the heat treatment is applied. Thus, the fracture propagates with greater difficulty along the plane embrittled by implantation.
  • One of the aims of the invention is to overcome at least one of these drawbacks. To this end, the object of the invention is a method for detaching a self-supporting layer of silicon of crystalline orientation <100>, particularly with the aim of applications in the photovoltaic field, the method comprising the steps consisting of:
      • a—Implanting ionic species through a silicon substrate of crystalline orientation <100> so as to create an embrittlement plane delimiting on both sides a self-supporting layer and a negative of the substrate, and
      • b—Applying a heat treatment to the implanted substrate with a temperature ramp greater than 30° C./s so as to detach the self-supporting layer of silicon.
  • In the present application, by the expression ‘self-supporting layer’ (or ‘free-standing’ according to the English terminology), it is understood a silicon layer which exhibits a sufficient thickness, given the mechanical properties of silicon, so that the layer is sufficiently rigid, in itself, to be grippable, manipulable and usable in later steps, particularly in the manufacture of photovoltaic devices, without requiring the assembling of the layer with a stiffening substrate. These may be typically silicon layers of thickness greater than 10 or even 20 micrometers.
  • It is also understood that the implantation of the ionic species was carried out through a surface of the substrate and that the self-supporting layer is delimited between the embrittlement plane and said surface of the substrate through which the implantation was carried out.
  • In the present application, by the expression ‘embrittlement plane’ it is meant a plane parallel to the surface of the implanted substrate in which is located the maximum concentration of implanted ionic species and which concentrates the plane of development of crystalline defects at the origin of the detachment of the self-supporting layer.
  • In the present application, the term ‘negative’ designates the residue of the silicon substrate <100> recovered after the detachment of the self-supporting layer of silicon and which forms a self-supporting substrate. The negative exhibits indeed the thickness required to be able to be manipulated.
  • Thus, thanks to this detachment method comprising a rapid temperature ramp, it is possible to easily and quickly detach a self-supporting layer of silicon of crystalline orientation <100>. The hypothesis that can be put forward to explain this detachment is the following: the rapid temperature ramp leads to a very rapid rise in pressure in the cavities formed by the implanted species. Thanks to this phenomenon, the development of defects along a horizontal plane, usually competing with the development of oblique defects, is the major phenomenon.
  • Advantageously, the implantation is carried out uniformly across the entire surface of the silicon substrate of crystalline orientation <100> so that the implanted dose is substantially similar at every point of the embrittlement plane.
  • Preferably, the temperature ramp is comprised between 50° C./s and 100° C./s, which allows to effectively detach a self-supporting layer of silicon <100> exhibiting a low surface roughness, for example a roughness in the order of 90 nm RMS. All roughness described in this document are determined by Atomic Force Microscopy AFM on fields of 20×20 micrometers.
  • According to one disposition, the heat treatment is applied simultaneously on the entire implanted substrate, in particular by irradiation, conduction or convection so as to facilitate the implementation of the heat treatment.
  • According to one possibility, the heat treatment is carried out by means of halogen lamps in a Rapid Thermal Annealing furnace RTA.
  • According to one alternative, the application of the heat treatment comprises a step consisting of levitating the implanted substrate between two heating members, the application of the heat treatment being typically carried out in a Levitor furnace.
  • According to another alternative, the heat treatment is applied in a flash furnace which allows applying a high heating power and reaching very rapid ramps of heat treatment.
  • Advantageously, the heat treatment is applied up to a temperature comprised between 550° C. and 800° C. so as to obtain an optimized detachment.
  • According to a particular embodiment, the temperature ramp is constant for the duration of the temperature rise.
  • According to another particular embodiment, the temperature ramp varies for the duration of the temperature rise.
  • According to one disposition, the step b) of the method comprises the steps consisting of
  • b1) applying the temperature ramp until a predetermined maximum temperature is reached, and
  • b2) maintaining the implanted substrate at the maximum temperature for a predetermined duration, for example comprised between 5 seconds and 10 minutes, so as to detach the self-supporting layer of silicon.
  • Preferably, the implanted ionic species are obtained from hydrogen, the hydrogen leading to the formation of light ionic species, limiting the implantation energy required to reach the depth of the desired embrittlement plane and the obtaining of a self-supporting layer.
  • Advantageously, the dose of implanted ionic species is less than or equal to 1·1017 atoms/cm2, preferably less than or equal to 8·1016 atoms/cm2, and more preferably a dose less than or equal to 7·1016 atoms/cm2, so that the dose of implanted ionic species is reduced by 30% compared to a detachment technique using a temperature ramp of less than 30° C./s and a dose of 1017 atoms/cm2. Thanks to this method allowing the development of defects along a horizontal plane, usually competing with the development of oblique defects, it is not required to use such high implantation doses as in the prior art. The duration of the implantation being proportional to the dose of implanted ionic species, the time is reduced according to the same proportion. The overall cost of the detachment of the self-supporting layer is thus decreased.
  • Preferably, the step of implantation is carried out with such an energy that the thickness of the detached layer is comprised between 10 and 100 micrometers and preferably between 15 and 50 micrometers, so as to exhibit the adapted and adjusted thickness for the future steps, to reduce losses of material and optimize the economic yield of the method.
  • According to one particular disposition, the step of implantation of the ionic species is carried out with an energy greater than 1 MeV, for example comprised between 1 MeV and 3 MeV, so as to obtain thicknesses of silicon layers sufficient to be self-supporting.
  • Advantageously, the step of implantation is carried out in a silicon substrate of crystalline orientation <100> exhibiting a thickness greater than or equal to 700 micrometers and preferably a thickness comprised between 1 and 50 millimeters so as to be able to reuse the silicon substrate several times and form several self-supporting layers.
  • Preferably, the method comprises a step c) carried out after the step b) consisting of repeating the steps a) and b) in a negative of the silicon substrate of crystalline orientation <100> obtained in the step b) previously carried out, so as to detach a new self-supporting layer of silicon of crystalline orientation <100>.
  • The repetition of steps a) and b) on the negative allows recycling the initial substrate and reducing costs of the method because from a single substrate, several self-supporting layers of reproducible qualities can be obtained, while limiting losses of material.
  • Advantageously, the step c) is repeated until the negative of the silicon substrate of crystalline orientation <100> exhibits a thickness less than or equal to that of a self-supporting layer of silicon <100> so as to optimize to the maximum yield obtained from the initial substrate.
  • Preferably, step c) is repeated directly on the negative of the silicon substrate of crystalline orientation <100> so as to limit the costs of the method by avoiding the steps of surface preparation.
  • According to one alternative, the negative of the substrate is polished in order to reduce the surface roughness (for example until a value lower than 20 nm RMS AFM) before implementing the step c) of the method, so as to limit the irregularities of planarity in the embrittlement plane.
  • Other aspects, aims and advantages of the present invention will become more apparent on reading the following description of an embodiment thereof, given by way of non-limiting example and made with reference to the accompanying drawings. The figures do not necessarily respect the scale for all the elements shown so as to improve their readability. Dotted lines symbolize an embrittlement plane.
  • FIG. 1 schematically illustrates a step of implantation a) of ionic species through a main surface of a silicon substrate exhibiting a crystalline orientation <100> according to one embodiment of the method according to the invention.
  • FIG. 2 schematically illustrates a step of rapid heat treatment b) applied to the implanted silicon substrate <100> and leading to the detachment of a self-supporting layer of silicon according to an embodiment of the invention.
  • FIGS. 3 and 4 schematically illustrate a step c) consisting of reproducing the step a) of implantation of ionic species through a main surface of a negative of the silicon substrate <100> and the step b) of rapid heat treatment allowing the detachment of a new self-supporting layer of silicon from the negative, according to one possible embodiment of the invention.
    •
  • FIG. 1 illustrates a substrate 1 of silicon of crystalline orientation <100> in which are implanted, homogeneously in the entire substrate 1, the hydrogen-based ionic species with an energy of about 1.5 MeV and a dose of about 7·1016 H/cm2. An embrittlement plane 2 shown by the dotted lines is thus formed in the substrate 1 at a depth of about 30 micrometers. The embrittlement plane 2 is parallel to the surface 3 of the substrate 1 which has been subject to the implantation and delimits on both sides a silicon layer 4, between the surface 3 and the embrittlement plane 2, which will be self-supporting and a negative 5 of the initial donor substrate 1 <100>.
  • According to a non-illustrated alternative, a deposited layer of oxide or of thermal oxide is formed over a thickness of about 20 nm on the surface 3 of the substrate 1 prior to step a) in order to limit the possible contamination of the material by the step of implantation. This protective layer being very thin, has little impact on the depth of the implantation.
  • FIG. 2 illustrates the step of application of a heat treatment performed in a rapid annealing RTA furnace with a temperature ramp of 43° C./s until reaching a temperature of 700° C. This heat treatment applied simultaneously across the entire surface 3 leads to the development of cavities along a plane parallel to the surface 3. The heat treatment can be applied on a substrate 1 exhibiting an ambient temperature or a heated substrate 1 due to the previous implantation step. The detachment of a self-supporting layer 4 of silicon of crystalline orientation <100> with a thickness of about 30 micrometers is thus obtained and forms a negative 5 of the initial donor substrate 1. The roughness of the surfaces of the self-supporting layer 4 and of the negative 5 originating from the fracture is about 90 nm RMS.
  • According to a non-illustrated possibility, the possible layer of oxide SiO2 formed beforehand is etched before proceeding to other steps with the aim of the formation of devices on the self-supporting layer 4.
  • FIG. 3 illustrates a first part of step c) consisting of repeating the step a) of implantation of the hydrogen-based ionic species with a dose of about 7·1016 H/cm2 and an energy of about 2 MeV through the surface 3 of the negative 5 obtained in the previous step b). An embrittlement plane 2 parallel to the implanted surface 3 is obtained in the negative 5 at a depth of about 50 micrometers delimiting a new layer 4 of silicon and a new negative 5 of the initial donor substrate 1.
  • According to a non-illustrated alternative, the surface 3 of the negative 5 may undergo a polishing step, for example a chemical mechanical polishing (CMP) and/or a step of cleaning of the surface 3 prior to the implantation step so as to smooth the surface 3. A polishing step can also be carried out on the surface of the self-supporting layer 4 according to the desired use. The surface 3 of the negative 5 can also be covered with a thin oxide layer as previously described.
  • FIG. 4 illustrates the second and last part of step c) consisting of repeating the step b) of application of a heat treatment performed in a rapid annealing RTA furnace with a temperature ramp of 60° C./s until reaching a temperature of 800° C. The application of this rapid heat treatment and simultaneously across the entire surface 3 leads to the development of cavities along a plane parallel to the surface 3. The detachment of a new self-supporting layer 4 of silicon of crystalline orientation <100> with a thickness of about 50 micrometers is thus obtained. The roughness of the surfaces of the self-supporting layer 4 and of the new negative 5 originating from the fracture is about 130 nm RMS.
  • According to a non-illustrated alternative, the step c) is applied with conditions of implantation and heat treatment similar to those used in the first steps a) and b) illustrated in FIGS. 1 and 2.
  • According to another non illustrated alternative embodiment, the step c) is repeated on the negative 5 of the initial donor substrate 1 as many times as the negative 5 allows it, that is to say until the negative 5 is no longer self-supporting.
  • Thus, the method of the invention allows preparing, in a reproducible manner, from a silicon substrate 1 of crystalline orientation <100>, self-supporting layers 4 of silicon <100> with doses reduced by 30%, implantation durations also reduced by 30% and an accelerated heat treatment. In this way, the cycle time is reduced leading to reduction of the costs of implementation. In addition, the method can be repeated several times on the same substrate 1, which reduces as well manufacturing costs of the self-supporting layer 4 of Si <100>, particularly of interest for photovoltaic applications.
  • It goes without saying that the invention is not limited to the embodiment described above by way of example, but that it comprises all technical equivalents and alternatives of the described means as well as their combinations.

Claims (18)

1-10. (canceled)
11. A method for detaching a self-supporting layer of silicon of crystalline orientation <100>, particularly with the aim of applications in the field of photovoltaics, wherein the method comprises the steps of:
a) Implanting ionic species in a substrate made of silicon having a crystalline orientation <100> so as to create an embrittlement plane in the substrate, delimiting on both sides a self-supporting layer and a negative of the substrate, and
b) Applying a heat treatment to the substrate implanted at step a) with a temperature ramp greater than 30° C./s so as to detach the self-supporting layer of silicon.
12. The method according to claim 11, wherein the temperature ramp is comprised between 50° C./s and 100° C./s.
13. The method according to claim 11, wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a).
14. The method according to claim 11, wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a) by one of radiation.
15. The method according to claim 11, wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a) by one of conduction.
16. The method according to claim 11, wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a) by one of convection.
17. The method according to claim 11, wherein the heat treatment is applied up to a temperature comprised between 550° C. and 800° C.
18. The method according to claim 11, wherein the implanted ionic species are obtained from hydrogen.
19. The method according to claim 11, wherein the dose of implanted ionic species is less than or equal to 1.1017 atoms/cm2.
20. The method according to claim 11, wherein the dose of implanted ionic species is less than or equal to 8.1016 atoms/cm2.
21. The method according to claim 11, wherein the dose of implanted ionic species is less than or equal to 7.1016 atoms/cm2.
22. The method according to claim 11, wherein the implanting step a) is carried out with such an energy that the thickness of the detached self-supporting layer is comprised between 10 and 100 micrometers.
23. The method according to claim 11, wherein the implanting step a) is carried out with such an energy that the thickness of the detached self-supporting layer is comprised between 15 and 50 micrometers.
24. The method according to claim 11, wherein the implanting step a) of the ionic species is carried out with an energy greater than 1 MeV.
25. The method according to claim 11, wherein the implanting step a) is carried out in a silicon substrate of crystalline orientation <100> exhibiting a thickness greater than or equal to 700 micrometers.
26. The method according to claim 11, wherein the implanting step a) is carried out in a silicon substrate of crystalline orientation <100> exhibiting a thickness comprised between 1 and 50 millimeters.
27. The method according to claim 11, wherein the method comprises a step c) carried out after step b) consisting of repeating the steps a) and b) in the negative of the substrate made of silicon having a crystalline orientation <100> obtained in the previously carried out step b), so as to detach a new self-supporting layer of silicon.
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