US20140370656A1 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereof Download PDFInfo
- Publication number
- US20140370656A1 US20140370656A1 US14/476,797 US201414476797A US2014370656A1 US 20140370656 A1 US20140370656 A1 US 20140370656A1 US 201414476797 A US201414476797 A US 201414476797A US 2014370656 A1 US2014370656 A1 US 2014370656A1
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- US
- United States
- Prior art keywords
- oxide semiconductor
- film
- oxygen
- insulating film
- semiconductor film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 548
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 285
- 239000001301 oxygen Substances 0.000 claims abstract description 285
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 272
- 238000000034 method Methods 0.000 claims abstract description 105
- 238000010438 heat treatment Methods 0.000 claims abstract description 101
- 239000000758 substrate Substances 0.000 claims description 155
- -1 oxygen ion Chemical class 0.000 claims description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 27
- 229910052710 silicon Inorganic materials 0.000 claims description 27
- 239000010703 silicon Substances 0.000 claims description 27
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 26
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 23
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 21
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 20
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 238000009616 inductively coupled plasma Methods 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 claims description 13
- 229910052738 indium Inorganic materials 0.000 claims description 11
- 239000011701 zinc Substances 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 9
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 9
- 238000004380 ashing Methods 0.000 claims description 8
- 229910052725 zinc Inorganic materials 0.000 claims description 6
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 4
- 238000012360 testing method Methods 0.000 abstract description 51
- 230000008569 process Effects 0.000 abstract description 20
- 230000008859 change Effects 0.000 abstract description 14
- 230000018044 dehydration Effects 0.000 abstract description 13
- 238000006297 dehydration reaction Methods 0.000 abstract description 13
- 238000006356 dehydrogenation reaction Methods 0.000 abstract description 13
- 239000010408 film Substances 0.000 description 784
- 239000010410 layer Substances 0.000 description 283
- 239000001257 hydrogen Substances 0.000 description 88
- 229910052739 hydrogen Inorganic materials 0.000 description 88
- 239000007789 gas Substances 0.000 description 68
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 61
- 239000000463 material Substances 0.000 description 59
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 42
- 239000012535 impurity Substances 0.000 description 37
- 239000004973 liquid crystal related substance Substances 0.000 description 37
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 36
- 238000004544 sputter deposition Methods 0.000 description 35
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 34
- 229910001868 water Inorganic materials 0.000 description 34
- 239000012298 atmosphere Substances 0.000 description 31
- 229910044991 metal oxide Inorganic materials 0.000 description 26
- 150000004706 metal oxides Chemical class 0.000 description 26
- 230000015572 biosynthetic process Effects 0.000 description 25
- 239000011810 insulating material Substances 0.000 description 23
- 229910007541 Zn O Inorganic materials 0.000 description 22
- 229910052757 nitrogen Inorganic materials 0.000 description 21
- 230000006870 function Effects 0.000 description 20
- 150000002431 hydrogen Chemical class 0.000 description 20
- 229910052786 argon Inorganic materials 0.000 description 18
- 239000002245 particle Substances 0.000 description 18
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 16
- 238000005259 measurement Methods 0.000 description 16
- 239000000203 mixture Substances 0.000 description 16
- 229910052581 Si3N4 Inorganic materials 0.000 description 15
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 15
- 238000005530 etching Methods 0.000 description 15
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 15
- 230000003247 decreasing effect Effects 0.000 description 13
- 230000005684 electric field Effects 0.000 description 13
- 239000011229 interlayer Substances 0.000 description 13
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 12
- 239000000126 substance Substances 0.000 description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 description 11
- 238000006243 chemical reaction Methods 0.000 description 11
- 238000000151 deposition Methods 0.000 description 11
- 230000008021 deposition Effects 0.000 description 11
- 239000001307 helium Substances 0.000 description 11
- 229910052734 helium Inorganic materials 0.000 description 11
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 11
- 238000000206 photolithography Methods 0.000 description 11
- 230000001681 protective effect Effects 0.000 description 10
- 239000010936 titanium Substances 0.000 description 10
- 238000012546 transfer Methods 0.000 description 10
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 9
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 9
- 239000013078 crystal Substances 0.000 description 9
- 229910001882 dioxygen Inorganic materials 0.000 description 9
- 230000000694 effects Effects 0.000 description 9
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 9
- 150000002500 ions Chemical class 0.000 description 9
- 229920005989 resin Polymers 0.000 description 9
- 239000011347 resin Substances 0.000 description 9
- 239000000956 alloy Substances 0.000 description 8
- 229910052733 gallium Inorganic materials 0.000 description 8
- 229910003437 indium oxide Inorganic materials 0.000 description 8
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 8
- 238000001307 laser spectroscopy Methods 0.000 description 8
- 239000000123 paper Substances 0.000 description 8
- 239000010409 thin film Substances 0.000 description 8
- 229910052721 tungsten Inorganic materials 0.000 description 8
- 206010021143 Hypoxia Diseases 0.000 description 7
- 229910045601 alloy Inorganic materials 0.000 description 7
- 230000003287 optical effect Effects 0.000 description 7
- 229910052719 titanium Inorganic materials 0.000 description 7
- 239000011787 zinc oxide Substances 0.000 description 7
- 239000004925 Acrylic resin Substances 0.000 description 6
- 229920000178 Acrylic resin Polymers 0.000 description 6
- 230000007547 defect Effects 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 150000004678 hydrides Chemical class 0.000 description 6
- 239000011261 inert gas Substances 0.000 description 6
- 239000003094 microcapsule Substances 0.000 description 6
- 239000000565 sealant Substances 0.000 description 6
- 239000002356 single layer Substances 0.000 description 6
- 239000010937 tungsten Substances 0.000 description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 5
- 239000000969 carrier Substances 0.000 description 5
- 238000004891 communication Methods 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 5
- 230000002349 favourable effect Effects 0.000 description 5
- 239000012299 nitrogen atmosphere Substances 0.000 description 5
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 5
- 125000006850 spacer group Chemical group 0.000 description 5
- 238000003860 storage Methods 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 4
- 229910007264 Si2H6 Inorganic materials 0.000 description 4
- 229910003910 SiCl4 Inorganic materials 0.000 description 4
- 229910004014 SiF4 Inorganic materials 0.000 description 4
- 229910003818 SiH2Cl2 Inorganic materials 0.000 description 4
- 229910003822 SiHCl3 Inorganic materials 0.000 description 4
- 239000005380 borophosphosilicate glass Substances 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000005262 ferroelectric liquid crystals (FLCs) Substances 0.000 description 4
- 239000000945 filler Substances 0.000 description 4
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 229910052754 neon Inorganic materials 0.000 description 4
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 4
- 150000002894 organic compounds Chemical class 0.000 description 4
- 239000005360 phosphosilicate glass Substances 0.000 description 4
- 238000001552 radio frequency sputter deposition Methods 0.000 description 4
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 4
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 description 4
- 239000012798 spherical particle Substances 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 3
- 229910019092 Mg-O Inorganic materials 0.000 description 3
- 229910019395 Mg—O Inorganic materials 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 3
- 238000001237 Raman spectrum Methods 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 239000000470 constituent Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 238000005192 partition Methods 0.000 description 3
- 229920003023 plastic Polymers 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 229920002620 polyvinyl fluoride Polymers 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 238000000851 scanning transmission electron micrograph Methods 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910005535 GaOx Inorganic materials 0.000 description 2
- 206010052128 Glare Diseases 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000004952 Polyamide Substances 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- SWXQKHHHCFXQJF-UHFFFAOYSA-N azane;hydrogen peroxide Chemical compound [NH4+].[O-]O SWXQKHHHCFXQJF-UHFFFAOYSA-N 0.000 description 2
- GPBUGPUPKAGMDK-UHFFFAOYSA-N azanylidynemolybdenum Chemical compound [Mo]#N GPBUGPUPKAGMDK-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- DQXBYHZEEUGOBF-UHFFFAOYSA-N but-3-enoic acid;ethene Chemical compound C=C.OC(=O)CC=C DQXBYHZEEUGOBF-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000003098 cholesteric effect Effects 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 238000007766 curtain coating Methods 0.000 description 2
- 230000000994 depressogenic effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007598 dipping method Methods 0.000 description 2
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 239000005038 ethylene vinyl acetate Substances 0.000 description 2
- 230000001747 exhibiting effect Effects 0.000 description 2
- 239000011152 fibreglass Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 229910052743 krypton Inorganic materials 0.000 description 2
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 239000010955 niobium Substances 0.000 description 2
- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 2
- 238000007645 offset printing Methods 0.000 description 2
- 239000000049 pigment Substances 0.000 description 2
- 229920001200 poly(ethylene-vinyl acetate) Polymers 0.000 description 2
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 2
- 229920002647 polyamide Polymers 0.000 description 2
- 229920006267 polyester film Polymers 0.000 description 2
- 229920000915 polyvinyl chloride Polymers 0.000 description 2
- 239000004800 polyvinyl chloride Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 238000001350 scanning transmission electron microscopy Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910052990 silicon hydride Inorganic materials 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 238000010345 tape casting Methods 0.000 description 2
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- 229910001930 tungsten oxide Inorganic materials 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 description 1
- UWCWUCKPEYNDNV-LBPRGKRZSA-N 2,6-dimethyl-n-[[(2s)-pyrrolidin-2-yl]methyl]aniline Chemical compound CC1=CC=CC(C)=C1NC[C@H]1NCCC1 UWCWUCKPEYNDNV-LBPRGKRZSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 239000004986 Cholesteric liquid crystals (ChLC) Substances 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 108091006149 Electron carriers Proteins 0.000 description 1
- 229910006160 GeF4 Inorganic materials 0.000 description 1
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 1
- 108010083687 Ion Pumps Proteins 0.000 description 1
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 1
- 229910052779 Neodymium Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000004983 Polymer Dispersed Liquid Crystal Substances 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000004990 Smectic liquid crystal Substances 0.000 description 1
- 229910020923 Sn-O Inorganic materials 0.000 description 1
- 239000004974 Thermotropic liquid crystal Substances 0.000 description 1
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- AZWHFTKIBIQKCA-UHFFFAOYSA-N [Sn+2]=O.[O-2].[In+3] Chemical compound [Sn+2]=O.[O-2].[In+3] AZWHFTKIBIQKCA-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000005407 aluminoborosilicate glass Substances 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 150000001721 carbon Chemical group 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000023077 detection of light stimulus Effects 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000005686 electrostatic field Effects 0.000 description 1
- 230000005281 excited state Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- QUZPNFFHZPRKJD-UHFFFAOYSA-N germane Chemical compound [GeH4] QUZPNFFHZPRKJD-UHFFFAOYSA-N 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052986 germanium hydride Inorganic materials 0.000 description 1
- 230000004313 glare Effects 0.000 description 1
- 230000005283 ground state Effects 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 150000002484 inorganic compounds Chemical class 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000005001 laminate film Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910001416 lithium ion Inorganic materials 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000000696 magnetic material Substances 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 229910001507 metal halide Inorganic materials 0.000 description 1
- 150000005309 metal halides Chemical class 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000012788 optical film Substances 0.000 description 1
- 150000002926 oxygen Chemical class 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 238000005381 potential energy Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052708 sodium Inorganic materials 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- PPMWWXLUCOODDK-UHFFFAOYSA-N tetrafluorogermane Chemical compound F[Ge](F)(F)F PPMWWXLUCOODDK-UHFFFAOYSA-N 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- OYQCBJZGELKKPM-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[O-2].[In+3] OYQCBJZGELKKPM-UHFFFAOYSA-N 0.000 description 1
Images
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/469—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
- H01L21/4757—After-treatment
- H01L21/47576—Doping the layer
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H01L21/38—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
- H01L21/383—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions using diffusion into or out of a solid from or into a gaseous phase
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- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
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Definitions
- the present invention relates to a semiconductor device and a manufacturing method thereof.
- a semiconductor device generally means any device which can function by utilizing semiconductor characteristics
- an electrooptic device, a semiconductor circuit, and electronic equipment are all semiconductor devices.
- a technique by which transistors are formed using semiconductor thin films formed over a substrate having an insulating surface has been attracting attention.
- the transistor is applied to a wide range of electronic devices such as an integrated circuit (IC) or an image display device (display device).
- IC integrated circuit
- display device display device
- a silicon-based semiconductor material is widely known as a material for a semiconductor thin film applicable to the transistor; in addition, an oxide semiconductor has been attracting attention as another material.
- a transistor whose active layer includes an amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) and having an electron carrier concentration of less than 10 18 /cm 3 is disclosed (see Patent Document 1).
- the electrical conductivity of the oxide semiconductor may change. Such a phenomenon causes variation in the electric characteristics of a transistor using the oxide semiconductor.
- one object of one embodiment of the present invention is to provide a semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability.
- dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed.
- One embodiment of the present invention is a method for manufacturing a semiconductor device, in which a gate electrode layer is formed, a gate insulating film is formed over the gate electrode layer, an oxide semiconductor film is formed over the gate insulating film so as to overlap with the gate electrode layer, heat treatment is performed on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film after the hydrogen atom is removed, to supply an oxygen atom to the oxide semiconductor film, a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film are formed, and an insulating film is formed over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film.
- One embodiment of the present invention is a method for manufacturing a semiconductor device, in which a gate electrode layer is formed, a gate insulating film containing an oxygen atom as a component is formed over the gate electrode layer, oxygen doping treatment is performed on the gate insulating film to supply an oxygen atom to the gate insulating film, an oxide semiconductor film is formed over the gate insulating film so as to overlap with the gate electrode layer, heat treatment is performed on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film after the hydrogen atom is removed, to supply an oxygen atom into the oxide semiconductor film, a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film are formed, an insulating film is formed over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film and contain an oxygen atom as a component, and oxygen doping treatment is performed on the insulating film to supply an oxygen atom to the insulating film.
- One embodiment of the present invention is a semiconductor device comprising a gate electrode layer, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a source electrode layer and a drain electrode layer over the oxide semiconductor film, an insulating film provided over the source electrode layer and the drain electrode layer so as to be in contact with the oxide semiconductor film, and a wiring layer provided over the insulating film so as to be electrically connected to the source electrode layer or the drain electrode layer.
- the wiring layer is provided in an opening formed by removing part of the insulating film and part of the source electrode layer and an opening formed by removing part of the insulating film and part of the drain electrode layer; the part of the source electrode layer and the part of the drain electrode layer are removed in the openings, so that depressions are formed in the source electrode layer and the drain electrode layer; the wiring layer is provided so as to be in contact with inner wall surfaces and bottom surfaces having smaller film thicknesses of the depressions of the source electrode layer and the drain electrode layer in the openings; and oxygen concentrations of the bottom surfaces of the depressions of the source electrode layer and the drain electrode layer are lower than those of top surfaces of the source electrode layer and the drain electrode layer.
- One embodiment of the present invention is a semiconductor device in which the oxide semiconductor film in the above structure includes a region where the oxygen content is greater than that based on a stoichiometric composition ratio of a crystalline state of an oxide semiconductor of the oxide semiconductor film.
- One embodiment of the present invention is a semiconductor device in which the oxide semiconductor film in the above structure includes a region where the oxygen content is greater than that based on a stoichiometric composition ratio of a crystalline state of an oxide semiconductor of the oxide semiconductor film, at least in an interface with the insulating film or a vicinity thereof.
- oxygen doping means that oxygen (which includes at least one of an oxygen radical, an oxygen atom, and an oxygen ion) is added to a bulk.
- bulk is used in order to clarify that oxygen is added not only to a top surface of a thin film but also to the inside of the thin film.
- oxygen doping includes “oxygen plasma doping” in which oxygen in the form of plasma is added to a bulk.
- an oxygen-excessive region where the amount of oxygen is greater than the stoichiometric proportion can be provided in at least one of the gate insulating film (bulk thereof), the oxide semiconductor film (bulk thereof), the insulating film (bulk thereof), an interface between the gate insulating film and the oxide semiconductor film, and an interface between the oxide semiconductor film and the insulating film.
- the amount of oxygen is preferably greater than the stoichiometric proportion and less than four times of the stoichiometric proportion, far preferably greater than the stoichiometric proportion and less than double of the stoichiometric proportion.
- Such an oxide including excessive oxygen whose amount is greater than the stoichiometric proportion refers to, for example, an oxide which satisfies 2g>3a+3b+2c+4d+3e+2f (g is greater than the sum of 1.5a+1.5b+c+2d+1.5e+f), where the oxide is represented as In a Ga b Zn c Si d Al e Mg f O g (a, b, c, d, e, f, g ⁇ 0: a, b, c, d, e, f, g is greater than or equal to zero).
- oxygen which is added by the oxygen doping treatment may exist between lattices of the oxide semiconductor.
- oxygen-excessive region may be provided in two or more of the gate insulating film, the oxide semiconductor film, and the insulating film.
- oxygen-excessive regions can be provided in the interface between the gate insulating film and the oxide semiconductor film, the oxide semiconductor film (bulk thereof), and the interface between the oxide semiconductor film and the insulating film by oxygen doping treatment in the manufacturing process.
- the amount of oxygen is equal to the stoichiometric proportion in a defect- (oxygen deficiency-)free oxide semiconductor
- an oxide semiconductor include oxygen whose amount be greater than the stoichiometric proportion.
- the base film is not necessarily an insulating film containing excessive oxygen in the case of a defect- (oxygen deficiency-)free oxide semiconductor, in order to secure reliability, for example, to suppress variation in the threshold voltage of a transistor, it is preferable that the base film be an insulating film containing excessive oxygen, considering the possibility of occurrence of oxygen deficiency in the oxide semiconductor layer.
- a hydrogen atom or an impurity containing a hydrogen atom such as water in the oxide semiconductor film is removed, so that the oxide semiconductor film is highly purified.
- the amount of oxygen added by the oxygen doping treatment is set to greater than the amount of hydrogen in the highly-purified oxide semiconductor film which has been subjected to the dehydration or dehydrogenation.
- Excessive oxygen in at least one of the stacked gate insulating film, oxide semiconductor film, and insulating film diffuses and reacts with hydrogen that causes instability, thereby fixing hydrogen (making hydrogen an immovable ion). That is, instability in the reliability can be reduced (or sufficiently decreased).
- variation in the threshold voltage Vth due to oxygen deficiency can be reduced and the amount of shift ⁇ Vth of the threshold voltage can be reduced.
- oxygen plasma doping treatment a state in which oxygen is added to the bulk by the above-described “oxygen plasma doping” treatment is described. Note that when oxygen doping treatment is performed on an oxide semiconductor film containing oxygen as one component, it is generally difficult to check an increase or a decrease of the oxygen concentration. Therefore, here, an effect of the oxygen doping treatment was confirmed with a silicon wafer.
- FIG. 15 shows an oxygen concentration profile in the depth direction of the silicon wafer according to secondary ion mass spectrometry (SIMS) measurement.
- SIMS secondary ion mass spectrometry
- oxygen is added in either of cases where the RF bias power is 0 W or the RF bias power is 300 W.
- oxygen is added more deeply than the case of the RF bias power of 0 W.
- FIGS. 16A and 16B show results of observation of a cross section of the silicon wafer before and after the oxygen doping treatment according to scanning transmission electron microscopy (STEM).
- FIG. 16A is a STEM image of the silicon wafer before the oxygen doping treatment.
- FIG. 16B is a STEM image of the silicon wafer after the oxygen doping treatment at the RF bias power of 300 W. Referring to FIG. 16B , it can be confirmed that an oxygen-highly-doped region is formed in the silicon wafer by the oxygen doping.
- oxygen is added to the silicon wafer by oxygen doping on the silicon wafer. This result leads to an understanding that oxygen can also be added to an oxide semiconductor film by oxygen doping to the oxide semiconductor film.
- the charge trapping center such as hydrogen or water in the insulating film traps the positive charge and is transferred into the insulating film, which varies electric characteristics of the transistor. Therefore, in order to suppress variation of the electrical characteristics of the transistor, it is important that there is no charge trapping center or the number of charge trapping centers is small in the insulating film. Therefore, a sputtering method by which less hydrogen is contained in film deposition is preferably used for formation of the insulating film. In an insulating film deposited by the sputtering method, there is no charge trapping center or the number of which is small, and the transfer of positive charge less occurs as compared to that in the case of using a CVD method or the like. Accordingly, the shift of the threshold voltage of the transistor can be suppressed and the transistor can be normally off.
- the gate insulating film may be formed by a CVD method such as a plasma CVD method.
- the oxide semiconductor film absorbs light, whereby a bond of a metal element (M) and a hydrogen atom (H) (the bond also referred to as an M-H bond) in the oxide semiconductor film is cut by optical energy.
- the optical energy having a wavelength of about 400 nm is equal to or substantially equal to the bond energy of a metal element and a hydrogen atom.
- the charge density as small as 10 15 cm ⁇ 3 , or the charge per unit area as small as 10 10 cm ⁇ 2 does not affect the transistor characteristics or very slightly affects them. Therefore, it is preferable that the charge density be less than or equal to 10 15 cm ⁇ 3 .
- the hydrogen concentration be less than or equal to 10 16 cm ⁇ 3 .
- a silicon nitride film formed by a sputtering method be used as a passivation film to cover the transistor.
- Hydrogen or water can also be removed from the oxide semiconductor film by doping with excessive oxygen as compared to hydrogen contained in the oxide semiconductor film (such that (number of hydrogen atoms) ⁇ (number of oxygen radicals) or (number of oxygen ions)).
- oxygen is made to be plasma by a radio-frequency wave (RF)
- the bias of the substrate is increased
- an oxygen radical and/or an oxygen ion are/is doped or added into the oxide semiconductor film over the substrate such that the amount of oxygen is greater than that of hydrogen in the oxide semiconductor film.
- the electronegativity of oxygen is 3.0 which is larger than about 2.0, the electronegativity of a metal (Zn, Ga, In) in the oxide semiconductor film, and thus, excessive oxygen contained as compared to hydrogen deprives the M-H bond of a hydrogen atom, so that an OH group is formed.
- This OH group may form an M-O—H group with a bond to M.
- the oxygen doping is preferably performed such that the amount of oxygen in the oxide semiconductor film is greater than the stoichiometric proportion.
- an ideal single-crystal ratio is 1:1:1:4 (InGaZnO 4 ), and therefore, it is far preferable that the amount of oxygen be made to greater than the stoichiometric proportion and less than double of the stoichiometric proportion by oxygen doping or the like. Accordingly, the amount of oxygen is greater than that of hydrogen in the oxide semiconductor film.
- Optical energy or BT stress detaches a hydrogen ion from the M-H bond, which causes deterioration; however, in the case where oxygen is added by the above-described doping, added oxygen is bonded with a hydrogen ion, so that an OH group is formed.
- the OH group does not discharge a hydrogen ion even by light irradiation or application of BT stress on the transistor because of its high bond energy, and is not easily transferred into the oxide semiconductor film because of its greater mass than the mass of a hydrogen ion. Accordingly, an OH group formed by oxygen doping does not cause deterioration of the transistor or can suppress the deterioration.
- a step of doping an oxide semiconductor film with oxygen in a transistor according to one embodiment of the present invention is effective not only for removal of hydrogen or water from the oxide semiconductor film but also for compensation of an oxygen defect in the film. Accordingly, the variation in the threshold voltage can also be controlled in the transistor according to one embodiment of the present invention.
- Metal oxide films each formed of a component/components similar to the oxide semiconductor film may be provided with the oxide semiconductor film provided therebetween, which is also effective for prevention of change of the electrical characteristics.
- a film containing at least one selected from the constituent elements of the oxide semiconductor film is preferably used. Such a material can be fit well to the oxide semiconductor film, and therefore, provision of the metal oxide films with the oxide semiconductor film provided therebetween enables an interface between the metal oxide film and the oxide semiconductor film to be kept well.
- the metal oxide film using the above-described material(s) as an insulating film which is in contact with the oxide semiconductor film, accumulation of hydrogen ions in the interface between the metal oxide film and the oxide semiconductor film and in the vicinity thereof can be suppressed or prevented. Accordingly, as compared to the case where insulating films each formed of a different component/different components from the oxide semiconductor film, such as silicon oxide films are provided with the oxide semiconductor film provided therebetween, the hydrogen concentration in the interface with the oxide semiconductor film, which affects the threshold voltage of the transistor, can be sufficiently decreased.
- a gallium oxide film is preferably used as the metal oxide film. Since gallium oxide has a wide bandgap (Eg), by providing gallium oxide films with the oxide semiconductor film provided therebetween, an energy barrier is formed in the interface between the oxide semiconductor film and the metal oxide film to prevent carrier transfer in the interface. Consequently, carriers are not transferred from the oxide semiconductor to the metal oxide, but are transferred within the oxide semiconductor film. On the other hand, a hydrogen ion passes through the interface between the oxide semiconductor and the metal oxide and is accumulated in the vicinity of an interface between the metal oxide and the insulating film.
- Eg wide bandgap
- the energy barrier in the case where gallium oxide is in contact with a In—Ga—Zn—O-based material is about 0.8 eV on the conduction band side and is about 0.9 eV on the valence band side.
- One technological idea of a transistor according to one embodiment of the present invention is to increase the amount of oxygen contained in at least one of an insulating film in contact with an oxide semiconductor film, the oxide semiconductor film, and the vicinity of an interface between them by oxygen doping treatment.
- oxide semiconductor material which contains indium whose bonding strength to oxygen is relatively weak is used for the oxide semiconductor film
- the insulating film in contact with the oxide semiconductor film contains a material which has a stronger bonding strength to oxygen, such as silicon
- oxygen in the oxide semiconductor film may be deprived by heat treatment, which may cause formation of oxygen deficiency in the vicinity of the interface with the oxide semiconductor film.
- the formation of oxygen deficiency can be suppressed by supplying excessive oxygen to the oxide semiconductor film.
- the amount of oxygen which is greater than the stoichiometric proportion, contained in the oxide semiconductor film or the insulating film in contact with the oxide semiconductor film may be different between layers. It can be considered that chemical potential of oxygen is different between the layers where the amount of excessive oxygen is different between them, and the difference in the chemical potential comes to equilibrium or substantial equilibrium by heat treatment or the like in the manufacturing process of the transistor. Distribution of oxygen in the equilibrium state is considered below.
- the equilibrium state at a temperature T at a pressure P refers to the state in which a Gibbs free energy of the whole of the systems, G is the minimum, which is represented by the following formula (1).
- G ( N a , N b , N c , . . . , T,P ) G (1) ( N a , N b , N c , . . . , T,P )+ G (2) ( N a , N b , N c , . . . , T,P )+ G (3) ( N a , N b , N c , . . . , T,P ) (1)
- reference symbols G (1) , G (2) , and G (3) denote Gibbs free energies of layers.
- Reference symbols a, b, and c denote particle kinds.
- the Gibbs free energy changes as represented by the following formula (2) when the particle a is transferred from an i layer to a j layer by ⁇ N a (j) .
- the differential of the Gibbs free energy with respect to the number of particles corresponds to the chemical potential, and thus the chemical potentials of particles are uniform in the layers in the equilibrium state.
- the chemical potential of oxygen is relatively small in the insulating film and is relatively large in the oxide semiconductor film.
- oxygen is transferred so as to make the chemical potentials uniform. That is, oxygen in the oxide semiconductor film is transferred to the insulating film, whereby the chemical potential of the oxide semiconductor film is decreased and the chemical potential of the insulating film is increased.
- oxygen supplied excessively to the oxide semiconductor film by the oxygen doping treatment is diffused to be supplied to the insulating film (including its interface) by the following heat treatment to make the whole of the systems to be in the equilibrium state. Therefore, in the case where excessive oxygen exists enough in the oxide semiconductor film, the insulating film (including its interface) in contact with the oxide semiconductor film can be made to contain excessive oxygen.
- a transistor including an oxide semiconductor film subjected to dehydration or dehydrogenation by heat treatment and oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress (BT test) can be reduced.
- a semiconductor device having a transistor with high electric characteristics and reliability can be manufactured.
- FIGS. 1A to 1C illustrate one embodiment of a semiconductor device.
- FIGS. 2A to 2D illustrate one embodiment of a method for manufacturing a semiconductor device.
- FIGS. 3A to 3D illustrate embodiments of a semiconductor device.
- FIGS. 4A to 4F illustrate one embodiment of a method for manufacturing a semiconductor device.
- FIGS. 5A to 5C illustrate one embodiment of a method for manufacturing a semiconductor device.
- FIG. 6 illustrates one embodiment of a semiconductor device.
- FIG. 7 illustrates one embodiment of a semiconductor device.
- FIG. 8 illustrates one embodiment of a semiconductor device.
- FIGS. 9A and 9B illustrate one embodiment of a semiconductor device.
- FIGS. 10A and 10B illustrate electronic equipment.
- FIGS. 11A to 11F illustrate electronic equipment.
- FIGS. 12A to 12C illustrate embodiments of a semiconductor device.
- FIGS. 13A to 13D illustrate one embodiment of a semiconductor device.
- FIG. 14A is a top view of a plasma apparatus illustrating one embodiment of the present invention
- FIG. 14B is a cross-sectional view thereof.
- FIG. 15 is a graph showing measurement results with SIMS.
- FIGS. 16A and 16B are cross-sectional STEM images.
- FIGS. 17A and 17B are graphs each showing evaluation results of electrical characteristics of a transistor.
- FIGS. 18A and 18B are graphs each showing evaluation results of electrical characteristics of a transistor.
- Embodiment 1 one embodiment of a semiconductor device and one embodiment of a method for manufacturing the semiconductor device will be described using FIGS. 1A to 1C , FIGS. 2A to 2D , and FIGS. 3A to 3D .
- a transistor including an oxide semiconductor film is described as an example of the semiconductor device.
- FIGS. 1A to 1C are a plan view and cross-sectional views of a bottom-gate transistor described as an example of a semiconductor device.
- FIG. 1A is the plan view;
- FIGS. 1B and 1C are the cross-sectional views along line A-B and line C-D in FIG. 1A , respectively.
- a gate insulating film 402 is omitted in FIG. 1A .
- a transistor 410 shown in FIGS. 1A to 1C includes, over a substrate 400 having an insulating surface, a gate electrode layer 401 , the gate insulating film 402 , an oxide semiconductor film 403 , a source electrode layer 405 a , and a drain electrode layer 405 b.
- heat treatment for dehydration or dehydrogenation and oxygen doping treatment are performed.
- the oxygen doping treatment is addition of an oxygen radical or an oxygen atom or an oxygen ion to a top surface and the bulk of the oxide semiconductor film.
- addition of an oxygen radical or an oxygen atom or an oxygen ion to the top surface and the bulk of the oxide semiconductor film, with oxygen plasma is also called oxygen plasma doping treatment.
- the substrate over which the oxide semiconductor film is formed is preferably biased.
- An insulator may be provided over the transistor 410 .
- an opening may be formed in the gate insulating film 402 or the like.
- a second gate electrode may be provided above the oxide semiconductor film 403 .
- the oxide semiconductor film 403 is preferably processed into an island shape but is not necessarily processed into the shape.
- FIGS. 2A to 2D illustrate an example of a method for manufacturing the transistor 410 .
- a conductive film is formed over the substrate 400 having an insulating surface, and then, subjected to a first photolithography step, so that the gate electrode layer 401 is formed.
- a resist mask may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.
- a substrate that can be used as the substrate 400 having an insulating surface there is no particular limitation on a substrate that can be used as the substrate 400 having an insulating surface as long as it has heat resistance enough to withstand heat treatment performed later.
- a glass substrate of barium borosilicate glass, aluminoborosilicate glass, or the like, a ceramic substrate, a quartz substrate, or a sapphire substrate can be used.
- a single crystal semiconductor substrate or a polycrystalline semiconductor substrate of silicon, carbon silicon, or the like; a compound semiconductor substrate of silicon germanium or the like; an SOI substrate; or the like can be used as the substrate 400 , or the substrate provided with a semiconductor element can be used as the substrate 400 .
- a flexible substrate may be used as the substrate 400 .
- a transistor including an oxide semiconductor film may be directly formed over the flexible substrate, or alternatively, a transistor including an oxide semiconductor film may be formed over another substrate and separated from another substrate to be transferred to the flexible substrate.
- a separation layer may be provided between the substrate and the transistor including the oxide semiconductor film.
- An insulating film serving as a base film may be provided between the substrate 400 and the gate electrode layer 401 .
- the base film prevents diffusion of an impurity element from the substrate 400 , and can be formed with a single-layer structure or a multi-layer structure using one or more of a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film.
- the gate electrode layer 401 can be formed with a single-layer structure or a multi-layer structure using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, and/or an alloy material which contains any of these materials as a main component by a plasma CVD method, a sputtering method, or the like.
- a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, and/or an alloy material which contains any of these materials as a main component by a plasma CVD method, a sputtering method, or the like.
- the gate insulating film 402 is formed over the gate electrode layer 401 .
- the gate insulating film 402 can be formed with a single-layer structure or a multi-layer structure using silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, hafnium oxide, and/or gallium oxide, and/or a combination thereof by a plasma CVD method, a sputtering method, or the like.
- an insulating material containing a component/components similar to the oxide semiconductor film formed later be used for the gate insulating film 402 .
- To contain the component(s) similar to the oxide semiconductor film means to contain at least one selected from a constituent element or constituent elements of the oxide semiconductor film.
- gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film.
- a multi-layer structure for the gate insulating film 402 As a far preferable example of a multi-layer structure for the gate insulating film 402 , a multi-layer structure of a film (hereinafter referred to as a film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film and a film (hereinafter referred to as a film b) containing a material/materials different from the component material(s) of the film a can be given.
- a film a containing the insulating material containing the component(s) similar to the oxide semiconductor film
- a film b containing a material/materials different from the component material(s) of the film a
- a transistor 460 in which a gate insulating film has a multi-layer structure is shown in FIG. 3B .
- a first gate insulating film 402 a and a second gate insulating film 402 b are stacked on the gate electrode layer 401 , and the oxide semiconductor film 403 is formed over the second gate insulating film 402 b .
- the second gate insulating film 402 b which is in contact with the oxide semiconductor film 403 is the film (film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film 403
- the first gate insulating film 402 a below the second gate insulating film 402 b is the film (film b) containing a material/materials different from the component material(s) of the second gate insulating film 402 b.
- a gallium oxide film can be used as the second gate insulating film 402 b and a silicon oxide film can be used as the first gate insulating film 402 a .
- a film containing an insulating material containing a component/components similar to the oxide semiconductor film be used as an insulating film 407 on and in contact with the oxide semiconductor film 403 .
- the films (films a) containing the insulating materials containing the components similar to the oxide semiconductor film are provided above and below and in contact with the oxide semiconductor film 403 and the film (film b) containing the material/materials different from the component material(s) of the films a is provided outside of the films a
- electrical charge can be preferentially trapped by a charge trapping center in an interface between the film a and the film b above and/or below the oxide semiconductor film 403 , so that charge trapping in an interface with the oxide semiconductor film can be sufficiently suppressed more effectively, leading to improvement in the reliability of a semiconductor device.
- a high-density plasma CVD method using microwaves (e.g., with a frequency of 2.45 GHz) is preferably employed because an insulating layer which is dense and can have high breakdown voltage and high quality. This is because when the highly purified oxide semiconductor is closely in contact with the high-quality gate insulating film, the interface state density can be reduced and interface properties can be favorable.
- an insulating layer may be formed, whose film quality and interface characteristics with the oxide semiconductor are improved by heat treatment which is performed after film formation.
- any film can be used as long as film quality as a gate insulating film is high, interface state density with an oxide semiconductor is decreased, and a favorable interface can be formed.
- the substrate 400 over which the gate electrode layer 401 is formed or the substrate 400 which has been subjected to the manufacturing process up to and including the step of forming the gate insulating film 402 be preheated in a preheating chamber of a sputtering apparatus as pretreatment for the formation of the oxide semiconductor film so that an impurity such as hydrogen and moisture adsorbed to the substrate 400 is eliminated and removed.
- a cryopump is preferable as an exhaustion unit provided in the preheating chamber. This preheating treatment can be omitted. Further, this preheating may be performed on the substrate 400 subjected to the manufacturing method up to and including the step of forming the source electrode layer 405 a and the drain electrode layer 405 b , before the formation of the insulating film 407 .
- any of the following oxide semiconductors can be used: a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor; a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor; a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Mg—O-based oxide semiconductor, or an In—Ga—O-based oxide semiconductor
- SiO 2 may be contained in the above oxide semiconductor.
- the In—Ga—Zn—O-based oxide semiconductor means an oxide film containing indium (In), gallium (Ga), and zinc (Zn) and there is no particular limitation on the stoichiometric proportion.
- the In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn.
- M represents one or more metal elements selected from Ga, Al, Mn, and Co.
- M may be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.
- an oxide semiconductor containing indium, an oxide semiconductor containing indium and gallium, or the like can be preferably used.
- the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target.
- the oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
- a target used for formation of the oxide semiconductor film by a sputtering method is, for example, an oxide target containing In 2 O 3 , Ga 2 O 3 , and ZnO at a composition ratio of 1:1:1 [molar ratio], so that an In—Ga—Zn—O film is formed.
- the filling rate of the oxide target is 90% to 100%, preferably 95% to 99.9%. With use of the metal oxide target with such a high filling rate, a dense oxide semiconductor film can be formed.
- a high-purity gas with an impurity such as hydrogen, water, hydroxyl, or hydride removed be used as a sputtering gas for forming the oxide semiconductor film.
- the substrate is held in a deposition chamber kept under reduced pressure, and the substrate temperature is set to temperatures higher than or equal to 100° C. and lower than or equal to 600° C., preferably higher than or equal to 200° C. and lower than or equal to 400° C.
- the substrate temperature is set to temperatures higher than or equal to 100° C. and lower than or equal to 600° C., preferably higher than or equal to 200° C. and lower than or equal to 400° C.
- an entrapment vacuum pump such as a cryopump, an ion pump, or a titanium sublimation pump is preferably used.
- a turbo molecular pump to which a cold trap is added may be used.
- a hydrogen atom, a compound containing a hydrogen atom, such as water, (more preferably, also a compound containing a carbon atom), and the like are removed, whereby the concentration of an impurity in the oxide semiconductor film formed in the deposition chamber can be reduced.
- the distance between the substrate and the target is 100 mm
- the pressure is 0.6 Pa
- the direct-current (DC) power is 0.5 kW
- the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%).
- a pulsed direct-current power source is preferably used since powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness comes to be uniform.
- the oxide semiconductor film is processed into an island-shaped oxide semiconductor film 441 by a second photolithography step (see FIG. 2A ).
- a resist mask used for forming the island-shaped oxide semiconductor film 441 may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.
- a step of forming the contact hole can be performed at the same time as processing of the oxide semiconductor film.
- the etching of the oxide semiconductor film may be dry etching, wet etching, or both dry etching and wet etching.
- an etchant used for wet etching of the oxide semiconductor film for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, or the like can be used.
- ITO07N produced by KANTO CHEMICAL CO., INC.
- KANTO CHEMICAL CO., INC. may be used as well.
- the oxide semiconductor film 441 is subjected to heat treatment.
- heat treatment excessive hydrogen (including water and a hydroxyl group) can be removed (dehydration or dehydrogenation), the structure of the oxide semiconductor film can be improved, and defect levels in an energy gap can be reduced.
- the temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C., or higher than or equal to 400° C. and less than the strain point of the substrate.
- the substrate is put in an electric furnace which is a kind of heat treatment apparatus and the oxide semiconductor film is subjected to heat treatment at 450° C. for one hour in a nitrogen atmosphere, and then, water and hydrogen are prevented from being mixed into the oxide semiconductor film by preventing the substrate from being exposed to the air; thus, the oxide semiconductor film 403 is obtained (see FIG. 2B ).
- the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object by heat conduction or heat radiation from a heater such as a resistance heater may be used.
- an RTA (rapid thermal anneal) apparatus such as a GRTA (gas rapid thermal anneal) apparatus or an LRTA (lamp rapid thermal anneal) apparatus can be used.
- An LRTA apparatus is an apparatus for heating an object by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.
- a GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas.
- the high temperature gas an inert gas which does not react with an object by heat treatment, such as nitrogen or a rare gas like argon, is used.
- GRTA may be performed, in which the substrate is moved into an inert gas heated at a high temperature of 650° C. to 700° C., and heated for several minutes, and then the substrate is moved out of the inert gas.
- an impurity such as water, hydrogen, and the like be not contained in nitrogen or the rare gas such as helium, neon, or argon.
- the purity of nitrogen or the rare gas such as helium, neon, or argon which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- a high-purity oxygen gas, a high-purity N 2 O gas, or ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system) may be introduced into the same furnace. It is preferable that water, hydrogen, or the like be not contained in the oxygen gas or the N 2 O gas.
- the purity of the oxygen gas or the N 2 O gas which is introduced into the heat treatment apparatus is preferably 6N or more, far preferably 7N or more (i.e., the impurity concentration in the oxygen gas or the N 2 O gas is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- the oxygen gas or the N 2 O gas acts to supply oxygen that is a main component of the oxide semiconductor and that is reduced by the step for removing an impurity for the dehydration or dehydrogenation, so that the oxide semiconductor film can be a high-purified, electrically i-type (intrinsic) oxide semiconductor film.
- the heat treatment can also be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film.
- the substrate is taken out of the heating apparatus and a photolithography step is performed on the oxide semiconductor film.
- the heat treatment may be performed after a source electrode layer and a drain electrode layer are formed over the island-shaped oxide semiconductor film as long as the oxide semiconductor film is formed before that heat treatment.
- oxygen doping treatment is performed on the dehydrated or dehydrogenated oxide semiconductor film 403 .
- oxygen 421 is supplied to the oxide semiconductor film 403 , so that oxygen is contained in the oxide semiconductor film 403 and/or the vicinity of the interface (see FIG. 2C ).
- the amount of oxygen contained is made to greater than the stoichiometric proportion of the oxide semiconductor film 403 , preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof.
- the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a single crystalline oxide semiconductor film is denoted by Y, preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an oxide semiconductor film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 2Z. Too much of oxygen content may lead to absorption of hydrogen into the oxide semiconductor film 403 , like a hydrogen storing alloy (hydrogen storage alloy).
- the oxygen 421 for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion. In this manner, the amount of oxygen is made to greater than that of hydrogen in the oxide semiconductor film.
- the composition of the oxide semiconductor film 403 is represented by InGaZnO x ; therefore, in the case where m is 1 (InGaZnO 4 ), the acceptable x is greater than 4 and less than 8, and in the case where m is 2 (InGaZn 2 O 5 ), the acceptable x is greater than 5 and less than 10.
- Such an oxygen-excessive region may exist in a part of the oxide semiconductor film (including its interface).
- oxygen is one of main component materials. Therefore, it is difficult to estimate the oxygen concentration of the oxide semiconductor film accurately with Secondary Ion Mass Spectroscopy (SIMS) or the like. That is, it is difficult to judge whether oxygen is intentionally added to the oxide semiconductor film or not.
- SIMS Secondary Ion Mass Spectroscopy
- Isotopes such as O 17 or O 18 exist in oxygen, and it is know that the existence proportions of them in nature are about 0.037% and about 0.204% of the whole oxygen atoms. Therefore, the concentration of such an isotope in the oxide semiconductor film can be estimated by SIMS or the like, and the measurement of such a concentration enables the oxygen concentration in the oxide semiconductor film to be estimated accurately. Thus, by measuring the concentration, whether oxygen is intentionally added to the oxide semiconductor film or not may be judged.
- a concentration of the isotope of oxygen D1(O 18 ) in an oxygen-added region and a concentration of the isotope of oxygen D2(O 18 ) in a no-oxygen-added region have a relationship represented by D1(O 18 )>D2(O 18 ).
- the oxygen 421 added to (contained in) the oxide semiconductor film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
- Oxygen for the doping may be supplied from a plasma generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421 can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the oxide semiconductor film 403 .
- heat treatment (at 150° C. to 470° C.) may be performed on the oxide semiconductor film 403 which has been subjected to the oxygen doping treatment.
- the heat treatment water or hydroxide generated by reaction between the oxygen 421 and the oxide semiconductor film 403 can be removed from the oxide semiconductor film 403 .
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C.
- a dew point preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- CRDS cavity ring down laser spectroscopy
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
- the oxide semiconductor film 403 is highly purified and is made electrically i-type (intrinsic).
- the oxygen doping treatment on the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film or after a source electrode layer and a drain electrode layer are stacked on the island-shaped oxide semiconductor film as long as the heat treatment is performed before that oxygen doping treatment.
- a conductive film for forming a source electrode layer and a drain electrode layer (including a wiring formed of the same layer as the source electrode layer and the drain electrode layer) is formed over the gate insulating film 402 and the oxide semiconductor film 403 .
- a metal film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film including any of the above elements as its component e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film
- a metal film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W or a metal nitride film including any of the above elements as its component (e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) can be used.
- a film of a high-melting-point metal such as Ti, Mo, or W or a metal nitride film thereof may be provided over or/and below the metal film such as an Al film or a Cu film to form the conductive film serving as the source electrode layer and the drain electrode layer.
- the conductive film used for the source electrode layer and the drain electrode layer may be formed using a conductive metal oxide.
- indium oxide (In 2 O 3 ), tin oxide (SnO 2 ), zinc oxide (ZnO), indium oxide-tin oxide alloy (In 2 O 3 —SnO 2 ; abbreviated to ITO), indium oxide-zinc oxide alloy (In 2 O 3 —ZnO), or any of these metal oxide materials in which silicon or silicon oxide is contained can be used.
- a resist mask is formed over the conductive film by a third photolithography step, and is selectively etched, so that the source electrode layer 405 a and the drain electrode layer 405 b are formed. Then, the resist mask is removed.
- an etching step may be performed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted to have a plurality of intensities.
- a resist mask formed with the use of a multi-tone mask has a plurality of thicknesses and further can be changed in shape by etching; therefore, the resist mask can be used in a plurality of etching steps for processing into different patterns. Therefore, a resist mask corresponding to at least two kinds of different patterns can be formed with one multi-tone mask.
- the number of photomasks can be reduced and the number of photolithography steps can be also reduced accordingly, whereby simplification of a manufacturing process can be realized.
- etching conditions be optimized so as not to etch and cut the oxide semiconductor film 403 when the conductive film is etched.
- part of the oxide semiconductor film 441 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove portion (a depressed portion) is formed.
- a Ti film is used as the conductive film and an In—Ga—Zn—O-based oxide semiconductor is used as the oxide semiconductor film 403 , and therefore, ammonium hydrogen peroxide (a mixture of ammonia, water, and hydrogen peroxide) is used as an etchant.
- ammonium hydrogen peroxide a mixture of ammonia, water, and hydrogen peroxide
- the number of carriers in the highly purified oxide semiconductor film 403 is significantly small (close to zero).
- the transistor 410 is a transistor including the oxide semiconductor film 403 which is highly purified and from which an impurity such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) is removed. Therefore, variation in the electric characteristics of the transistor 410 is suppressed and the transistor 410 is electrically stable.
- a transistor 440 in which an insulating film 407 and an insulating film 409 are provided over the oxide semiconductor film 403 and the source electrode layer 405 a and the drain electrode layer 405 b can be formed.
- the insulating film 407 can be formed to a thickness of at least 1 nm by a method by which an impurity such as water and hydrogen does not enter the insulating film 407 , such as a sputtering method, as appropriate.
- a method by which an impurity such as water and hydrogen does not enter the insulating film 407 such as a sputtering method, as appropriate.
- an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be typically used.
- a 200-nm-thick gallium oxide film is deposited as the insulating film 407 by a sputtering method.
- an insulating material containing a component/components similar to the oxide semiconductor film 403 be used for the insulating film 407 , like the gate insulating film 402 .
- gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film 403 .
- a multi-layer structure for the insulating film 407 As a far preferable example of a multi-layer structure for the insulating film 407 , a multi-layer structure of a film (hereinafter referred to as a film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film and a film (hereinafter referred to as a film b) containing a material/materials different from the component material(s) of the film a can be given.
- a film a containing the insulating material containing the component(s) similar to the oxide semiconductor film
- a film b containing a material/materials different from the component material(s) of the film a
- a multi-layer in which a gallium oxide film and a silicon oxide film are stacked on the oxide semiconductor film 403 side, or a multi-layer in which a gallium oxide film and a silicon nitride film are stacked on the oxide semiconductor film 403 side can be preferably used as the insulating film 407 .
- the substrate temperature at the time of the formation of the silicon oxide film may be higher than or equal to room temperature and lower than or equal to 300° C.; in this embodiment, the substrate temperature is 100° C. as an example.
- the silicon oxide film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
- a silicon oxide target or a silicon target can be used as a target.
- the silicon oxide film can be formed using a silicon target by a sputtering method in an atmosphere containing oxygen.
- an entrapment vacuum pump (such as a cryopump) is preferably used.
- a cryopump As an evacuation unit for removing moisture remaining in the deposition chamber of the insulating film 407 , a turbo molecular pump provided with a cold trap may be used.
- a high-purity gas from which an impurity such as hydrogen, water, hydroxyl group, or hydride be removed be used as a sputtering gas used for formation of the insulating film 407 .
- the heat treatment is performed at a temperature higher than or equal to 250° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 600° C. or less than a strain point of the substrate.
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas preferably contains water, hydrogen, or the like as less as possible.
- the purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- oxygen can be further supplied to the oxide semiconductor film from the insulating film 407 containing oxygen.
- the insulating film 409 it is preferable to form the insulating film 409 over the insulating film 407 , as a protective insulating film for blocking to prevent entrance of an impurity such as moisture or hydrogen into the oxide semiconductor film 403 and to prevent discharge of oxygen from the gate insulating film 402 , the oxide semiconductor film 403 , the insulating film 407 , and an interface thereof.
- the insulating film 409 it is preferable to use an inorganic insulating film such as a silicon nitride film, an aluminum oxide film, or the like.
- a silicon nitride film is formed by an RF sputtering method.
- An RF sputtering method is preferable as a method for forming the insulating film 409 because of its high productivity.
- Heat treatment may be performed after the insulating film is formed.
- the heat treatment may be performed at a temperature higher than or equal to 100° C. and lower than or equal to 200° C. in the air for 1 hour to 30 hours.
- This heat treatment may be performed at a fixed heating temperature; alternatively, the following change in the heating temperature may be conducted plural times: the heating temperature is increased from room temperature to a temperature higher than or equal to 100° C. and lower than or equal to 200° C. and then decreased to room temperature.
- FIGS. 3C and 3D Other structures of transistors including the oxide semiconductor film 403 including an oxygen-excessive region subjected to oxygen doping treatment are shown in FIGS. 3C and 3D .
- a transistor 420 illustrated in FIG. 3C is one of bottom-gate transistors referred to as a channel-protective (channel-stop) transistor and is also referred to as an inverted-staggered transistor.
- the transistor 420 includes, over the substrate 400 having an insulating surface, the gate electrode layer 401 , the gate insulating film 402 , the oxide semiconductor film 403 , an insulating film 427 functioning as a channel protective layer covering a channel formation region of the oxide semiconductor film 403 , the source electrode layer 405 a , and the drain electrode layer 405 b .
- the insulating film 409 is formed so as to cover the transistor 420 .
- a transistor 430 shown in FIG. 3D is a bottom-gate transistor and includes, over the substrate 400 having an insulating surface, the gate electrode layer 401 , the gate insulating film 402 , the source electrode layer 405 a , the drain electrode layer 405 b , and the oxide semiconductor film 403 .
- the insulating film 407 which covers the transistor 430 and is in contact with the oxide semiconductor film 403 is provided.
- the insulating film 409 is provided over the insulating film 407 .
- the gate insulating film 402 is provided on and in contact with the substrate 400 and the gate electrode 401 , and the source electrode 405 a and the drain electrode 405 b are provided on and in contact with the gate insulating film 402 . Further, the oxide semiconductor film 403 is provided over the gate insulating film 402 , the source electrode layer 405 a , and the drain electrode layer 405 b.
- the current in an off state (the off-state current) can be small.
- Such a transistor including an oxide semiconductor film subjected to oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
- the transistors 410 , 420 , 430 , and 440 each including the oxide semiconductor film 403 relatively high field-effect mobility can be obtained, which enables high-speed operation. Consequently, with the above transistor provided in a pixel portion of a semiconductor device having a display function, high-quality images can be displayed.
- the transistor including the highly purified oxide semiconductor film a driver circuit portion and a pixel portion can be formed over one substrate, whereby the number of components of the semiconductor device can be reduced.
- a semiconductor device including an oxide semiconductor which has stable electric characteristics, can be provided. Accordingly, a semiconductor device with high reliability can be provided.
- Embodiment 2 another embodiment of a semiconductor device and one embodiment of a method for manufacturing the semiconductor device will be described using FIGS. 4A to 4F and 5 A to 5 C.
- a transistor including an oxide semiconductor film will be described as an example of a semiconductor device.
- the same portions as and portions having functions similar to those described in Embodiment 1 can be formed in a manner similar to that described in Embodiment 1; therefore, description thereof is omitted. In addition, detailed description of the same portions is omitted.
- FIGS. 4A to 4F and 5 A to 5 C An example of a method for manufacturing a transistor 450 is shown in FIGS. 4A to 4F and 5 A to 5 C.
- oxygen doping treatment is performed plural times in a manufacturing process of the transistor 450 .
- a conductive film is formed over the substrate 400 having an insulating surface and is subjected to a first photolithography step to form the gate electrode layer 401 .
- the gate insulating film 402 is formed over the gate electrode layer 401 (see FIG. 4A ).
- oxygen doping treatment is performed on the gate insulating film 402 .
- oxygen 421 a is supplied to the gate insulating film 402 , so that oxygen is contained in the gate insulating film 402 and/or the vicinity of the interface (see FIG. 4B ).
- the amount of oxygen contained is made to greater than the stoichiometric proportion of the gate insulating film 402 , preferably to greater than the stoichiometric proportion and less than four times as much as the stoichiometric proportion thereof, far preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof.
- the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a material of the gate insulating film in the case where the material is a single crystal is denoted by Y, preferably to greater than Y and less than 4Y, far preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in a gate insulating film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 4Z, far preferably to greater than Z and less than 2Z.
- the oxygen 421 a for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion.
- an oxide insulating film including an oxygen-excessive region where x is greater than 1.5 and less than 6 is formed.
- an oxide insulating film including an oxygen-excessive region where x is greater than 2 and less than 8 is formed.
- Such an oxygen-excessive region may exist in a part of the gate insulating film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the gate insulating film.
- the oxygen 421 a added to (contained in) the gate insulating film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
- Oxygen for the doping may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421 a can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the gate insulating film 402 .
- heat treatment (at 150° C. to 470° C.) may be performed on the gate insulating film 402 which has been subjected to the oxygen doping treatment.
- the heat treatment water or hydroxide generated by reaction between the oxygen 421 a and the gate insulating film 402 can be removed from the gate insulating film 402 .
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C.
- a dew point preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- CRDS cavity ring down laser spectroscopy
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
- the substrate 400 over which the gate electrode layer 401 is formed or the substrate 400 which has been subjected to the manufacturing process up to and including the step for forming the gate insulating film 402 be preheated in a preheating chamber of a sputtering apparatus as pretreatment for the formation of the oxide semiconductor film, so that impurities such as hydrogen and moisture adsorbed to the substrate 400 are eliminated and removed.
- a cryopump is preferable as an exhaustion unit provided in the preheating chamber. This preheating treatment is not necessarily performed.
- this preheating may be performed on the substrate 400 which has been subjected to the manufacturing process up to and including the step for forming the source electrode layer 405 a and the drain electrode layer 405 b , before the formation of the insulating film 407 .
- the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target.
- the oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
- the target used for formation of the oxide semiconductor film by a sputtering method is, for example, an oxide target containing In 2 O 3 , Ga 2 O 3 , and ZnO at a composition ratio of 1:1:1 [molar ratio], so that an In—Ga—Zn—O film can be formed.
- a high-purity gas from which an impurity such as hydrogen, water, a hydroxyl group, or hydride is removed be used as a sputtering gas used for forming the oxide semiconductor film.
- the distance between the substrate and the target is 100 mm
- the pressure is 0.6 Pa
- the direct-current (DC) power is 0.5 kW
- the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%).
- a pulsed direct-current power source is preferably used, in which case powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness can be uniform.
- the oxide semiconductor film is processed into the island-shaped oxide semiconductor film 441 through a second photolithography step (see FIG. 4C ).
- the oxide semiconductor film 441 is subjected to heat treatment.
- heat treatment excessive hydrogen (including water and a hydroxyl group) can be removed (dehydration or dehydrogenation), the structure of the oxide semiconductor film can be improved, and defect levels in an energy gap can be reduced.
- the temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C., or higher than or equal to 400° C. and lower than the strain point of the substrate.
- the substrate is put in an electric furnace which is a kind of heat treatment apparatus and the oxide semiconductor film is subjected to heat treatment at 450° C. for one hour in a nitrogen atmosphere, and then, water and hydrogen are prevented from being mixed into the oxide semiconductor film by preventing the substrate from being exposed to the air; thus, the oxide semiconductor film 403 is obtained (see FIG. 4D ).
- the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object by heat conduction or heat radiation from a heater such as a resistance heater may be used.
- GRTA may be performed, in which the substrate is moved into an inert gas heated at a high temperature of 650° C. to 700° C., and heated for several minutes, and then the substrate is moved out of the inert gas.
- the heat treatment can also be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film.
- the substrate is taken out of the heating apparatus and a photolithography step is performed on the oxide semiconductor film.
- the heat treatment may be performed after a source electrode layer and a drain electrode layer are formed over the island-shaped oxide semiconductor film as long as the oxide semiconductor film is formed before that heat treatment.
- oxygen doping treatment is performed on the dehydrated or dehydrogenated oxide semiconductor film 403 .
- oxygen 421 b is supplied to the oxide semiconductor film 403 , so that oxygen is contained in the oxide semiconductor film 403 and/or the vicinity of the interface (see FIG. 4E ).
- the amount of oxygen contained is made to greater than the stoichiometric proportion of the oxide semiconductor film 403 , preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion.
- the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a single crystalline oxide semiconductor film is denoted by Y, preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an oxide semiconductor film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 2Z. Too much of oxygen content may lead to absorption of hydrogen into the oxide semiconductor film 403 , like a hydrogen storing alloy (hydrogen storage alloy).
- the oxygen 421 b for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion.
- the composition of the oxide semiconductor film 403 is represented by InGaZnO x ; therefore, in the case where m is 1 (InGaZnO 4 ), the acceptable x is greater than 4 and less than 8, and in the case where m is 2 (InGaZn 2 O 5 ), the acceptable x is greater than 5 and less than 10.
- Such an oxygen-excessive region may exist in a part of the oxide semiconductor film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the oxide semiconductor film.
- the oxygen 421 b added to (contained in) the oxide semiconductor film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
- Oxygen for the doping may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421 b can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the oxide semiconductor film 403 .
- heat treatment (at 150° C. to 470° C.) may be performed on the oxide semiconductor film 403 which has been subjected to the oxygen doping treatment.
- the heat treatment water or hydroxide generated by reaction between the oxygen 421 b and the oxide semiconductor film 403 can be removed from the oxide semiconductor film 403 .
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C.
- a dew point preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- CRDS cavity ring down laser spectroscopy
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
- the oxide semiconductor film 403 is highly purified and is made electrically i-type (intrinsic).
- the oxygen doping treatment on the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film or after a source electrode layer and a drain electrode layer are stacked on the island-shaped oxide semiconductor film as long as the heat treatment is performed before that oxygen doping treatment.
- a conductive film for forming a source electrode layer and a drain electrode layer (including a wiring formed of the same layer as the source electrode layer and the drain electrode layer) is formed over the gate insulating film 402 and the oxide semiconductor film 403 .
- a resist mask is formed over the conductive film by a third photolithography step, and is selectively etched, so that the source electrode layer 405 a and the drain electrode layer 405 b are formed. Then, the resist mask is removed (see FIG. 4F ).
- etching conditions be optimized so as not to etch and cut the oxide semiconductor film 403 when the conductive film is etched.
- part of the oxide semiconductor film 441 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove portion (a depressed portion) is formed.
- a Ti film is used as the conductive film and an In—Ga—Zn—O-based oxide semiconductor is used as the oxide semiconductor film 403 , and therefore, ammonium hydrogen peroxide (a mixture of ammonia, water, and hydrogen peroxide) is used as an etchant.
- ammonium hydrogen peroxide a mixture of ammonia, water, and hydrogen peroxide
- the number of carriers in the highly purified oxide semiconductor film 403 is significantly small (close to zero).
- the insulating film 407 is formed over the oxide semiconductor film 403 , the source electrode layer 405 a , and the drain electrode layer 405 b (see FIG. 5A ).
- the insulating film 407 can be formed to a thickness of at least 1 nm by a method by which an impurity such as water and hydrogen does not enter the insulating film 407 , such as a sputtering method, as appropriate.
- an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be typically used.
- an insulating material containing a component/components similar to the oxide semiconductor film 403 be used for the insulating film 407 , like the gate insulating film 402 .
- gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film 403 .
- the heat treatment is performed at a temperature higher than or equal to 250° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 600° C. or less than a strain point of the substrate.
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas preferably contains water, hydrogen, or the like as less as possible.
- the purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- oxygen can be further supplied to the oxide semiconductor film from the insulating film 407 containing oxygen.
- oxygen doping treatment is performed on the insulating film 407 .
- oxygen 421 c is supplied to the insulating film 407 , so that oxygen is contained in the oxide semiconductor film 403 , the gate insulating film 402 , and/or the vicinity of the interface(s) of the oxide semiconductor film 403 and/or the gate insulating film 402 (see FIG. 5B ).
- the amount of oxygen contained is made to greater than the stoichiometric proportion of the insulating film 407 , preferably to greater than the stoichiometric proportion and less than four times as much as the stoichiometric proportion thereof, far preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a material of the insulating film in the case where the material is a single crystal is denoted by Y, preferably to greater than Y and less than 4Y, far preferably to greater than Y and less than 2Y.
- the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an insulating film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 4Z, far preferably to greater than Z and less than 2Z.
- the oxygen 421 c for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion.
- an insulating film including an oxygen-excessive region where x is greater than 1.5 and less than 6 is formed.
- an insulating film including an oxygen-excessive region where x is greater than 2 and less than 8 is formed.
- Such an oxygen-excessive region may exist in a part of the insulating film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the insulating film.
- the oxygen 421 c added to (contained in) the insulating film 407 preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
- Oxygen for the doping may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421 c can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the insulating film 407 .
- heat treatment (at 150° C. to 470° C.) may be performed on the insulating film 407 which has been subjected to the oxygen doping treatment.
- the heat treatment water or hydroxide generated by reaction between the oxygen 421 c and the insulating film 407 can be removed from the insulating film 407 .
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm ( ⁇ 55° C.
- a dew point preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- CRDS cavity ring down laser spectroscopy
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
- the insulating film 409 it is preferable to form the insulating film 409 over the insulating film 407 , as a protective insulating film for blocking to prevent entrance of an impurity such as moisture or hydrogen into the oxide semiconductor film 403 .
- the insulating film 409 it is preferable to use an inorganic insulating film such as a silicon nitride film, an aluminum oxide film, or the like.
- a silicon nitride film is formed by an RF sputtering method.
- An RF sputtering method is preferable as a method for forming the insulating film 409 because of its high productivity.
- Heat treatment may be performed after the insulating film is formed.
- the heat treatment may be performed at a temperature higher than or equal to 100° C. and lower than or equal to 200° C. in the air for 1 hour to 30 hours.
- This heat treatment may be performed at a fixed heating temperature; alternatively, the following change in the heating temperature may be conducted plural times: the heating temperature is increased from room temperature to a temperature higher than or equal to 100° C. and lower than or equal to 200° C. and then decreased to room temperature.
- the transistor 450 is a transistor including the oxide semiconductor film 403 which is highly purified and from which an impurity such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) is removed. Therefore, variation in the electric characteristics of the transistor 450 is suppressed and the transistor 450 is electrically stable.
- the current value in an off-state (off-current value) thereof can be low.
- the oxygen doping treatment can be performed not only on the oxide semiconductor film 403 but also on the gate insulating film 402 and/or the insulating film 407 .
- the oxygen doping treatment may be performed on either one or both of the gate insulating film 402 and the insulating film 407 .
- heat treatment (at 150° C. to 470° C.) may be performed after the oxygen doping treatment is performed.
- the heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the dew point is less than or equal to ⁇ 60° C., preferably less than or equal to ⁇ 80° C. in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like).
- the atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
- Such a transistor including an oxide semiconductor film subjected to oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
- the transistor 450 including the oxide semiconductor film 403 relatively high field-effect mobility can be obtained, which enables high-speed operation. Consequently, with the above transistor provided in a pixel portion of a semiconductor device having a display function, high-quality images can be displayed.
- the transistor including the highly purified oxide semiconductor film a driver circuit portion and a pixel portion can be formed over one substrate, whereby the number of components of the semiconductor device can be reduced.
- a semiconductor device including an oxide semiconductor which has stable electric characteristics, can be provided. Accordingly, a semiconductor device with high reliability can be provided.
- Embodiment 3 another embodiment of a semiconductor device will be described using FIGS. 13A to 13D .
- the same portions as and portions having functions similar to those described in Embodiment 1 or 2 can be formed in a manner similar to that described in Embodiment 1 or 2; therefore, description thereof is omitted. In addition, detailed description of the same portions is omitted.
- a source electrode layer and/or a drain electrode layer of a transistor are/is connected to a conductive layer (such as a wiring layer or a pixel electrode layer). Note that this embodiment can also be applied to any of the transistors described in Embodiments 1 and 2.
- a transistor 470 includes, over the substrate 400 having an insulating surface, the gate electrode layer 401 , the gate insulating film 402 , the oxide semiconductor film 403 , the source electrode layer 405 a , and the drain electrode layer 405 b.
- oxygen doping is performed on the oxide semiconductor film 403 which has been subjected to the heat treatment for dehydration or dehydrogenation also in a manufacturing process of the transistor 470 .
- the transistor 470 in this embodiment is an example in which the source electrode layer 405 a and the drain electrode layer 405 b are formed over the oxide semiconductor film 403 which has been subjected to heat treatment for dehydration or dehydrogenation, and then oxygen doping is performed thereon.
- an oxygen radical, an oxygen atom, or an oxygen ion reaches and is delivered to (is introduced to the vicinity of top surfaces of) the source electrode layer 405 a and the drain electrode layer 405 b in addition to the oxide semiconductor film 403 . Consequently, as shown in FIG. 13A , the top surfaces of the source electrode layer 405 a and the drain electrode layer 405 b irradiated with the oxygen radical, the oxygen atom, or the oxygen ion may be oxidized to form metal oxide regions 404 a and 404 b between the insulating film 407 and the source electrode layer 405 a and the drain electrode layer 405 b .
- the metal oxide regions 404 a and 404 b may each be in the form of a film.
- the insulating film 407 and the insulating film 409 are sequentially stacked over the transistor 470 (see FIG. 13B ).
- openings 455 a and 455 b where, over the insulating film 409 , conductive layers connected to the source electrode layer 405 a and the drain electrode layer 405 b are formed are preferably formed so that parts of the metal oxide regions 404 a and 404 b having high resistance are removed to expose parts of the source electrode layer 405 a and the drain electrode layer 405 b having low resistance (see FIG. 13C ). Parts of the insulating film 409 , the insulating film 407 , and the metal oxide regions 404 a and 404 b are removed to form the openings 455 a and 455 b .
- the source electrode layer 405 a and the drain electrode layer 405 b are partly removed to have depressions.
- the oxygen concentrations of regions of the source electrode layer 405 a and the drain electrode layer 405 b , which are exposed on the bottom surfaces of the depressions, are lower than those of regions of the metal oxide regions 404 a and 404 b , which are in the top surfaces of the source electrode layer 405 a and the drain electrode layer 405 b.
- the parts of the source electrode layer 405 a and the drain electrode layer 405 b may be removed from the top surfaces by a thickness one half or less than (preferably one third or less than) the thickness of the source electrode layer 405 a , the drain electrode layer 405 b in the openings 455 a and 455 b to remove parts of the metal oxide regions 404 a and 404 b formed in the surfaces of the source electrode layer 405 a and the drain electrode layer 405 b.
- conductive layers 456 a and 456 b are formed in contact with the source electrode layer 405 a and the drain electrode layer 405 b exposed in the openings 455 a and 455 b (see FIG. 13D ).
- the conductive layers 456 a and 456 b are formed directly in contact with the source electrode layer 405 a and the drain electrode layer 405 b having low resistance without the metal oxide regions 404 a and 404 b having high resistance provided therebetween; thus, favorable electrical connection (contact) can be made.
- An insulating film may be formed over the conductive layers 456 a and 456 b , as a protective layer to cover the transistor 470 . Moreover, by covering the insulating film, it is possible to prevent impurities such as hydrogen and moisture from entering the oxide semiconductor film 403 from the openings 455 a and 455 b.
- Embodiment 4 an example of a plasma apparatus (also referred to as an ashing apparatus) which can be used for oxygen doping treatment will be described.
- This apparatus is industrially suitable as compared to an ion implantation apparatus or the like because the apparatus can be applicable for a large-sized substrate of the fifth generation or later, for example.
- FIG. 14A illustrates an example of a top view of a single wafer multi-chamber equipment.
- FIG. 14B illustrates an example of a cross-sectional view of a plasma apparatus (also referred to as an ashing apparatus) used for oxygen doping.
- a plasma apparatus also referred to as an ashing apparatus
- the single wafer multi-chamber equipment illustrated in FIG. 14A includes three plasma apparatuses 10 each of which is shown in FIG. 14B , a substrate supply chamber 11 including three cassette ports 14 for holding a process substrate, a load lock chamber 12 , a transfer chamber 13 , and the like.
- a substrate supplied to the substrate supply chamber is transferred through the load lock chamber 12 and the transfer chamber 13 to a vacuum chamber 15 in the plasma apparatus and is subjected to oxygen doping.
- the substrate which has been subjected to oxygen doping is transferred from the plasma apparatus, through the load lock chamber and the transfer chamber, to the substrate supply chamber.
- a transfer robot for transferring a process substrate is provided in each of the substrate supply chamber 11 and the transfer chamber 13 .
- the plasma apparatus 10 includes the vacuum chamber 15 .
- a plurality of gas outlets and an ICP coil (an inductively coupled plasma coil) 16 which is a generation source of plasma are provided on a top portion of the vacuum chamber 15 .
- the number of gas outlets arranged in a center portion, seen from the top of the plasma apparatus 10 is 12.
- Each of the gas outlets is connected to a gas supply source for supplying an oxygen gas, via a gas flow path 17 .
- the gas supply source includes a mass flow controller and the like and can supply an oxygen gas to the gas flow pass 17 at a desired flow rate (which is greater than 0 sccm and less than or equal to 1000 sccm).
- the oxygen gas supplied from the gas supply source is supplied from the gate flow pass 17 , through the 12 gas outlets, into the vacuum chamber 15 .
- the ICP coil 16 includes a plurality of strip-like conductors each of which has a spiral form. One end of each of the conductors is electrically connected to a first high-frequency power source 18 (13.56 MHz) via a matching circuit for controlling impedance, and the other end thereof is grounded.
- a substrate stage 19 functioning as a bottom electrode is provided in a lower portion of the vacuum chamber.
- a process substrate 20 is held on the substrate stage so as to be detachable.
- the substrate stage 19 is provided with a heater as a heating system and a He gas flow pass as a cooling system.
- the substrate stage is connected to a second high-frequency power source 21 (3.2 MHz) for applying a substrate bias voltage.
- the vacuum chamber 15 is provided with an exhaust port and an automatic pressure control valve (also referred to as an APC) 22 .
- the APC is connected to a turbo molecular pump 23 and connected to a dry pump 24 via the turbo molecular pump 23 .
- the APC controls the inside pressure of the vacuum chamber.
- the turbo molecular pump 23 and the dry pump 24 reduce the inside pressure of the vacuum chamber 15 .
- the inside pressure of the vacuum chamber 15 is held at a desired pressure by operating the turbo molecular pump 23 , the dry pump 24 , and the like, and then, the process substrate 20 is installed on the substrate stage in the vacuum chamber 15 .
- the process substrate 20 held on the substrate stage has at least an oxide semiconductor film or a gate insulating film.
- the inside pressure of the vacuum chamber 15 is held at 1.33 Pa.
- the flow rate of the oxygen gas supplied through the gas outlets into the vacuum chamber 15 is set at 250 sccm.
- a high-frequency power is applied from the first high-frequency power source 18 to the ICP coil 16 , thereby generating plasma. Then, a state in which plasma is being generated is kept for a certain period (longer than or equal to 30 seconds and shorter than or equal to 600 seconds).
- the high-frequency power applied to the ICP coil 16 is greater than or equal to 1 kW and less than or equal to 10 kW. In this embodiment, the high-frequency power is set at 6000 W.
- a substrate bias voltage may be applied from the second high-frequency power source 21 to the substrate stage. In this embodiment, the power used for applying the substrate bias voltage is set at 1000 W.
- the state in which plasma is being generated is kept for 60 seconds and then, the process substrate 20 is transferred from the vacuum chamber 15 .
- oxygen doping can be performed on the oxide semiconductor film or the gate insulating film provided for the process substrate 20 .
- Embodiment 5 can be implemented in appropriate combination with any of the structures described in the other embodiments.
- a semiconductor device having a display function (also referred to as a display device) can be manufactured using the transistor exemplified in any of Embodiments 1 to 3. Moreover, part or all of driver circuitry which include the transistor can be formed over a substrate where a pixel portion is formed, whereby a system-on-panel can be obtained.
- a sealant 4005 is provided so as to surround a pixel portion 4002 provided over a first substrate 4001 , and the pixel portion 4002 is sealed with a second substrate 4006 .
- a signal line driver circuit 4003 and a scan line driver circuit 4004 which are formed using a single crystal semiconductor film or a polycrystalline semiconductor film over another substrate are mounted in a region that is different from the region surrounded by the sealant 4005 over the first substrate 4001 .
- Various signals and potentials are supplied to the signal line driver circuit 4003 , the scan line driver circuit 4004 , and the pixel portion 4002 from flexible printed circuits (FPCs) 4018 a and 4018 b.
- FPCs flexible printed circuits
- the sealant 4005 is provided so as to surround the pixel portion 4002 and the scan line driver circuit 4004 which are provided over the first substrate 4001 .
- the second substrate 4006 is provided over the pixel portion 4002 and the scan line driver circuit 4004 . Accordingly, the pixel portion 4002 and the scan line driver circuit 4004 are sealed together with the display element, by the first substrate 4001 , the sealant 4005 , and the second substrate 4006 .
- the signal line driver circuit 4003 which is formed using a single crystal semiconductor film or a polycrystalline semiconductor film over another substrate is mounted in a region that is different from the region surrounded by the sealant 4005 over the first substrate 4001 .
- various signals and potential are supplied to the signal line driver circuit 4003 , the scan line driver circuit 4004 , and the pixel portion 4002 from an FPC 4018 .
- FIGS. 12B and 12C each illustrate an example in which the signal line driver circuit 4003 is separately formed and mounted on the first substrate 4001 , an embodiment of the present invention is not limited to this structure.
- the scan line driver circuit may be separately formed and then mounted, or only part of the signal line driver circuit or part of the scan line driver circuit may be separately formed and then mounted.
- a connection method of a separately formed driver circuit is not particularly limited; a chip on glass (COG) method, a wire bonding method, a tape automated bonding (TAB) method, or the like can be used.
- FIG. 12A illustrates an example in which the signal line driver circuit 4003 and the scan line driver circuit 4004 are mounted by a COG method.
- FIG. 12B illustrates an example in which the signal line driver circuit 4003 is mounted by a COG method.
- FIG. 12C illustrates an example in which the signal line driver circuit 4003 is mounted by a TAB method.
- the display device includes a panel in which the display element is sealed, and a module in which an IC or the like including a controller is mounted on the panel.
- the display device in this specification means an image display device, a display device, or a light source (including a lighting device). Furthermore, the display device also includes the following in its category: a module to which a connector such as an FPC, a TAB tape, or a TCP is attached; a module having a TAB tape or a TCP at the tip of which a printed wiring board is provided; and a module in which an integrated circuit (IC) is directly mounted on a display element by a COG method.
- a module to which a connector such as an FPC, a TAB tape, or a TCP is attached
- a module having a TAB tape or a TCP at the tip of which a printed wiring board is provided and a module in which an integrated circuit (IC) is directly mounted on a display element by a COG method.
- IC integrated circuit
- the pixel portion and the scan line driver circuit provided over the first substrate include a plurality of transistors; any of the transistors which are described in Embodiments 1 to 3 can be applied thereto.
- a liquid crystal element also referred to as a liquid crystal display element
- a light-emitting element also referred to as a light-emitting display element
- the light-emitting element includes, in its category, an element whose luminance is controlled by a current or a voltage, and specifically includes, in its category, an inorganic electroluminescent (EL) element, an organic EL element, and the like.
- a display medium whose contrast is changed by an electric effect, such as electronic ink, can be used.
- FIGS. 6 to 8 correspond to cross-sectional views along line M-N in FIG. 12B .
- the semiconductor device includes a connection terminal electrode 4015 and a terminal electrode 4016 .
- the connection terminal electrode 4015 and the terminal electrode 4016 are electrically connected to a terminal included in the FPC 4018 via an anisotropic conductive film 4019 .
- connection terminal electrode 4015 is formed using the same conductive film as a first electrode layer 4030
- terminal electrode 4016 is formed using the same conductive film as source and drain electrodes of a transistor 4010 and a transistor 4011 .
- the pixel portion 4002 and the scan line driver circuit 4004 which are provided over the first substrate 4001 include a plurality of transistors.
- the transistor 4010 included in the pixel portion 4002 and the transistor 4011 included in the scan line driver circuit 4004 are illustrated as an example.
- insulating films 4020 and 4024 are provided over the transistor 4010 and the transistor 4011 .
- an insulating layer 4021 is further provided.
- An insulating film 4023 is an insulating film functioning as a base film.
- any transistors described in Embodiments 1 to 3 can be applied to the transistor 4010 and the transistor 4011 . Variation in electric characteristics of the transistor 4010 and the transistor 4011 is suppressed and the transistor 4010 and the transistor 4011 are electrically stable. Accordingly, highly reliable semiconductor devices can be provided as the semiconductor devices illustrated in FIGS. 6 to 8 .
- a conductive layer is provided over the insulating layer so as to overlap with a channel formation region of an oxide semiconductor film in the transistor 4011 for the driver circuit.
- the potential of the conductive layer may be the same as or different from that of a gate electrode of the transistor 4011 , and the conductive layer can be functioned as a second gate electrode.
- the potential of the conductive layer may be GND, 0V, or in a floating state.
- the conductive layer also functions to block an external electric field, that is, to prevent an external electric field (particularly, to prevent static electricity) from effecting the inside (a circuit portion including a transistor).
- the blocking function of the conductive layer enables the variation in electrical characteristics of the transistor due to the effect of external electric field such as static electricity to be prevented.
- the transistor 4010 provided in the pixel portion 4002 is electrically connected to the display element in a display panel.
- a variety of display elements can be used as the display element as long as display can be performed.
- a liquid crystal element 4013 which is a display element includes the first electrode layer 4030 , the second electrode layer 4031 , and a liquid crystal layer 4008 .
- An insulating film 4032 and an insulating film 4033 which serve as alignment films are provided so that the liquid crystal layer 4008 is provided therebetween.
- the second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 are stacked with the liquid crystal layer 4008 provided therebetween.
- a spacer 4035 is a columnar spacer obtained by selective etching of an insulating film and is provided in order to control the thickness (a cell gap) of the liquid crystal layer 4008 .
- the spacer is not limited to a columnar spacer, and, for example, a spherical spacer may be used.
- thermotropic liquid crystal a low-molecular liquid crystal, a high-molecular liquid crystal, a polymer dispersed liquid crystal, a ferroelectric liquid crystal, an anti-ferroelectric liquid crystal, or the like
- a liquid crystal material exhibits a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on a condition.
- a liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used.
- a blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase while temperature of cholesteric liquid crystal is increased. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which 5 weight percent or more of a chiral material is mixed is used for the liquid crystal layer in order to improve the temperature range.
- the liquid crystal composition which includes a liquid crystal exhibiting a blue phase and a chiral agent has a short response time of 1 msec or less, has optical isotropy, which makes the alignment process unneeded, and has a small viewing angle dependence.
- the specific resistivity of the liquid crystal material is 1 ⁇ 10 9 ⁇ cm or more, preferably 1 ⁇ 10 11 ⁇ cm or more, far preferably 1 ⁇ 10 12 ⁇ cm or more.
- the value of the specific resistivity in this specification is measured at 20° C.
- the size of a storage capacitor formed in the liquid crystal display device is set considering the leakage current of the transistor provided in the pixel portion or the like so that electrical charge can be held for a predetermined period.
- the transistor including the highly purified oxide semiconductor film it is enough to provide a storage capacitor having a capacitance that is 1 ⁇ 3 or less, preferably 1 ⁇ 5 or less of a liquid crystal capacitance of each pixel.
- the current in an off state (the off-state current) can be made small. Accordingly, an electrical signal such as an image signal can be held for a long period, and a writing interval can be set long in a state where power is being supplied. Accordingly, the frequency of refresh operation can be reduced, which leads to an effect of suppressing power consumption.
- the transistor including the highly purified oxide semiconductor film used in this embodiment can have relatively high field-effect mobility and thus is capable of high speed operation. Therefore, by using the transistor in the pixel portion of the liquid crystal display device, a high-quality image can be displayed. In addition, since the transistors can be separately provided in a driver circuit portion and a pixel portion over one substrate, the number of components of the liquid crystal display device can be reduced.
- a twisted nematic (TN) mode for the liquid crystal display device, a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, or the like
- TN twisted nematic
- IPS in-plane-switching
- FFS fringe field switching
- ASM axially symmetric aligned micro-cell
- OBC optical compensated birefringence
- FLC ferroelectric liquid crystal
- AFLC antiferroelectric liquid crystal
- a normally black liquid crystal display device such as a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be used.
- the vertical alignment mode is a method of controlling alignment of liquid crystal molecules of a liquid crystal display panel, in which liquid crystal molecules are aligned vertically to a panel surface when no voltage is applied.
- Some examples are given as the vertical alignment mode.
- a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, an advanced super view (ASV) mode, or the like can be used.
- MVA multi-domain vertical alignment
- PVA patterned vertical alignment
- ASV advanced super view
- a black matrix (a light-blocking layer), an optical member (an optical substrate) such as a polarizing member, a retardation member, or an anti-reflection member, and the like are provided as appropriate.
- an optical member such as a polarizing member, a retardation member, or an anti-reflection member, and the like
- circular polarization may be provided with a polarizing substrate and a retardation substrate.
- a backlight, a side light, or the like may be used as the light source.
- a field-sequential driving method enables color display without using a color filter.
- color elements controlled in a pixel for color display are not limited to three colors of R, G, and B (R, G, and B correspond to red, green, and blue, respectively).
- R, G, B, and W corresponds to white
- R, G, B, and one or more of yellow, cyan, magenta, and the like can be used.
- the sizes of display regions may be different between respective dots of the color elements.
- the present invention is not limited to the application to a display device for color display but can also be applied to a display device for monochrome display.
- a light-emitting element utilizing electroluminescence can be used as the display element included in the display device.
- Light-emitting elements utilizing electroluminescence are classified depending on whether a light-emitting material is an organic compound or an inorganic compound. In general, the former is referred to as an organic EL element, and the latter is referred to as an inorganic EL element.
- an organic EL element In an organic EL element, by application of voltage to a light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and current flows. The carriers (electrons and holes) are recombined, and thus, the light-emitting organic compound is excited. The light-emitting organic compound returns to a ground state from the excited state, thereby emitting light. Owing to such a mechanism, this light-emitting element is referred to as a current-excitation light-emitting element.
- the inorganic EL elements are classified depending on the element structure into a dispersion-type inorganic EL element and a thin-film inorganic EL element.
- a dispersion-type inorganic EL element has a light-emitting layer where particles of a light-emitting material are dispersed in a binder, and its light emission mechanism is donor-acceptor recombination type light emission that utilizes a donor level and an acceptor level.
- a thin-film inorganic EL element has a structure where a light-emitting layer is sandwiched between dielectric layers, which are further sandwiched between electrodes, and its light emission mechanism is localized type light emission that utilizes inner-shell electron transition of metal ions. An example using an organic EL element as a light-emitting element is described here.
- At least one of a pair of electrodes is transparent.
- the transistor and the light-emitting element are provided over the substrate.
- the light-emitting element have the following emission structure: a top emission structure in which light emission is extracted through the surface opposite to the substrate; a bottom emission structure in which light emission is extracted through the surface on the substrate side; or a dual emission structure in which light emission is extracted through the surface opposite to the substrate and the surface on the substrate side.
- FIG. 7 An example of a light-emitting device in which a light-emitting element is used as the display element is illustrated in FIG. 7 .
- a light-emitting element 4513 which is a display element is electrically connected to the transistor 4010 provided in the pixel portion 4002 .
- a structure of the light-emitting element 4513 is not limited to the stacked-layer structure including the first electrode layer 4030 , an electroluminescent layer 4511 , and the second electrode layer 4031 , which is shown in FIG. 7 .
- the structure of the light-emitting element 4513 can be changed as appropriate depending on a direction in which light is extracted from the light-emitting element 4513 , or the like.
- a partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. It is particularly preferable that the partition wall 4510 be formed using a photosensitive resin material to have an opening over the first electrode layer 4030 so that the sidewall of the opening has a tilted surface with continuous curvature.
- the electroluminescent layer 4511 may be formed using a single layer or a plurality of layers stacked.
- a protective film may be formed over the second electrode layer 4031 and the partition wall 4510 in order to prevent entry of oxygen, hydrogen, moisture, carbon dioxide, or the like into the light-emitting element 4513 .
- a silicon nitride film, a silicon nitride oxide film, a diamond like carbon (DLC) film, or the like can be formed.
- a filler 4514 is provided for sealing.
- a panel be packaged (sealed) with a protective film (such as a laminate film or an ultraviolet curable resin film) or a cover material with high air-tightness and little degasification so that the panel is not exposed to the outside air, in this manner.
- a protective film such as a laminate film or an ultraviolet curable resin film
- a cover material with high air-tightness and little degasification so that the panel is not exposed to the outside air, in this manner.
- an ultraviolet curable resin or a thermosetting resin can be used as well as an inert gas such as nitrogen or argon.
- an inert gas such as nitrogen or argon.
- PVC polyvinyl chloride
- acrylic polyimide
- epoxy resin polyimide
- silicone resin polyimide
- EVA ethylene vinyl acetate
- nitrogen is used for the filler.
- an optical film such as a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate (a quarter-wave plate or a half-wave plate), or a color filter, may be provided as appropriate for a light-emitting surface of the light-emitting element.
- the polarizing plate or the circularly polarizing plate may be provided with an anti-reflection film. For example, anti-glare treatment by which reflected light can be diffused by surface roughness so as to reduce the glare can be performed.
- an electronic paper in which electronic ink is driven can be provided as the display device.
- the electronic paper is also called an electrophoretic display device (electrophoretic display) and has advantages in that it exhibits the same level of readability as regular paper, it exhibits less power consumption than other display devices, and it can be in a thin and light form.
- An electrophoretic display device can have various modes.
- An electrophoretic display device contains a plurality of microcapsules dispersed in a solvent or a solute, each microcapsule containing first particles which are positively charged and second particles which are negatively charged. By applying an electric field to the microcapsules, the particles in the microcapsules move in opposite directions to each other and only the color of the particles gathering on one side is displayed. Note that the first particles and the second particles each contain pigment and do not move without an electric field. Moreover, the first particles and the second particles have different colors (one of which may be colorless).
- an electrophoretic display device is a display device that utilizes a so-called dielectrophoretic effect by which a substance having a high dielectric constant moves to a high-electric field region.
- a solution in which the above microcapsules are dispersed in a solvent is referred to as electronic ink.
- This electronic ink can be printed on a surface of glass, plastic, cloth, paper, or the like. Furthermore, by using a color filter or particles containing a pigment, color display can also be achieved.
- the first particles and the second particles in the microcapsules may be formed of one kind of material selected from a conductive material, an insulating material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electrochromic material, and a magnetophoretic material, or a composite material of any of these.
- the twisting ball display system refers to a method in which spherical particles each colored in black and white are arranged between a first electrode layer and a second electrode layer which are electrode layers used for a display element, and a potential difference is generated between the first electrode layer and the second electrode layer to control orientation of the spherical particles, so that display is performed.
- FIG. 8 illustrates active matrix electronic paper as an embodiment of a semiconductor device.
- the electronic paper shown in FIG. 8 is an example of a display device using the twisting ball display system.
- spherical particles 4613 each of which includes a black region 4615 a , a white region 4615 b , and a cavity 4612 which is filled with liquid around the black region 4615 a and the white region 4615 b , are provided.
- a space around the spherical particles 4613 is filled with a filler 4614 such as a resin.
- the second electrode layer 4031 corresponds to a common electrode (counter electrode).
- the second electrode layer 4031 is electrically connected to a common potential line.
- a flexible substrate as well as a glass substrate can be used as any of the first substrate 4001 and the second substrate 4006 .
- a plastic substrate having light-transmitting properties can be used.
- a fiberglass-reinforced plastics (FRP) plate, a polyvinyl fluoride (PVF) film, a polyester film, or an acrylic resin film can be used.
- FRP fiberglass-reinforced plastics
- PVF polyvinyl fluoride
- polyester film a polyester film
- acrylic resin film acrylic resin film
- a sheet with a structure in which an aluminum foil is sandwiched between PVF films or polyester films can be used.
- the insulating film 4020 can be formed using an inorganic insulating material such as silicon oxide, silicon oxynitride, hafnium oxide, aluminum oxide, or gallium oxide.
- a manufacturing method of the insulating film 4020 is particularly limited; for example, a film formation method such as a plasma CVD method or a sputtering method can be used.
- the sputtering method is preferable in that hydrogen, water, and the like are unlikely to enter a film to be formed.
- the insulating film 4024 can be formed with a single-layer structure or a multi-layer structure using one or more of a silicon nitride film, a silicon nitride oxide film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and an aluminum nitride oxide film by a sputtering method.
- the insulating film 4024 functions as a protective film of the transistor(s).
- the insulating layer 4021 can be formed using an inorganic insulating material or an organic insulating material.
- the insulating layer 4021 may be formed using a heat-resistant organic insulating material such as an acrylic resin, polyimide, a benzocyclobutene-based resin, polyamide, or an epoxy resin, which is preferable as a planarizing insulating film.
- a heat-resistant organic insulating material such as an acrylic resin, polyimide, a benzocyclobutene-based resin, polyamide, or an epoxy resin, which is preferable as a planarizing insulating film.
- an organic insulating material it is possible to use a low-dielectric constant material (a low-k material), a siloxane based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like.
- the insulating layer may be formed by stacking a plurality of insulating films formed of these materials.
- the insulating layer 4021 can be formed, depending on the material, by a sputtering method, a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like.
- a sputtering method e.g., a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like.
- the display device displays an image by transmitting light from the light source or the display element. Therefore, the substrate and the thin films such as the insulating film and the conductive film provided for the pixel portion where light is transmitted have light-transmitting properties with respect to light in the visible-light wavelength range.
- the first electrode layer and the second electrode layer (each of which may be called a pixel electrode layer, a common electrode layer, a counter electrode layer, or the like) for applying voltage to the display element may have light-transmitting properties or light-reflecting properties, which depends on the direction in which light is extracted, the position where the electrode layer is provided, the pattern structure of the electrode layer, and the like.
- any of the first electrode layer 4030 and the second electrode layer 4031 can be formed using a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, or indium tin oxide to which silicon oxide is added.
- a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, or indium tin oxide to which silicon oxide is added.
- any of the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more kinds of materials selected from metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag); alloys of these metals; and nitrides of these metals.
- metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag); alloys of these metal
- a protective circuit for protecting the driver circuit is preferably provided.
- the protective circuit is preferably formed using a non-linear element.
- Embodiment 5 can be implemented in appropriate combination with any of the structures described in the other embodiments.
- a semiconductor device having an image sensor function for reading data of an object can be manufactured with the use of any transistor exemplified in Embodiments 1 to 3.
- FIG. 9A An example of a semiconductor device having an image sensor function is illustrated in FIG. 9A .
- FIG. 9A illustrates an equivalent circuit of a photo sensor
- FIG. 9B is a cross-sectional view illustrating part of the photo sensor.
- One electrode of a photodiode 602 is electrically connected to a photodiode reset signal line 658 , and the other electrode thereof is electrically connected to a gate of a transistor 640 .
- One of a source and a drain of the transistor 640 is electrically connected to a photo sensor reference signal line 672 , and the other of the source and the drain thereof is electrically connected to one of a source and a drain of a transistor 656 .
- a gate of the transistor 656 is electrically connected to a gate signal line 659 , and the other of the source and the drain thereof is electrically connected to a photo sensor output signal line 671 .
- transistor including an oxide semiconductor film is denoted with a symbol “OS” so that it can be identified as a transistor including an oxide semiconductor film.
- the transistor 640 and the transistor 656 in FIG. 9A are transistors each including an oxide semiconductor film.
- FIG. 9B is a cross-sectional view of the photodiode 602 and the transistor 640 in the photo sensor.
- the photodiode 602 functioning as a sensor and the transistor 640 are provided over a substrate 601 (a TFT substrate) having an insulating surface.
- a substrate 613 is provided over the photodiode 602 and the transistor 640 with the use of an adhesion layer 608 .
- An insulating film 631 , a protective insulating film 632 , a first interlayer insulating layer 633 , and a second interlayer insulating layer 634 are provided over the transistor 640 .
- the photodiode 602 is provided over the first interlayer insulating layer 633 .
- a first semiconductor layer 606 a , a second semiconductor layer 606 b , and a third semiconductor layer 606 c are stacked in this order over the first interlayer insulating layer 633 between an electrode layer 641 provided over the first interlayer insulating layer 633 and an electrode layer 642 provided over the second interlayer insulating layer 634 .
- any of the transistors described in Embodiments 1 to 3 can be applied to the transistor 640 .
- the transistor 640 and the transistor 656 variation in electrical characteristics is suppressed, and the transistor 640 and the transistor 656 are electrically stable. Accordingly, a highly reliable semiconductor device can be provided as the semiconductor device of this embodiment described in FIGS. 9A and 9B .
- the electrode layer 641 is electrically connected to a conductive layer 643 formed in the second interlayer insulating layer 634 , and the electrode layer 642 is electrically connected to a gate electrode 645 through the electrode layer 641 .
- the gate electrode 645 is electrically connected to the gate electrode of the transistor 640
- the photodiode 602 is electrically connected to the transistor 640 .
- the photodiode 602 is electrically connected to the transistor 640 .
- a pin photodiode in which a semiconductor layer having a p-type conductivity as the first semiconductor layer 606 a , a high-resistance semiconductor layer (i-type semiconductor layer) as the second semiconductor layer 606 b , and a semiconductor layer having an n-type conductivity as the third semiconductor layer 606 c are stacked is illustrated as an example.
- the first semiconductor layer 606 a is a p-type semiconductor layer and can be formed using an amorphous silicon film containing an impurity element imparting the p-type conductivity.
- the first semiconductor layer 606 a is formed by a plasma CVD method with use of a semiconductor source gas containing an impurity element belonging to Group 13 (such as boron (B)).
- a semiconductor source gas such as boron (B)
- silane (SiH 4 ) may be used.
- Si 2 H 6 , SiH 2 Cl 2 , SiHCl 3 , SiCl 4 , SiF 4 , or the like may be used.
- an amorphous silicon film which does not contain an impurity element may be formed, and then, an impurity element may be introduced to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like may be conducted after introducing the impurity element by an ion implantation method or the like in order to diffuse the impurity element.
- a method of forming the amorphous silicon film an LPCVD method, a chemical vapor deposition method, a sputtering method, or the like may be used as a method of forming the amorphous silicon film.
- the first semiconductor layer 606 a is preferably formed to have a thickness greater than or equal to 10 nm and less than or equal to 50 nm.
- the second semiconductor layer 606 b is an i-type semiconductor layer (intrinsic semiconductor layer) and is formed using an amorphous silicon film.
- an amorphous silicon film is formed with use of a semiconductor source gas by a plasma CVD method.
- the semiconductor source gas silane (SiH 4 ) may be used.
- Si 2 H 6 , SiH 2 Cl 2 , SiHCl 3 , SiCl 4 , SiF 4 , or the like may be used.
- the second semiconductor layer 606 b may be formed by an LPCVD method, a vapor deposition method, a sputtering method, or the like.
- the second semiconductor layer 606 b is preferably formed to have a thickness greater than or equal to 200 nm and less than or equal to 1000 nm.
- the third semiconductor layer 606 c is an n-type semiconductor layer and is formed using an amorphous silicon film containing an impurity element imparting the n-type conductivity.
- the third semiconductor layer 606 c is formed by a plasma CVD method with use of a semiconductor source gas containing an impurity element belonging to Group 15 (e.g., phosphorus (P)).
- a semiconductor source gas containing an impurity element belonging to Group 15 (e.g., phosphorus (P)
- the semiconductor source gas silane (SiH 4 ) may be used.
- Si 2 H 6 , SiH 2 Cl 2 , SiHCl 3 , SiCl 4 , SiF 4 , or the like may be used.
- an amorphous silicon film which does not contain an impurity element may be formed, and then, an impurity element may be introduced to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like may be conducted after introducing the impurity element by an ion injecting method or the like in order to diffuse the impurity element.
- a method of forming the amorphous silicon film an LPCVD method, a chemical vapor deposition method, a sputtering method, or the like may be used as a method of forming the amorphous silicon film.
- the third semiconductor layer 606 c is preferably formed to have a thickness greater than or equal to 20 nm and less than or equal to 200 nm.
- any of the first semiconductor layer 606 a , the second semiconductor layer 606 b , and the third semiconductor layer 606 c is not necessarily formed using an amorphous semiconductor, and may be formed using a polycrystalline semiconductor, or a micro crystalline semiconductor (a semi-amorphous semiconductor: SAS).
- the microcrystalline semiconductor belongs to a metastable state of an intermediate between amorphous and single crystalline, considering Gibbs free energy. That is, the microcrystalline semiconductor is a semiconductor having a third state which is stable in terms of free energy and has a short range order and lattice distortion. Columnar-like or needle-like crystals grow in a normal direction with respect to a substrate surface.
- the Raman spectrum of microcrystalline silicon that is a typical example of a microcrystalline semiconductor, is located in lower wave numbers than 520 cm ⁇ 1 , which represents a peak of the Raman spectrum of single crystal silicon. That is, the peak of the Raman spectrum of the microcrystalline silicon exists between 520 cm ⁇ 1 which represents single crystal silicon and 480 cm ⁇ 1 which represents amorphous silicon.
- microcrystalline silicon is made to contain a rare gas element such as helium, neon, argon, or krypton to further enhance lattice distortion, whereby stability is increased and a favorable microcrystalline semiconductor film can be obtained.
- a rare gas element such as helium, neon, argon, or krypton
- the microcrystalline semiconductor film can be formed by a high-frequency plasma CVD method with a frequency of several tens of megahertz to several hundreds of megahertz or using a microwave plasma CVD apparatus with a frequency of 1 GHz or more.
- the microcrystalline semiconductor film can be formed by using a gas obtained by diluting SiH 4 , Si 2 H 6 , SiH 2 Cl 2 , SiHCl 3 , SiCl 4 , or SiF 4 , with hydrogen.
- the microcrystalline semiconductor film can be formed with a dilution with one or plural kinds of rare gas elements selected from helium, neon, argon, and krypton in addition to silicon hydride and hydrogen.
- the flow ratio of hydrogen to silicon hydride is 5:1 to 200:1, preferably 50:1 to 150:1, far preferably 100:1.
- a carbide gas such as CH 4 or C 2 H 6
- a germanium gas such as GeH 4 or GeF 4 , F 2 , or the like may be mixed into the gas containing silicon.
- a pin photodiode since the mobility of holes generated by a photoelectric effect is lower than that of electrons, a pin photodiode exhibits better characteristics when a surface on the p-type semiconductor layer side is used as a light-receiving plane.
- a surface on the n-type semiconductor layer side can alternatively be used as the light-receiving plane.
- an insulating layer functioning as a planarizing insulating film is preferably used as any of the first interlayer insulating layer 633 and the second interlayer insulating layer 634 .
- Any of the first interlayer insulating layer 633 and the second interlayer insulating layer 634 can be formed using, for example, an organic insulating material such as polyimide, an acrylic resin, a benzocyclobutene-based resin, polyamide, or an epoxy resin.
- a low-dielectric constant material a low-k material
- a siloxane-based resin phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like.
- any of the insulating film 631 , the protective insulating film 632 , the first interlayer insulating layer 633 , and the second interlayer insulating layer 634 can be formed using an insulating material by a sputtering method, a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like depending on the material.
- a sputtering method e.g., a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like depending on the material.
- a light source such as a backlight can be used for the data reading on the object.
- the transistor 640 including the oxide semiconductor film which is highly purified by removing impurities such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) and contains excessive oxygen supplied by oxygen doping or the like whose variation in the electric characteristics is suppressed is electrically stable. Accordingly, a highly reliable semiconductor device can be provided.
- impurities such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) and contains excessive oxygen supplied by oxygen doping or the like whose variation in the electric characteristics is suppressed is electrically stable. Accordingly, a highly reliable semiconductor device can be provided.
- Embodiment 6 can be implemented in appropriate combination with any of the structures described in the other embodiments.
- a semiconductor device disclosed in this specification can be applied to a variety of electronic appliances (including game machines).
- electronic appliances are a television set (also referred to as a television or a television receiver), a monitor of a computer or the like, a camera such as a digital camera or a digital video camera, a digital photo frame, a mobile phone handset (also referred to as a mobile phone or a mobile phone device), a portable game machine, a portable information terminal, an audio reproducing device, a large-sized game machine such as a pachinko machine, and the like.
- Examples of electronic appliances each including the liquid crystal display device described in the above embodiment will be described below.
- FIG. 10A illustrates an electronic book reader (also referred to as an e-book reader) which can include housings 9630 , a display portion 9631 , operation keys 9632 , a solar cell 9633 , and a charge and discharge control circuit 9634 .
- the electronic book reader illustrated in FIG. 10A has a function of displaying various kinds of information (e.g., a still image, a moving image, and a text image) on the display portion, a function of displaying a calendar, a date, the time, or the like on the display portion, a function of operating or editing the information displayed on the display portion, a function of controlling processing by various kinds of software (programs), and the like.
- various kinds of information e.g., a still image, a moving image, and a text image
- FIG. 10A has a function of displaying various kinds of information (e.g., a still image, a moving image, and a text image) on the display portion, a function
- the charge and discharge control circuit 9634 has a battery 9635 and a DCDC converter (hereinafter, abbreviated as a converter) 9636 .
- a DCDC converter hereinafter, abbreviated as a converter
- the structure illustrated in FIG. 10A is preferable because power generation by the solar cell 9633 and charge with the battery 9635 are effectively performed. Since the solar cell 9633 can be provided in a space (a surface or a rear surface) of the housing 9630 as appropriate, the battery 9635 can be efficiently charged, which is preferable.
- a lithium ion battery may be used as the battery 9635 , which provides an advantage of downsizing or the like.
- FIG. 10A The structure and the operation of the charge and discharge control circuit 9634 illustrated in FIG. 10A are described with reference to a block diagram of FIG. 10B .
- the solar cell 9633 , the battery 9635 , the converter 9636 , a converter 9637 , switches SW1 to SW3, and the display portion 9631 are shown in FIG. 10B , and the battery 9635 , the converter 9636 , the converter 9637 , and the switches SW1 to SW3 are included in the charge and discharge control circuit 9634 .
- the solar cell 9633 is described as an example of a means for charging, the battery 9635 may be charged with another means.
- the solar cell 9633 may be combined with another means for charging.
- FIG. 11A illustrates a laptop personal computer, which includes a main body 3001 , a housing 3002 , a display portion 3003 , a keyboard 3004 , and the like.
- a laptop personal computer which includes a main body 3001 , a housing 3002 , a display portion 3003 , a keyboard 3004 , and the like.
- FIG. 11B is a personal digital assistant (PDA), which includes a main body 3021 provided with a display portion 3023 , an external interface 3025 , operation buttons 3024 , and the like.
- a stylus 3022 is included as an accessory for operation.
- FIG. 11C illustrates an example of an electronic book reader.
- an electronic book reader 2700 includes two housings, i.e., a housing 2701 and a housing 2703 .
- the housing 2701 and the housing 2703 are combined with a hinge 2711 so that the electronic book reader 2700 can be opened and closed with the hinge 2711 as an axis.
- the electronic book reader 2700 can operate like a paper book.
- a display portion 2705 and a display portion 2707 are incorporated in the housing 2701 and the housing 2703 , respectively.
- the display portion 2705 and the display portion 2707 may display one image or different images.
- the right display portion displays text
- the left display portion displays images.
- FIG. 11C illustrates an example in which the housing 2701 is provided with an operation portion and the like.
- the housing 2701 is provided with a power switch 2721 , operation keys 2723 , a speaker 2725 , and the like. With the operation keys 2723 , pages can be turned.
- a keyboard, a pointing device, or the like may also be provided on the surface of the housing, on which the display portion is provided.
- an external connection terminal an earphone terminal, a USB terminal, or the like
- a recording medium insertion portion, and the like may be provided on the back surface or the side surface of the housing.
- the electronic book reader 2700 may be equipped with a function of an electronic dictionary.
- the electronic book reader 2700 may have a structure capable of wirelessly transmitting and receiving data. Through wireless communication, book data or the like can be purchased and downloaded from an electronic book server.
- FIG. 11D illustrates a mobile phone, which includes two housings, i.e., a housing 2800 and a housing 2801 .
- the housing 2801 includes a display panel 2802 , a speaker 2803 , a microphone 2804 , a pointing device 2806 , a camera lens 2807 , an external connection terminal 2808 , and the like.
- the housing 2800 includes a solar cell 2810 having a function of charging the mobile phone, an external memory slot 2811 , and the like.
- An antenna is incorporated in the housing 2801 .
- the display panel 2802 is provided with a touch panel.
- a plurality of operation keys 2805 which is displayed as images is illustrated by dashed lines in FIG. 11D .
- a boosting circuit by which a voltage output from the solar cell 2810 is increased to be sufficiently high for each circuit is also provided.
- the display direction can be appropriately changed depending on a usage pattern.
- the mobile phone is provided with the camera lens 2807 on the same surface as the display panel 2802 , and thus it can be used as a video phone.
- the speaker 2803 and the microphone 2804 can be used for videophone calls, recording and playing sound, and the like as well as voice calls.
- the housings 2800 and 2801 which are developed as illustrated in FIG. 11D can overlap with each other by sliding; thus, the size of the mobile phone can be decreased, which makes the mobile phone suitable for being carried.
- the external connection terminal 2808 can be connected to an AC adapter and various types of cables such as a USB cable, and charging and data communication with a personal computer are possible. Moreover, a large amount of data can be stored and moved with a storage medium inserted into the external memory slot 2811 .
- an infrared communication function may be equipped.
- FIG. 11E illustrates a digital video camera which includes a main body 3051 , a display portion A 3057 , an eyepiece portion 3053 , an operation switch 3054 , a display portion B 3055 , a battery 3056 , and the like.
- a digital video camera which includes a main body 3051 , a display portion A 3057 , an eyepiece portion 3053 , an operation switch 3054 , a display portion B 3055 , a battery 3056 , and the like.
- FIG. 11F illustrates an example of a television device.
- a display portion 9603 is incorporated in a housing 9601 .
- the display portion 9603 can display images.
- the housing 9601 is supported by a stand 9605 .
- the television set 9600 can be operated by an operation switch of the housing 9601 or a separate remote controller. Further, the remote controller may be provided with a display portion for displaying data output from the remote controller.
- the television set 9600 is provided with a receiver, a modem, and the like. With the receiver, general television broadcasting can be received. Moreover, when the display device is connected to a communication network with or without wires via the modem, one-way (from sender to receiver) or two-way (between sender and receiver or between receivers) data communication can be performed.
- Embodiment 7 can be implemented in appropriate combination with any of the structures described in the other embodiments.
- Example 1 a transistor of one embodiment of the present invention is manufactured and the evaluation results of the electrical characteristics are shown.
- a 100-nm-thick silicon nitride film was formed by a plasma CVD method and a 150-nm-thick silicon oxynitride film was formed consecutively over a glass substrate to form a base film, and a 100-nm-thick tungsten film was formed as a gate electrode layer over the silicon oxynitride film by a sputtering method. The tungsten film was etched selectively to form the gate electrode layer.
- a 100-nm-thick silicon oxynitride film was formed as a gate insulating film over the gate electrode layer by a plasma CVD method.
- the oxide semiconductor film was selectively etched to form an island-shaped oxide semiconductor film.
- oxygen doping treatment was performed on the oxide semiconductor film with an ICP (Inductively Coupled Plasma) plasma apparatus as shown in FIG. 14B under an oxygen (250 sccm) atmosphere for one minute under the following conditions: the upper electrode bias was 6000 W, the lower electrode bias was 1000 W, and the pressure was 1.33 Pa.
- ICP Inductively Coupled Plasma
- a titanium film with a thickness of 100 nm
- an aluminum film with a thickness of 400 nm
- a titanium film with a thickness of 100 nm
- the source and drain electrode layers were selectively etched so that the channel length L and the channel width W of the transistor were 3 ⁇ m and 50 ⁇ m, respectively.
- a 300-nm-thick silicon oxide film was formed as a first insulating film by a sputtering method, so as to be in contact with the oxide semiconductor film.
- the silicon oxide film that was the first insulating film was etched selectively, so that openings were formed over the gate electrode layer and the source and drain electrode layers.
- a 1.5- ⁇ m-thick photosensitive acrylic resin was formed as a second insulating film by a spin coating method.
- the photosensitive acrylic resin that was the second insulating film was selectively exposed to light and developed, so that openings were formed over the gate electrode layer and the source and drain electrode layers.
- heat treatment was performed under a nitrogen atmosphere at 250° C. for one hour.
- a bias-temperature stress test (hereinafter, referred to as a BT test).
- the BT test is one kind of accelerated test and can evaluate change in characteristics, caused by long-term usage, of transistors in a short time.
- the amount of shift in threshold voltage of the transistor by the BT test is an important indicator for examining reliability. The smaller the shift in the threshold voltage by the BT test is, the higher the reliability of the transistor is.
- the temperature of a substrate provided with the transistor (the temperature is also called the substrate temperature) is set at a fixed temperature, a source and a drain of the transistor are set at the same potential, and a gate is supplied with a potential different from those of the source and the drain for a certain period.
- the substrate temperature may be determined as appropriate in accordance with the test purpose.
- a BT test where the potential applied to the gate is higher than the potential of the source and drain is referred to as +BT test and a BT test where the potential applied to the gate is lower than the potential of the source and drain is referred to as ⁇ BT test.
- the test intensity of the BT test can be determined in accordance with the substrate temperature, the intensity of electric field intensity applied to the gate insulating film, and a time of applying the electric field.
- the intensity of the electric field applied to the gate insulating film is determined in accordance with a value obtained by dividing the potential difference between the gate and the source/drain by the thickness of the gate insulating film. For example, the intensity of the electric field applied to the gate insulating film with a thickness of 100 nm can be adjusted to 2 MV/cm by setting the potential difference to 20 V.
- a voltage refers to the difference between potentials of two points, and a potential refers to electrostatic energy (electric potential energy) of a unit charge at a given point in an electrostatic field.
- a difference between a potential of one point and a reference potential e.g., ground potential
- a potential or a voltage e.g., ground potential
- the potential and the voltage are used as synonymous words in many cases.
- a potential may be rephrased as a voltage and vice versa unless otherwise specified.
- Both a +BT test and a ⁇ BT test were carried out under the following conditions: the substrate temperature was 150° C.; the intensity of the electric field applied to the gate insulating film was 2 MV/cm; and the time of application was one hour.
- the +BT test is described below.
- a change in characteristics of the source-drain current that is, V g -I d characteristics were measured under the conditions where the substrate temperature was set to 40° C., the source-drain voltage (hereinafter, the drain voltage) was set to 1 V, and the source-gate voltage (hereinafter, the gate voltage) was changed from ⁇ 20 V to +20 V.
- the substrate temperature was set to 40° C.; however, the measurement may be performed at room temperature (25° C.) if there is no particular problem.
- the substrate temperature was increased to 150° C., and then, the potentials of the source and the drain of the transistor were set to 0 V. Then, voltage was applied to the gate of the transistor so that the intensity of the electric field applied to the gate insulating film was 2 MV/cm.
- the gate since the thickness of the gate insulating film of the transistor was 100 nm, the gate was supplied with +20 V and was kept for one hour. The time of voltage application was one hour in this example; however, the time may be determined as appropriate in accordance with the purpose.
- the substrate temperature was decreased to 40° C. while the voltage was applied to the gate and the source and the drain. If application of the voltage is stopped before the substrate temperature was decreased to 40° C., the transistor which has been damaged during the BT test is repaired by the influence of residual heat. Thus, the substrate temperature needs to be decreased while the voltage is applied. After the substrate temperature was reached to 40° C., the application of voltage was stopped. Strictly, the time of decreasing temperature needs to be added to the time of the voltage application; however, since the temperature was able to be decreased to 40° C. in several minutes actually, this was considered to be an error range and the time of decreasing temperature was not added to the time of voltage application.
- V g -I d characteristics were measured under the same conditions as those of the measurement of the initial characteristics, and V g -I d characteristics after the +BT test were obtained.
- the ⁇ BT test was performed in a manner similar to that of the +BT test, except in that the voltage applied to the gate of the transistor after the substrate temperature was increased to 150° C. was ⁇ 20 V.
- a transistor which has been never subjected to a BT test it is important to use a transistor which has been never subjected to a BT test. For example, if a ⁇ BT test is performed with use of a transistor which has been once subjected to a +BT test, the results of the ⁇ BT test cannot be evaluated correctly due to influence of the +BT test which has been performed previously. Further, the same applies to the case where a +BT test is performed on a transistor which has been once subjected to a +BT test. Note that the same does not apply to the case where a BT test is intentionally repeated in consideration of these influences.
- FIGS. 17A and 17B and FIGS. 18A and 18B V g -I d characteristics of the transistor before and after the BT test are shown in FIGS. 17A and 17B and FIGS. 18A and 18B .
- the horizontal axis indicates a gate voltage (V g ) and the vertical axis indicates a drain current (I d ) with respect to the gate voltage.
- FIGS. 18A and 18B are enlarged graphs of FIGS. 17A and 17B , where the gate voltage (V g ) indicated in the horizontal axis is enlarged.
- FIG. 18A show the V g -I d characteristics of the transistor before and after the +BT test.
- Solid line 900 indicates the V g -I d characteristics before the +BT test, that is, initial characteristics
- dotted line 901 indicates the V g -I d characteristics after the +BT test.
- FIG. 18B shows the V g -I d characteristics of the transistor before and after the ⁇ BT test.
- Solid line 902 indicates the V g -I d characteristics before the ⁇ BT test, that is, initial characteristics
- dotted line 903 indicates the V g -I d characteristics after the ⁇ BT test.
- FIGS. 17A and 17B and FIGS. 18A and 18B do not show a part in which the I d was less than or equal to the detection limit of the measurement device.
- the characteristics after the +BT test indicated by the line 901 shifted by 0.12 V in the threshold voltage as compared to the initial characteristics indicated by the line 900 ; referring to FIG. 18B , the characteristics after the ⁇ BT test indicated by the line 903 shifted by 0.07 V in the threshold voltage as compared to the initial characteristics indicated by the line 902 . Accordingly, from the results that the amount of shift of the threshold voltage is as small as several volts by either of the BT tests, it could be confirmed that the transistor of this example was a transistor with high reliability in the BT test.
Abstract
A semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability. In a process for manufacturing a bottom-gate transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed. The transistor including the oxide semiconductor film subjected to the dehydration or dehydrogenation by the heat treatment and the oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
Description
- This application is a continuation of U.S. application Ser. No. 13/091,181, filed Apr. 21, 2011, now allowed, which claims the benefit of a foreign priority application filed in Japan as Serial No. 2010-100343 on Apr. 23, 2010, both of which are incorporated by reference.
- The present invention relates to a semiconductor device and a manufacturing method thereof.
- In this specification, a semiconductor device generally means any device which can function by utilizing semiconductor characteristics, and an electrooptic device, a semiconductor circuit, and electronic equipment are all semiconductor devices.
- A technique by which transistors are formed using semiconductor thin films formed over a substrate having an insulating surface has been attracting attention. The transistor is applied to a wide range of electronic devices such as an integrated circuit (IC) or an image display device (display device). A silicon-based semiconductor material is widely known as a material for a semiconductor thin film applicable to the transistor; in addition, an oxide semiconductor has been attracting attention as another material.
- For example, a transistor whose active layer includes an amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) and having an electron carrier concentration of less than 1018/cm3 is disclosed (see Patent Document 1).
-
- Patent Document 1: Japanese Published Patent Application No. 2006-165528
- However, when hydrogen or moisture, which forms an electron donor, is mixed into the oxide semiconductor in a process for manufacturing a device, the electrical conductivity of the oxide semiconductor may change. Such a phenomenon causes variation in the electric characteristics of a transistor using the oxide semiconductor.
- In view of such a problem, one object of one embodiment of the present invention is to provide a semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability.
- In a process for manufacturing a transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed.
- One embodiment of the present invention is a method for manufacturing a semiconductor device, in which a gate electrode layer is formed, a gate insulating film is formed over the gate electrode layer, an oxide semiconductor film is formed over the gate insulating film so as to overlap with the gate electrode layer, heat treatment is performed on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film after the hydrogen atom is removed, to supply an oxygen atom to the oxide semiconductor film, a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film are formed, and an insulating film is formed over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film.
- One embodiment of the present invention is a method for manufacturing a semiconductor device, in which a gate electrode layer is formed, a gate insulating film containing an oxygen atom as a component is formed over the gate electrode layer, oxygen doping treatment is performed on the gate insulating film to supply an oxygen atom to the gate insulating film, an oxide semiconductor film is formed over the gate insulating film so as to overlap with the gate electrode layer, heat treatment is performed on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film after the hydrogen atom is removed, to supply an oxygen atom into the oxide semiconductor film, a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film are formed, an insulating film is formed over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film and contain an oxygen atom as a component, and oxygen doping treatment is performed on the insulating film to supply an oxygen atom to the insulating film.
- One embodiment of the present invention is a semiconductor device comprising a gate electrode layer, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a source electrode layer and a drain electrode layer over the oxide semiconductor film, an insulating film provided over the source electrode layer and the drain electrode layer so as to be in contact with the oxide semiconductor film, and a wiring layer provided over the insulating film so as to be electrically connected to the source electrode layer or the drain electrode layer. According to the embodiment, the wiring layer is provided in an opening formed by removing part of the insulating film and part of the source electrode layer and an opening formed by removing part of the insulating film and part of the drain electrode layer; the part of the source electrode layer and the part of the drain electrode layer are removed in the openings, so that depressions are formed in the source electrode layer and the drain electrode layer; the wiring layer is provided so as to be in contact with inner wall surfaces and bottom surfaces having smaller film thicknesses of the depressions of the source electrode layer and the drain electrode layer in the openings; and oxygen concentrations of the bottom surfaces of the depressions of the source electrode layer and the drain electrode layer are lower than those of top surfaces of the source electrode layer and the drain electrode layer.
- One embodiment of the present invention is a semiconductor device in which the oxide semiconductor film in the above structure includes a region where the oxygen content is greater than that based on a stoichiometric composition ratio of a crystalline state of an oxide semiconductor of the oxide semiconductor film.
- One embodiment of the present invention is a semiconductor device in which the oxide semiconductor film in the above structure includes a region where the oxygen content is greater than that based on a stoichiometric composition ratio of a crystalline state of an oxide semiconductor of the oxide semiconductor film, at least in an interface with the insulating film or a vicinity thereof.
- Note that the above-described “oxygen doping” means that oxygen (which includes at least one of an oxygen radical, an oxygen atom, and an oxygen ion) is added to a bulk. Note that the term “bulk” is used in order to clarify that oxygen is added not only to a top surface of a thin film but also to the inside of the thin film. In addition, “oxygen doping” includes “oxygen plasma doping” in which oxygen in the form of plasma is added to a bulk.
- By the oxygen doping treatment in the manufacturing process of the transistor including the oxide semiconductor film, an oxygen-excessive region where the amount of oxygen is greater than the stoichiometric proportion can be provided in at least one of the gate insulating film (bulk thereof), the oxide semiconductor film (bulk thereof), the insulating film (bulk thereof), an interface between the gate insulating film and the oxide semiconductor film, and an interface between the oxide semiconductor film and the insulating film. The amount of oxygen is preferably greater than the stoichiometric proportion and less than four times of the stoichiometric proportion, far preferably greater than the stoichiometric proportion and less than double of the stoichiometric proportion. Such an oxide including excessive oxygen whose amount is greater than the stoichiometric proportion refers to, for example, an oxide which satisfies 2g>3a+3b+2c+4d+3e+2f (g is greater than the sum of 1.5a+1.5b+c+2d+1.5e+f), where the oxide is represented as InaGabZncSidAleMgfOg (a, b, c, d, e, f, g≧0: a, b, c, d, e, f, g is greater than or equal to zero). Note that oxygen which is added by the oxygen doping treatment may exist between lattices of the oxide semiconductor.
- The above-described oxygen-excessive region may be provided in two or more of the gate insulating film, the oxide semiconductor film, and the insulating film. For example, oxygen-excessive regions can be provided in the interface between the gate insulating film and the oxide semiconductor film, the oxide semiconductor film (bulk thereof), and the interface between the oxide semiconductor film and the insulating film by oxygen doping treatment in the manufacturing process.
- Note that while it is acceptable that the amount of oxygen is equal to the stoichiometric proportion in a defect- (oxygen deficiency-)free oxide semiconductor, in order to secure reliability, for example, to suppress variation in the threshold voltage of a transistor, it is preferable that an oxide semiconductor include oxygen whose amount be greater than the stoichiometric proportion. Similarly, while the base film is not necessarily an insulating film containing excessive oxygen in the case of a defect- (oxygen deficiency-)free oxide semiconductor, in order to secure reliability, for example, to suppress variation in the threshold voltage of a transistor, it is preferable that the base film be an insulating film containing excessive oxygen, considering the possibility of occurrence of oxygen deficiency in the oxide semiconductor layer.
- With the dehydration or dehydrogenation by the heat treatment subjected to the oxide semiconductor film, a hydrogen atom or an impurity containing a hydrogen atom such as water in the oxide semiconductor film is removed, so that the oxide semiconductor film is highly purified. The amount of oxygen added by the oxygen doping treatment is set to greater than the amount of hydrogen in the highly-purified oxide semiconductor film which has been subjected to the dehydration or dehydrogenation. Excessive oxygen in at least one of the stacked gate insulating film, oxide semiconductor film, and insulating film diffuses and reacts with hydrogen that causes instability, thereby fixing hydrogen (making hydrogen an immovable ion). That is, instability in the reliability can be reduced (or sufficiently decreased). In addition, with excessive oxygen, variation in the threshold voltage Vth due to oxygen deficiency can be reduced and the amount of shift ΔVth of the threshold voltage can be reduced.
- Here, a state in which oxygen is added to the bulk by the above-described “oxygen plasma doping” treatment is described. Note that when oxygen doping treatment is performed on an oxide semiconductor film containing oxygen as one component, it is generally difficult to check an increase or a decrease of the oxygen concentration. Therefore, here, an effect of the oxygen doping treatment was confirmed with a silicon wafer.
- Oxygen doping treatment was performed with the use of an inductively coupled plasma (ICP) method. Conditions thereof were as follows: the ICP power is 800 W; the
RF bias power 300 W or 0 W; the pressure 1.5 Pa; the gas flow rate 75 sccm; and thesubstrate temperature 70° C.FIG. 15 shows an oxygen concentration profile in the depth direction of the silicon wafer according to secondary ion mass spectrometry (SIMS) measurement. InFIG. 15 , the vertical axis indicates an oxygen concentration; the horizontal axis indicates a depth from a top surface of the silicon wafer. - It can be confirmed from
FIG. 15 that oxygen is added in either of cases where the RF bias power is 0 W or the RF bias power is 300 W. In addition, in the case where the RF bias power is 300 W, oxygen is added more deeply than the case of the RF bias power of 0 W. - Next,
FIGS. 16A and 16B show results of observation of a cross section of the silicon wafer before and after the oxygen doping treatment according to scanning transmission electron microscopy (STEM).FIG. 16A is a STEM image of the silicon wafer before the oxygen doping treatment.FIG. 16B is a STEM image of the silicon wafer after the oxygen doping treatment at the RF bias power of 300 W. Referring toFIG. 16B , it can be confirmed that an oxygen-highly-doped region is formed in the silicon wafer by the oxygen doping. - As described above, it is shown that oxygen is added to the silicon wafer by oxygen doping on the silicon wafer. This result leads to an understanding that oxygen can also be added to an oxide semiconductor film by oxygen doping to the oxide semiconductor film.
- The effect of the structure which is an embodiment of the invention can be easily understood by considering as below. The description below is just one exemplary consideration.
- When a positive voltage is applied to the gate electrode, an electric field is generated from a gate electrode side of the oxide semiconductor film to a back channel side (the opposite side to the gate insulating film), and accordingly, hydrogen ions having positive charge which exist in the oxide semiconductor film are transferred to the back channel side, and accumulated in an oxide semiconductor film side of an interface between the oxide semiconductor film and the insulating film. The positive charge is transferred from the accumulated hydrogen ion to a charge trapping center (such as a hydrogen atom, water, or contamination) in the insulating film, whereby negative charge is accumulated in the back channel side of the oxide semiconductor film. In other words, a parasitic channel is generated on the back channel side of the transistor, and the threshold voltage is shifted to the negative side, so that the transistor tends to be normally-on.
- In this manner, the charge trapping center such as hydrogen or water in the insulating film traps the positive charge and is transferred into the insulating film, which varies electric characteristics of the transistor. Therefore, in order to suppress variation of the electrical characteristics of the transistor, it is important that there is no charge trapping center or the number of charge trapping centers is small in the insulating film. Therefore, a sputtering method by which less hydrogen is contained in film deposition is preferably used for formation of the insulating film. In an insulating film deposited by the sputtering method, there is no charge trapping center or the number of which is small, and the transfer of positive charge less occurs as compared to that in the case of using a CVD method or the like. Accordingly, the shift of the threshold voltage of the transistor can be suppressed and the transistor can be normally off.
- On the other hand, when a negative voltage is applied to the gate electrode, an electric field is generated from the back channel side to the gate electrode side, and accordingly, hydrogen ions which exist in the oxide semiconductor film are transferred to the gate insulating film side and are accumulated in the oxide semiconductor film side of the interface between the oxide semiconductor film and the gate insulating film. As a result, the threshold voltage of the transistor is shifted to the negative side.
- In a state being applied with a voltage of 0, the positive charge is released from the charge trapping center, so that the threshold voltage of the transistor is shifted to the positive side, thereby returning to the initial state, or the threshold voltage is shifted to the positive side beyond the initial state in some cases. These phenomena indicate the existence of easy-to-transfer ions in the oxide semiconductor film. It can be considered that an ion that is transferred most easily is a hydrogen ion that is the smallest atom.
- Note that in a bottom-gate transistor, when an oxide semiconductor film is formed over a gate insulating film and then heat treatment is performed thereon, not only water or hydrogen contained in the oxide semiconductor film but also water or hydrogen contained in the gate insulating film can be removed. Thus, in the gate insulating film, the number of charge trapping centers for trapping positive charge which is transferred through the oxide semiconductor film is small. In this manner, the heat treatment for dehydration or dehydrogenation is performed not only on the oxide semiconductor film but also on the gate insulating film below the oxide semiconductor film. Therefore, in the bottom-gate transistor, the gate insulating film may be formed by a CVD method such as a plasma CVD method.
- In addition, the oxide semiconductor film absorbs light, whereby a bond of a metal element (M) and a hydrogen atom (H) (the bond also referred to as an M-H bond) in the oxide semiconductor film is cut by optical energy. Note that the optical energy having a wavelength of about 400 nm is equal to or substantially equal to the bond energy of a metal element and a hydrogen atom. When a negative gate bias is applied to a transistor in which the bond of a metal element and a hydrogen atom in the oxide semiconductor film is cut, a hydrogen ion detached from the metal element is attracted to a gate electrode side, so that distribution of electrical charge is changed, the threshold voltage of the transistor is shifted to the negative side, and the transistor tends to be normally on.
- Note that the hydrogen ions which have been transferred to the interface with the gate insulating film by light irradiation and application of the negative gate bias to the transistor are returned to the initial state by stopping application of the voltage. This can be regarded as a typical example of the ion transfer in the oxide semiconductor film.
- In order to prevent such a change of the electrical characteristics by voltage application (BT deterioration) or a change of the electrical characteristics by light irradiation (light deterioration), it is important to remove a hydrogen atom or an impurity containing a hydrogen atom such as water thoroughly from the oxide semiconductor film to highly purify the oxide semiconductor film. The charge density as small as 1015 cm−3, or the charge per unit area as small as 1010 cm−2 does not affect the transistor characteristics or very slightly affects them. Therefore, it is preferable that the charge density be less than or equal to 1015 cm−3. Assuming that 10% of hydrogen contained in the oxide semiconductor film is transferred within the oxide semiconductor film, it is preferable that the hydrogen concentration be less than or equal to 1016 cm−3. Further, in order to prevent entrance of hydrogen from the outside after a device is completed, it is preferable that a silicon nitride film formed by a sputtering method be used as a passivation film to cover the transistor.
- Hydrogen or water can also be removed from the oxide semiconductor film by doping with excessive oxygen as compared to hydrogen contained in the oxide semiconductor film (such that (number of hydrogen atoms)<<(number of oxygen radicals) or (number of oxygen ions)). Specifically, oxygen is made to be plasma by a radio-frequency wave (RF), the bias of the substrate is increased, and an oxygen radical and/or an oxygen ion are/is doped or added into the oxide semiconductor film over the substrate such that the amount of oxygen is greater than that of hydrogen in the oxide semiconductor film. The electronegativity of oxygen is 3.0 which is larger than about 2.0, the electronegativity of a metal (Zn, Ga, In) in the oxide semiconductor film, and thus, excessive oxygen contained as compared to hydrogen deprives the M-H bond of a hydrogen atom, so that an OH group is formed. This OH group may form an M-O—H group with a bond to M.
- The oxygen doping is preferably performed such that the amount of oxygen in the oxide semiconductor film is greater than the stoichiometric proportion. For example, in the case where an In—Ga—Zn—O-based oxide semiconductor film is used as the oxide semiconductor film, an ideal single-crystal ratio is 1:1:1:4 (InGaZnO4), and therefore, it is far preferable that the amount of oxygen be made to greater than the stoichiometric proportion and less than double of the stoichiometric proportion by oxygen doping or the like. Accordingly, the amount of oxygen is greater than that of hydrogen in the oxide semiconductor film.
- Optical energy or BT stress detaches a hydrogen ion from the M-H bond, which causes deterioration; however, in the case where oxygen is added by the above-described doping, added oxygen is bonded with a hydrogen ion, so that an OH group is formed. The OH group does not discharge a hydrogen ion even by light irradiation or application of BT stress on the transistor because of its high bond energy, and is not easily transferred into the oxide semiconductor film because of its greater mass than the mass of a hydrogen ion. Accordingly, an OH group formed by oxygen doping does not cause deterioration of the transistor or can suppress the deterioration.
- In addition, it has been confirmed that as the thickness of the oxide semiconductor film is increased, the variation in the threshold voltage of a transistor tends to increase. It can be guessed that this is because an oxygen defect in the oxide semiconductor film is one cause of the change of the threshold voltage and increases as the thickness of the oxide semiconductor film is increased. A step of doping an oxide semiconductor film with oxygen in a transistor according to one embodiment of the present invention is effective not only for removal of hydrogen or water from the oxide semiconductor film but also for compensation of an oxygen defect in the film. Accordingly, the variation in the threshold voltage can also be controlled in the transistor according to one embodiment of the present invention.
- Metal oxide films each formed of a component/components similar to the oxide semiconductor film may be provided with the oxide semiconductor film provided therebetween, which is also effective for prevention of change of the electrical characteristics. As the metal oxide film formed of a component/components similar to the oxide semiconductor film, specifically, a film containing at least one selected from the constituent elements of the oxide semiconductor film is preferably used. Such a material can be fit well to the oxide semiconductor film, and therefore, provision of the metal oxide films with the oxide semiconductor film provided therebetween enables an interface between the metal oxide film and the oxide semiconductor film to be kept well. That is, by providing the metal oxide film using the above-described material(s) as an insulating film which is in contact with the oxide semiconductor film, accumulation of hydrogen ions in the interface between the metal oxide film and the oxide semiconductor film and in the vicinity thereof can be suppressed or prevented. Accordingly, as compared to the case where insulating films each formed of a different component/different components from the oxide semiconductor film, such as silicon oxide films are provided with the oxide semiconductor film provided therebetween, the hydrogen concentration in the interface with the oxide semiconductor film, which affects the threshold voltage of the transistor, can be sufficiently decreased.
- A gallium oxide film is preferably used as the metal oxide film. Since gallium oxide has a wide bandgap (Eg), by providing gallium oxide films with the oxide semiconductor film provided therebetween, an energy barrier is formed in the interface between the oxide semiconductor film and the metal oxide film to prevent carrier transfer in the interface. Consequently, carriers are not transferred from the oxide semiconductor to the metal oxide, but are transferred within the oxide semiconductor film. On the other hand, a hydrogen ion passes through the interface between the oxide semiconductor and the metal oxide and is accumulated in the vicinity of an interface between the metal oxide and the insulating film. Even when the hydrogen ion is accumulated in the vicinity of the interface with the insulating film, a parasitic channel through which carriers can flow is not formed in the metal oxide film such as a gallium oxide film, which results in no effect or a very slight effect on the threshold voltage of the transistor. The energy barrier in the case where gallium oxide is in contact with a In—Ga—Zn—O-based material is about 0.8 eV on the conduction band side and is about 0.9 eV on the valence band side.
- One technological idea of a transistor according to one embodiment of the present invention is to increase the amount of oxygen contained in at least one of an insulating film in contact with an oxide semiconductor film, the oxide semiconductor film, and the vicinity of an interface between them by oxygen doping treatment.
- In the case where an oxide semiconductor material which contains indium whose bonding strength to oxygen is relatively weak is used for the oxide semiconductor film, when the insulating film in contact with the oxide semiconductor film contains a material which has a stronger bonding strength to oxygen, such as silicon, oxygen in the oxide semiconductor film may be deprived by heat treatment, which may cause formation of oxygen deficiency in the vicinity of the interface with the oxide semiconductor film. However, in a transistor according to one embodiment of the present invention, the formation of oxygen deficiency can be suppressed by supplying excessive oxygen to the oxide semiconductor film.
- Here, after the oxygen doping treatment is performed in the manufacturing process of a transistor, the amount of oxygen which is greater than the stoichiometric proportion, contained in the oxide semiconductor film or the insulating film in contact with the oxide semiconductor film may be different between layers. It can be considered that chemical potential of oxygen is different between the layers where the amount of excessive oxygen is different between them, and the difference in the chemical potential comes to equilibrium or substantial equilibrium by heat treatment or the like in the manufacturing process of the transistor. Distribution of oxygen in the equilibrium state is considered below.
- The equilibrium state at a temperature T at a pressure P refers to the state in which a Gibbs free energy of the whole of the systems, G is the minimum, which is represented by the following formula (1).
-
[FORMULA 1] -
G(N a , N b , N c , . . . , T,P)=G (1)(N a , N b , N c , . . . , T,P)+G (2)(N a , N b , N c , . . . , T,P)+G (3)(N a , N b , N c , . . . , T,P) (1) - In the formula (1), reference symbols G(1), G(2), and G(3) denote Gibbs free energies of layers. Reference symbols a, b, and c denote particle kinds. The Gibbs free energy changes as represented by the following formula (2) when the particle a is transferred from an i layer to a j layer by δNa (j).
-
- When δG is 0 in the formula (2), or when the following formula (3) is satisfied, the systems are in the equilibrium state.
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- The differential of the Gibbs free energy with respect to the number of particles corresponds to the chemical potential, and thus the chemical potentials of particles are uniform in the layers in the equilibrium state.
- In other words, specifically, when the amount of oxygen contained in the oxide semiconductor film is excessive as compared to the insulating film, the chemical potential of oxygen is relatively small in the insulating film and is relatively large in the oxide semiconductor film.
- Then, when the temperature of the whole of the systems (e.g., the oxide semiconductor film and the insulating film in contact with the oxide semiconductor film, here) becomes high enough to cause atom diffusion in the layer(s) and between the layers by heat treatment in the manufacturing process of the transistor, oxygen is transferred so as to make the chemical potentials uniform. That is, oxygen in the oxide semiconductor film is transferred to the insulating film, whereby the chemical potential of the oxide semiconductor film is decreased and the chemical potential of the insulating film is increased.
- In this manner, oxygen supplied excessively to the oxide semiconductor film by the oxygen doping treatment is diffused to be supplied to the insulating film (including its interface) by the following heat treatment to make the whole of the systems to be in the equilibrium state. Therefore, in the case where excessive oxygen exists enough in the oxide semiconductor film, the insulating film (including its interface) in contact with the oxide semiconductor film can be made to contain excessive oxygen.
- Therefore, it is beneficial to supply oxygen the amount of which is enough to (or greater than that to) compensate an oxygen deficiency defect in the insulating film or the interface with the insulting film, to the oxide semiconductor film.
- A transistor including an oxide semiconductor film subjected to dehydration or dehydrogenation by heat treatment and oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress (BT test) can be reduced.
- Accordingly, a transistor having stable electric characteristics can be manufactured.
- According to one embodiment of the present invention, a semiconductor device having a transistor with high electric characteristics and reliability can be manufactured.
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FIGS. 1A to 1C illustrate one embodiment of a semiconductor device. -
FIGS. 2A to 2D illustrate one embodiment of a method for manufacturing a semiconductor device. -
FIGS. 3A to 3D illustrate embodiments of a semiconductor device. -
FIGS. 4A to 4F illustrate one embodiment of a method for manufacturing a semiconductor device. -
FIGS. 5A to 5C illustrate one embodiment of a method for manufacturing a semiconductor device. -
FIG. 6 illustrates one embodiment of a semiconductor device. -
FIG. 7 illustrates one embodiment of a semiconductor device. -
FIG. 8 illustrates one embodiment of a semiconductor device. -
FIGS. 9A and 9B illustrate one embodiment of a semiconductor device. -
FIGS. 10A and 10B illustrate electronic equipment. -
FIGS. 11A to 11F illustrate electronic equipment. -
FIGS. 12A to 12C illustrate embodiments of a semiconductor device. -
FIGS. 13A to 13D illustrate one embodiment of a semiconductor device. -
FIG. 14A is a top view of a plasma apparatus illustrating one embodiment of the present invention;FIG. 14B is a cross-sectional view thereof. -
FIG. 15 is a graph showing measurement results with SIMS. -
FIGS. 16A and 16B are cross-sectional STEM images. -
FIGS. 17A and 17B are graphs each showing evaluation results of electrical characteristics of a transistor. -
FIGS. 18A and 18B are graphs each showing evaluation results of electrical characteristics of a transistor. - Hereinafter, embodiments and an example of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details of the present invention can be modified in various ways without departing from the purpose and scope of the present invention. Accordingly, the present invention is not construed as being limited to the description of the embodiments and example included herein. The ordinal numbers such as “first” and “second” in this specification are used for convenience and do not denote the order of steps or the stacking order of layers. In addition, the ordinal numbers in this specification do not denote particular names which specify the present invention.
- In
Embodiment 1, one embodiment of a semiconductor device and one embodiment of a method for manufacturing the semiconductor device will be described usingFIGS. 1A to 1C ,FIGS. 2A to 2D , andFIGS. 3A to 3D . In this embodiment, a transistor including an oxide semiconductor film is described as an example of the semiconductor device. -
FIGS. 1A to 1C are a plan view and cross-sectional views of a bottom-gate transistor described as an example of a semiconductor device.FIG. 1A is the plan view;FIGS. 1B and 1C are the cross-sectional views along line A-B and line C-D inFIG. 1A , respectively. Agate insulating film 402 is omitted inFIG. 1A . - A
transistor 410 shown inFIGS. 1A to 1C includes, over asubstrate 400 having an insulating surface, agate electrode layer 401, thegate insulating film 402, anoxide semiconductor film 403, asource electrode layer 405 a, and adrain electrode layer 405 b. - In a process for manufacturing the
oxide semiconductor film 403, heat treatment for dehydration or dehydrogenation and oxygen doping treatment are performed. - The oxygen doping treatment is addition of an oxygen radical or an oxygen atom or an oxygen ion to a top surface and the bulk of the oxide semiconductor film. In particular, addition of an oxygen radical or an oxygen atom or an oxygen ion to the top surface and the bulk of the oxide semiconductor film, with oxygen plasma is also called oxygen plasma doping treatment. The substrate over which the oxide semiconductor film is formed is preferably biased.
- An insulator may be provided over the
transistor 410. In order to electrically connect thesource electrode layer 405 a or thedrain electrode layer 405 b to a wiring, an opening may be formed in thegate insulating film 402 or the like. A second gate electrode may be provided above theoxide semiconductor film 403. Theoxide semiconductor film 403 is preferably processed into an island shape but is not necessarily processed into the shape. -
FIGS. 2A to 2D illustrate an example of a method for manufacturing thetransistor 410. - First, a conductive film is formed over the
substrate 400 having an insulating surface, and then, subjected to a first photolithography step, so that thegate electrode layer 401 is formed. Note that a resist mask may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced. - There is no particular limitation on a substrate that can be used as the
substrate 400 having an insulating surface as long as it has heat resistance enough to withstand heat treatment performed later. For example, a glass substrate of barium borosilicate glass, aluminoborosilicate glass, or the like, a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. A single crystal semiconductor substrate or a polycrystalline semiconductor substrate of silicon, carbon silicon, or the like; a compound semiconductor substrate of silicon germanium or the like; an SOI substrate; or the like can be used as thesubstrate 400, or the substrate provided with a semiconductor element can be used as thesubstrate 400. - Further, a flexible substrate may be used as the
substrate 400. In the case where a flexible substrate is used, a transistor including an oxide semiconductor film may be directly formed over the flexible substrate, or alternatively, a transistor including an oxide semiconductor film may be formed over another substrate and separated from another substrate to be transferred to the flexible substrate. In order to separate the transistor from another substrate and transfer the transistor to the flexible substrate, a separation layer may be provided between the substrate and the transistor including the oxide semiconductor film. - An insulating film serving as a base film may be provided between the
substrate 400 and thegate electrode layer 401. The base film prevents diffusion of an impurity element from thesubstrate 400, and can be formed with a single-layer structure or a multi-layer structure using one or more of a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film. - The
gate electrode layer 401 can be formed with a single-layer structure or a multi-layer structure using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, and/or an alloy material which contains any of these materials as a main component by a plasma CVD method, a sputtering method, or the like. - Next, the
gate insulating film 402 is formed over thegate electrode layer 401. Thegate insulating film 402 can be formed with a single-layer structure or a multi-layer structure using silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, hafnium oxide, and/or gallium oxide, and/or a combination thereof by a plasma CVD method, a sputtering method, or the like. - It is far preferable that an insulating material containing a component/components similar to the oxide semiconductor film formed later be used for the
gate insulating film 402. This is because such a material can be fit well to the oxide semiconductor film, and therefore, this use for thegate insulating film 402 enables a state of an interface between thegate insulating film 402 and the oxide semiconductor film to be kept well. To contain the component(s) similar to the oxide semiconductor film means to contain at least one selected from a constituent element or constituent elements of the oxide semiconductor film. For example, in the case where the oxide semiconductor film is formed using an In—Ga—Zn-based oxide semiconductor material, gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film. - As a far preferable example of a multi-layer structure for the
gate insulating film 402, a multi-layer structure of a film (hereinafter referred to as a film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film and a film (hereinafter referred to as a film b) containing a material/materials different from the component material(s) of the film a can be given. This is because with a structure in which the film a and the film b are stacked on the oxide semiconductor film side in order, electrical charge is preferentially trapped by a charge trapping center in an interface between the films a and b (as compared to an interface between the oxide semiconductor film and the film a), so that charge trapping in the interface with the oxide semiconductor film can be sufficiently suppressed, leading to improvement in the reliability of a semiconductor device. - A
transistor 460 in which a gate insulating film has a multi-layer structure is shown inFIG. 3B . In thetransistor 460, a firstgate insulating film 402 a and a secondgate insulating film 402 b are stacked on thegate electrode layer 401, and theoxide semiconductor film 403 is formed over the secondgate insulating film 402 b. In thetransistor 460, the secondgate insulating film 402 b which is in contact with theoxide semiconductor film 403 is the film (film a) containing the insulating material containing the component(s) similar to theoxide semiconductor film 403, the firstgate insulating film 402 a below the secondgate insulating film 402 b is the film (film b) containing a material/materials different from the component material(s) of the secondgate insulating film 402 b. - For example, in the case where an In—Ga—Zn-based oxide semiconductor film is used as the
oxide semiconductor film 403, a gallium oxide film can be used as the secondgate insulating film 402 b and a silicon oxide film can be used as the firstgate insulating film 402 a. Further, it is preferable that a film containing an insulating material containing a component/components similar to the oxide semiconductor film be used as an insulatingfilm 407 on and in contact with theoxide semiconductor film 403. With the films containing the insulating materials containing the components similar to the oxide semiconductor film, which are provided above and below and in contact with theoxide semiconductor film 403, theoxide semiconductor film 403 can be surrounded. With a structure in which the films (films a) containing the insulating materials containing the components similar to the oxide semiconductor film are provided above and below and in contact with theoxide semiconductor film 403 and the film (film b) containing the material/materials different from the component material(s) of the films a is provided outside of the films a, electrical charge can be preferentially trapped by a charge trapping center in an interface between the film a and the film b above and/or below theoxide semiconductor film 403, so that charge trapping in an interface with the oxide semiconductor film can be sufficiently suppressed more effectively, leading to improvement in the reliability of a semiconductor device. - For the method for manufacturing the
gate insulating film 402, a high-density plasma CVD method using microwaves (e.g., with a frequency of 2.45 GHz) is preferably employed because an insulating layer which is dense and can have high breakdown voltage and high quality. This is because when the highly purified oxide semiconductor is closely in contact with the high-quality gate insulating film, the interface state density can be reduced and interface properties can be favorable. - Further, an insulating layer may be formed, whose film quality and interface characteristics with the oxide semiconductor are improved by heat treatment which is performed after film formation. In either case, any film can be used as long as film quality as a gate insulating film is high, interface state density with an oxide semiconductor is decreased, and a favorable interface can be formed.
- In order that hydrogen, a hydroxyl group, and moisture are contained as little as possible in the
gate insulating film 402 and the oxide semiconductor film over thegate insulating film 402, it is preferable that thesubstrate 400 over which thegate electrode layer 401 is formed or thesubstrate 400 which has been subjected to the manufacturing process up to and including the step of forming thegate insulating film 402 be preheated in a preheating chamber of a sputtering apparatus as pretreatment for the formation of the oxide semiconductor film so that an impurity such as hydrogen and moisture adsorbed to thesubstrate 400 is eliminated and removed. As an exhaustion unit provided in the preheating chamber, a cryopump is preferable. This preheating treatment can be omitted. Further, this preheating may be performed on thesubstrate 400 subjected to the manufacturing method up to and including the step of forming thesource electrode layer 405 a and thedrain electrode layer 405 b, before the formation of the insulatingfilm 407. - Next, over the
gate insulating film 402, an oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 200 nm, preferably greater than or equal to 5 nm and less than or equal to 30 nm is formed. - As an oxide semiconductor used for the oxide semiconductor film, any of the following oxide semiconductors can be used: a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor; a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor; a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Mg—O-based oxide semiconductor, or an In—Ga—O-based oxide semiconductor; a an In—O-based oxide semiconductor; a Sn—O-based oxide semiconductor; a Zn—O-based oxide semiconductor; and the like. Further, SiO2 may be contained in the above oxide semiconductor. Note that here, for example, the In—Ga—Zn—O-based oxide semiconductor means an oxide film containing indium (In), gallium (Ga), and zinc (Zn) and there is no particular limitation on the stoichiometric proportion. The In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn.
- As the oxide semiconductor film, a thin film of a material represented by the chemical formula, InMO3(ZnO)m (m>0), can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, M may be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.
- For the oxide semiconductor film, an oxide semiconductor containing indium, an oxide semiconductor containing indium and gallium, or the like can be preferably used.
- In this embodiment, the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target. The oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
- A target used for formation of the oxide semiconductor film by a sputtering method is, for example, an oxide target containing In2O3, Ga2O3, and ZnO at a composition ratio of 1:1:1 [molar ratio], so that an In—Ga—Zn—O film is formed. Without limitation on the material and the composition of the target, for example, an oxide target having a composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] may be used.
- Furthermore, the filling rate of the oxide target is 90% to 100%, preferably 95% to 99.9%. With use of the metal oxide target with such a high filling rate, a dense oxide semiconductor film can be formed.
- It is preferable that a high-purity gas with an impurity such as hydrogen, water, hydroxyl, or hydride removed be used as a sputtering gas for forming the oxide semiconductor film.
- The substrate is held in a deposition chamber kept under reduced pressure, and the substrate temperature is set to temperatures higher than or equal to 100° C. and lower than or equal to 600° C., preferably higher than or equal to 200° C. and lower than or equal to 400° C. By forming the oxide semiconductor film while heating the substrate, the concentration of the impurity included in the oxide semiconductor film can be reduced. In addition, damage by sputtering can be suppressed. Then, residual moisture in the deposition chamber is removed, a sputtering gas from which hydrogen and moisture are removed is introduced, and the above-described target is used, so that the oxide semiconductor film is formed over the
substrate 400. In order to remove moisture remaining in the deposition chamber, an entrapment vacuum pump such as a cryopump, an ion pump, or a titanium sublimation pump is preferably used. As an exhaustion unit, a turbo molecular pump to which a cold trap is added may be used. In the deposition chamber which is evacuated with the cryopump, for example, a hydrogen atom, a compound containing a hydrogen atom, such as water, (more preferably, also a compound containing a carbon atom), and the like are removed, whereby the concentration of an impurity in the oxide semiconductor film formed in the deposition chamber can be reduced. - As one example of the film formation condition, the following is employed: the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%). A pulsed direct-current power source is preferably used since powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness comes to be uniform.
- Next, the oxide semiconductor film is processed into an island-shaped
oxide semiconductor film 441 by a second photolithography step (seeFIG. 2A ). A resist mask used for forming the island-shapedoxide semiconductor film 441 may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced. - In the case where a contact hole is formed in the
gate insulating film 402, a step of forming the contact hole can be performed at the same time as processing of the oxide semiconductor film. - Note that the etching of the oxide semiconductor film may be dry etching, wet etching, or both dry etching and wet etching. As an etchant used for wet etching of the oxide semiconductor film, for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, or the like can be used. As the etchant, ITO07N (produced by KANTO CHEMICAL CO., INC.) may be used as well.
- Next, the
oxide semiconductor film 441 is subjected to heat treatment. With this heat treatment, excessive hydrogen (including water and a hydroxyl group) can be removed (dehydration or dehydrogenation), the structure of the oxide semiconductor film can be improved, and defect levels in an energy gap can be reduced. The temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C., or higher than or equal to 400° C. and less than the strain point of the substrate. In this embodiment, the substrate is put in an electric furnace which is a kind of heat treatment apparatus and the oxide semiconductor film is subjected to heat treatment at 450° C. for one hour in a nitrogen atmosphere, and then, water and hydrogen are prevented from being mixed into the oxide semiconductor film by preventing the substrate from being exposed to the air; thus, theoxide semiconductor film 403 is obtained (seeFIG. 2B ). - Note that the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object by heat conduction or heat radiation from a heater such as a resistance heater may be used. For example, an RTA (rapid thermal anneal) apparatus such as a GRTA (gas rapid thermal anneal) apparatus or an LRTA (lamp rapid thermal anneal) apparatus can be used. An LRTA apparatus is an apparatus for heating an object by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas. As the high temperature gas, an inert gas which does not react with an object by heat treatment, such as nitrogen or a rare gas like argon, is used.
- For example, as the heat treatment, GRTA may be performed, in which the substrate is moved into an inert gas heated at a high temperature of 650° C. to 700° C., and heated for several minutes, and then the substrate is moved out of the inert gas.
- In the heat treatment, it is preferable that an impurity such as water, hydrogen, and the like be not contained in nitrogen or the rare gas such as helium, neon, or argon. The purity of nitrogen or the rare gas such as helium, neon, or argon which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- In addition, after the oxide semiconductor film is heated by the heat treatment, a high-purity oxygen gas, a high-purity N2O gas, or ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system) may be introduced into the same furnace. It is preferable that water, hydrogen, or the like be not contained in the oxygen gas or the N2O gas. The purity of the oxygen gas or the N2O gas which is introduced into the heat treatment apparatus is preferably 6N or more, far preferably 7N or more (i.e., the impurity concentration in the oxygen gas or the N2O gas is preferably 1 ppm or lower, far preferably 0.1 ppm or lower). The oxygen gas or the N2O gas acts to supply oxygen that is a main component of the oxide semiconductor and that is reduced by the step for removing an impurity for the dehydration or dehydrogenation, so that the oxide semiconductor film can be a high-purified, electrically i-type (intrinsic) oxide semiconductor film.
- The heat treatment can also be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film. In that case, after the heat treatment, the substrate is taken out of the heating apparatus and a photolithography step is performed on the oxide semiconductor film. The heat treatment may be performed after a source electrode layer and a drain electrode layer are formed over the island-shaped oxide semiconductor film as long as the oxide semiconductor film is formed before that heat treatment.
- Next, oxygen doping treatment is performed on the dehydrated or dehydrogenated
oxide semiconductor film 403. By the oxygen doping treatment on theoxide semiconductor film 403,oxygen 421 is supplied to theoxide semiconductor film 403, so that oxygen is contained in theoxide semiconductor film 403 and/or the vicinity of the interface (seeFIG. 2C ). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of theoxide semiconductor film 403, preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a single crystalline oxide semiconductor film is denoted by Y, preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an oxide semiconductor film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 2Z. Too much of oxygen content may lead to absorption of hydrogen into theoxide semiconductor film 403, like a hydrogen storing alloy (hydrogen storage alloy). Theoxygen 421 for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion. In this manner, the amount of oxygen is made to greater than that of hydrogen in the oxide semiconductor film. - For example, in the case of using a material a single crystal structure of which is represented by InGaO3(ZnO)m (m>0), the composition of the
oxide semiconductor film 403 is represented by InGaZnOx; therefore, in the case where m is 1 (InGaZnO4), the acceptable x is greater than 4 and less than 8, and in the case where m is 2 (InGaZn2O5), the acceptable x is greater than 5 and less than 10. Such an oxygen-excessive region may exist in a part of the oxide semiconductor film (including its interface). - In the oxide semiconductor film, oxygen is one of main component materials. Therefore, it is difficult to estimate the oxygen concentration of the oxide semiconductor film accurately with Secondary Ion Mass Spectroscopy (SIMS) or the like. That is, it is difficult to judge whether oxygen is intentionally added to the oxide semiconductor film or not.
- Isotopes such as O17 or O18 exist in oxygen, and it is know that the existence proportions of them in nature are about 0.037% and about 0.204% of the whole oxygen atoms. Therefore, the concentration of such an isotope in the oxide semiconductor film can be estimated by SIMS or the like, and the measurement of such a concentration enables the oxygen concentration in the oxide semiconductor film to be estimated accurately. Thus, by measuring the concentration, whether oxygen is intentionally added to the oxide semiconductor film or not may be judged.
- For example, with respect to the concentration of O18, a concentration of the isotope of oxygen D1(O18) in an oxygen-added region and a concentration of the isotope of oxygen D2(O18) in a no-oxygen-added region have a relationship represented by D1(O18)>D2(O18).
- The
oxygen 421 added to (contained in) the oxide semiconductor film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion). - Oxygen for the doping (an oxygen radical, an oxygen atom, and/or an oxygen ion) may be supplied from a plasma generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the
oxygen 421 can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process theoxide semiconductor film 403. - In addition, heat treatment (at 150° C. to 470° C.) may be performed on the
oxide semiconductor film 403 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between theoxygen 421 and theoxide semiconductor film 403 can be removed from theoxide semiconductor film 403. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like. - Through the above steps, the
oxide semiconductor film 403 is highly purified and is made electrically i-type (intrinsic). - The oxygen doping treatment on the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film or after a source electrode layer and a drain electrode layer are stacked on the island-shaped oxide semiconductor film as long as the heat treatment is performed before that oxygen doping treatment.
- Next, a conductive film for forming a source electrode layer and a drain electrode layer (including a wiring formed of the same layer as the source electrode layer and the drain electrode layer) is formed over the
gate insulating film 402 and theoxide semiconductor film 403. As the conductive film serving as the source electrode layer and the drain electrode layer, for example, a metal film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film including any of the above elements as its component (e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) can be used. A film of a high-melting-point metal such as Ti, Mo, or W or a metal nitride film thereof (e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) may be provided over or/and below the metal film such as an Al film or a Cu film to form the conductive film serving as the source electrode layer and the drain electrode layer. Alternatively, the conductive film used for the source electrode layer and the drain electrode layer may be formed using a conductive metal oxide. As the conductive metal oxide, indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium oxide-tin oxide alloy (In2O3—SnO2; abbreviated to ITO), indium oxide-zinc oxide alloy (In2O3—ZnO), or any of these metal oxide materials in which silicon or silicon oxide is contained can be used. - A resist mask is formed over the conductive film by a third photolithography step, and is selectively etched, so that the
source electrode layer 405 a and thedrain electrode layer 405 b are formed. Then, the resist mask is removed. - In order to reduce the number of photomasks used in a photolithography step and reduce the number of photolithography steps, an etching step may be performed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted to have a plurality of intensities. A resist mask formed with the use of a multi-tone mask has a plurality of thicknesses and further can be changed in shape by etching; therefore, the resist mask can be used in a plurality of etching steps for processing into different patterns. Therefore, a resist mask corresponding to at least two kinds of different patterns can be formed with one multi-tone mask. Thus, the number of photomasks can be reduced and the number of photolithography steps can be also reduced accordingly, whereby simplification of a manufacturing process can be realized.
- It is preferable that etching conditions be optimized so as not to etch and cut the
oxide semiconductor film 403 when the conductive film is etched. However, it is difficult to obtain etching conditions in which only the conductive film is etched and theoxide semiconductor film 403 is not etched at all. In some cases, part of theoxide semiconductor film 441 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove portion (a depressed portion) is formed. - In this embodiment, a Ti film is used as the conductive film and an In—Ga—Zn—O-based oxide semiconductor is used as the
oxide semiconductor film 403, and therefore, ammonium hydrogen peroxide (a mixture of ammonia, water, and hydrogen peroxide) is used as an etchant. - The number of carriers in the highly purified
oxide semiconductor film 403 is significantly small (close to zero). - Through the above process, the
transistor 410 is formed (seeFIG. 2D ). Thetransistor 410 is a transistor including theoxide semiconductor film 403 which is highly purified and from which an impurity such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) is removed. Therefore, variation in the electric characteristics of thetransistor 410 is suppressed and thetransistor 410 is electrically stable. - Further, as shown in
FIG. 3A , atransistor 440 in which an insulatingfilm 407 and an insulatingfilm 409 are provided over theoxide semiconductor film 403 and thesource electrode layer 405 a and thedrain electrode layer 405 b can be formed. - The insulating
film 407 can be formed to a thickness of at least 1 nm by a method by which an impurity such as water and hydrogen does not enter the insulatingfilm 407, such as a sputtering method, as appropriate. When hydrogen is contained in the insulatingfilm 407, entry of hydrogen into the oxide semiconductor film or extraction of oxygen from the oxide semiconductor film by hydrogen is caused; thus, the resistance of a back channel of the oxide semiconductor film might become low (the conductivity of the same might be n-type) and a parasitic channel might be formed. Therefore, it is important that a film formation method in which hydrogen is not used is employed in order to form the insulatingfilm 407 containing as little hydrogen as possible. - As the insulating
film 407, an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be typically used. - In this embodiment, a 200-nm-thick gallium oxide film is deposited as the insulating
film 407 by a sputtering method. - It is far preferable that an insulating material containing a component/components similar to the
oxide semiconductor film 403 be used for the insulatingfilm 407, like thegate insulating film 402. This is because such a material can be fit well to the oxide semiconductor film, and therefore, this use for the insulatingfilm 407 enables a state of an interface between the insulating film and the oxide semiconductor film to be kept well. For example, in the case where the oxide semiconductor film is formed using an In—Ga—Zn-based oxide semiconductor material, gallium oxide can be given as an example of the insulating material containing the component(s) similar to theoxide semiconductor film 403. - As a far preferable example of a multi-layer structure for the insulating
film 407, a multi-layer structure of a film (hereinafter referred to as a film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film and a film (hereinafter referred to as a film b) containing a material/materials different from the component material(s) of the film a can be given. This is because with a structure in which the film a and the film b are stacked on the oxide semiconductor film side in order, electrical charge is preferentially trapped by a charge trapping center in an interface between the films a and b (as compared to an interface between the oxide semiconductor film and the film a), so that charge trapping in the interface with the oxide semiconductor film can be sufficiently suppressed, leading to improvement in the reliability of a semiconductor device. - For example, a multi-layer in which a gallium oxide film and a silicon oxide film are stacked on the
oxide semiconductor film 403 side, or a multi-layer in which a gallium oxide film and a silicon nitride film are stacked on theoxide semiconductor film 403 side can be preferably used as the insulatingfilm 407. - The substrate temperature at the time of the formation of the silicon oxide film may be higher than or equal to room temperature and lower than or equal to 300° C.; in this embodiment, the substrate temperature is 100° C. as an example. The silicon oxide film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen. As a target, a silicon oxide target or a silicon target can be used. For example, the silicon oxide film can be formed using a silicon target by a sputtering method in an atmosphere containing oxygen.
- In order to remove residual moisture from the deposition chamber of the insulating
film 407 in a manner similar to that of the formation of the oxide semiconductor film, an entrapment vacuum pump (such as a cryopump) is preferably used. When the insulatingfilm 407 is deposited in the deposition chamber evacuated using a cryopump, the impurity concentration of the insulatingfilm 407 can be reduced. As an evacuation unit for removing moisture remaining in the deposition chamber of the insulatingfilm 407, a turbo molecular pump provided with a cold trap may be used. - It is preferable that a high-purity gas from which an impurity such as hydrogen, water, hydroxyl group, or hydride be removed be used as a sputtering gas used for formation of the insulating
film 407. - It is preferable to perform heat treatment after the formation of the insulating
film 407. The heat treatment is performed at a temperature higher than or equal to 250° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 600° C. or less than a strain point of the substrate. - The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas preferably contains water, hydrogen, or the like as less as possible. The purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- In the case where the insulating
film 407 contains oxygen and the heat treatment is performed on the state where the oxide semiconductor film is in contact with the insulatingfilm 407, oxygen can be further supplied to the oxide semiconductor film from the insulatingfilm 407 containing oxygen. - It is preferable to form the insulating
film 409 over the insulatingfilm 407, as a protective insulating film for blocking to prevent entrance of an impurity such as moisture or hydrogen into theoxide semiconductor film 403 and to prevent discharge of oxygen from thegate insulating film 402, theoxide semiconductor film 403, the insulatingfilm 407, and an interface thereof. As the insulatingfilm 409, it is preferable to use an inorganic insulating film such as a silicon nitride film, an aluminum oxide film, or the like. For example, a silicon nitride film is formed by an RF sputtering method. An RF sputtering method is preferable as a method for forming the insulatingfilm 409 because of its high productivity. - Heat treatment may be performed after the insulating film is formed. For example, the heat treatment may be performed at a temperature higher than or equal to 100° C. and lower than or equal to 200° C. in the air for 1 hour to 30 hours. This heat treatment may be performed at a fixed heating temperature; alternatively, the following change in the heating temperature may be conducted plural times: the heating temperature is increased from room temperature to a temperature higher than or equal to 100° C. and lower than or equal to 200° C. and then decreased to room temperature.
- Other structures of transistors including the
oxide semiconductor film 403 including an oxygen-excessive region subjected to oxygen doping treatment are shown inFIGS. 3C and 3D . - A
transistor 420 illustrated inFIG. 3C is one of bottom-gate transistors referred to as a channel-protective (channel-stop) transistor and is also referred to as an inverted-staggered transistor. - The
transistor 420 includes, over thesubstrate 400 having an insulating surface, thegate electrode layer 401, thegate insulating film 402, theoxide semiconductor film 403, an insulatingfilm 427 functioning as a channel protective layer covering a channel formation region of theoxide semiconductor film 403, thesource electrode layer 405 a, and thedrain electrode layer 405 b. The insulatingfilm 409 is formed so as to cover thetransistor 420. - A
transistor 430 shown inFIG. 3D is a bottom-gate transistor and includes, over thesubstrate 400 having an insulating surface, thegate electrode layer 401, thegate insulating film 402, thesource electrode layer 405 a, thedrain electrode layer 405 b, and theoxide semiconductor film 403. The insulatingfilm 407 which covers thetransistor 430 and is in contact with theoxide semiconductor film 403 is provided. The insulatingfilm 409 is provided over the insulatingfilm 407. - In the
transistor 430, thegate insulating film 402 is provided on and in contact with thesubstrate 400 and thegate electrode 401, and thesource electrode 405 a and thedrain electrode 405 b are provided on and in contact with thegate insulating film 402. Further, theoxide semiconductor film 403 is provided over thegate insulating film 402, thesource electrode layer 405 a, and thedrain electrode layer 405 b. - In each of the
transistors oxide semiconductor film 403 according to this embodiment, the current in an off state (the off-state current) can be small. - Such a transistor including an oxide semiconductor film subjected to oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
- Further, in the
transistors oxide semiconductor film 403, relatively high field-effect mobility can be obtained, which enables high-speed operation. Consequently, with the above transistor provided in a pixel portion of a semiconductor device having a display function, high-quality images can be displayed. In addition, by using the transistor including the highly purified oxide semiconductor film, a driver circuit portion and a pixel portion can be formed over one substrate, whereby the number of components of the semiconductor device can be reduced. - In this manner, a semiconductor device including an oxide semiconductor, which has stable electric characteristics, can be provided. Accordingly, a semiconductor device with high reliability can be provided.
- In
Embodiment 2, another embodiment of a semiconductor device and one embodiment of a method for manufacturing the semiconductor device will be described usingFIGS. 4A to 4F and 5A to 5C. In this embodiment, a transistor including an oxide semiconductor film will be described as an example of a semiconductor device. The same portions as and portions having functions similar to those described inEmbodiment 1 can be formed in a manner similar to that described inEmbodiment 1; therefore, description thereof is omitted. In addition, detailed description of the same portions is omitted. - An example of a method for manufacturing a
transistor 450 is shown inFIGS. 4A to 4F and 5A to 5C. In this embodiment, oxygen doping treatment is performed plural times in a manufacturing process of thetransistor 450. - First, a conductive film is formed over the
substrate 400 having an insulating surface and is subjected to a first photolithography step to form thegate electrode layer 401. - Next, the
gate insulating film 402 is formed over the gate electrode layer 401 (seeFIG. 4A ). - Next, oxygen doping treatment is performed on the
gate insulating film 402. By the oxygen doping treatment on thegate insulating film 402,oxygen 421 a is supplied to thegate insulating film 402, so that oxygen is contained in thegate insulating film 402 and/or the vicinity of the interface (seeFIG. 4B ). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of thegate insulating film 402, preferably to greater than the stoichiometric proportion and less than four times as much as the stoichiometric proportion thereof, far preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a material of the gate insulating film in the case where the material is a single crystal is denoted by Y, preferably to greater than Y and less than 4Y, far preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in a gate insulating film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 4Z, far preferably to greater than Z and less than 2Z. Theoxygen 421 a for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion. - For example, in the case of using an oxide insulating film the composition of which is represented by GaOx (x>0), since the stoichiometric proportion of gallium oxide is Ga:O=1:1.5, an oxide insulating film including an oxygen-excessive region where x is greater than 1.5 and less than 6 is formed. For example, in the case of using an oxide insulating film the composition of which is represented by SiOx (x>0), since the stoichiometric proportion of silicon oxide is Si:O=1:2, an oxide insulating film including an oxygen-excessive region where x is greater than 2 and less than 8 is formed. Such an oxygen-excessive region may exist in a part of the gate insulating film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the gate insulating film.
- The
oxygen 421 a added to (contained in) the gate insulating film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion). - Oxygen for the doping may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the
oxygen 421 a can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process thegate insulating film 402. - In addition, heat treatment (at 150° C. to 470° C.) may be performed on the
gate insulating film 402 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between theoxygen 421 a and thegate insulating film 402 can be removed from thegate insulating film 402. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like. - In order that hydrogen, a hydroxyl group, and moisture are contained as little as possible in the
gate insulating film 402 and the oxide semiconductor film provided over thegate insulating film 402, it is preferable that thesubstrate 400 over which thegate electrode layer 401 is formed or thesubstrate 400 which has been subjected to the manufacturing process up to and including the step for forming thegate insulating film 402 be preheated in a preheating chamber of a sputtering apparatus as pretreatment for the formation of the oxide semiconductor film, so that impurities such as hydrogen and moisture adsorbed to thesubstrate 400 are eliminated and removed. As an exhaustion unit provided in the preheating chamber, a cryopump is preferable. This preheating treatment is not necessarily performed. Further, this preheating may be performed on thesubstrate 400 which has been subjected to the manufacturing process up to and including the step for forming thesource electrode layer 405 a and thedrain electrode layer 405 b, before the formation of the insulatingfilm 407. - Next, over the
gate insulating film 402, an oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 200 nm, preferably greater than or equal to 5 nm and less than or equal to 30 nm is formed. - In this embodiment, the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target. The oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
- The target used for formation of the oxide semiconductor film by a sputtering method is, for example, an oxide target containing In2O3, Ga2O3, and ZnO at a composition ratio of 1:1:1 [molar ratio], so that an In—Ga—Zn—O film can be formed.
- It is preferable that a high-purity gas from which an impurity such as hydrogen, water, a hydroxyl group, or hydride is removed be used as a sputtering gas used for forming the oxide semiconductor film.
- As one example of the film formation condition, the following is employed: the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%). Note that a pulsed direct-current power source is preferably used, in which case powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness can be uniform.
- Next, the oxide semiconductor film is processed into the island-shaped
oxide semiconductor film 441 through a second photolithography step (seeFIG. 4C ). - Next, the
oxide semiconductor film 441 is subjected to heat treatment. With this heat treatment, excessive hydrogen (including water and a hydroxyl group) can be removed (dehydration or dehydrogenation), the structure of the oxide semiconductor film can be improved, and defect levels in an energy gap can be reduced. The temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C., or higher than or equal to 400° C. and lower than the strain point of the substrate. In this embodiment, the substrate is put in an electric furnace which is a kind of heat treatment apparatus and the oxide semiconductor film is subjected to heat treatment at 450° C. for one hour in a nitrogen atmosphere, and then, water and hydrogen are prevented from being mixed into the oxide semiconductor film by preventing the substrate from being exposed to the air; thus, theoxide semiconductor film 403 is obtained (seeFIG. 4D ). - The heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object by heat conduction or heat radiation from a heater such as a resistance heater may be used.
- For example, as the heat treatment, GRTA may be performed, in which the substrate is moved into an inert gas heated at a high temperature of 650° C. to 700° C., and heated for several minutes, and then the substrate is moved out of the inert gas.
- The heat treatment can also be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film. In that case, after the heat treatment, the substrate is taken out of the heating apparatus and a photolithography step is performed on the oxide semiconductor film. The heat treatment may be performed after a source electrode layer and a drain electrode layer are formed over the island-shaped oxide semiconductor film as long as the oxide semiconductor film is formed before that heat treatment.
- Next, oxygen doping treatment is performed on the dehydrated or dehydrogenated
oxide semiconductor film 403. By the oxygen doping treatment on theoxide semiconductor film 403,oxygen 421 b is supplied to theoxide semiconductor film 403, so that oxygen is contained in theoxide semiconductor film 403 and/or the vicinity of the interface (seeFIG. 4E ). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of theoxide semiconductor film 403, preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a single crystalline oxide semiconductor film is denoted by Y, preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an oxide semiconductor film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 2Z. Too much of oxygen content may lead to absorption of hydrogen into theoxide semiconductor film 403, like a hydrogen storing alloy (hydrogen storage alloy). Theoxygen 421 b for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion. - For example, in the case of using a material a single crystal structure of which is represented by InGaO3(ZnO)m (m>0), the composition of the
oxide semiconductor film 403 is represented by InGaZnOx; therefore, in the case where m is 1 (InGaZnO4), the acceptable x is greater than 4 and less than 8, and in the case where m is 2 (InGaZn2O5), the acceptable x is greater than 5 and less than 10. Such an oxygen-excessive region may exist in a part of the oxide semiconductor film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the oxide semiconductor film. - The
oxygen 421 b added to (contained in) the oxide semiconductor film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion). - Oxygen for the doping (an oxygen radical, an oxygen atom, and/or an oxygen ion) may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the
oxygen 421 b can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process theoxide semiconductor film 403. - It is preferable to electrically bias the substrate in order to add oxygen more preferably.
- In addition, heat treatment (at 150° C. to 470° C.) may be performed on the
oxide semiconductor film 403 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between theoxygen 421 b and theoxide semiconductor film 403 can be removed from theoxide semiconductor film 403. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like. - Through the above steps, the
oxide semiconductor film 403 is highly purified and is made electrically i-type (intrinsic). - The oxygen doping treatment on the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film or after a source electrode layer and a drain electrode layer are stacked on the island-shaped oxide semiconductor film as long as the heat treatment is performed before that oxygen doping treatment.
- Next, a conductive film for forming a source electrode layer and a drain electrode layer (including a wiring formed of the same layer as the source electrode layer and the drain electrode layer) is formed over the
gate insulating film 402 and theoxide semiconductor film 403. - A resist mask is formed over the conductive film by a third photolithography step, and is selectively etched, so that the
source electrode layer 405 a and thedrain electrode layer 405 b are formed. Then, the resist mask is removed (seeFIG. 4F ). - It is preferable that etching conditions be optimized so as not to etch and cut the
oxide semiconductor film 403 when the conductive film is etched. However, it is difficult to obtain etching conditions in which only the conductive film is etched and theoxide semiconductor film 403 is not etched at all. In some cases, part of theoxide semiconductor film 441 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove portion (a depressed portion) is formed. - In this embodiment, a Ti film is used as the conductive film and an In—Ga—Zn—O-based oxide semiconductor is used as the
oxide semiconductor film 403, and therefore, ammonium hydrogen peroxide (a mixture of ammonia, water, and hydrogen peroxide) is used as an etchant. - The number of carriers in the highly purified
oxide semiconductor film 403 is significantly small (close to zero). - Next, the insulating
film 407 is formed over theoxide semiconductor film 403, thesource electrode layer 405 a, and thedrain electrode layer 405 b (seeFIG. 5A ). - The insulating
film 407 can be formed to a thickness of at least 1 nm by a method by which an impurity such as water and hydrogen does not enter the insulatingfilm 407, such as a sputtering method, as appropriate. - As the insulating
film 407, an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be typically used. - It is far preferable that an insulating material containing a component/components similar to the
oxide semiconductor film 403 be used for the insulatingfilm 407, like thegate insulating film 402. This is because such a material can be fit well to the oxide semiconductor film, and therefore, this use for the insulatingfilm 407 enables a state of an interface between the insulating film and the oxide semiconductor film to be kept well. For example, in the case where the oxide semiconductor film is formed using an In—Ga—Zn-based oxide semiconductor material, gallium oxide can be given as an example of the insulating material containing the component(s) similar to theoxide semiconductor film 403. - It is preferable to perform heat treatment after the formation of the insulating
film 407. The heat treatment is performed at a temperature higher than or equal to 250° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 600° C. or less than a strain point of the substrate. - The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas preferably contains water, hydrogen, or the like as less as possible. The purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
- In the case where the insulating
film 407 contains oxygen and the heat treatment is performed on the state where the oxide semiconductor film is in contact with the insulatingfilm 407, oxygen can be further supplied to the oxide semiconductor film from the insulatingfilm 407 containing oxygen. - Next, oxygen doping treatment is performed on the insulating
film 407. By the oxygen doping treatment on the insulatingfilm 407,oxygen 421 c is supplied to the insulatingfilm 407, so that oxygen is contained in theoxide semiconductor film 403, thegate insulating film 402, and/or the vicinity of the interface(s) of theoxide semiconductor film 403 and/or the gate insulating film 402 (seeFIG. 5B ). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of the insulatingfilm 407, preferably to greater than the stoichiometric proportion and less than four times as much as the stoichiometric proportion thereof, far preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a material of the insulating film in the case where the material is a single crystal is denoted by Y, preferably to greater than Y and less than 4Y, far preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an insulating film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 4Z, far preferably to greater than Z and less than 2Z. Theoxygen 421 c for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion. - For example, in the case of using an oxide insulating film the composition of which is represented by GaOx (x>0), since the stoichiometric proportion of gallium oxide is Ga:O=1:1.5, an insulating film including an oxygen-excessive region where x is greater than 1.5 and less than 6 is formed. For example, in the case of using an oxide insulating film the composition of which is represented by SiOx (x>0), since the stoichiometric proportion of silicon oxide is Si:O=1:2, an insulating film including an oxygen-excessive region where x is greater than 2 and less than 8 is formed. Such an oxygen-excessive region may exist in a part of the insulating film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the insulating film.
- The
oxygen 421 c added to (contained in) the insulatingfilm 407 preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion). - Oxygen for the doping (an oxygen radical, an oxygen atom, and/or an oxygen ion) may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the
oxygen 421 c can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the insulatingfilm 407. - In addition, heat treatment (at 150° C. to 470° C.) may be performed on the insulating
film 407 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between theoxygen 421 c and the insulatingfilm 407 can be removed from the insulatingfilm 407. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like. - It is preferable to form the insulating
film 409 over the insulatingfilm 407, as a protective insulating film for blocking to prevent entrance of an impurity such as moisture or hydrogen into theoxide semiconductor film 403. As the insulatingfilm 409, it is preferable to use an inorganic insulating film such as a silicon nitride film, an aluminum oxide film, or the like. For example, a silicon nitride film is formed by an RF sputtering method. An RF sputtering method is preferable as a method for forming the insulatingfilm 409 because of its high productivity. - Heat treatment may be performed after the insulating film is formed. For example, the heat treatment may be performed at a temperature higher than or equal to 100° C. and lower than or equal to 200° C. in the air for 1 hour to 30 hours. This heat treatment may be performed at a fixed heating temperature; alternatively, the following change in the heating temperature may be conducted plural times: the heating temperature is increased from room temperature to a temperature higher than or equal to 100° C. and lower than or equal to 200° C. and then decreased to room temperature.
- Through the above process, the
transistor 450 is formed (seeFIG. 5C ). Thetransistor 450 is a transistor including theoxide semiconductor film 403 which is highly purified and from which an impurity such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) is removed. Therefore, variation in the electric characteristics of thetransistor 450 is suppressed and thetransistor 450 is electrically stable. - In the
transistor 450 including the highly-purifiedoxide semiconductor film 403 in accordance with this embodiment, the current value in an off-state (off-current value) thereof can be low. - As described above, the oxygen doping treatment can be performed not only on the
oxide semiconductor film 403 but also on thegate insulating film 402 and/or the insulatingfilm 407. The oxygen doping treatment may be performed on either one or both of thegate insulating film 402 and the insulatingfilm 407. - In addition, heat treatment (at 150° C. to 470° C.) may be performed after the oxygen doping treatment is performed. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the dew point is less than or equal to −60° C., preferably less than or equal to −80° C. in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
- Such a transistor including an oxide semiconductor film subjected to oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
- Further, in the
transistor 450 including theoxide semiconductor film 403, relatively high field-effect mobility can be obtained, which enables high-speed operation. Consequently, with the above transistor provided in a pixel portion of a semiconductor device having a display function, high-quality images can be displayed. In addition, by using the transistor including the highly purified oxide semiconductor film, a driver circuit portion and a pixel portion can be formed over one substrate, whereby the number of components of the semiconductor device can be reduced. - In this manner, a semiconductor device including an oxide semiconductor, which has stable electric characteristics, can be provided. Accordingly, a semiconductor device with high reliability can be provided.
- In
Embodiment 3, another embodiment of a semiconductor device will be described usingFIGS. 13A to 13D . The same portions as and portions having functions similar to those described inEmbodiment Embodiment - In this embodiment, an example of a structure will be described in which a source electrode layer and/or a drain electrode layer of a transistor are/is connected to a conductive layer (such as a wiring layer or a pixel electrode layer). Note that this embodiment can also be applied to any of the transistors described in
Embodiments - As shown in
FIG. 13A , atransistor 470 includes, over thesubstrate 400 having an insulating surface, thegate electrode layer 401, thegate insulating film 402, theoxide semiconductor film 403, thesource electrode layer 405 a, and thedrain electrode layer 405 b. - As is described in
Embodiment 1, oxygen doping is performed on theoxide semiconductor film 403 which has been subjected to the heat treatment for dehydration or dehydrogenation also in a manufacturing process of thetransistor 470. Thetransistor 470 in this embodiment is an example in which thesource electrode layer 405 a and thedrain electrode layer 405 b are formed over theoxide semiconductor film 403 which has been subjected to heat treatment for dehydration or dehydrogenation, and then oxygen doping is performed thereon. - With this oxygen doping, an oxygen radical, an oxygen atom, or an oxygen ion reaches and is delivered to (is introduced to the vicinity of top surfaces of) the
source electrode layer 405 a and thedrain electrode layer 405 b in addition to theoxide semiconductor film 403. Consequently, as shown inFIG. 13A , the top surfaces of thesource electrode layer 405 a and thedrain electrode layer 405 b irradiated with the oxygen radical, the oxygen atom, or the oxygen ion may be oxidized to formmetal oxide regions film 407 and thesource electrode layer 405 a and thedrain electrode layer 405 b. Themetal oxide regions - Next, the insulating
film 407 and the insulatingfilm 409 are sequentially stacked over the transistor 470 (seeFIG. 13B ). - In the case of
FIG. 13B ,openings film 409, conductive layers connected to thesource electrode layer 405 a and thedrain electrode layer 405 b are formed are preferably formed so that parts of themetal oxide regions source electrode layer 405 a and thedrain electrode layer 405 b having low resistance (seeFIG. 13C ). Parts of the insulatingfilm 409, the insulatingfilm 407, and themetal oxide regions openings source electrode layer 405 a and thedrain electrode layer 405 b are partly removed to have depressions. The oxygen concentrations of regions of thesource electrode layer 405 a and thedrain electrode layer 405 b, which are exposed on the bottom surfaces of the depressions, are lower than those of regions of themetal oxide regions source electrode layer 405 a and thedrain electrode layer 405 b. - For example, the parts of the
source electrode layer 405 a and thedrain electrode layer 405 b may be removed from the top surfaces by a thickness one half or less than (preferably one third or less than) the thickness of thesource electrode layer 405 a, thedrain electrode layer 405 b in theopenings metal oxide regions source electrode layer 405 a and thedrain electrode layer 405 b. - Next,
conductive layers source electrode layer 405 a and thedrain electrode layer 405 b exposed in theopenings FIG. 13D ). Theconductive layers source electrode layer 405 a and thedrain electrode layer 405 b having low resistance without themetal oxide regions - An insulating film may be formed over the
conductive layers transistor 470. Moreover, by covering the insulating film, it is possible to prevent impurities such as hydrogen and moisture from entering theoxide semiconductor film 403 from theopenings - In this manner, favorable electrical connection of a transistor can be obtained and a semiconductor device including an oxide semiconductor with stable electrical characteristics can be provided. Therefore, a semiconductor device with high reliability can be provided.
- In
Embodiment 4, an example of a plasma apparatus (also referred to as an ashing apparatus) which can be used for oxygen doping treatment will be described. This apparatus is industrially suitable as compared to an ion implantation apparatus or the like because the apparatus can be applicable for a large-sized substrate of the fifth generation or later, for example. -
FIG. 14A illustrates an example of a top view of a single wafer multi-chamber equipment.FIG. 14B illustrates an example of a cross-sectional view of a plasma apparatus (also referred to as an ashing apparatus) used for oxygen doping. - The single wafer multi-chamber equipment illustrated in
FIG. 14A includes threeplasma apparatuses 10 each of which is shown inFIG. 14B , asubstrate supply chamber 11 including threecassette ports 14 for holding a process substrate, aload lock chamber 12, atransfer chamber 13, and the like. A substrate supplied to the substrate supply chamber is transferred through theload lock chamber 12 and thetransfer chamber 13 to avacuum chamber 15 in the plasma apparatus and is subjected to oxygen doping. The substrate which has been subjected to oxygen doping is transferred from the plasma apparatus, through the load lock chamber and the transfer chamber, to the substrate supply chamber. A transfer robot for transferring a process substrate is provided in each of thesubstrate supply chamber 11 and thetransfer chamber 13. - Referring to
FIG. 14B , theplasma apparatus 10 includes thevacuum chamber 15. A plurality of gas outlets and an ICP coil (an inductively coupled plasma coil) 16 which is a generation source of plasma are provided on a top portion of thevacuum chamber 15. - The number of gas outlets arranged in a center portion, seen from the top of the
plasma apparatus 10 is 12. Each of the gas outlets is connected to a gas supply source for supplying an oxygen gas, via agas flow path 17. The gas supply source includes a mass flow controller and the like and can supply an oxygen gas to the gas flow pass 17 at a desired flow rate (which is greater than 0 sccm and less than or equal to 1000 sccm). The oxygen gas supplied from the gas supply source is supplied from thegate flow pass 17, through the 12 gas outlets, into thevacuum chamber 15. - The
ICP coil 16 includes a plurality of strip-like conductors each of which has a spiral form. One end of each of the conductors is electrically connected to a first high-frequency power source 18 (13.56 MHz) via a matching circuit for controlling impedance, and the other end thereof is grounded. - A
substrate stage 19 functioning as a bottom electrode is provided in a lower portion of the vacuum chamber. By an electrostatic chuck or the like provided for thesubstrate stage 19, aprocess substrate 20 is held on the substrate stage so as to be detachable. Thesubstrate stage 19 is provided with a heater as a heating system and a He gas flow pass as a cooling system. The substrate stage is connected to a second high-frequency power source 21 (3.2 MHz) for applying a substrate bias voltage. - In addition, the
vacuum chamber 15 is provided with an exhaust port and an automatic pressure control valve (also referred to as an APC) 22. The APC is connected to a turbomolecular pump 23 and connected to adry pump 24 via the turbomolecular pump 23. The APC controls the inside pressure of the vacuum chamber. The turbomolecular pump 23 and thedry pump 24 reduce the inside pressure of thevacuum chamber 15. - Next, described is an example in which plasma is generated in the
vacuum chamber 15 illustrated inFIG. 14B , and oxygen doping is performed on an oxide semiconductor film or a gate insulating film provided for theprocess substrate 20. - First, the inside pressure of the
vacuum chamber 15 is held at a desired pressure by operating the turbomolecular pump 23, thedry pump 24, and the like, and then, theprocess substrate 20 is installed on the substrate stage in thevacuum chamber 15. Theprocess substrate 20 held on the substrate stage has at least an oxide semiconductor film or a gate insulating film. In this embodiment, the inside pressure of thevacuum chamber 15 is held at 1.33 Pa. The flow rate of the oxygen gas supplied through the gas outlets into thevacuum chamber 15 is set at 250 sccm. - Next, a high-frequency power is applied from the first high-
frequency power source 18 to theICP coil 16, thereby generating plasma. Then, a state in which plasma is being generated is kept for a certain period (longer than or equal to 30 seconds and shorter than or equal to 600 seconds). The high-frequency power applied to theICP coil 16 is greater than or equal to 1 kW and less than or equal to 10 kW. In this embodiment, the high-frequency power is set at 6000 W. At that time, a substrate bias voltage may be applied from the second high-frequency power source 21 to the substrate stage. In this embodiment, the power used for applying the substrate bias voltage is set at 1000 W. - In this embodiment, the state in which plasma is being generated is kept for 60 seconds and then, the
process substrate 20 is transferred from thevacuum chamber 15. In this manner, oxygen doping can be performed on the oxide semiconductor film or the gate insulating film provided for theprocess substrate 20. -
Embodiment 5 can be implemented in appropriate combination with any of the structures described in the other embodiments. - A semiconductor device having a display function (also referred to as a display device) can be manufactured using the transistor exemplified in any of
Embodiments 1 to 3. Moreover, part or all of driver circuitry which include the transistor can be formed over a substrate where a pixel portion is formed, whereby a system-on-panel can be obtained. - In
FIG. 12A , asealant 4005 is provided so as to surround apixel portion 4002 provided over afirst substrate 4001, and thepixel portion 4002 is sealed with asecond substrate 4006. InFIG. 12A , a signalline driver circuit 4003 and a scanline driver circuit 4004 which are formed using a single crystal semiconductor film or a polycrystalline semiconductor film over another substrate are mounted in a region that is different from the region surrounded by thesealant 4005 over thefirst substrate 4001. Various signals and potentials are supplied to the signalline driver circuit 4003, the scanline driver circuit 4004, and thepixel portion 4002 from flexible printed circuits (FPCs) 4018 a and 4018 b. - In
FIGS. 12B and 12C , thesealant 4005 is provided so as to surround thepixel portion 4002 and the scanline driver circuit 4004 which are provided over thefirst substrate 4001. Thesecond substrate 4006 is provided over thepixel portion 4002 and the scanline driver circuit 4004. Accordingly, thepixel portion 4002 and the scanline driver circuit 4004 are sealed together with the display element, by thefirst substrate 4001, thesealant 4005, and thesecond substrate 4006. InFIGS. 12B and 12C , the signalline driver circuit 4003 which is formed using a single crystal semiconductor film or a polycrystalline semiconductor film over another substrate is mounted in a region that is different from the region surrounded by thesealant 4005 over thefirst substrate 4001. InFIGS. 12B and 12C , various signals and potential are supplied to the signalline driver circuit 4003, the scanline driver circuit 4004, and thepixel portion 4002 from anFPC 4018. - Although
FIGS. 12B and 12C each illustrate an example in which the signalline driver circuit 4003 is separately formed and mounted on thefirst substrate 4001, an embodiment of the present invention is not limited to this structure. The scan line driver circuit may be separately formed and then mounted, or only part of the signal line driver circuit or part of the scan line driver circuit may be separately formed and then mounted. - A connection method of a separately formed driver circuit is not particularly limited; a chip on glass (COG) method, a wire bonding method, a tape automated bonding (TAB) method, or the like can be used.
FIG. 12A illustrates an example in which the signalline driver circuit 4003 and the scanline driver circuit 4004 are mounted by a COG method.FIG. 12B illustrates an example in which the signalline driver circuit 4003 is mounted by a COG method.FIG. 12C illustrates an example in which the signalline driver circuit 4003 is mounted by a TAB method. - In addition, the display device includes a panel in which the display element is sealed, and a module in which an IC or the like including a controller is mounted on the panel.
- Note that the display device in this specification means an image display device, a display device, or a light source (including a lighting device). Furthermore, the display device also includes the following in its category: a module to which a connector such as an FPC, a TAB tape, or a TCP is attached; a module having a TAB tape or a TCP at the tip of which a printed wiring board is provided; and a module in which an integrated circuit (IC) is directly mounted on a display element by a COG method.
- The pixel portion and the scan line driver circuit provided over the first substrate include a plurality of transistors; any of the transistors which are described in
Embodiments 1 to 3 can be applied thereto. - As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element) or a light-emitting element (also referred to as a light-emitting display element) can be used. The light-emitting element includes, in its category, an element whose luminance is controlled by a current or a voltage, and specifically includes, in its category, an inorganic electroluminescent (EL) element, an organic EL element, and the like. Furthermore, a display medium whose contrast is changed by an electric effect, such as electronic ink, can be used.
- An embodiment of the semiconductor device is described with reference to
FIGS. 6 to 8 .FIGS. 6 to 8 correspond to cross-sectional views along line M-N inFIG. 12B . - As illustrated in
FIGS. 6 to 8 , the semiconductor device includes aconnection terminal electrode 4015 and aterminal electrode 4016. Theconnection terminal electrode 4015 and theterminal electrode 4016 are electrically connected to a terminal included in theFPC 4018 via an anisotropicconductive film 4019. - The
connection terminal electrode 4015 is formed using the same conductive film as afirst electrode layer 4030, and theterminal electrode 4016 is formed using the same conductive film as source and drain electrodes of atransistor 4010 and atransistor 4011. - The
pixel portion 4002 and the scanline driver circuit 4004 which are provided over thefirst substrate 4001 include a plurality of transistors. InFIGS. 6 to 8 , thetransistor 4010 included in thepixel portion 4002 and thetransistor 4011 included in the scanline driver circuit 4004 are illustrated as an example. InFIG. 6 , insulatingfilms transistor 4010 and thetransistor 4011. InFIGS. 7 and 8 , an insulatinglayer 4021 is further provided. An insulatingfilm 4023 is an insulating film functioning as a base film. - In this embodiment, any transistors described in
Embodiments 1 to 3 can be applied to thetransistor 4010 and thetransistor 4011. Variation in electric characteristics of thetransistor 4010 and thetransistor 4011 is suppressed and thetransistor 4010 and thetransistor 4011 are electrically stable. Accordingly, highly reliable semiconductor devices can be provided as the semiconductor devices illustrated inFIGS. 6 to 8 . - In addition, in this embodiment, a conductive layer is provided over the insulating layer so as to overlap with a channel formation region of an oxide semiconductor film in the
transistor 4011 for the driver circuit. By providing the conductive layer so as to overlap with the channel formation region of the oxide semiconductor film, the amount of change in the threshold voltage of thetransistor 4011 by the BT test can be further reduced. The potential of the conductive layer may be the same as or different from that of a gate electrode of thetransistor 4011, and the conductive layer can be functioned as a second gate electrode. The potential of the conductive layer may be GND, 0V, or in a floating state. - The conductive layer also functions to block an external electric field, that is, to prevent an external electric field (particularly, to prevent static electricity) from effecting the inside (a circuit portion including a transistor). The blocking function of the conductive layer enables the variation in electrical characteristics of the transistor due to the effect of external electric field such as static electricity to be prevented.
- The
transistor 4010 provided in thepixel portion 4002 is electrically connected to the display element in a display panel. A variety of display elements can be used as the display element as long as display can be performed. - An example of a liquid crystal display device using a liquid crystal element as the display element is described in
FIG. 6 . InFIG. 6 , aliquid crystal element 4013 which is a display element includes thefirst electrode layer 4030, thesecond electrode layer 4031, and aliquid crystal layer 4008. An insulatingfilm 4032 and an insulatingfilm 4033 which serve as alignment films are provided so that theliquid crystal layer 4008 is provided therebetween. Thesecond electrode layer 4031 is provided on thesecond substrate 4006 side, and thefirst electrode layer 4030 and thesecond electrode layer 4031 are stacked with theliquid crystal layer 4008 provided therebetween. - A
spacer 4035 is a columnar spacer obtained by selective etching of an insulating film and is provided in order to control the thickness (a cell gap) of theliquid crystal layer 4008. Note the spacer is not limited to a columnar spacer, and, for example, a spherical spacer may be used. - In the case where a liquid crystal element is used as the display element, a thermotropic liquid crystal, a low-molecular liquid crystal, a high-molecular liquid crystal, a polymer dispersed liquid crystal, a ferroelectric liquid crystal, an anti-ferroelectric liquid crystal, or the like can be used. Such a liquid crystal material exhibits a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on a condition.
- Alternatively, a liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used. A blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase while temperature of cholesteric liquid crystal is increased. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which 5 weight percent or more of a chiral material is mixed is used for the liquid crystal layer in order to improve the temperature range. The liquid crystal composition which includes a liquid crystal exhibiting a blue phase and a chiral agent has a short response time of 1 msec or less, has optical isotropy, which makes the alignment process unneeded, and has a small viewing angle dependence. In addition, since an alignment film does not need to be provided and rubbing treatment is unnecessary, electrostatic discharge damage caused by the rubbing treatment can be prevented and defects and damage of the liquid crystal display device can be reduced in the manufacturing process. Thus, productivity of the liquid crystal display device can be increased.
- The specific resistivity of the liquid crystal material is 1×109 Ω·cm or more, preferably 1×1011 Ω·cm or more, far preferably 1×1012 Ω·cm or more. The value of the specific resistivity in this specification is measured at 20° C.
- The size of a storage capacitor formed in the liquid crystal display device is set considering the leakage current of the transistor provided in the pixel portion or the like so that electrical charge can be held for a predetermined period. By using the transistor including the highly purified oxide semiconductor film, it is enough to provide a storage capacitor having a capacitance that is ⅓ or less, preferably ⅕ or less of a liquid crystal capacitance of each pixel.
- In the transistor used in this embodiment, which includes the highly purified oxide semiconductor film, the current in an off state (the off-state current) can be made small. Accordingly, an electrical signal such as an image signal can be held for a long period, and a writing interval can be set long in a state where power is being supplied. Accordingly, the frequency of refresh operation can be reduced, which leads to an effect of suppressing power consumption.
- In addition, the transistor including the highly purified oxide semiconductor film used in this embodiment can have relatively high field-effect mobility and thus is capable of high speed operation. Therefore, by using the transistor in the pixel portion of the liquid crystal display device, a high-quality image can be displayed. In addition, since the transistors can be separately provided in a driver circuit portion and a pixel portion over one substrate, the number of components of the liquid crystal display device can be reduced.
- For the liquid crystal display device, a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, or the like can be used.
- A normally black liquid crystal display device such as a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be used. The vertical alignment mode is a method of controlling alignment of liquid crystal molecules of a liquid crystal display panel, in which liquid crystal molecules are aligned vertically to a panel surface when no voltage is applied. Some examples are given as the vertical alignment mode. For example, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, an advanced super view (ASV) mode, or the like can be used. Moreover, it is possible to use a method called domain multiplication or multi-domain design, in which a pixel is divided into some regions (subpixels) and molecules are aligned in different directions in their respective regions.
- In the display device, a black matrix (a light-blocking layer), an optical member (an optical substrate) such as a polarizing member, a retardation member, or an anti-reflection member, and the like are provided as appropriate. For example, circular polarization may be provided with a polarizing substrate and a retardation substrate. In addition, a backlight, a side light, or the like may be used as the light source.
- In addition, it is possible to employ a time-division display method (a field-sequential driving method) with the use of a plurality of light-emitting diodes (LEDs) as a backlight. A field-sequential driving method enables color display without using a color filter.
- As a display method in the pixel portion, a progressive method, an interlace method or the like can be employed. Further, color elements controlled in a pixel for color display are not limited to three colors of R, G, and B (R, G, and B correspond to red, green, and blue, respectively). For example, the following can be used: R, G, B, and W (W corresponds to white); or R, G, B, and one or more of yellow, cyan, magenta, and the like. The sizes of display regions may be different between respective dots of the color elements. The present invention is not limited to the application to a display device for color display but can also be applied to a display device for monochrome display.
- Alternatively, as the display element included in the display device, a light-emitting element utilizing electroluminescence can be used. Light-emitting elements utilizing electroluminescence are classified depending on whether a light-emitting material is an organic compound or an inorganic compound. In general, the former is referred to as an organic EL element, and the latter is referred to as an inorganic EL element.
- In an organic EL element, by application of voltage to a light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and current flows. The carriers (electrons and holes) are recombined, and thus, the light-emitting organic compound is excited. The light-emitting organic compound returns to a ground state from the excited state, thereby emitting light. Owing to such a mechanism, this light-emitting element is referred to as a current-excitation light-emitting element.
- The inorganic EL elements are classified depending on the element structure into a dispersion-type inorganic EL element and a thin-film inorganic EL element. A dispersion-type inorganic EL element has a light-emitting layer where particles of a light-emitting material are dispersed in a binder, and its light emission mechanism is donor-acceptor recombination type light emission that utilizes a donor level and an acceptor level. A thin-film inorganic EL element has a structure where a light-emitting layer is sandwiched between dielectric layers, which are further sandwiched between electrodes, and its light emission mechanism is localized type light emission that utilizes inner-shell electron transition of metal ions. An example using an organic EL element as a light-emitting element is described here.
- In order to extract light emitted from the light-emitting element, at least one of a pair of electrodes is transparent. The transistor and the light-emitting element are provided over the substrate. The light-emitting element have the following emission structure: a top emission structure in which light emission is extracted through the surface opposite to the substrate; a bottom emission structure in which light emission is extracted through the surface on the substrate side; or a dual emission structure in which light emission is extracted through the surface opposite to the substrate and the surface on the substrate side.
- An example of a light-emitting device in which a light-emitting element is used as the display element is illustrated in
FIG. 7 . A light-emittingelement 4513 which is a display element is electrically connected to thetransistor 4010 provided in thepixel portion 4002. A structure of the light-emittingelement 4513 is not limited to the stacked-layer structure including thefirst electrode layer 4030, anelectroluminescent layer 4511, and thesecond electrode layer 4031, which is shown inFIG. 7 . The structure of the light-emittingelement 4513 can be changed as appropriate depending on a direction in which light is extracted from the light-emittingelement 4513, or the like. - A
partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. It is particularly preferable that thepartition wall 4510 be formed using a photosensitive resin material to have an opening over thefirst electrode layer 4030 so that the sidewall of the opening has a tilted surface with continuous curvature. - The
electroluminescent layer 4511 may be formed using a single layer or a plurality of layers stacked. - A protective film may be formed over the
second electrode layer 4031 and thepartition wall 4510 in order to prevent entry of oxygen, hydrogen, moisture, carbon dioxide, or the like into the light-emittingelement 4513. As the protective film, a silicon nitride film, a silicon nitride oxide film, a diamond like carbon (DLC) film, or the like can be formed. In addition, in a space which is formed with thefirst substrate 4001, thesecond substrate 4006, and thesealant 4005, afiller 4514 is provided for sealing. It is preferable that a panel be packaged (sealed) with a protective film (such as a laminate film or an ultraviolet curable resin film) or a cover material with high air-tightness and little degasification so that the panel is not exposed to the outside air, in this manner. - As the
filler 4514, an ultraviolet curable resin or a thermosetting resin can be used as well as an inert gas such as nitrogen or argon. For example, PVC (polyvinyl chloride), acrylic, polyimide, an epoxy resin, a silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. For example, nitrogen is used for the filler. - In addition, if needed, an optical film, such as a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate (a quarter-wave plate or a half-wave plate), or a color filter, may be provided as appropriate for a light-emitting surface of the light-emitting element. Further, the polarizing plate or the circularly polarizing plate may be provided with an anti-reflection film. For example, anti-glare treatment by which reflected light can be diffused by surface roughness so as to reduce the glare can be performed.
- Further, an electronic paper in which electronic ink is driven can be provided as the display device. The electronic paper is also called an electrophoretic display device (electrophoretic display) and has advantages in that it exhibits the same level of readability as regular paper, it exhibits less power consumption than other display devices, and it can be in a thin and light form.
- An electrophoretic display device can have various modes. An electrophoretic display device contains a plurality of microcapsules dispersed in a solvent or a solute, each microcapsule containing first particles which are positively charged and second particles which are negatively charged. By applying an electric field to the microcapsules, the particles in the microcapsules move in opposite directions to each other and only the color of the particles gathering on one side is displayed. Note that the first particles and the second particles each contain pigment and do not move without an electric field. Moreover, the first particles and the second particles have different colors (one of which may be colorless).
- Thus, an electrophoretic display device is a display device that utilizes a so-called dielectrophoretic effect by which a substance having a high dielectric constant moves to a high-electric field region.
- A solution in which the above microcapsules are dispersed in a solvent is referred to as electronic ink. This electronic ink can be printed on a surface of glass, plastic, cloth, paper, or the like. Furthermore, by using a color filter or particles containing a pigment, color display can also be achieved.
- The first particles and the second particles in the microcapsules may be formed of one kind of material selected from a conductive material, an insulating material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electrochromic material, and a magnetophoretic material, or a composite material of any of these.
- As the electronic paper, a display device using a twisting ball display system can be used. The twisting ball display system refers to a method in which spherical particles each colored in black and white are arranged between a first electrode layer and a second electrode layer which are electrode layers used for a display element, and a potential difference is generated between the first electrode layer and the second electrode layer to control orientation of the spherical particles, so that display is performed.
-
FIG. 8 illustrates active matrix electronic paper as an embodiment of a semiconductor device. The electronic paper shown inFIG. 8 is an example of a display device using the twisting ball display system. - Between the
first electrode layer 4030 connected to thetransistor 4010 and thesecond electrode layer 4031 provided for thesecond substrate 4006,spherical particles 4613 each of which includes ablack region 4615 a, awhite region 4615 b, and acavity 4612 which is filled with liquid around theblack region 4615 a and thewhite region 4615 b, are provided. A space around thespherical particles 4613 is filled with afiller 4614 such as a resin. Thesecond electrode layer 4031 corresponds to a common electrode (counter electrode). Thesecond electrode layer 4031 is electrically connected to a common potential line. - In
FIGS. 6 to 8 , a flexible substrate as well as a glass substrate can be used as any of thefirst substrate 4001 and thesecond substrate 4006. For example, a plastic substrate having light-transmitting properties can be used. As plastic, a fiberglass-reinforced plastics (FRP) plate, a polyvinyl fluoride (PVF) film, a polyester film, or an acrylic resin film can be used. In addition, a sheet with a structure in which an aluminum foil is sandwiched between PVF films or polyester films can be used. - The insulating
film 4020 can be formed using an inorganic insulating material such as silicon oxide, silicon oxynitride, hafnium oxide, aluminum oxide, or gallium oxide. A manufacturing method of the insulatingfilm 4020 is particularly limited; for example, a film formation method such as a plasma CVD method or a sputtering method can be used. The sputtering method is preferable in that hydrogen, water, and the like are unlikely to enter a film to be formed. - The insulating
film 4024 can be formed with a single-layer structure or a multi-layer structure using one or more of a silicon nitride film, a silicon nitride oxide film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and an aluminum nitride oxide film by a sputtering method. The insulatingfilm 4024 functions as a protective film of the transistor(s). - The insulating
layer 4021 can be formed using an inorganic insulating material or an organic insulating material. The insulatinglayer 4021 may be formed using a heat-resistant organic insulating material such as an acrylic resin, polyimide, a benzocyclobutene-based resin, polyamide, or an epoxy resin, which is preferable as a planarizing insulating film. As well as such an organic insulating material, it is possible to use a low-dielectric constant material (a low-k material), a siloxane based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like. The insulating layer may be formed by stacking a plurality of insulating films formed of these materials. - There is no particular limitation on the method for forming the insulating
layer 4021; the insulatinglayer 4021 can be formed, depending on the material, by a sputtering method, a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like. - The display device displays an image by transmitting light from the light source or the display element. Therefore, the substrate and the thin films such as the insulating film and the conductive film provided for the pixel portion where light is transmitted have light-transmitting properties with respect to light in the visible-light wavelength range.
- The first electrode layer and the second electrode layer (each of which may be called a pixel electrode layer, a common electrode layer, a counter electrode layer, or the like) for applying voltage to the display element may have light-transmitting properties or light-reflecting properties, which depends on the direction in which light is extracted, the position where the electrode layer is provided, the pattern structure of the electrode layer, and the like.
- Any of the
first electrode layer 4030 and thesecond electrode layer 4031 can be formed using a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, or indium tin oxide to which silicon oxide is added. - Any of the
first electrode layer 4030 and thesecond electrode layer 4031 can be formed using one or more kinds of materials selected from metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag); alloys of these metals; and nitrides of these metals. - Since the transistor is easily broken owing to static electricity or the like, a protective circuit for protecting the driver circuit is preferably provided. The protective circuit is preferably formed using a non-linear element.
- In this manner, by using any of the transistors described in
Embodiments 1 to 3, a highly reliable semiconductor device can be provided. -
Embodiment 5 can be implemented in appropriate combination with any of the structures described in the other embodiments. - A semiconductor device having an image sensor function for reading data of an object can be manufactured with the use of any transistor exemplified in
Embodiments 1 to 3. - An example of a semiconductor device having an image sensor function is illustrated in
FIG. 9A .FIG. 9A illustrates an equivalent circuit of a photo sensor, andFIG. 9B is a cross-sectional view illustrating part of the photo sensor. - One electrode of a
photodiode 602 is electrically connected to a photodiodereset signal line 658, and the other electrode thereof is electrically connected to a gate of atransistor 640. One of a source and a drain of thetransistor 640 is electrically connected to a photo sensorreference signal line 672, and the other of the source and the drain thereof is electrically connected to one of a source and a drain of atransistor 656. A gate of thetransistor 656 is electrically connected to agate signal line 659, and the other of the source and the drain thereof is electrically connected to a photo sensoroutput signal line 671. - Note that in circuit diagrams in this specification, a transistor including an oxide semiconductor film is denoted with a symbol “OS” so that it can be identified as a transistor including an oxide semiconductor film. The
transistor 640 and thetransistor 656 inFIG. 9A are transistors each including an oxide semiconductor film. -
FIG. 9B is a cross-sectional view of thephotodiode 602 and thetransistor 640 in the photo sensor. Thephotodiode 602 functioning as a sensor and thetransistor 640 are provided over a substrate 601 (a TFT substrate) having an insulating surface. Asubstrate 613 is provided over thephotodiode 602 and thetransistor 640 with the use of anadhesion layer 608. - An insulating
film 631, a protectiveinsulating film 632, a firstinterlayer insulating layer 633, and a secondinterlayer insulating layer 634 are provided over thetransistor 640. Thephotodiode 602 is provided over the firstinterlayer insulating layer 633. In thephotodiode 602, afirst semiconductor layer 606 a, asecond semiconductor layer 606 b, and a third semiconductor layer 606 c are stacked in this order over the firstinterlayer insulating layer 633 between anelectrode layer 641 provided over the firstinterlayer insulating layer 633 and anelectrode layer 642 provided over the secondinterlayer insulating layer 634. - In this embodiment, any of the transistors described in
Embodiments 1 to 3 can be applied to thetransistor 640. In thetransistor 640 and thetransistor 656, variation in electrical characteristics is suppressed, and thetransistor 640 and thetransistor 656 are electrically stable. Accordingly, a highly reliable semiconductor device can be provided as the semiconductor device of this embodiment described inFIGS. 9A and 9B . - The
electrode layer 641 is electrically connected to aconductive layer 643 formed in the secondinterlayer insulating layer 634, and theelectrode layer 642 is electrically connected to agate electrode 645 through theelectrode layer 641. Thegate electrode 645 is electrically connected to the gate electrode of thetransistor 640, and thephotodiode 602 is electrically connected to thetransistor 640. Thephotodiode 602 is electrically connected to thetransistor 640. - Here, a pin photodiode in which a semiconductor layer having a p-type conductivity as the
first semiconductor layer 606 a, a high-resistance semiconductor layer (i-type semiconductor layer) as thesecond semiconductor layer 606 b, and a semiconductor layer having an n-type conductivity as the third semiconductor layer 606 c are stacked is illustrated as an example. - The
first semiconductor layer 606 a is a p-type semiconductor layer and can be formed using an amorphous silicon film containing an impurity element imparting the p-type conductivity. Thefirst semiconductor layer 606 a is formed by a plasma CVD method with use of a semiconductor source gas containing an impurity element belonging to Group 13 (such as boron (B)). As the semiconductor source gas, silane (SiH4) may be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, or the like may be used. Further alternatively, an amorphous silicon film which does not contain an impurity element may be formed, and then, an impurity element may be introduced to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like may be conducted after introducing the impurity element by an ion implantation method or the like in order to diffuse the impurity element. In that case, as a method of forming the amorphous silicon film, an LPCVD method, a chemical vapor deposition method, a sputtering method, or the like may be used. Thefirst semiconductor layer 606 a is preferably formed to have a thickness greater than or equal to 10 nm and less than or equal to 50 nm. - The
second semiconductor layer 606 b is an i-type semiconductor layer (intrinsic semiconductor layer) and is formed using an amorphous silicon film. As for formation of thesecond semiconductor layer 606 b, an amorphous silicon film is formed with use of a semiconductor source gas by a plasma CVD method. As the semiconductor source gas, silane (SiH4) may be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, or the like may be used. Thesecond semiconductor layer 606 b may be formed by an LPCVD method, a vapor deposition method, a sputtering method, or the like. Thesecond semiconductor layer 606 b is preferably formed to have a thickness greater than or equal to 200 nm and less than or equal to 1000 nm. - The third semiconductor layer 606 c is an n-type semiconductor layer and is formed using an amorphous silicon film containing an impurity element imparting the n-type conductivity. The third semiconductor layer 606 c is formed by a plasma CVD method with use of a semiconductor source gas containing an impurity element belonging to Group 15 (e.g., phosphorus (P)). As the semiconductor source gas, silane (SiH4) may be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, or the like may be used. Further alternatively, an amorphous silicon film which does not contain an impurity element may be formed, and then, an impurity element may be introduced to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like may be conducted after introducing the impurity element by an ion injecting method or the like in order to diffuse the impurity element. In that case, as a method of forming the amorphous silicon film, an LPCVD method, a chemical vapor deposition method, a sputtering method, or the like may be used. The third semiconductor layer 606 c is preferably formed to have a thickness greater than or equal to 20 nm and less than or equal to 200 nm.
- Any of the
first semiconductor layer 606 a, thesecond semiconductor layer 606 b, and the third semiconductor layer 606 c is not necessarily formed using an amorphous semiconductor, and may be formed using a polycrystalline semiconductor, or a micro crystalline semiconductor (a semi-amorphous semiconductor: SAS). - The microcrystalline semiconductor belongs to a metastable state of an intermediate between amorphous and single crystalline, considering Gibbs free energy. That is, the microcrystalline semiconductor is a semiconductor having a third state which is stable in terms of free energy and has a short range order and lattice distortion. Columnar-like or needle-like crystals grow in a normal direction with respect to a substrate surface. The Raman spectrum of microcrystalline silicon, that is a typical example of a microcrystalline semiconductor, is located in lower wave numbers than 520 cm−1, which represents a peak of the Raman spectrum of single crystal silicon. That is, the peak of the Raman spectrum of the microcrystalline silicon exists between 520 cm−1 which represents single crystal silicon and 480 cm−1 which represents amorphous silicon. The semiconductor contains hydrogen or halogen of at least 1 at.% to terminate a dangling bond. Moreover, microcrystalline silicon is made to contain a rare gas element such as helium, neon, argon, or krypton to further enhance lattice distortion, whereby stability is increased and a favorable microcrystalline semiconductor film can be obtained.
- The microcrystalline semiconductor film can be formed by a high-frequency plasma CVD method with a frequency of several tens of megahertz to several hundreds of megahertz or using a microwave plasma CVD apparatus with a frequency of 1 GHz or more. Typically, the microcrystalline semiconductor film can be formed by using a gas obtained by diluting SiH4, Si2H6, SiH2Cl2, SiHCl3, SiCl4, or SiF4, with hydrogen. Further, with a dilution with one or plural kinds of rare gas elements selected from helium, neon, argon, and krypton in addition to silicon hydride and hydrogen, the microcrystalline semiconductor film can be formed. In that case, the flow ratio of hydrogen to silicon hydride is 5:1 to 200:1, preferably 50:1 to 150:1, far preferably 100:1. Further, a carbide gas such as CH4 or C2H6, a germanium gas such as GeH4 or GeF4, F2, or the like may be mixed into the gas containing silicon.
- In addition, since the mobility of holes generated by a photoelectric effect is lower than that of electrons, a pin photodiode exhibits better characteristics when a surface on the p-type semiconductor layer side is used as a light-receiving plane. Here, an example in which light received by the
photodiode 602 from a surface of thesubstrate 601, over which the pin photodiode is formed, is converted into electric signals is described. Further, light from the semiconductor layer having a conductivity type opposite from that of the semiconductor layer on the light-receiving plane is disturbance light; therefore, the electrode layer on the semiconductor layer having the opposite conductivity type is preferably formed from a light-blocking conductive film. Note that a surface on the n-type semiconductor layer side can alternatively be used as the light-receiving plane. - For reduction of the surface roughness, an insulating layer functioning as a planarizing insulating film is preferably used as any of the first
interlayer insulating layer 633 and the secondinterlayer insulating layer 634. Any of the firstinterlayer insulating layer 633 and the secondinterlayer insulating layer 634 can be formed using, for example, an organic insulating material such as polyimide, an acrylic resin, a benzocyclobutene-based resin, polyamide, or an epoxy resin. As well as such an organic insulating material, it is possible to use a single layer or multi layers of a low-dielectric constant material (a low-k material), a siloxane-based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like. - Any of the insulating
film 631, the protectiveinsulating film 632, the firstinterlayer insulating layer 633, and the secondinterlayer insulating layer 634 can be formed using an insulating material by a sputtering method, a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like depending on the material. - With detection of light that enters the
photodiode 602, data on an object to be detected can be read. A light source such as a backlight can be used for the data reading on the object. - Any of the transistors exemplified in
Embodiments 1 to 3 can be used as thetransistor 640. The transistor including the oxide semiconductor film which is highly purified by removing impurities such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) and contains excessive oxygen supplied by oxygen doping or the like whose variation in the electric characteristics is suppressed is electrically stable. Accordingly, a highly reliable semiconductor device can be provided. - Embodiment 6 can be implemented in appropriate combination with any of the structures described in the other embodiments.
- A semiconductor device disclosed in this specification can be applied to a variety of electronic appliances (including game machines). Examples of electronic appliances are a television set (also referred to as a television or a television receiver), a monitor of a computer or the like, a camera such as a digital camera or a digital video camera, a digital photo frame, a mobile phone handset (also referred to as a mobile phone or a mobile phone device), a portable game machine, a portable information terminal, an audio reproducing device, a large-sized game machine such as a pachinko machine, and the like. Examples of electronic appliances each including the liquid crystal display device described in the above embodiment will be described below.
-
FIG. 10A illustrates an electronic book reader (also referred to as an e-book reader) which can includehousings 9630, adisplay portion 9631,operation keys 9632, asolar cell 9633, and a charge anddischarge control circuit 9634. The electronic book reader illustrated inFIG. 10A has a function of displaying various kinds of information (e.g., a still image, a moving image, and a text image) on the display portion, a function of displaying a calendar, a date, the time, or the like on the display portion, a function of operating or editing the information displayed on the display portion, a function of controlling processing by various kinds of software (programs), and the like. InFIG. 10A , the charge anddischarge control circuit 9634 has abattery 9635 and a DCDC converter (hereinafter, abbreviated as a converter) 9636. Any of the semiconductor devices described in the above embodiments can be applied to thedisplay portion 9631, whereby a highly reliable electronic book reader can be provided. - In the case where a transflective liquid crystal display device or a reflective liquid crystal display device is used as the
display portion 9631, use under a relatively bright condition is assumed; therefore, the structure illustrated inFIG. 10A is preferable because power generation by thesolar cell 9633 and charge with thebattery 9635 are effectively performed. Since thesolar cell 9633 can be provided in a space (a surface or a rear surface) of thehousing 9630 as appropriate, thebattery 9635 can be efficiently charged, which is preferable. A lithium ion battery may be used as thebattery 9635, which provides an advantage of downsizing or the like. - The structure and the operation of the charge and
discharge control circuit 9634 illustrated inFIG. 10A are described with reference to a block diagram ofFIG. 10B . Thesolar cell 9633, thebattery 9635, theconverter 9636, aconverter 9637, switches SW1 to SW3, and thedisplay portion 9631 are shown inFIG. 10B , and thebattery 9635, theconverter 9636, theconverter 9637, and the switches SW1 to SW3 are included in the charge anddischarge control circuit 9634. - First, an example of operation in the case where power is generated by the
solar cell 9633 using external light is described. The voltage of power generated by the solar cell is raised or lowered by theconverter 9636 to a voltage for charging thebattery 9635. Then, when the power from thesolar cell 9633 is used for the operation of thedisplay portion 9631, the switch SW1 is turned on and the voltage of the power is raised or lowered by theconverter 9637 to a voltage needed for thedisplay portion 9631. In addition, when display on thedisplay portion 9631 is not performed, for example, the switch SW1 is turned off and the switch SW2 is turned on so that charge of thebattery 9635 is performed. - Next, operation in the case where power is not generated by the
solar cell 9633 using external light is described. The voltage of power accumulated in thebattery 9635 is raised or lowered by theconverter 9637 with the switch SW3 turned on. Then, power from thebattery 9635 is used for the operation of thedisplay portion 9631. - Although the
solar cell 9633 is described as an example of a means for charging, thebattery 9635 may be charged with another means. Thesolar cell 9633 may be combined with another means for charging. -
FIG. 11A illustrates a laptop personal computer, which includes amain body 3001, ahousing 3002, adisplay portion 3003, akeyboard 3004, and the like. By applying any of the semiconductor devices described in the above embodiments to thedisplay portion 3003, a highly reliable laptop personal computer can be provided. -
FIG. 11B is a personal digital assistant (PDA), which includes amain body 3021 provided with adisplay portion 3023, anexternal interface 3025,operation buttons 3024, and the like. Astylus 3022 is included as an accessory for operation. By applying any of the semiconductor devices described in the above embodiments to thedisplay portion 3023, a highly reliable personal digital assistant (PDA) can be provided. -
FIG. 11C illustrates an example of an electronic book reader. For example, anelectronic book reader 2700 includes two housings, i.e., ahousing 2701 and ahousing 2703. Thehousing 2701 and thehousing 2703 are combined with ahinge 2711 so that theelectronic book reader 2700 can be opened and closed with thehinge 2711 as an axis. With such a structure, theelectronic book reader 2700 can operate like a paper book. - A
display portion 2705 and adisplay portion 2707 are incorporated in thehousing 2701 and thehousing 2703, respectively. Thedisplay portion 2705 and thedisplay portion 2707 may display one image or different images. In the structure where different images are displayed on different display portions, for example, the right display portion (thedisplay portion 2705 inFIG. 11C ) displays text and the left display portion (thedisplay portion 2707 inFIG. 11C ) displays images. By applying any of the semiconductor devices described in the above embodiments to thedisplay portion electronic book reader 2700. -
FIG. 11C illustrates an example in which thehousing 2701 is provided with an operation portion and the like. For example, thehousing 2701 is provided with a power switch 2721, operation keys 2723, aspeaker 2725, and the like. With the operation keys 2723, pages can be turned. A keyboard, a pointing device, or the like may also be provided on the surface of the housing, on which the display portion is provided. Furthermore, an external connection terminal (an earphone terminal, a USB terminal, or the like), a recording medium insertion portion, and the like may be provided on the back surface or the side surface of the housing. Moreover, theelectronic book reader 2700 may be equipped with a function of an electronic dictionary. - The
electronic book reader 2700 may have a structure capable of wirelessly transmitting and receiving data. Through wireless communication, book data or the like can be purchased and downloaded from an electronic book server. -
FIG. 11D illustrates a mobile phone, which includes two housings, i.e., ahousing 2800 and ahousing 2801. Thehousing 2801 includes adisplay panel 2802, aspeaker 2803, amicrophone 2804, apointing device 2806, a camera lens 2807, anexternal connection terminal 2808, and the like. In addition, thehousing 2800 includes asolar cell 2810 having a function of charging the mobile phone, anexternal memory slot 2811, and the like. An antenna is incorporated in thehousing 2801. By applying any of the semiconductor devices described in the above embodiments to thedisplay panel 2802, a highly reliable mobile phone can be provided. - Further, the
display panel 2802 is provided with a touch panel. A plurality ofoperation keys 2805 which is displayed as images is illustrated by dashed lines inFIG. 11D . A boosting circuit by which a voltage output from thesolar cell 2810 is increased to be sufficiently high for each circuit is also provided. - On the
display panel 2802, the display direction can be appropriately changed depending on a usage pattern. Further, the mobile phone is provided with the camera lens 2807 on the same surface as thedisplay panel 2802, and thus it can be used as a video phone. Thespeaker 2803 and themicrophone 2804 can be used for videophone calls, recording and playing sound, and the like as well as voice calls. Furthermore, thehousings FIG. 11D can overlap with each other by sliding; thus, the size of the mobile phone can be decreased, which makes the mobile phone suitable for being carried. - The
external connection terminal 2808 can be connected to an AC adapter and various types of cables such as a USB cable, and charging and data communication with a personal computer are possible. Moreover, a large amount of data can be stored and moved with a storage medium inserted into theexternal memory slot 2811. - Further, in addition to the above functions, an infrared communication function, a television reception function, or the like may be equipped.
-
FIG. 11E illustrates a digital video camera which includes amain body 3051, adisplay portion A 3057, aneyepiece portion 3053, anoperation switch 3054, adisplay portion B 3055, abattery 3056, and the like. By applying any of the semiconductor devices described in the above embodiments to thedisplay portion A 3057, thedisplay portion B 3055, a highly reliable digital video camera can be provided. -
FIG. 11F illustrates an example of a television device. In atelevision set 9600, adisplay portion 9603 is incorporated in ahousing 9601. Thedisplay portion 9603 can display images. InFIG. 11F , thehousing 9601 is supported by astand 9605. By applying any of the semiconductor devices described in the above embodiments to thedisplay portion 9603, a high reliable television set can be provided as thetelevision set 9600. - The
television set 9600 can be operated by an operation switch of thehousing 9601 or a separate remote controller. Further, the remote controller may be provided with a display portion for displaying data output from the remote controller. - The
television set 9600 is provided with a receiver, a modem, and the like. With the receiver, general television broadcasting can be received. Moreover, when the display device is connected to a communication network with or without wires via the modem, one-way (from sender to receiver) or two-way (between sender and receiver or between receivers) data communication can be performed. - Embodiment 7 can be implemented in appropriate combination with any of the structures described in the other embodiments.
- In Example 1, a transistor of one embodiment of the present invention is manufactured and the evaluation results of the electrical characteristics are shown.
- A method for manufacturing a transistor of this example is described below.
- A 100-nm-thick silicon nitride film was formed by a plasma CVD method and a 150-nm-thick silicon oxynitride film was formed consecutively over a glass substrate to form a base film, and a 100-nm-thick tungsten film was formed as a gate electrode layer over the silicon oxynitride film by a sputtering method. The tungsten film was etched selectively to form the gate electrode layer.
- Then, a 100-nm-thick silicon oxynitride film was formed as a gate insulating film over the gate electrode layer by a plasma CVD method.
- Next, a 40-nm-thick oxide semiconductor film was formed over the gate insulating film by sputtering using an In—Ga—Zn—O-based oxide semiconductor target (In2O3: Ga2O3: ZnO=1:1:1) under an atmosphere containing argon and oxygen (argon:oxygen=50 sccm:50 sccm) at 200° C. under the following conditions: the distance between the substrate and the target was 80 mm, the pressure was 0.4 Pa, and the direct current (DC) power was 5 kW. Here, the oxide semiconductor film was selectively etched to form an island-shaped oxide semiconductor film.
- Next, heat treatment was performed on the oxide semiconductor film at 650° C. in a nitrogen atmosphere for 6 minutes.
- Next, oxygen doping treatment was performed on the oxide semiconductor film with an ICP (Inductively Coupled Plasma) plasma apparatus as shown in
FIG. 14B under an oxygen (250 sccm) atmosphere for one minute under the following conditions: the upper electrode bias was 6000 W, the lower electrode bias was 1000 W, and the pressure was 1.33 Pa. - Next, heat treatment was performed on the oxide semiconductor film at 450° C. for 1 hour in an air atmosphere. After that, the silicon oxynitride film that was the gate insulating film was selectively etched, so that an opening was formed over the gate electrode layer.
- Next, as a source and drain electrode layers, a titanium film (with a thickness of 100 nm), an aluminum film (with a thickness of 400 nm), and a titanium film (with a thickness of 100 nm) were stacked over the oxide semiconductor film by a sputtering method at 100° C. The source and drain electrode layers were selectively etched so that the channel length L and the channel width W of the transistor were 3 μm and 50 μm, respectively.
- Next, heat treatment was performed under a nitrogen atmosphere at 300° C. for one hour.
- Next, a 300-nm-thick silicon oxide film was formed as a first insulating film by a sputtering method, so as to be in contact with the oxide semiconductor film. The silicon oxide film that was the first insulating film was etched selectively, so that openings were formed over the gate electrode layer and the source and drain electrode layers.
- Next, over the silicon oxide film that was the first insulating film, a 1.5-μm-thick photosensitive acrylic resin was formed as a second insulating film by a spin coating method. The photosensitive acrylic resin that was the second insulating film was selectively exposed to light and developed, so that openings were formed over the gate electrode layer and the source and drain electrode layers. Next, in order to harden the photosensitive acrylic resin, heat treatment was performed under a nitrogen atmosphere at 250° C. for one hour.
- Through the above process, a plurality of transistors each having the channel length L of 3 μm and the channel width W of 50 μm was manufactured over the glass substrate.
- One of methods for examining reliability of transistors is a bias-temperature stress test (hereinafter, referred to as a BT test). The BT test is one kind of accelerated test and can evaluate change in characteristics, caused by long-term usage, of transistors in a short time. In particular, the amount of shift in threshold voltage of the transistor by the BT test is an important indicator for examining reliability. The smaller the shift in the threshold voltage by the BT test is, the higher the reliability of the transistor is.
- Specifically, the temperature of a substrate provided with the transistor (the temperature is also called the substrate temperature) is set at a fixed temperature, a source and a drain of the transistor are set at the same potential, and a gate is supplied with a potential different from those of the source and the drain for a certain period. The substrate temperature may be determined as appropriate in accordance with the test purpose. A BT test where the potential applied to the gate is higher than the potential of the source and drain is referred to as +BT test and a BT test where the potential applied to the gate is lower than the potential of the source and drain is referred to as −BT test.
- The test intensity of the BT test can be determined in accordance with the substrate temperature, the intensity of electric field intensity applied to the gate insulating film, and a time of applying the electric field. The intensity of the electric field applied to the gate insulating film is determined in accordance with a value obtained by dividing the potential difference between the gate and the source/drain by the thickness of the gate insulating film. For example, the intensity of the electric field applied to the gate insulating film with a thickness of 100 nm can be adjusted to 2 MV/cm by setting the potential difference to 20 V.
- Results of a BT test of the transistor of this example are described below.
- Note that a voltage refers to the difference between potentials of two points, and a potential refers to electrostatic energy (electric potential energy) of a unit charge at a given point in an electrostatic field. However, in general, a difference between a potential of one point and a reference potential (e.g., ground potential) is merely called a potential or a voltage, and the potential and the voltage are used as synonymous words in many cases. Thus, in this specification, a potential may be rephrased as a voltage and vice versa unless otherwise specified.
- Both a +BT test and a −BT test were carried out under the following conditions: the substrate temperature was 150° C.; the intensity of the electric field applied to the gate insulating film was 2 MV/cm; and the time of application was one hour.
- First, the +BT test is described below. In order to measure initial characteristics of the transistor subjected to the BT test, a change in characteristics of the source-drain current (hereinafter, referred to as the drain current), that is, Vg-Id characteristics were measured under the conditions where the substrate temperature was set to 40° C., the source-drain voltage (hereinafter, the drain voltage) was set to 1 V, and the source-gate voltage (hereinafter, the gate voltage) was changed from −20 V to +20 V. Here, as a countermeasure against moisture-absorption onto surfaces of the samples, the substrate temperature was set to 40° C.; however, the measurement may be performed at room temperature (25° C.) if there is no particular problem.
- Next, the substrate temperature was increased to 150° C., and then, the potentials of the source and the drain of the transistor were set to 0 V. Then, voltage was applied to the gate of the transistor so that the intensity of the electric field applied to the gate insulating film was 2 MV/cm. In this example, since the thickness of the gate insulating film of the transistor was 100 nm, the gate was supplied with +20 V and was kept for one hour. The time of voltage application was one hour in this example; however, the time may be determined as appropriate in accordance with the purpose.
- Next, the substrate temperature was decreased to 40° C. while the voltage was applied to the gate and the source and the drain. If application of the voltage is stopped before the substrate temperature was decreased to 40° C., the transistor which has been damaged during the BT test is repaired by the influence of residual heat. Thus, the substrate temperature needs to be decreased while the voltage is applied. After the substrate temperature was reached to 40° C., the application of voltage was stopped. Strictly, the time of decreasing temperature needs to be added to the time of the voltage application; however, since the temperature was able to be decreased to 40° C. in several minutes actually, this was considered to be an error range and the time of decreasing temperature was not added to the time of voltage application.
- Next, Vg-Id characteristics were measured under the same conditions as those of the measurement of the initial characteristics, and Vg-Id characteristics after the +BT test were obtained.
- Next, the −BT test is described below. The −BT test was performed in a manner similar to that of the +BT test, except in that the voltage applied to the gate of the transistor after the substrate temperature was increased to 150° C. was −20 V.
- In the BT test, it is important to use a transistor which has been never subjected to a BT test. For example, if a −BT test is performed with use of a transistor which has been once subjected to a +BT test, the results of the −BT test cannot be evaluated correctly due to influence of the +BT test which has been performed previously. Further, the same applies to the case where a +BT test is performed on a transistor which has been once subjected to a +BT test. Note that the same does not apply to the case where a BT test is intentionally repeated in consideration of these influences.
- Vg-Id characteristics of the transistor before and after the BT test are shown in
FIGS. 17A and 17B andFIGS. 18A and 18B . In each ofFIGS. 17A and 17B andFIGS. 18A and 18B , the horizontal axis indicates a gate voltage (Vg) and the vertical axis indicates a drain current (Id) with respect to the gate voltage.FIGS. 18A and 18B are enlarged graphs ofFIGS. 17A and 17B , where the gate voltage (Vg) indicated in the horizontal axis is enlarged. -
FIG. 18A show the Vg-Id characteristics of the transistor before and after the +BT test.Solid line 900 indicates the Vg-Id characteristics before the +BT test, that is, initial characteristics, and dottedline 901 indicates the Vg-Id characteristics after the +BT test. -
FIG. 18B shows the Vg-Id characteristics of the transistor before and after the −BT test.Solid line 902 indicates the Vg-Id characteristics before the −BT test, that is, initial characteristics, and dottedline 903 indicates the Vg-Id characteristics after the −BT test. - In those measurements of the Vg-Id characteristics of the transistor of this example, the Id became less than or equal to the detection limit of the measurement device in an off region (a region where Vg is from about 0 V to a negative value in most n-channel transistors). Therefore,
FIGS. 17A and 17B andFIGS. 18A and 18B do not show a part in which the Id was less than or equal to the detection limit of the measurement device. - Referring to
FIG. 18A , the characteristics after the +BT test indicated by theline 901 shifted by 0.12 V in the threshold voltage as compared to the initial characteristics indicated by theline 900; referring toFIG. 18B , the characteristics after the −BT test indicated by theline 903 shifted by 0.07 V in the threshold voltage as compared to the initial characteristics indicated by theline 902. Accordingly, from the results that the amount of shift of the threshold voltage is as small as several volts by either of the BT tests, it could be confirmed that the transistor of this example was a transistor with high reliability in the BT test. - This application is based on Japanese Patent Application serial No. 2010-100343 filed with Japan Patent Office on Apr. 23, 2010, the entire contents of which are hereby incorporated by reference.
Claims (21)
1. (canceled)
2. A method for manufacturing a semiconductor device, comprising the steps of:
providing a substrate, where an oxide semiconductor and an insulating film are provided, on a stage of a plasma apparatus,
wherein the stage is connected to a high-frequency power source, and
wherein the oxide semiconductor is provided over the substrate, and the insulating film is provided over the oxide semiconductor; and
performing an oxygen doping treatment on the insulating film to supply oxygen into the insulating film by applying a high-frequency power from the high-frequency power source to the stage.
3. The method according to claim 2 , wherein the oxide semiconductor comprises indium, zinc and a metal element other than indium and zinc.
4. The method according to claim 2 , wherein the insulating film is one selected from the group consisting of a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film and a gallium oxide film.
5. The method according to claim 2 , wherein the plasma apparatus is an ashing apparatus.
6. The method according to claim 2 , wherein the stage is provided with a heating system.
7. The method according to claim 2 ,
wherein the high-frequency power source is a first high-frequency power source, and
wherein the plasma apparatus comprises an inductively coupled plasma coil and a second high-frequency power source connected to the inductively coupled plasma coil.
8. The method according to claim 2 , wherein a frequency of the high-frequency power is 3.2 MHz.
9. The method according to claim 2 , wherein the oxygen for doping comprises any one of an oxygen radical, an oxygen atom, and an oxygen ion.
10. The method according to claim 2 , wherein the oxygen is supplied into the oxide semiconductor by the oxygen doping treatment.
11. A method for manufacturing a semiconductor device, comprising the steps of:
forming an oxide semiconductor over a substrate;
forming a first insulating film over the oxide semiconductor;
providing the substrate, where the oxide semiconductor and the first insulating film are provided, on a stage of a plasma apparatus, wherein the stage is connected to a high-frequency power source;
performing an oxygen doping treatment on the first insulating film to supply oxygen into the first insulating film by applying a high-frequency power from the high-frequency power source to the stage;
performing a heat treatment after performing the oxygen doping treatment; and
forming a second insulating film over the first insulating film.
12. The method according to claim 11 , wherein the oxide semiconductor comprises indium, zinc and a metal element other than indium and zinc.
13. The method according to claim 11 , wherein the first insulating film is one selected from the group consisting of a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film and a gallium oxide film.
14. The method according to claim 11 , wherein the plasma apparatus is an ashing apparatus.
15. The method according to claim 11 , wherein the stage is provided with a heating system.
16. The method according to claim 11 ,
wherein the high-frequency power source is a first high-frequency power source, and
wherein the plasma apparatus comprises an inductively coupled plasma coil and a second high-frequency power source connected to the inductively coupled plasma coil.
17. The method according to claim 11 , wherein a frequency of the high-frequency power is 3.2 MHz.
18. The method according to claim 11 , wherein the oxygen for doping comprises any one of an oxygen radical, an oxygen atom, and an oxygen ion.
19. The method according to claim 11 , wherein the oxygen is supplied into the oxide semiconductor by the oxygen doping treatment.
20. The method according to claim 11 , wherein a substrate temperature is set to a temperature higher than or equal to 100° C. and lower than or equal to 600° C. during forming the oxide semiconductor.
21. The method according to claim 11 , wherein a temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C.
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US14/476,797 US20140370656A1 (en) | 2010-04-23 | 2014-09-04 | Semiconductor device and manufacturing method thereof |
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JP2010-100343 | 2010-04-23 | ||
US13/091,181 US8828811B2 (en) | 2010-04-23 | 2011-04-21 | Manufacturing method of semiconductor device comprising steps of forming oxide semiconductor film, performing heat treatment on the oxide semiconductor film, and performing oxygen doping treatment on the oxide semiconductor film after the heat treatment |
US14/476,797 US20140370656A1 (en) | 2010-04-23 | 2014-09-04 | Semiconductor device and manufacturing method thereof |
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US13/091,181 Active 2031-07-03 US8828811B2 (en) | 2010-04-23 | 2011-04-21 | Manufacturing method of semiconductor device comprising steps of forming oxide semiconductor film, performing heat treatment on the oxide semiconductor film, and performing oxygen doping treatment on the oxide semiconductor film after the heat treatment |
US14/476,797 Abandoned US20140370656A1 (en) | 2010-04-23 | 2014-09-04 | Semiconductor device and manufacturing method thereof |
US14/710,675 Active US9373707B2 (en) | 2010-04-23 | 2015-05-13 | Manufacturing method of semiconductor device with steps of heat treatment in nitrogen containing atmosphere, oxygen doping treatment and heat treatment in oxygen containing atmosphere |
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KR (3) | KR20130054275A (en) |
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JP5636392B2 (en) | 2012-05-24 | 2014-12-03 | 株式会社東芝 | Display device |
JP6059501B2 (en) | 2012-10-17 | 2017-01-11 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP2014082388A (en) | 2012-10-17 | 2014-05-08 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
JP6021586B2 (en) | 2012-10-17 | 2016-11-09 | 株式会社半導体エネルギー研究所 | Semiconductor device |
US9166021B2 (en) | 2012-10-17 | 2015-10-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
KR102220279B1 (en) | 2012-10-19 | 2021-02-24 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Method for forming multilayer film including oxide semiconductor film and method for manufacturing semiconductor device |
JP6204145B2 (en) | 2012-10-23 | 2017-09-27 | 株式会社半導体エネルギー研究所 | Semiconductor device |
WO2014065343A1 (en) | 2012-10-24 | 2014-05-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US9448454B2 (en) | 2012-11-08 | 2016-09-20 | Sharp Kabushiki Kaisha | Active matrix substrate and display device |
US8981359B2 (en) * | 2012-12-21 | 2015-03-17 | Lg Display Co., Ltd. | Organic light emitting diode display device and method of fabricating the same |
TWI614813B (en) | 2013-01-21 | 2018-02-11 | 半導體能源研究所股份有限公司 | Method for manufacturing semiconductor device |
KR102153110B1 (en) | 2013-03-06 | 2020-09-07 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor film and semiconductor device |
US9312392B2 (en) * | 2013-05-16 | 2016-04-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US9099861B2 (en) * | 2013-05-23 | 2015-08-04 | Inpaq Technology Co., Ltd. | Over-voltage protection device and method for preparing the same |
KR102232133B1 (en) | 2013-08-22 | 2021-03-24 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
KR102294507B1 (en) * | 2013-09-06 | 2021-08-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
JP6440457B2 (en) | 2013-11-07 | 2018-12-19 | 株式会社半導体エネルギー研究所 | Semiconductor device |
TWI666770B (en) | 2013-12-19 | 2019-07-21 | 日商半導體能源研究所股份有限公司 | Semiconductor device |
JP6444714B2 (en) | 2013-12-20 | 2018-12-26 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
US9472678B2 (en) | 2013-12-27 | 2016-10-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP6252904B2 (en) * | 2014-01-31 | 2017-12-27 | 国立研究開発法人物質・材料研究機構 | Oxide semiconductor and its production method |
US9564535B2 (en) | 2014-02-28 | 2017-02-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device including the semiconductor device, display module including the display device, and electronic appliance including the semiconductor device, the display device, and the display module |
CN106104772B (en) | 2014-02-28 | 2020-11-10 | 株式会社半导体能源研究所 | Semiconductor device and display device having the same |
US10096489B2 (en) | 2014-03-06 | 2018-10-09 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US9887291B2 (en) | 2014-03-19 | 2018-02-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device including the semiconductor device, display module including the display device, and electronic device including the semiconductor device, the display device, or the display module |
TWI686899B (en) * | 2014-05-02 | 2020-03-01 | 日商半導體能源研究所股份有限公司 | Semiconductor device, touch sensor, and display device |
TWI666776B (en) | 2014-06-20 | 2019-07-21 | 日商半導體能源研究所股份有限公司 | Semiconductor device and display device having the same |
KR20150146409A (en) | 2014-06-20 | 2015-12-31 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device, display device, input/output device, and electronic device |
JP6310816B2 (en) * | 2014-08-26 | 2018-04-11 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
JP6676316B2 (en) | 2014-09-12 | 2020-04-08 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
US9704704B2 (en) | 2014-10-28 | 2017-07-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and display device including the same |
US9768317B2 (en) | 2014-12-08 | 2017-09-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, manufacturing method of semiconductor device, and electronic device |
KR102549926B1 (en) | 2015-05-04 | 2023-06-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device, method for manufacturing the same, and electronic device |
US10121759B2 (en) * | 2015-11-04 | 2018-11-06 | Kulicke And Soffa Industries, Inc. | On-bonder automatic overhang die optimization tool for wire bonding and related methods |
JP6629252B2 (en) * | 2017-02-01 | 2020-01-15 | 株式会社東芝 | Method for manufacturing semiconductor device |
WO2018173812A1 (en) * | 2017-03-22 | 2018-09-27 | 国立研究開発法人日本原子力研究開発機構 | Functional membrane for ion beam transmission, beam line device using functional membrane for ion beam transmission, filter device using functional membrane for ion beam transmission, and method for adjusting filter device |
KR20200033868A (en) | 2017-07-31 | 2020-03-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and manufacturing method of semiconductor device |
CN108259039B (en) * | 2017-12-05 | 2021-01-26 | 北京无线电计量测试研究所 | Vacuum preparation method of mercury ion microwave frequency standard |
KR102217043B1 (en) * | 2018-10-30 | 2021-02-18 | 연세대학교 산학협력단 | Oxide thin film transistor and method of manufacturing the same |
CN111355308B (en) * | 2018-12-24 | 2023-12-29 | 中国科学院半导体研究所 | Wireless energy supply flexible lighting system and preparation method of wireless energy receiving end device thereof |
JP6807420B2 (en) * | 2019-02-21 | 2021-01-06 | 株式会社Kokusai Electric | Semiconductor device manufacturing methods, substrate processing devices and programs |
CN110112102B (en) * | 2019-05-10 | 2021-07-06 | Tcl华星光电技术有限公司 | Array substrate and preparation method thereof |
KR102297581B1 (en) * | 2020-05-18 | 2021-09-06 | 충북대학교 산학협력단 | Method for manufacturing oxide thin film transistor according to gas flow rate and oxide thin film transistor manufactured by the manufacturing method |
KR102299641B1 (en) * | 2020-05-18 | 2021-09-10 | 충북대학교 산학협력단 | Method for manufacturing oxide thin film transistor according to power and oxide thin film transistor manufactured by the manufacturing method |
KR102364105B1 (en) * | 2020-05-18 | 2022-02-17 | 충북대학교 산학협력단 | Method for manufacturing oxide thin film transistor according to process time and oxide thin film transistor manufactured by the manufacturing method |
TWI783583B (en) * | 2020-07-21 | 2022-11-11 | 美商應用材料股份有限公司 | Ion implantation for reduced hydrogen incorporation in amorphous silicon |
CN112635574B (en) * | 2020-12-31 | 2023-06-09 | 北海惠科光电技术有限公司 | Liquid crystal display panel, thin film transistor and preparation method thereof |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010000243A1 (en) * | 1999-01-08 | 2001-04-12 | Yukiyasu Sugano | Process for producing thin film semiconductor device and laser irradiation apparatus |
US20100072435A1 (en) * | 2008-09-20 | 2010-03-25 | Konica Minolta Holdings, Inc. | Production method of metal oxide precursor layer, production method of metal oxide layer, and electronic device |
US20110095288A1 (en) * | 2008-07-03 | 2011-04-28 | Sony Corporation | Thin film transistor and display device |
US8309956B2 (en) * | 2008-12-03 | 2012-11-13 | Sony Corporation | Thin film transistor, display unit, and method of manufacturing thin film transistor |
Family Cites Families (140)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100394896B1 (en) | 1995-08-03 | 2003-11-28 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | A semiconductor device including a transparent switching element |
JP3625598B2 (en) | 1995-12-30 | 2005-03-02 | 三星電子株式会社 | Manufacturing method of liquid crystal display device |
JP3014334B2 (en) | 1996-11-29 | 2000-02-28 | キヤノン販売株式会社 | Method for manufacturing semiconductor device |
JPH10313114A (en) | 1997-05-14 | 1998-11-24 | Nec Corp | Manufacture of semiconductor device |
JP4170454B2 (en) | 1998-07-24 | 2008-10-22 | Hoya株式会社 | Article having transparent conductive oxide thin film and method for producing the same |
JP2000150861A (en) | 1998-11-16 | 2000-05-30 | Tdk Corp | Oxide thin film |
JP3276930B2 (en) | 1998-11-17 | 2002-04-22 | 科学技術振興事業団 | Transistor and semiconductor device |
TW460731B (en) | 1999-09-03 | 2001-10-21 | Ind Tech Res Inst | Electrode structure and production method of wide viewing angle LCD |
JP4089858B2 (en) | 2000-09-01 | 2008-05-28 | 国立大学法人東北大学 | Semiconductor device |
TW529085B (en) * | 2000-09-22 | 2003-04-21 | Alps Electric Co Ltd | Method for evaluating performance of plasma treatment apparatus or performance confirming system of plasma treatment system |
KR20020038482A (en) | 2000-11-15 | 2002-05-23 | 모리시타 요이찌 | Thin film transistor array, method for producing the same, and display panel using the same |
JP3997731B2 (en) | 2001-03-19 | 2007-10-24 | 富士ゼロックス株式会社 | Method for forming a crystalline semiconductor thin film on a substrate |
JP2002289859A (en) | 2001-03-23 | 2002-10-04 | Minolta Co Ltd | Thin-film transistor |
JP4090716B2 (en) | 2001-09-10 | 2008-05-28 | 雅司 川崎 | Thin film transistor and matrix display device |
JP3925839B2 (en) | 2001-09-10 | 2007-06-06 | シャープ株式会社 | Semiconductor memory device and test method thereof |
JP4164562B2 (en) * | 2002-09-11 | 2008-10-15 | 独立行政法人科学技術振興機構 | Transparent thin film field effect transistor using homologous thin film as active layer |
EP1443130B1 (en) | 2001-11-05 | 2011-09-28 | Japan Science and Technology Agency | Natural superlattice homologous single crystal thin film, method for preparation thereof, and device using said single crystal thin film |
JP4083486B2 (en) | 2002-02-21 | 2008-04-30 | 独立行政法人科学技術振興機構 | Method for producing LnCuO (S, Se, Te) single crystal thin film |
CN1445821A (en) | 2002-03-15 | 2003-10-01 | 三洋电机株式会社 | Forming method of ZnO film and ZnO semiconductor layer, semiconductor element and manufacturing method thereof |
JP3933591B2 (en) | 2002-03-26 | 2007-06-20 | 淳二 城戸 | Organic electroluminescent device |
US7339187B2 (en) | 2002-05-21 | 2008-03-04 | State Of Oregon Acting By And Through The Oregon State Board Of Higher Education On Behalf Of Oregon State University | Transistor structures |
JP2004022625A (en) | 2002-06-13 | 2004-01-22 | Murata Mfg Co Ltd | Manufacturing method of semiconductor device and its manufacturing method |
US7105868B2 (en) | 2002-06-24 | 2006-09-12 | Cermet, Inc. | High-electron mobility transistor with zinc oxide |
US7067843B2 (en) | 2002-10-11 | 2006-06-27 | E. I. Du Pont De Nemours And Company | Transparent oxide semiconductor thin film transistors |
US6878583B2 (en) * | 2003-02-05 | 2005-04-12 | Taiwan Semiconductor Manufacturing Company | Integration method to enhance p+ gate activation |
JP4166105B2 (en) | 2003-03-06 | 2008-10-15 | シャープ株式会社 | Semiconductor device and manufacturing method thereof |
JP2004273732A (en) | 2003-03-07 | 2004-09-30 | Sharp Corp | Active matrix substrate and its producing process |
JP4108633B2 (en) | 2003-06-20 | 2008-06-25 | シャープ株式会社 | THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE |
US7262463B2 (en) | 2003-07-25 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | Transistor including a deposited channel region having a doped portion |
US7297977B2 (en) | 2004-03-12 | 2007-11-20 | Hewlett-Packard Development Company, L.P. | Semiconductor device |
US7145174B2 (en) | 2004-03-12 | 2006-12-05 | Hewlett-Packard Development Company, Lp. | Semiconductor device |
US7282782B2 (en) | 2004-03-12 | 2007-10-16 | Hewlett-Packard Development Company, L.P. | Combined binary oxide semiconductor device |
EP2413366B1 (en) | 2004-03-12 | 2017-01-11 | Japan Science And Technology Agency | A switching element of LCDs or organic EL displays |
US7211825B2 (en) | 2004-06-14 | 2007-05-01 | Yi-Chi Shih | Indium oxide-based thin film transistors and circuits |
JP2006100760A (en) | 2004-09-02 | 2006-04-13 | Casio Comput Co Ltd | Thin-film transistor and its manufacturing method |
US7285501B2 (en) | 2004-09-17 | 2007-10-23 | Hewlett-Packard Development Company, L.P. | Method of forming a solution processed device |
US7060594B2 (en) * | 2004-10-19 | 2006-06-13 | Macronix International Co., Ltd. | Memory device and method of manufacturing including deuterated oxynitride charge trapping structure |
US7298084B2 (en) | 2004-11-02 | 2007-11-20 | 3M Innovative Properties Company | Methods and displays utilizing integrated zinc oxide row and column drivers in conjunction with organic light emitting diodes |
CN101057338B (en) | 2004-11-10 | 2011-03-16 | 佳能株式会社 | Field effect transistor employing an amorphous oxide |
KR100953596B1 (en) | 2004-11-10 | 2010-04-21 | 캐논 가부시끼가이샤 | Light-emitting device |
US7829444B2 (en) | 2004-11-10 | 2010-11-09 | Canon Kabushiki Kaisha | Field effect transistor manufacturing method |
US7863611B2 (en) | 2004-11-10 | 2011-01-04 | Canon Kabushiki Kaisha | Integrated circuits utilizing amorphous oxides |
US7453065B2 (en) | 2004-11-10 | 2008-11-18 | Canon Kabushiki Kaisha | Sensor and image pickup device |
US7791072B2 (en) | 2004-11-10 | 2010-09-07 | Canon Kabushiki Kaisha | Display |
CN101057339B (en) | 2004-11-10 | 2012-12-26 | 佳能株式会社 | Amorphous oxide and field effect transistor |
JP5126729B2 (en) | 2004-11-10 | 2013-01-23 | キヤノン株式会社 | Image display device |
US7579224B2 (en) | 2005-01-21 | 2009-08-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a thin film semiconductor device |
TWI472037B (en) | 2005-01-28 | 2015-02-01 | Semiconductor Energy Lab | Semiconductor device, electronic device, and method of manufacturing semiconductor device |
TWI569441B (en) | 2005-01-28 | 2017-02-01 | 半導體能源研究所股份有限公司 | Semiconductor device, electronic device, and method of manufacturing semiconductor device |
US7858451B2 (en) | 2005-02-03 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device, semiconductor device and manufacturing method thereof |
US7948171B2 (en) | 2005-02-18 | 2011-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device |
US20060197092A1 (en) | 2005-03-03 | 2006-09-07 | Randy Hoffman | System and method for forming conductive material on a substrate |
US8681077B2 (en) | 2005-03-18 | 2014-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and display device, driving method and electronic apparatus thereof |
WO2006105077A2 (en) | 2005-03-28 | 2006-10-05 | Massachusetts Institute Of Technology | Low voltage thin film transistor with high-k dielectric material |
US7645478B2 (en) | 2005-03-31 | 2010-01-12 | 3M Innovative Properties Company | Methods of making displays |
US8300031B2 (en) | 2005-04-20 | 2012-10-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising transistor having gate and drain connected through a current-voltage conversion element |
JP2006344849A (en) | 2005-06-10 | 2006-12-21 | Casio Comput Co Ltd | Thin film transistor |
US7691666B2 (en) | 2005-06-16 | 2010-04-06 | Eastman Kodak Company | Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby |
US7402506B2 (en) | 2005-06-16 | 2008-07-22 | Eastman Kodak Company | Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby |
US7507618B2 (en) | 2005-06-27 | 2009-03-24 | 3M Innovative Properties Company | Method for making electronic devices using metal oxide nanoparticles |
KR100711890B1 (en) | 2005-07-28 | 2007-04-25 | 삼성에스디아이 주식회사 | Organic Light Emitting Display and Fabrication Method for the same |
JP2007059128A (en) | 2005-08-23 | 2007-03-08 | Canon Inc | Organic electroluminescent display device and manufacturing method thereof |
JP2007073705A (en) | 2005-09-06 | 2007-03-22 | Canon Inc | Oxide-semiconductor channel film transistor and its method of manufacturing same |
JP4850457B2 (en) | 2005-09-06 | 2012-01-11 | キヤノン株式会社 | Thin film transistor and thin film diode |
JP2007073698A (en) * | 2005-09-06 | 2007-03-22 | Canon Inc | Transistor |
JP5116225B2 (en) | 2005-09-06 | 2013-01-09 | キヤノン株式会社 | Manufacturing method of oxide semiconductor device |
JP4280736B2 (en) | 2005-09-06 | 2009-06-17 | キヤノン株式会社 | Semiconductor element |
EP3614442A3 (en) | 2005-09-29 | 2020-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having oxide semiconductor layer and manufactoring method thereof |
JP5037808B2 (en) | 2005-10-20 | 2012-10-03 | キヤノン株式会社 | Field effect transistor using amorphous oxide, and display device using the transistor |
KR20090115222A (en) | 2005-11-15 | 2009-11-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Manufacturing method of semiconductor device |
TWI292281B (en) | 2005-12-29 | 2008-01-01 | Ind Tech Res Inst | Pixel structure of active organic light emitting diode and method of fabricating the same |
US7867636B2 (en) | 2006-01-11 | 2011-01-11 | Murata Manufacturing Co., Ltd. | Transparent conductive film and method for manufacturing the same |
JP4977478B2 (en) | 2006-01-21 | 2012-07-18 | 三星電子株式会社 | ZnO film and method of manufacturing TFT using the same |
JP5177954B2 (en) | 2006-01-30 | 2013-04-10 | キヤノン株式会社 | Field effect transistor |
US7576394B2 (en) | 2006-02-02 | 2009-08-18 | Kochi Industrial Promotion Center | Thin film transistor including low resistance conductive thin films and manufacturing method thereof |
US7977169B2 (en) | 2006-02-15 | 2011-07-12 | Kochi Industrial Promotion Center | Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof |
KR20070101595A (en) | 2006-04-11 | 2007-10-17 | 삼성전자주식회사 | Zno thin film transistor |
US20070252928A1 (en) | 2006-04-28 | 2007-11-01 | Toppan Printing Co., Ltd. | Structure, transmission type liquid crystal display, reflection type display and manufacturing method thereof |
JP5028033B2 (en) | 2006-06-13 | 2012-09-19 | キヤノン株式会社 | Oxide semiconductor film dry etching method |
JP4999400B2 (en) | 2006-08-09 | 2012-08-15 | キヤノン株式会社 | Oxide semiconductor film dry etching method |
JP4609797B2 (en) | 2006-08-09 | 2011-01-12 | Nec液晶テクノロジー株式会社 | Thin film device and manufacturing method thereof |
JP5128792B2 (en) * | 2006-08-31 | 2013-01-23 | 財団法人高知県産業振興センター | Thin film transistor manufacturing method |
JP4332545B2 (en) | 2006-09-15 | 2009-09-16 | キヤノン株式会社 | Field effect transistor and manufacturing method thereof |
JP5164357B2 (en) | 2006-09-27 | 2013-03-21 | キヤノン株式会社 | Semiconductor device and manufacturing method of semiconductor device |
JP4274219B2 (en) | 2006-09-27 | 2009-06-03 | セイコーエプソン株式会社 | Electronic devices, organic electroluminescence devices, organic thin film semiconductor devices |
US7622371B2 (en) | 2006-10-10 | 2009-11-24 | Hewlett-Packard Development Company, L.P. | Fused nanocrystal thin film semiconductor and method |
JP5116290B2 (en) * | 2006-11-21 | 2013-01-09 | キヤノン株式会社 | Thin film transistor manufacturing method |
US7772021B2 (en) | 2006-11-29 | 2010-08-10 | Samsung Electronics Co., Ltd. | Flat panel displays comprising a thin-film transistor having a semiconductive oxide in its channel and methods of fabricating the same for use in flat panel displays |
JP2008140684A (en) | 2006-12-04 | 2008-06-19 | Toppan Printing Co Ltd | Color el display, and its manufacturing method |
KR101303578B1 (en) | 2007-01-05 | 2013-09-09 | 삼성전자주식회사 | Etching method of thin film |
US8207063B2 (en) | 2007-01-26 | 2012-06-26 | Eastman Kodak Company | Process for atomic layer deposition |
KR100851215B1 (en) | 2007-03-14 | 2008-08-07 | 삼성에스디아이 주식회사 | Thin film transistor and organic light-emitting dislplay device having the thin film transistor |
JP5320746B2 (en) * | 2007-03-28 | 2013-10-23 | 凸版印刷株式会社 | Thin film transistor |
JP5197058B2 (en) * | 2007-04-09 | 2013-05-15 | キヤノン株式会社 | Light emitting device and manufacturing method thereof |
WO2008126879A1 (en) * | 2007-04-09 | 2008-10-23 | Canon Kabushiki Kaisha | Light-emitting apparatus and production method thereof |
US7795613B2 (en) | 2007-04-17 | 2010-09-14 | Toppan Printing Co., Ltd. | Structure with transistor |
KR101325053B1 (en) | 2007-04-18 | 2013-11-05 | 삼성디스플레이 주식회사 | Thin film transistor substrate and manufacturing method thereof |
KR20080094300A (en) | 2007-04-19 | 2008-10-23 | 삼성전자주식회사 | Thin film transistor and method of manufacturing the same and flat panel display comprising the same |
KR101334181B1 (en) | 2007-04-20 | 2013-11-28 | 삼성전자주식회사 | Thin Film Transistor having selectively crystallized channel layer and method of manufacturing the same |
CN101663762B (en) | 2007-04-25 | 2011-09-21 | 佳能株式会社 | Oxynitride semiconductor |
KR101345376B1 (en) | 2007-05-29 | 2013-12-24 | 삼성전자주식회사 | Fabrication method of ZnO family Thin film transistor |
KR101270174B1 (en) | 2007-12-03 | 2013-05-31 | 삼성전자주식회사 | Method of manufacturing oxide semiconductor thin film transistor |
JP5213422B2 (en) | 2007-12-04 | 2013-06-19 | キヤノン株式会社 | Oxide semiconductor element having insulating layer and display device using the same |
JP5215158B2 (en) | 2007-12-17 | 2013-06-19 | 富士フイルム株式会社 | Inorganic crystalline alignment film, method for manufacturing the same, and semiconductor device |
US7855153B2 (en) | 2008-02-08 | 2010-12-21 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
JP4555358B2 (en) | 2008-03-24 | 2010-09-29 | 富士フイルム株式会社 | Thin film field effect transistor and display device |
KR100941850B1 (en) | 2008-04-03 | 2010-02-11 | 삼성모바일디스플레이주식회사 | Thin film transistor, method of manufacturing the thin film transistor and flat panel display device having the thin film transistor |
JP2009253204A (en) * | 2008-04-10 | 2009-10-29 | Idemitsu Kosan Co Ltd | Field-effect transistor using oxide semiconductor, and its manufacturing method |
JP5331382B2 (en) * | 2008-05-30 | 2013-10-30 | 富士フイルム株式会社 | Manufacturing method of semiconductor device |
KR100963026B1 (en) | 2008-06-30 | 2010-06-10 | 삼성모바일디스플레이주식회사 | Thin film transistor, method of manufacturing the thin film transistor and flat panel display device having the thin film transistor |
KR100963027B1 (en) | 2008-06-30 | 2010-06-10 | 삼성모바일디스플레이주식회사 | Thin film transistor, method of manufacturing the thin film transistor and flat panel display device having the thin film transistor |
KR100963104B1 (en) | 2008-07-08 | 2010-06-14 | 삼성모바일디스플레이주식회사 | Thin film transistor, method of manufacturing the thin film transistor and flat panel display device having the thin film transistor |
KR101588576B1 (en) * | 2008-07-10 | 2016-01-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Light emitting device and electronic device |
US8945981B2 (en) * | 2008-07-31 | 2015-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
TWI495108B (en) | 2008-07-31 | 2015-08-01 | Semiconductor Energy Lab | Method for manufacturing semiconductor devices |
TWI597850B (en) * | 2008-07-31 | 2017-09-01 | 半導體能源研究所股份有限公司 | Method of manufacturing semiconductor device |
JP5608347B2 (en) | 2008-08-08 | 2014-10-15 | 株式会社半導体エネルギー研究所 | Semiconductor device and manufacturing method of semiconductor device |
TWI642113B (en) * | 2008-08-08 | 2018-11-21 | 半導體能源研究所股份有限公司 | Method for manufacturing semiconductor device |
JP5345456B2 (en) | 2008-08-14 | 2013-11-20 | 富士フイルム株式会社 | Thin film field effect transistor |
JP5501586B2 (en) | 2008-08-22 | 2014-05-21 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
KR101538283B1 (en) * | 2008-08-27 | 2015-07-22 | 이데미쓰 고산 가부시키가이샤 | Field-effect transistor, method for manufacturing same, and sputtering target |
JP5523015B2 (en) | 2008-08-28 | 2014-06-18 | キヤノン株式会社 | Image forming apparatus |
US9082857B2 (en) | 2008-09-01 | 2015-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising an oxide semiconductor layer |
JP5537787B2 (en) * | 2008-09-01 | 2014-07-02 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
TWI511299B (en) | 2008-09-01 | 2015-12-01 | Semiconductor Energy Lab | Method for manufacturing semiconductor device |
JP5627071B2 (en) | 2008-09-01 | 2014-11-19 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
KR101623224B1 (en) * | 2008-09-12 | 2016-05-20 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and method for manufacturing the same |
KR101545460B1 (en) * | 2008-09-12 | 2015-08-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and manufacturing method thereof |
JP4623179B2 (en) | 2008-09-18 | 2011-02-02 | ソニー株式会社 | Thin film transistor and manufacturing method thereof |
KR101999970B1 (en) * | 2008-09-19 | 2019-07-15 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
KR101490148B1 (en) * | 2008-09-19 | 2015-02-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Display device |
JP5451280B2 (en) | 2008-10-09 | 2014-03-26 | キヤノン株式会社 | Wurtzite crystal growth substrate, manufacturing method thereof, and semiconductor device |
TWI556323B (en) * | 2009-03-13 | 2016-11-01 | 半導體能源研究所股份有限公司 | Semiconductor device and method for manufacturing the semiconductor device |
CN103151266B (en) * | 2009-11-20 | 2016-08-03 | 株式会社半导体能源研究所 | The method being used for producing the semiconductor devices |
JP2011138934A (en) | 2009-12-28 | 2011-07-14 | Sony Corp | Thin film transistor, display device, and electronic equipment |
KR20130045418A (en) | 2010-04-23 | 2013-05-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Manufacturing method of semiconductor device |
KR101800844B1 (en) | 2010-04-23 | 2017-11-23 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Method for manufacturing semiconductor device |
KR101854421B1 (en) | 2010-04-23 | 2018-05-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Method for manufacturing semiconductor device |
WO2011132591A1 (en) | 2010-04-23 | 2011-10-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
CN106057907B (en) | 2010-04-23 | 2019-10-22 | 株式会社半导体能源研究所 | The manufacturing method of semiconductor device |
-
2011
- 2011-04-01 CN CN201180020535.XA patent/CN102859705B/en active Active
- 2011-04-01 CN CN201510749563.5A patent/CN105390402B/en not_active Expired - Fee Related
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- 2011-04-01 WO PCT/JP2011/058859 patent/WO2011132548A1/en active Application Filing
- 2011-04-01 KR KR1020157006442A patent/KR101636008B1/en active IP Right Grant
- 2011-04-01 CN CN201410663619.0A patent/CN104465408B/en not_active Expired - Fee Related
- 2011-04-01 KR KR1020167016729A patent/KR101748404B1/en active IP Right Grant
- 2011-04-18 TW TW105113976A patent/TWI596677B/en not_active IP Right Cessation
- 2011-04-18 TW TW100113356A patent/TWI557806B/en active
- 2011-04-18 TW TW103143042A patent/TWI543271B/en active
- 2011-04-18 TW TW106118424A patent/TWI708288B/en not_active IP Right Cessation
- 2011-04-21 JP JP2011094970A patent/JP5755491B2/en active Active
- 2011-04-21 US US13/091,181 patent/US8828811B2/en active Active
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- 2014-09-04 US US14/476,797 patent/US20140370656A1/en not_active Abandoned
-
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- 2015-05-13 US US14/710,675 patent/US9373707B2/en active Active
- 2015-05-27 JP JP2015106924A patent/JP6178363B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010000243A1 (en) * | 1999-01-08 | 2001-04-12 | Yukiyasu Sugano | Process for producing thin film semiconductor device and laser irradiation apparatus |
US20110095288A1 (en) * | 2008-07-03 | 2011-04-28 | Sony Corporation | Thin film transistor and display device |
US20100072435A1 (en) * | 2008-09-20 | 2010-03-25 | Konica Minolta Holdings, Inc. | Production method of metal oxide precursor layer, production method of metal oxide layer, and electronic device |
US8309956B2 (en) * | 2008-12-03 | 2012-11-13 | Sony Corporation | Thin film transistor, display unit, and method of manufacturing thin film transistor |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10186603B2 (en) | 2010-05-21 | 2019-01-22 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device including oxygen doping treatment |
US9171943B2 (en) | 2011-11-25 | 2015-10-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US10249764B2 (en) | 2012-02-09 | 2019-04-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device including semiconductor device, electronic device including semiconductor device, and method for manufacturing semiconductor device |
US9722091B2 (en) | 2014-09-12 | 2017-08-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
US9786495B2 (en) | 2014-09-19 | 2017-10-10 | Semiconductor Energy Laboratory Co., Ltd. | Method for evaluating semiconductor film and method for manufacturing semiconductor device |
US11874981B2 (en) | 2016-08-29 | 2024-01-16 | Semiconductor Energy Laboratory Co., Ltd. | Display device and control program |
Also Published As
Publication number | Publication date |
---|---|
CN102859705B (en) | 2015-12-09 |
KR20130054275A (en) | 2013-05-24 |
TWI543271B (en) | 2016-07-21 |
CN105390402A (en) | 2016-03-09 |
US20110260171A1 (en) | 2011-10-27 |
TWI557806B (en) | 2016-11-11 |
US20150243768A1 (en) | 2015-08-27 |
JP6178363B2 (en) | 2017-08-09 |
JP5755491B2 (en) | 2015-07-29 |
TW201742160A (en) | 2017-12-01 |
TW201511139A (en) | 2015-03-16 |
KR101636008B1 (en) | 2016-07-06 |
CN105390402B (en) | 2018-09-07 |
TW201145404A (en) | 2011-12-16 |
US8828811B2 (en) | 2014-09-09 |
CN104465408A (en) | 2015-03-25 |
WO2011132548A1 (en) | 2011-10-27 |
KR20160075870A (en) | 2016-06-29 |
JP2015164225A (en) | 2015-09-10 |
KR20150036817A (en) | 2015-04-07 |
KR101748404B1 (en) | 2017-06-16 |
TWI596677B (en) | 2017-08-21 |
US9373707B2 (en) | 2016-06-21 |
TW201630082A (en) | 2016-08-16 |
CN104465408B (en) | 2017-09-15 |
CN102859705A (en) | 2013-01-02 |
JP2011243972A (en) | 2011-12-01 |
TWI708288B (en) | 2020-10-21 |
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