US20140299908A1 - Light emitting diode package and method of fabricating the same - Google Patents

Light emitting diode package and method of fabricating the same Download PDF

Info

Publication number
US20140299908A1
US20140299908A1 US14/267,985 US201414267985A US2014299908A1 US 20140299908 A1 US20140299908 A1 US 20140299908A1 US 201414267985 A US201414267985 A US 201414267985A US 2014299908 A1 US2014299908 A1 US 2014299908A1
Authority
US
United States
Prior art keywords
light emitting
emitting diode
chip
metal frame
diode chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US14/267,985
Inventor
Peiching Ling
Vivek B. Dutta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US14/267,985 priority Critical patent/US20140299908A1/en
Assigned to LING, PEICHING reassignment LING, PEICHING ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: DUTTA, VIVEK B., LING, PEICHING
Publication of US20140299908A1 publication Critical patent/US20140299908A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50Wavelength conversion elements
    • H01L33/507Wavelength conversion elements the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/647Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body

Definitions

  • This invention relates to Light Emitting Diodes (LED), and, more particularly, to an LED assembly and a method of fabricating the same.
  • LED Light Emitting Diodes
  • LED light emitting diodes
  • the LED chip is available in two configurations: (a) with both its +ve & ⁇ ve contact terminals (bond pads) on the same surface, shown as 10 in FIG. 1A ; (b) with its +ve & ⁇ ve contact terminals (bond pads) on the opposite surfaces, shown as 10 ′ in FIG. 1B .
  • FIGS. 1A , 1 A′ and 1 B show three different interconnect approaches in typical LED packages 1 , 1 ′′ and 1 ′ according to the prior art.
  • an LED chip 10 is disposed through an adhesive 102 on a substrate 12 having an inner circuit (not shown) and conductive pads 120 ; a wire bonding process is performed to electrically connect the electrode pads 100 of the LED chip 10 to the conductive pads 120 with gold wires 11 ; a light-pervious encapsulant 13 is formed on the substrate 12 for encapsulating the wire-bonded structure and a phosphor layer 14 is further formed over the light-pervious encapsulant 13 , in more than one form or combination with the option to dispose the LED package 1 on and electrically connected to a circuit board (not shown).
  • metal electrodes also known as ‘bumps’
  • the wire bonding process is eliminated and is replaced by ‘flip-chip interconnect’.
  • metal electrodes also known as ‘bumps’
  • the electrode pads 100 of the LED chip 10 are implanted on the electrode pads 100 of the LED chip 10 and are used to electrically connect the LED chip 10 on a substrate 12 having an inner circuit (not shown) to the conductive pads 120 .
  • an LED chip 10 ′ is disposed through an electrically conductive adhesive 102 on a substrate 12 that has an inner circuit (not shown) and conductive pads 120 and 121
  • An electrode pad 101 formed on a bottom side of the LED chip 10 ′ is electrically connected to the conductive pad 121 ; and a wire bonding process is performed to electrically connect an electrode pad 100 on a top side of the LED chip 10 ′ to the conductive pad 120 with a gold wire 11 .
  • a light-pervious encapsulant 13 is formed on the substrate 12 for encapsulating the wire-bonded structure and a phosphor layer 14 is formed over the light-pervious encapsulant 13 in more than one form or combination with the option to dispose the LED package 1 on and electrically connected to a circuit board (not shown).
  • the LED packages 1 and 1 ′ since the electrode pads 100 are electrically connected to the conductive pads 120 with the gold wires 11 , the substrate 12 that has the conductive pads 120 and 121 is needed for the conduction of the LED chips 10 and 10 ′. Therefore, the LED packages 1 and 1 ′ have an increased overall height due to the use of the substrate 12 having a thickness h and the arc-shaped gold wire 11 . However, in the LED packages 1 ′′ the height constraint due to the use of gold wires is eliminated, but the substrate still prevails.
  • the conductive pads 120 and 121 of the substrate 12 have to be formed in accordance with the LED chips 10 and 10 ′ and the circuit board, and thus sizes and pitches thereof have to be adjusted from one product to another. As such, the LED packages 1 and 1 are costly to fabricate.
  • the adhesive 102 needs to be disposed between the LED chips 10 and 10 ′ and the substrate 12 and the substrate 12 is generally made of ceramics or plastics, the LED chips 10 and 10 ′ have poor heat-dissipating efficacy.
  • the present invention provides a method of fabricating an LED package, comprising: providing a light emitting diode (LED) chip having a first surface and a second surface opposing the first surface, and forming at least a first electrode pad on the first surface of the LED chip; and connecting at least a first lead of a metal frame to the at least a first electrode pad.
  • LED light emitting diode
  • the method further comprises disposing the light emitting diode (LED) package on a carrier component, forming on the carrier component a first light-pervious encapsulant that encapsulates the light emitting diode chip; and removing the carrier component.
  • LED light emitting diode
  • the present invention further provides a method of fabricating a metal frame.
  • the present invention further provides an LED package, comprising: an LED chip having a first surface and a second surface opposing the first surface; at least a first electrode pad formed on the first surface of the LED chip; and a metal frame having at least a first lead electrically connected to the at least a first electrode pad.
  • the at least a first lead each has a first end and a second end opposing the first end, and has a bended structure, allowing a height difference to exist between the first end and the second end and the light emitting diode chip to be received therein.
  • the first lead has a first end connected to the first electrode pad and a second end opposing the first end, and a support layer that is metal is formed on the second end.
  • an LED package according to the present invention a conductive metal frame or TAB tape is used as an electrical connection element, in place of a gold wire or added metal electrodes (bumps) used in the prior art. Therefore, the LED package does not need a substrate that is used to connect with the gold wire. Compared with an LED package according to the prior art, an LED package according to the present invention has a reduced thickness.
  • an LED package according to the present invention costs less.
  • the chip is now attached directly on the metal frame, the junction temperature of chip is lower due to improved heat-dissipating efficacy.
  • FIGS. 1A , 1 A′ and 1 B are cross-sectional views of three different LED packages according to the prior art
  • FIGS. 2A and 2B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 2 A′ is a stereogram of FIG. 2A , and FIG. 2 A′′ is another embodiment of FIG. 2A ;
  • FIGS. 3A to 3B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 3 A′ is a stereogram of FIG. 3A ;
  • FIGS. 4A-4C illustrates a novel method of fabricating a metal frame according to the present invention, wherein FIG. 4 A′ is a cross-sectional view along a cutting line 4 - 4 of FIG. 4A , FIG. 4 C′ is another embodiment of FIG. 4C , and FIG. 4 C′′ is a schematic diagram illustrating a chip disposed in a dent of the carrier component;
  • FIG. 5 is a cross-sectional view of a metal frame fabricated through the use of a mold
  • FIGS. 6A-6B illustrates a method of fabricating a light emitting diode package according to the present invention, wherein FIG. 6 A′ is a cross-sectional view along a cutting line 6 - 6 of FIG. 6A , and FIG. 6B-1 is another embodiment of FIG. 6A ; and
  • FIGS. 7A , 7 B, and 7 C are schematic diagrams illustrating a metal frame electrically connected to a chip.”
  • FIGS. 2A to 2C are cross-sectional views illustrating a method of fabricating a package of a first embodiment according to the present invention.
  • the chip 20 is a light emitting diode (LED) chip, and has a first surface 20 a and a second surface 20 b opposing the first surface 20 a.
  • a plurality of first electrode pads 200 are disposed on the first surface 20 a of the chip 20 .
  • two first electrode pads 200 are disposed on the first surface 20 a of the chip 20 .
  • the metal frame 21 or TAB tape 21 has a plurality of first leads 210 .
  • the first leads 210 have first ends (hereinafter referred to as “inner ends 210 a ”) and second ends (hereinafter referred to as “outer ends 210 b ”) opposing the inner ends 210 a.
  • Each of the first leads 210 has a bended structure, and the first end and the second end have a height difference.
  • the inner end 210 a are connected to the first electrode pad 200 , and the outer end 210 b are used for connection of an external electronic device such as a circuit board.
  • the plurality of first leads 210 form a dent structure for the chip 20 to be received therein.
  • FIG. 2 A′ shows a modularized embodiment.
  • the light emitting device structures 2 may be separated by cutting along a cutting line 2 A- 2 A, for facilitating the serial or parallel design.
  • the plurality of first leads 210 may be coplanar, the first leads 210 may be disposed on connection pads 22 a of a carrier component 22 having a circuit, and the chip 20 is disposed on the first leads 210 .
  • the chip 20 is thus installed on the carrier component 22 through the metal frame, such that the first leads 210 of the metal frame are disposed between the chip 20 and the carrier component 22 , and a first light-pervious encapsulant 23 a may be further formed to encapsulate the first leads 210 of the metal frame.
  • a first light-pervious encapsulant 23 a may be further formed to encapsulate the first leads 210 of the metal frame.
  • the thin enough LED chip 10 is easily cracked because a phosphor layer is adhered to the LED chip 10 , if an underfill (not shown) is not formed between the LED chip 10 and the substrate 12 .
  • an underfill (not shown) is not formed between the LED chip 10 and the substrate 12 .
  • the first leads 210 of the present invention are used as electrical connections, a high-density of phosphor layer may be formed on the chip 20 by an electrostatic charge process, without using the underfill. Therefore, a first light-pervious encapsulant is formed directly, and a package is thus obtained.
  • the electrostatic charge process is preferably performed in a reduced-pressure or a vacuum environment, so as to deposit a substantially uniform phosphor layer on a surface of the chip 20 .
  • the electrostatic charge process is detailed in U.S. Application No. 61/216,374 filed on May 15, 2009, U.S. Application No. 61/273,129 filed on Jul. 30, 2009, U.S. Application No. 61/284,792 filed on Dec. 26, 2009, U.S. application Ser. No. 12/587,290 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,281 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,291 filed on Oct. 5, 2009 and U.S. Application No. 61/322,866 filed on Apr. 11, 2010, which are incorporated herein for references.
  • the uniform phosphor layer may be formed by forming electrostatic charges on the chip 20 or grounding the chip 20 , and moving the chip 20 to be close to and absorb the phosphor powder having opposite charges or particles formed by phosphor powder and a bonding material, so as to form the uniform phosphor layer.
  • the phosphor powder may contain no charge, and the chip 20 has charges, in order to form the uniform phosphor layer.
  • the electrostatic charge process is performed in a non-liquid environment. In other words, the deposition process does not need to maintain and suffer from the uniform distribution of the phosphor powder and the boding agent in the liquid suspension.
  • the phosphor powder and the bonding material are formed on the surface of the chip 20 , respectively. Therefore, the electrostatic charge process may accurately control the encapsulating density of the phosphor powder and the layer thickness.
  • the previous mentioned “particles formed by the phosphor powder and bonding material” may be a mixture having phosphor powder and bonding material or another mixture having phosphor powder encapsulated by bonding material, and the phosphor powder occupies more than 75% of the volume of the phosphor layer.
  • the uniform phosphor layer comprises phosphor powder constituted by a plurality of phosphor particles
  • the phosphor particles of the phosphor layer occupy more than 75% of the volume of the phosphor layer.
  • a bonding layer (having a thickness less than 10 ⁇ m) is further formed on the uniform phosphor layer after the electrostatic charge process.
  • the bonding layer may be silicone, epoxy resin, glass, softens or any suitable material applicable to an LED package, such as Parylene, which has excellent anti-moisture property and can prevent the phosphor hr LED from being degraded in a humid/hot environment.
  • FIG. 2B which illustrates a method of electrically connecting first leads 210 and forming a first-light pervious component 23 a.
  • the second surface 20 b of the chip 20 is disposed on the carrier component 22 through an adhesive 220 .
  • the first leads 210 shown in FIG. 2A are electrically connected to the first electrode pads 200 and the connection pads 220 .
  • the first light-pervious encapsulant 23 a is disposed on the carrier component 22 to encapsulate the chip 20 and the first lead 210 , a uniform phosphor layer 24 is, optionally, formed on the first light-pervious encapsulant 23 a to cover the first surface 20 a of the chip 20 , and the first light-pervious encapsulant 23 a is disposed between the uniform phosphor layer 24 and the chip 20 .
  • the uniform phosphor layer 24 comprises phosphor powder and a bonding material, and the phosphor powder occupies more than 75% of a volume of the uniform phosphor layer 24 .
  • the phosphor layer may also be formed on a surface of the chip.
  • the phosphor is used to convert or change the wavelength of light emitted by an LED, for example.
  • the phosphor includes YAG, TAG, ZnSeS, and SiAlON such as ⁇ -SiALON.
  • any material may be used as the phosphor material, as long as it can convert the wavelength of incident light.
  • the term “phosphor” used herein indicates all materials that convert or change a wavelength to another wavelength, and includes compound or composition of different wavelength-converting materials.
  • the phosphor since being in a powder form, is also called phosphor powder.
  • the phosphor powder is composed of a plurality of phosphor particles.
  • the metal frame 21 is used to replace the gold wire used in the prior art.
  • the semiconductor package 2 does not include a substrate that is used to electrically connect the gold wire, and has a reduced overall height.
  • FIGS. 3A and 3B are cross-sectional views illustrating a method of fabricating a semiconductor package of a second embodiment according to the present invention.
  • the second embodiment differs from the first embodiment in locations of the electrode pads of the chip and the structure of the metal frame.
  • a plurality of second electrode pads 201 are further disposed on the second surface 20 b of the chip 20 ′, and a metal frame 21 ′ further comprises a plurality of second leads 211 having top surfaces 211 a connected to the second electrode pads 201 .
  • the second leads 211 may be connected to the second electrode pads 201 through an adhesive 212 .
  • the second leads 211 are connected to the connection pads 22 b of the carrier component 22 , then the chip 20 ′ is disposed on the second leads 211 through the encapsulant 220 , the first leads shown in FIG. 2A are electrically connected to the first electrode pads 200 and the connection pads 22 a, and the first light-pervious encapsulant 23 a and the uniform phosphor layer 24 are formed sequentially.
  • the metal frame 21 ′ is made of a metal material, which can provide a good enough heat-dissipating path.
  • the second surface 20 b of the chip 20 ′ has an improved heat-dissipating efficacy.
  • the light emitting device 2 , 2 ′ has: a chip 20 , 20 ′ having a first surface 20 a and a second surface 20 b opposing the first surface 20 a, and a metal frame 21 , 21 ′ having first leads 210 .
  • the light emitting device 2 , 2 ′ may further comprise a first light-pervious encapsulant 23 a that encapsulates the chip 20 , 20 ′, and a uniform phosphor layer 24 formed on the first light-pervious encapsulant 23 a.
  • the chip 20 , 20 ′ is a light emitting diode chip, and first electrode pads 200 are formed on the first surface 20 a.
  • Each of the first leads 210 of the metal frame 21 , 21 ′ has an inner end 210 a connected to one of the electrode pads 200 and an outer end 210 b connected to an electronic device such as a circuit board (not shown).
  • the second surface 20 b of the chip 20 , 20 ′ is exposed from the first light-pervious encapsulant 23 a.
  • second electrode pads 201 are formed on the second surface 20 b of the chip 20 ′, and the metal frame 21 ′ further has second leads 211 for electrical connection of the exposed second electrode pads 201 .
  • the uniform phosphor layer 24 covers the chip 20 , 20 ′, and the first light-pervious encapsulant 23 a is formed between the uniform phosphor layer 24 and the chip 20 , 20 ′.
  • the uniform phosphor layer may be formed between the first light-pervious encapsulant 23 a and the chip 20 , 20 ′, or formed on the second surface 20 b of the chip 20 (not shown).
  • the uniform phosphor layer 24 comprises phosphor powder and bonding material, and the phosphor powder occupies more than 75% of the volume of the uniform phosphor layer 24 .
  • the uniform phosphor layer 24 may comprise phosphor powder composed of a plurality of phosphor particles, and the phosphor particles occupy more than 75% of the volume of the uniform phosphor layer.
  • FIGS. 4A to 4C illustrate a method of fabricating a metal frame.
  • FIG. 4 A′ is a cross-sectional view of the metal frame along a cutting line 4 - 4 of FIG. 4A .
  • the metal frame is made by: forming on a substrate 40 a leaf of metal layer 410 having a first end 410 a and a second end 410 b opposing the first end 410 a; and forming on the first end 410 a and second end 411 b of the metal layer 410 conductive elements 410 c , 410 c ′ made of conductive materials (for example: nickel, gold/tin or the combination thereof), such that the metal layer 410 and the conductive element 410 c constitute a first lead 41 .
  • the metal layer 410 may be formed by screen printing or other conventional plating or etching techniques.
  • the substrate 40 is bended and reversed, such that the first end 410 a and the second end 410 b have a height difference, as shown in FIG. 4C , and the conductive element 410 c of the first lead 41 is electrically connected to the first electrode pad 420 of the light emitting diode chip 42 ; and the substrate 40 is removed.
  • the substrate is an organic substrate, such as polyimide or other cheaper and softer polymer such as polyethylene, as long as the bonding force of the substrate and the metal layer does not affect the separation thereof.
  • a support layer 43 is formed on the substrate, as shown in FIG. 4A .
  • the substrate is not bended, and may be removed after the first lead 41 is connected to the first electrode pad 420 .
  • a first light-pervious encapsulant 44 that encapsulates the metal frame may be formed on the substrate before the substrate is removed, as shown in FIG. 4 C′.
  • a conductive element 410 c ′ made of nickel, gold/tin or the combination thereof is also formed on a second end 410 b of a leaf of metal layer 410 .
  • the present invention is not limited to the embodiment of FIG. 4 C′′ in which the conductive component 410 c ′ is formed on the metal layer 410 .
  • the metal layer 410 is not bended.
  • the chip 42 is disposed in a dent 450 of a carrier component, and the metal layer 410 that acts as a first lead comprises a first end 410 a electrically connected to a first electrode pad 420 and a second end 410 b opposing the first end 410 a and electrically connected to the carrier component 45 . Since the metal layer 410 is stiffer than a solder wire and has a certain flexibility, a broader dimension tolerance, e.g., a vertical drop between the chip 42 and the dent 450 , may be provided.
  • FIG. 5 illustrates another method of fabricating the metal frame.
  • the method comprises: forming on a mold 50 at least a leaf of metal layer 510 having a first end 510 a and a second end 510 b opposing the first end 510 a, wherein the first end 510 a and the second end 510 b have a height difference due to the shape of the mold 50 ; forming a conductive element 510 c on the first end 510 a of the metal layer 510 , such that the metal layer 510 and the conductive element 510 c constitute the first lead 51 ; electrically connecting the conductive element 510 c of the first lead 51 to the first electrode 520 ; and removing the mold 50 .
  • FIGS. 6A and 6B another method of fabricating a light emitting diode package of an embodiment according to the present invention is illustrated.
  • the metal frame is formed on a support layer 60 having a plurality of opening areas 600 .
  • the support layer 60 is made of metal or polymer such as polyimide.
  • At least a portion of the first lead 61 is exposed from the opening area 600 .
  • the first lead 61 has a first end 610 a and a second end 610 b opposing the first end 610 a.
  • the exposed first end 610 a is connectible to the first electrode pad of the light emitting diode chip, and the second end 610 b is exposed from the opening area 600 .
  • Said opening areas 600 could prevent the support layer 60 from being contacted with a heater during reflow process.
  • the support layer 60 and the first lead 61 are bended, and the first electrode pad 620 of the light emitting diode chip 62 is formed on the first end 610 a.
  • the first end 610 a and second end 610 b are respectively formed with conductive elements 610 c, 610 c ′.
  • the support layer may be peeled off so as to obtain a plurality of light emitting devices.
  • conductive elements 610 c, 610 c ′ are respectively formed on the top surface of the first end 610 a and bottom surface of the second end 610 b before the light emitting diode chip 62 is disposed on the first end 610 a.
  • the first lead 61 has a first end 610 a connected to the first electrode pad 620 and a second end 610 b opposing the first end 610 a, and the conductive element 610 c and support layer 60 are positioned on the same surface.
  • FIGS. 7A , 7 B, and 7 C schematic diagrams illustrating a metal frame electrically connected to a chip in a serial manner according to the present invention are shown.
  • a plurality of chips 70 are disposed on a carrier component 72 , each of the chips 70 has a plurality of first electrode pads 700 , and connection pads 720 are formed on the carrier component 72 adjacent the chips 70 .
  • the metal frame of the present invention has a plurality of first leads 710 , each of which has a first end 710 a electrically connected to one of the first electrode pads 700 and a second end 710 b electrically connected to one of the connection pads 720 of the carrier component 72 .
  • each of the formed first leads 710 ′ has two ends 711 a and 711 b serially electrically connected to the chips 70 , respectively.
  • a serial structure of the plurality of chips 70 and carrier component 72 is achieved as long as the second end 710 b of one of the first leads 710 on one of the chips 70 is connected to one of the connection pads 720 of the carrier component 72 .
  • Each of the first leads 710 has a first end 710 a electrically connected to the top surface of the chip 70 and a second end 710 b electrically connected to the bottom surface of the chip 70 .
  • a metal frame is used to carry a chip and to electrically connect a circuit board. Therefore, the semiconductor package does not need a substrate installed or conduct a wire bonding process. The semiconductor package thus has a reduced height.

Abstract

A light emitting diode package and a method of fabricating the same. The package includes a light emitting diode chip having a first surface and a second surface opposing the first surface, a metal frame (or TAB tape) having leads connected to the light emitting diode chip, and a light-pervious encapsulant encapsulating the light emitting diode chip, wherein the second surface of the chip is exposed from the first light-pervious encapsulant. The metal frame (or TAB tape) connects the light emitting diode chip to an external circuit board. The LED package does not need wire-bonding process. A method of fabricating a light emitting diode package is also provided.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • This application is a Division of application Ser. No. 13/401,347 filed Feb. 21, 2012, the entire contents of which are incorporated herein by reference.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • This invention relates to Light Emitting Diodes (LED), and, more particularly, to an LED assembly and a method of fabricating the same.
  • 2. Description of Related Art
  • With the progress of electronic industry and the advent of digital age, electronic products are designed to have a variety of functionalities. In recent years, eco-friendly electronic products such as light emitting diodes (LED) come to the market.
  • The LED chip is available in two configurations: (a) with both its +ve & −ve contact terminals (bond pads) on the same surface, shown as 10 in FIG. 1A; (b) with its +ve & −ve contact terminals (bond pads) on the opposite surfaces, shown as 10′ in FIG. 1B. As the LED technology is advancing, several packaging and architectures are now available accommodating both these configurations. FIGS. 1A, 1A′ and 1B show three different interconnect approaches in typical LED packages 1, 1″ and 1′ according to the prior art.
  • As shown in FIG. 1A, in the fabrication of the LED package 1 an LED chip 10 is disposed through an adhesive 102 on a substrate 12 having an inner circuit (not shown) and conductive pads 120; a wire bonding process is performed to electrically connect the electrode pads 100 of the LED chip 10 to the conductive pads 120 with gold wires 11; a light-pervious encapsulant 13 is formed on the substrate 12 for encapsulating the wire-bonded structure and a phosphor layer 14 is further formed over the light-pervious encapsulant 13, in more than one form or combination with the option to dispose the LED package 1 on and electrically connected to a circuit board (not shown).
  • As shown in FIG. 1A′, in the fabrication of the LED package 1″ the wire bonding process is eliminated and is replaced by ‘flip-chip interconnect’. In this case metal electrodes (also known as ‘bumps’) are implanted on the electrode pads 100 of the LED chip 10 and are used to electrically connect the LED chip 10 on a substrate 12 having an inner circuit (not shown) to the conductive pads 120.
  • In the fabrication of the LED package 1′ shown in FIG. 1B, an LED chip 10′ is disposed through an electrically conductive adhesive 102 on a substrate 12 that has an inner circuit (not shown) and conductive pads 120 and 121 An electrode pad 101 formed on a bottom side of the LED chip 10′ is electrically connected to the conductive pad 121; and a wire bonding process is performed to electrically connect an electrode pad 100 on a top side of the LED chip 10′ to the conductive pad 120 with a gold wire 11. A light-pervious encapsulant 13 is formed on the substrate 12 for encapsulating the wire-bonded structure and a phosphor layer 14 is formed over the light-pervious encapsulant 13 in more than one form or combination with the option to dispose the LED package 1 on and electrically connected to a circuit board (not shown).
  • In the LED packages 1 and 1′, since the electrode pads 100 are electrically connected to the conductive pads 120 with the gold wires 11, the substrate 12 that has the conductive pads 120 and 121 is needed for the conduction of the LED chips 10 and 10′. Therefore, the LED packages 1 and 1′ have an increased overall height due to the use of the substrate 12 having a thickness h and the arc-shaped gold wire 11. However, in the LED packages 1″ the height constraint due to the use of gold wires is eliminated, but the substrate still prevails.
  • Moreover, the conductive pads 120 and 121 of the substrate 12 have to be formed in accordance with the LED chips 10 and 10′ and the circuit board, and thus sizes and pitches thereof have to be adjusted from one product to another. As such, the LED packages 1 and 1 are costly to fabricate.
  • Because the adhesive 102 needs to be disposed between the LED chips 10 and 10′ and the substrate 12 and the substrate 12 is generally made of ceramics or plastics, the LED chips 10 and 10′ have poor heat-dissipating efficacy.
  • Therefore, how to overcome the problems of the prior art is becoming one of the critical issues in the art.
  • SUMMARY OF THE INVENTION
  • In view of the above-mentioned problems of the prior art, the present invention provides a method of fabricating an LED package, comprising: providing a light emitting diode (LED) chip having a first surface and a second surface opposing the first surface, and forming at least a first electrode pad on the first surface of the LED chip; and connecting at least a first lead of a metal frame to the at least a first electrode pad.
  • The method further comprises disposing the light emitting diode (LED) package on a carrier component, forming on the carrier component a first light-pervious encapsulant that encapsulates the light emitting diode chip; and removing the carrier component.
  • The present invention further provides a method of fabricating a metal frame.
  • According to the previously described method, the present invention further provides an LED package, comprising: an LED chip having a first surface and a second surface opposing the first surface; at least a first electrode pad formed on the first surface of the LED chip; and a metal frame having at least a first lead electrically connected to the at least a first electrode pad.
  • In an embodiment, the at least a first lead each has a first end and a second end opposing the first end, and has a bended structure, allowing a height difference to exist between the first end and the second end and the light emitting diode chip to be received therein. Alternatively, the first lead has a first end connected to the first electrode pad and a second end opposing the first end, and a support layer that is metal is formed on the second end.
  • In an LED package according to the present invention, a conductive metal frame or TAB tape is used as an electrical connection element, in place of a gold wire or added metal electrodes (bumps) used in the prior art. Therefore, the LED package does not need a substrate that is used to connect with the gold wire. Compared with an LED package according to the prior art, an LED package according to the present invention has a reduced thickness.
  • In the fabrication of an LED package according to the present invention, a conductive metal frame is disposed on a circuit board, and a substrate having a conductive pad is no longer needed. Therefore, an LED package according to the present invention costs less.
  • the chip is now attached directly on the metal frame, the junction temperature of chip is lower due to improved heat-dissipating efficacy.
  • BRIEF DESCRIPTION OF DRAWINGS
  • The invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:
  • FIGS. 1A, 1A′ and 1B are cross-sectional views of three different LED packages according to the prior art;
  • FIGS. 2A and 2B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 2A′ is a stereogram of FIG. 2A, and FIG. 2A″ is another embodiment of FIG. 2A;
  • FIGS. 3A to 3B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 3A′ is a stereogram of FIG. 3A;
  • Besides the standard methods existing per prior art, FIGS. 4A-4C illustrates a novel method of fabricating a metal frame according to the present invention, wherein FIG. 4A′ is a cross-sectional view along a cutting line 4-4 of FIG. 4A, FIG. 4C′ is another embodiment of FIG. 4C, and FIG. 4C″ is a schematic diagram illustrating a chip disposed in a dent of the carrier component;
  • FIG. 5 is a cross-sectional view of a metal frame fabricated through the use of a mold;
  • FIGS. 6A-6B illustrates a method of fabricating a light emitting diode package according to the present invention, wherein FIG. 6A′ is a cross-sectional view along a cutting line 6-6 of FIG. 6A, and FIG. 6B-1 is another embodiment of FIG. 6A; and
  • FIGS. 7A, 7B, and 7C are schematic diagrams illustrating a metal frame electrically connected to a chip.”
  • DETAILED DESCRIPTION OF THE INVENTION
  • The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparently understood by those in the art after reading the disclosure of this specification. The present invention can also be performed or applied by other different embodiments. The details of the specification may be on the basis of different points and applications, and numerous modifications and variations can be devised without departing from the spirit of the present invention.
  • First Embodiment
  • FIGS. 2A to 2C are cross-sectional views illustrating a method of fabricating a package of a first embodiment according to the present invention.
  • As shown in FIGS. 2A and 2A′, a chip 20 and a metal frame 21 are provided. The chip 20 is a light emitting diode (LED) chip, and has a first surface 20 a and a second surface 20 b opposing the first surface 20 a. A plurality of first electrode pads 200 are disposed on the first surface 20 a of the chip 20. For instance, two first electrode pads 200 are disposed on the first surface 20 a of the chip 20.
  • The metal frame 21 or TAB tape 21 has a plurality of first leads 210. The first leads 210 have first ends (hereinafter referred to as “inner ends 210 a”) and second ends (hereinafter referred to as “outer ends 210 b”) opposing the inner ends 210 a. Each of the first leads 210 has a bended structure, and the first end and the second end have a height difference. The inner end 210 a are connected to the first electrode pad 200, and the outer end 210 b are used for connection of an external electronic device such as a circuit board. The plurality of first leads 210 form a dent structure for the chip 20 to be received therein. FIG. 2A′ shows a modularized embodiment. The light emitting device structures 2 may be separated by cutting along a cutting line 2A-2A, for facilitating the serial or parallel design.
  • As shown in FIG. 2A″, the plurality of first leads 210 may be coplanar, the first leads 210 may be disposed on connection pads 22 a of a carrier component 22 having a circuit, and the chip 20 is disposed on the first leads 210. The chip 20 is thus installed on the carrier component 22 through the metal frame, such that the first leads 210 of the metal frame are disposed between the chip 20 and the carrier component 22, and a first light-pervious encapsulant 23 a may be further formed to encapsulate the first leads 210 of the metal frame. Unlike the convention flip-chip structure shown in FIG. 1A′, the thin enough LED chip 10 is easily cracked because a phosphor layer is adhered to the LED chip 10, if an underfill (not shown) is not formed between the LED chip 10 and the substrate 12. However, if the first leads 210 of the present invention are used as electrical connections, a high-density of phosphor layer may be formed on the chip 20 by an electrostatic charge process, without using the underfill. Therefore, a first light-pervious encapsulant is formed directly, and a package is thus obtained.
  • The electrostatic charge process is preferably performed in a reduced-pressure or a vacuum environment, so as to deposit a substantially uniform phosphor layer on a surface of the chip 20. The electrostatic charge process is detailed in U.S. Application No. 61/216,374 filed on May 15, 2009, U.S. Application No. 61/273,129 filed on Jul. 30, 2009, U.S. Application No. 61/284,792 filed on Dec. 26, 2009, U.S. application Ser. No. 12/587,290 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,281 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,291 filed on Oct. 5, 2009 and U.S. Application No. 61/322,866 filed on Apr. 11, 2010, which are incorporated herein for references.
  • For example, the uniform phosphor layer may be formed by forming electrostatic charges on the chip 20 or grounding the chip 20, and moving the chip 20 to be close to and absorb the phosphor powder having opposite charges or particles formed by phosphor powder and a bonding material, so as to form the uniform phosphor layer. Of course, the phosphor powder may contain no charge, and the chip 20 has charges, in order to form the uniform phosphor layer. Unlike the conventional electro-chemical charge process in a slurry environment, the electrostatic charge process is performed in a non-liquid environment. In other words, the deposition process does not need to maintain and suffer from the uniform distribution of the phosphor powder and the boding agent in the liquid suspension. By contrast, in some embodiments the phosphor powder and the bonding material are formed on the surface of the chip 20, respectively. Therefore, the electrostatic charge process may accurately control the encapsulating density of the phosphor powder and the layer thickness. The previous mentioned “particles formed by the phosphor powder and bonding material” may be a mixture having phosphor powder and bonding material or another mixture having phosphor powder encapsulated by bonding material, and the phosphor powder occupies more than 75% of the volume of the phosphor layer.
  • When the uniform phosphor layer comprises phosphor powder constituted by a plurality of phosphor particles, the phosphor particles of the phosphor layer occupy more than 75% of the volume of the phosphor layer. A bonding layer (having a thickness less than 10 μm) is further formed on the uniform phosphor layer after the electrostatic charge process. The bonding layer may be silicone, epoxy resin, glass, softens or any suitable material applicable to an LED package, such as Parylene, which has excellent anti-moisture property and can prevent the phosphor hr LED from being degraded in a humid/hot environment.
  • Refer to FIG. 2B, which illustrates a method of electrically connecting first leads 210 and forming a first-light pervious component 23 a. The second surface 20 b of the chip 20 is disposed on the carrier component 22 through an adhesive 220. Then, the first leads 210 shown in FIG. 2A are electrically connected to the first electrode pads 200 and the connection pads 220. Then, the first light-pervious encapsulant 23 a is disposed on the carrier component 22 to encapsulate the chip 20 and the first lead 210, a uniform phosphor layer 24 is, optionally, formed on the first light-pervious encapsulant 23 a to cover the first surface 20 a of the chip 20, and the first light-pervious encapsulant 23 a is disposed between the uniform phosphor layer 24 and the chip 20.
  • The uniform phosphor layer 24 comprises phosphor powder and a bonding material, and the phosphor powder occupies more than 75% of a volume of the uniform phosphor layer 24.
  • Of course, the phosphor layer may also be formed on a surface of the chip.
  • The phosphor is used to convert or change the wavelength of light emitted by an LED, for example. In general, the phosphor includes YAG, TAG, ZnSeS, and SiAlON such as α-SiALON. However, any material may be used as the phosphor material, as long as it can convert the wavelength of incident light. The term “phosphor” used herein indicates all materials that convert or change a wavelength to another wavelength, and includes compound or composition of different wavelength-converting materials. The phosphor, since being in a powder form, is also called phosphor powder.
  • Alternatively, the phosphor powder is composed of a plurality of phosphor particles.
  • In the method of fabricating the semiconductor package 2, the metal frame 21 is used to replace the gold wire used in the prior art. As such, the semiconductor package 2 does not include a substrate that is used to electrically connect the gold wire, and has a reduced overall height.
  • Second Embodiment
  • FIGS. 3A and 3B are cross-sectional views illustrating a method of fabricating a semiconductor package of a second embodiment according to the present invention. The second embodiment differs from the first embodiment in locations of the electrode pads of the chip and the structure of the metal frame.
  • As shown in FIGS. 3A and 3A′, a plurality of second electrode pads 201 are further disposed on the second surface 20 b of the chip 20′, and a metal frame 21′ further comprises a plurality of second leads 211 having top surfaces 211 a connected to the second electrode pads 201. Optionally, the second leads 211 may be connected to the second electrode pads 201 through an adhesive 212.
  • As shown in FIG. 3B, the second leads 211 are connected to the connection pads 22 b of the carrier component 22, then the chip 20′ is disposed on the second leads 211 through the encapsulant 220, the first leads shown in FIG. 2A are electrically connected to the first electrode pads 200 and the connection pads 22 a, and the first light-pervious encapsulant 23 a and the uniform phosphor layer 24 are formed sequentially.
  • If an adhesive 212 is used in the semiconductor package 2′, the metal frame 21′ is made of a metal material, which can provide a good enough heat-dissipating path. Compared with the substrate of the prior art which is made of ceramics or plastics, the second surface 20 b of the chip 20′ has an improved heat-dissipating efficacy.
  • The light emitting device 2, 2′ has: a chip 20, 20′ having a first surface 20 a and a second surface 20 b opposing the first surface 20 a, and a metal frame 21, 21′ having first leads 210. Preferably, the light emitting device 2, 2′ may further comprise a first light-pervious encapsulant 23 a that encapsulates the chip 20, 20′, and a uniform phosphor layer 24 formed on the first light-pervious encapsulant 23 a.
  • The chip 20, 20′ is a light emitting diode chip, and first electrode pads 200 are formed on the first surface 20 a.
  • Each of the first leads 210 of the metal frame 21, 21′ has an inner end 210 a connected to one of the electrode pads 200 and an outer end 210 b connected to an electronic device such as a circuit board (not shown).
  • The second surface 20 b of the chip 20, 20′ is exposed from the first light-pervious encapsulant 23 a. In an embodiment, second electrode pads 201 are formed on the second surface 20 b of the chip 20′, and the metal frame 21′ further has second leads 211 for electrical connection of the exposed second electrode pads 201.
  • The uniform phosphor layer 24 covers the chip 20, 20′, and the first light-pervious encapsulant 23 a is formed between the uniform phosphor layer 24 and the chip 20, 20′. In another embodiment, the uniform phosphor layer may be formed between the first light-pervious encapsulant 23 a and the chip 20, 20′, or formed on the second surface 20 b of the chip 20 (not shown).
  • The uniform phosphor layer 24 comprises phosphor powder and bonding material, and the phosphor powder occupies more than 75% of the volume of the uniform phosphor layer 24. Alternatively, the uniform phosphor layer 24 may comprise phosphor powder composed of a plurality of phosphor particles, and the phosphor particles occupy more than 75% of the volume of the uniform phosphor layer.
  • Third Embodiment
  • FIGS. 4A to 4C illustrate a method of fabricating a metal frame. FIG. 4A′ is a cross-sectional view of the metal frame along a cutting line 4-4 of FIG. 4A. The metal frame is made by: forming on a substrate 40 a leaf of metal layer 410 having a first end 410 a and a second end 410 b opposing the first end 410 a; and forming on the first end 410 a and second end 411 b of the metal layer 410 conductive elements 410 c, 410 c′ made of conductive materials (for example: nickel, gold/tin or the combination thereof), such that the metal layer 410 and the conductive element 410 c constitute a first lead 41. The metal layer 410 may be formed by screen printing or other conventional plating or etching techniques.
  • As shown in FIG. 4B, the substrate 40 is bended and reversed, such that the first end 410 a and the second end 410 b have a height difference, as shown in FIG. 4C, and the conductive element 410 c of the first lead 41 is electrically connected to the first electrode pad 420 of the light emitting diode chip 42; and the substrate 40 is removed.
  • In an embodiment, the substrate is an organic substrate, such as polyimide or other cheaper and softer polymer such as polyethylene, as long as the bonding force of the substrate and the metal layer does not affect the separation thereof. When a softer substrate is used, a support layer 43 is formed on the substrate, as shown in FIG. 4A.
  • If the metal frame is formed as shown in FIG. 2A″, the substrate is not bended, and may be removed after the first lead 41 is connected to the first electrode pad 420. Of course, a first light-pervious encapsulant 44 that encapsulates the metal frame may be formed on the substrate before the substrate is removed, as shown in FIG. 4C′.
  • Referring to FIG. 4C″, a conductive element 410 c′ made of nickel, gold/tin or the combination thereof is also formed on a second end 410 b of a leaf of metal layer 410.
  • The present invention is not limited to the embodiment of FIG. 4C″ in which the conductive component 410 c′ is formed on the metal layer 410. In the embodiment, the metal layer 410 is not bended. The chip 42 is disposed in a dent 450 of a carrier component, and the metal layer 410 that acts as a first lead comprises a first end 410 a electrically connected to a first electrode pad 420 and a second end 410 b opposing the first end 410 a and electrically connected to the carrier component 45. Since the metal layer 410 is stiffer than a solder wire and has a certain flexibility, a broader dimension tolerance, e.g., a vertical drop between the chip 42 and the dent 450, may be provided.
  • Fourth Embodiment
  • Please refer to FIG. 5, which illustrates another method of fabricating the metal frame. The method comprises: forming on a mold 50 at least a leaf of metal layer 510 having a first end 510 a and a second end 510 b opposing the first end 510 a, wherein the first end 510 a and the second end 510 b have a height difference due to the shape of the mold 50; forming a conductive element 510 c on the first end 510 a of the metal layer 510, such that the metal layer 510 and the conductive element 510 c constitute the first lead 51; electrically connecting the conductive element 510 c of the first lead 51 to the first electrode 520; and removing the mold 50.
  • Fifth Embodiment
  • Referring to FIGS. 6A and 6B, another method of fabricating a light emitting diode package of an embodiment according to the present invention is illustrated. The metal frame is formed on a support layer 60 having a plurality of opening areas 600. The support layer 60 is made of metal or polymer such as polyimide. At least a portion of the first lead 61 is exposed from the opening area 600. The first lead 61 has a first end 610 a and a second end 610 b opposing the first end 610 a. The exposed first end 610 a is connectible to the first electrode pad of the light emitting diode chip, and the second end 610 b is exposed from the opening area 600. Said opening areas 600 could prevent the support layer 60 from being contacted with a heater during reflow process. As shown in FIG. 6B, the support layer 60 and the first lead 61 are bended, and the first electrode pad 620 of the light emitting diode chip 62 is formed on the first end 610 a. Besides, the first end 610 a and second end 610 b are respectively formed with conductive elements 610 c, 610 c′. After the installation of the light emitting diode chip 62, the support layer may be peeled off so as to obtain a plurality of light emitting devices.
  • In another aspect, as shown in FIG. 6B-1, conductive elements 610 c, 610 c′ are respectively formed on the top surface of the first end 610 a and bottom surface of the second end 610 b before the light emitting diode chip 62 is disposed on the first end 610 a.
  • According to the light emitting device structure obtained from the fifth embodiment, the first lead 61 has a first end 610 a connected to the first electrode pad 620 and a second end 610 b opposing the first end 610 a, and the conductive element 610 c and support layer 60 are positioned on the same surface.
  • Sixth Embodiment
  • Referring to FIGS. 7A, 7B, and 7C, schematic diagrams illustrating a metal frame electrically connected to a chip in a serial manner according to the present invention are shown.
  • As shown in FIG. 7A, a plurality of chips 70 are disposed on a carrier component 72, each of the chips 70 has a plurality of first electrode pads 700, and connection pads 720 are formed on the carrier component 72 adjacent the chips 70.
  • The metal frame of the present invention has a plurality of first leads 710, each of which has a first end 710 a electrically connected to one of the first electrode pads 700 and a second end 710 b electrically connected to one of the connection pads 720 of the carrier component 72.
  • Alternatively, each of the formed first leads 710′ has two ends 711 a and 711 b serially electrically connected to the chips 70, respectively. A serial structure of the plurality of chips 70 and carrier component 72 is achieved as long as the second end 710 b of one of the first leads 710 on one of the chips 70 is connected to one of the connection pads 720 of the carrier component 72. A person skilled in the art is allowed to amend the above embodiments.
  • Referring to FIG. 7C, another example of serial structure is illustrated. Each of the first leads 710 has a first end 710 a electrically connected to the top surface of the chip 70 and a second end 710 b electrically connected to the bottom surface of the chip 70.
  • In a semiconductor package and a method of fabricating the same according to the present invention, a metal frame is used to carry a chip and to electrically connect a circuit board. Therefore, the semiconductor package does not need a substrate installed or conduct a wire bonding process. The semiconductor package thus has a reduced height.
  • The foregoing descriptions of the detailed embodiments are only illustrated to disclose the features and functions of the present invention and not restrictive of the scope of the present invention. It should be understood to those in the art that all modifications and variations according to the spirit and principle in the disclosure of the present invention should fall within the scope of the appended claims.

Claims (12)

What is claimed is:
1. A light emitting diode package, comprising:
a light emitting diode chip having a first surface and a second surface opposing the first surface;
at least a first electrode pad formed on the first surface of the light emitting diode chip;
a metal frame having at least a first lead electrically connected to the at least a first electrode pad; and
a carrier component and a first light-pervious encapsulant, such that the light emitting diode chip is disposed on the carrier component, and the first light-pervious encapsulant is formed on the carrier component for encapsulating the light emitting diode chip and the first leads of the metal frame.
2. The light emitting diode package of claim 1, wherein the at least a first lead is in a bending structure and has a first end and a second end opposing the first end, and the first end and the second end have a height difference for the light emitting diode chip to be received therein.
3. The light emitting diode package of claim 1, further comprising a support layer having a plurality of opening areas, and wherein the at least a first lead each has a first end connected to the at least a first electrode pad and a second end opposing the first end, and both of the first end and the second end are exposed from a corresponding one of the opening areas.
4. The light emitting diode package of claim 3, wherein the support layer is made of metal or polymer.
5. The light emitting diode package of claim 1, wherein the carrier component has a dent, so as for the light emitting diode chip to be disposed in the dent, and the at least a first lead each has a first end connected to the at least a first electrode pads and a second end opposing the first end and connected to the carrier component.
6. The light emitting diode package of claim 1, wherein the light emitting diode chip is disposed on the carrier component through the metal frame, allowing the metal frame to be sandwiched between the light emitting diode chip and the carrier component, and the first light-pervious encapsulant encapsulates the at least a first leads of the metal frame.
7. The light emitting diode package of claim 1, further comprising at least a second electrode pad formed on the second surface of the light emitting diode chip, wherein the metal frame further comprises at least a second lead connected to the at least a second electrode pad.
8. A method of fabricating a light emitting diode package, comprising:
providing a light emitting diode chip having a first surface and a second surface opposing the first surface, and at least a first electrode pad formed on the first surface; and
connecting at least a the first lead of a metal frame to the at least a first electrode pad.
9. The method of claim 8, further comprising forming on a carrier component on which the light emitting diode chip is disposed a first light-pervious encapsulant that encapsulates the light emitting diode chip.
10. The method of claim 9, wherein the carrier component has a dent, the light emitting diode chip is disposed in the dent, and the at least a first lead each has a first end connected to the at least a first electrode pad and a second end opposing the first end and connected to the carrier component.
11. The method of claim 9, wherein the light emitting diode chip is disposed on the carrier component through the metal frame, allowing the metal frame to be sandwiched between the light emitting diode chip and the carrier component, and the first light-pervious encapsulant encapsulates the at least a first lead of the metal frame.
12. The method of claim 8, wherein the light emitting diode chip further comprises at least a second electrode pad formed on the second surface of the light emitting diode chip, and the metal frame further comprises at least a second lead connected to the at least a second electrode pad.
US14/267,985 2012-02-21 2014-05-02 Light emitting diode package and method of fabricating the same Abandoned US20140299908A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/267,985 US20140299908A1 (en) 2012-02-21 2014-05-02 Light emitting diode package and method of fabricating the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/401,347 US8803185B2 (en) 2012-02-21 2012-02-21 Light emitting diode package and method of fabricating the same
US14/267,985 US20140299908A1 (en) 2012-02-21 2014-05-02 Light emitting diode package and method of fabricating the same

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US13/401,347 Division US8803185B2 (en) 2012-02-21 2012-02-21 Light emitting diode package and method of fabricating the same

Publications (1)

Publication Number Publication Date
US20140299908A1 true US20140299908A1 (en) 2014-10-09

Family

ID=48981622

Family Applications (2)

Application Number Title Priority Date Filing Date
US13/401,347 Expired - Fee Related US8803185B2 (en) 2012-02-21 2012-02-21 Light emitting diode package and method of fabricating the same
US14/267,985 Abandoned US20140299908A1 (en) 2012-02-21 2014-05-02 Light emitting diode package and method of fabricating the same

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US13/401,347 Expired - Fee Related US8803185B2 (en) 2012-02-21 2012-02-21 Light emitting diode package and method of fabricating the same

Country Status (3)

Country Link
US (2) US8803185B2 (en)
TW (1) TW201336124A (en)
WO (1) WO2013126169A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8803185B2 (en) * 2012-02-21 2014-08-12 Peiching Ling Light emitting diode package and method of fabricating the same
DE102012107668A1 (en) * 2012-08-21 2014-03-20 Epcos Ag component assembly
DE102014206601A1 (en) * 2014-04-04 2015-10-08 Siemens Aktiengesellschaft A method of mounting an electrical component using a hood and a hood suitable for use in this method
JP6597135B2 (en) * 2015-09-30 2019-10-30 日亜化学工業株式会社 Light emitting device
KR102412409B1 (en) * 2015-10-26 2022-06-23 엘지전자 주식회사 Display device using semiconductor light emitting device and method for manufacturing the same
CN109994594A (en) * 2017-12-29 2019-07-09 中芯长电半导体(江阴)有限公司 The encapsulating structure and packaging method of light-emitting diode chip for backlight unit
KR20210043604A (en) * 2018-09-07 2021-04-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Display device, display module, and electronic device
DE102019219016A1 (en) * 2019-12-05 2021-06-10 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURING AN OPTOELECTRONIC DEVICE

Citations (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4109096A (en) * 1975-01-29 1978-08-22 Compagnie Honeywell Bull (Societe Anonyme) Conditioning supports of micro-plates of integrated circuits
US6208019B1 (en) * 1998-03-13 2001-03-27 Kabushiki Kaisha Toshiba Ultra-thin card-type semiconductor device having an embredded semiconductor element in a space provided therein
US6225686B1 (en) * 1996-11-21 2001-05-01 Sony Corporation Semiconductor device
US20020182841A1 (en) * 1994-12-29 2002-12-05 Tessera, Inc. Compliant integrated circuit package
US20040041159A1 (en) * 2002-09-02 2004-03-04 Matsushita Electric Industrial Co., Ltd. Light-emitting device
US20040061433A1 (en) * 2001-10-12 2004-04-01 Nichia Corporation, Corporation Of Japan Light emitting apparatus and method of manufacturing the same
US20040106234A1 (en) * 2002-08-05 2004-06-03 Joerg-Erich Sorg Electrical leadframes, surface mountable semiconductor components, leadframe strips, and their method of manufacture
US20040140765A1 (en) * 2001-10-09 2004-07-22 Agilent Technologies, Inc. Light-emitting diode and method for its production
US20040262720A1 (en) * 2003-06-30 2004-12-30 Renesas Technology Corp. Semiconductor device
US20050072981A1 (en) * 2002-02-19 2005-04-07 Ryoma Suenaga Light-emitting device and process for producing thereof
US20050093128A1 (en) * 2003-09-05 2005-05-05 Canon Kabushiki Kaisha Semiconductor device, process of producing semiconductor device, and ink jet recording head
US20050194606A1 (en) * 2001-12-03 2005-09-08 Sony Corporation Transferring semiconductor crystal from a substrate to a resin
US20060261292A1 (en) * 2005-05-17 2006-11-23 Lg Electronics Inc. Light emitting device package and method for manufacturing the same
US20070145393A1 (en) * 2005-12-27 2007-06-28 Samsung Electronics Co., Ltd. Light emitting device package and method of manufacturing the same
US20070257335A1 (en) * 2004-10-29 2007-11-08 O'brien Peter Illuminator and Manufacturing Method
US20080048200A1 (en) * 2004-11-15 2008-02-28 Philips Lumileds Lighting Company, Llc LED with Phosphor Tile and Overmolded Phosphor in Lens
US20080121911A1 (en) * 2006-11-28 2008-05-29 Cree, Inc. Optical preforms for solid state light emitting dice, and methods and systems for fabricating and assembling same
US20080173884A1 (en) * 2007-01-22 2008-07-24 Cree, Inc. Wafer level phosphor coating method and devices fabricated utilizing method
US20090267102A1 (en) * 2008-03-12 2009-10-29 Industrial Technology Research Institute Light emitting diode package structure and method for fabricating the same
US7714348B2 (en) * 2006-10-06 2010-05-11 Ac-Led Lighting, L.L.C. AC/DC light emitting diodes with integrated protection mechanism
US20110193105A1 (en) * 2010-08-27 2011-08-11 Quarkstar, Llc Solid State Light Sheet for General Illumination Having Substrates for Creating Series Connection of Dies
US8067777B2 (en) * 2008-05-12 2011-11-29 Occam Portfolio Llc Light emitting diode package assembly
US20120025242A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led structure and packaging method of integrating functional circuits on a silicon
US20120025241A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led packaging structure and method based on a silicon substrate
US8134163B2 (en) * 2008-08-11 2012-03-13 Taiwan Semiconductor Manfacturing Co., Ltd. Light-emitting diodes on concave texture substrate
US8162444B2 (en) * 2008-06-17 2012-04-24 Canon Kabushiki Kaisha Printing head and manufacturing method of printing head
US20120292760A1 (en) * 2011-05-17 2012-11-22 Renesas Electronics Corporation Semiconductor device and method of manufacturing the same
US20120326203A1 (en) * 2008-02-05 2012-12-27 Kyong Jun Kim Light emitting apparatus and light unit having the same
US8680877B2 (en) * 2010-09-15 2014-03-25 Samsung Electronics Co., Ltd. Touch sensing apparatus and method for detecting approach
US8791486B2 (en) * 2010-06-01 2014-07-29 Lg Innotek Co., Ltd. Light emitting device package
US8803185B2 (en) * 2012-02-21 2014-08-12 Peiching Ling Light emitting diode package and method of fabricating the same
US20150014738A1 (en) * 2012-02-21 2015-01-15 Peiching Ling Light emitting diode package and method of fabricating the same

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0740600B2 (en) * 1987-04-30 1995-05-01 三菱電機株式会社 Semiconductor device
US5182631A (en) * 1988-04-15 1993-01-26 Nippon Telegraph And Telephone Corporation Film carrier for RF IC
US5202288A (en) 1990-06-01 1993-04-13 Robert Bosch Gmbh Method of manufacturing an electronic circuit component incorporating a heat sink
US5291062A (en) * 1993-03-01 1994-03-01 Motorola, Inc. Area array semiconductor device having a lid with functional contacts
US5583370A (en) * 1994-03-04 1996-12-10 Motorola Inc. Tab semiconductor device having die edge protection and method for making the same
US5661086A (en) * 1995-03-28 1997-08-26 Mitsui High-Tec, Inc. Process for manufacturing a plurality of strip lead frame semiconductor devices
JP2677242B2 (en) * 1995-04-27 1997-11-17 日本電気株式会社 Semiconductor device and manufacturing method thereof
JP3093960B2 (en) * 1995-07-06 2000-10-03 株式会社三井ハイテック Method for manufacturing semiconductor circuit element mounting substrate frame
US5621225A (en) 1996-01-18 1997-04-15 Motorola Light emitting diode display package
JP3527350B2 (en) * 1996-02-01 2004-05-17 株式会社ルネサステクノロジ Semiconductor device
US6074898A (en) * 1996-09-18 2000-06-13 Sony Corporation Lead frame and integrated circuit package
US5986334A (en) * 1996-10-04 1999-11-16 Anam Industrial Co., Ltd. Semiconductor package having light, thin, simple and compact structure
JPH11289023A (en) * 1998-04-02 1999-10-19 Oki Electric Ind Co Ltd Semiconductor device and manufacture thereof
US6372526B1 (en) * 1998-04-06 2002-04-16 Semiconductor Components Industries Llc Method of manufacturing semiconductor components
JP3562311B2 (en) * 1998-05-27 2004-09-08 松下電器産業株式会社 Method for manufacturing lead frame and resin-encapsulated semiconductor device
US6249041B1 (en) * 1998-06-02 2001-06-19 Siliconix Incorporated IC chip package with directly connected leads
US6130477A (en) * 1999-03-17 2000-10-10 Chen; Tsung-Chieh Thin enhanced TAB BGA package having improved heat dissipation
JP3215686B2 (en) * 1999-08-25 2001-10-09 株式会社日立製作所 Semiconductor device and manufacturing method thereof
JP3611198B2 (en) * 2000-02-16 2005-01-19 松下電器産業株式会社 Actuator and information recording / reproducing apparatus using the same
JP3502014B2 (en) * 2000-05-26 2004-03-02 シャープ株式会社 Semiconductor device and liquid crystal module
US20020182773A1 (en) * 2001-06-04 2002-12-05 Walsin Advanced Electronics Ltd Method for bonding inner leads of leadframe to substrate
US6531328B1 (en) 2001-10-11 2003-03-11 Solidlite Corporation Packaging of light-emitting diode
KR101015289B1 (en) 2002-11-05 2011-02-15 파나소닉 주식회사 Light-emitting diode
US6835960B2 (en) * 2003-03-03 2004-12-28 Opto Tech Corporation Light emitting diode package structure
JP4110222B2 (en) * 2003-08-20 2008-07-02 住友電気工業株式会社 Light emitting diode
KR100631521B1 (en) * 2004-04-17 2006-10-11 엘지전자 주식회사 Light emitting device and manufacturing method thereof
US7742142B2 (en) * 2005-08-09 2010-06-22 Chunghwa Picture Tubes, Ltd. Display and tape carrier package structure
US7466015B2 (en) 2005-08-10 2008-12-16 Jiahn-Chang Wu Supporting frame for surface-mount diode package
WO2008047933A1 (en) * 2006-10-17 2008-04-24 C.I.Kasei Company, Limited Package assembly for upper/lower electrode light-emitting diodes and light-emitting device manufacturing method using same
JP2008244425A (en) * 2007-02-21 2008-10-09 Mitsubishi Chemicals Corp GaN BASED LED ELEMENT AND LIGHT EMITTING DEVICE
US20090243058A1 (en) * 2008-03-31 2009-10-01 Yamaha Corporation Lead frame and package of semiconductor device
WO2010041630A1 (en) * 2008-10-10 2010-04-15 日本電気株式会社 Semiconductor device and method for manufacturing same
CN101752483B (en) * 2008-12-15 2011-09-28 富士迈半导体精密工业(上海)有限公司 Light emitting diode
TWI356514B (en) * 2009-03-19 2012-01-11 Lextar Electronics Corp Light emitting diode package
US8609467B2 (en) * 2009-03-31 2013-12-17 Sanyo Semiconductor Co., Ltd. Lead frame and method for manufacturing circuit device using the same
US8580609B2 (en) * 2009-06-30 2013-11-12 Intel Corporation Semiconductor device with embedded interconnect pad
KR101014063B1 (en) 2009-08-26 2011-02-10 엘지이노텍 주식회사 Lighting device and light unit using thereof
TWI385835B (en) 2009-10-02 2013-02-11 Everlight Electronics Co Ltd Method for manufacturing light-emitting diode device
US8598612B2 (en) * 2010-03-30 2013-12-03 Micron Technology, Inc. Light emitting diode thermally enhanced cavity package and method of manufacture
US8564092B2 (en) * 2011-02-25 2013-10-22 National Semiconductor Corporation Power convertor device and construction methods

Patent Citations (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4109096A (en) * 1975-01-29 1978-08-22 Compagnie Honeywell Bull (Societe Anonyme) Conditioning supports of micro-plates of integrated circuits
US20020182841A1 (en) * 1994-12-29 2002-12-05 Tessera, Inc. Compliant integrated circuit package
US6225686B1 (en) * 1996-11-21 2001-05-01 Sony Corporation Semiconductor device
US6208019B1 (en) * 1998-03-13 2001-03-27 Kabushiki Kaisha Toshiba Ultra-thin card-type semiconductor device having an embredded semiconductor element in a space provided therein
US20040140765A1 (en) * 2001-10-09 2004-07-22 Agilent Technologies, Inc. Light-emitting diode and method for its production
US20040061433A1 (en) * 2001-10-12 2004-04-01 Nichia Corporation, Corporation Of Japan Light emitting apparatus and method of manufacturing the same
US20050194606A1 (en) * 2001-12-03 2005-09-08 Sony Corporation Transferring semiconductor crystal from a substrate to a resin
US20050072981A1 (en) * 2002-02-19 2005-04-07 Ryoma Suenaga Light-emitting device and process for producing thereof
US20040106234A1 (en) * 2002-08-05 2004-06-03 Joerg-Erich Sorg Electrical leadframes, surface mountable semiconductor components, leadframe strips, and their method of manufacture
US20040041159A1 (en) * 2002-09-02 2004-03-04 Matsushita Electric Industrial Co., Ltd. Light-emitting device
US20040262720A1 (en) * 2003-06-30 2004-12-30 Renesas Technology Corp. Semiconductor device
US20050093128A1 (en) * 2003-09-05 2005-05-05 Canon Kabushiki Kaisha Semiconductor device, process of producing semiconductor device, and ink jet recording head
US20070257335A1 (en) * 2004-10-29 2007-11-08 O'brien Peter Illuminator and Manufacturing Method
US20080048200A1 (en) * 2004-11-15 2008-02-28 Philips Lumileds Lighting Company, Llc LED with Phosphor Tile and Overmolded Phosphor in Lens
US20060261292A1 (en) * 2005-05-17 2006-11-23 Lg Electronics Inc. Light emitting device package and method for manufacturing the same
US20070145393A1 (en) * 2005-12-27 2007-06-28 Samsung Electronics Co., Ltd. Light emitting device package and method of manufacturing the same
US7781788B2 (en) * 2005-12-27 2010-08-24 Samsung Electronics Co., Ltd. Light emitting device package having a transparent cover
US7714348B2 (en) * 2006-10-06 2010-05-11 Ac-Led Lighting, L.L.C. AC/DC light emitting diodes with integrated protection mechanism
US20080121911A1 (en) * 2006-11-28 2008-05-29 Cree, Inc. Optical preforms for solid state light emitting dice, and methods and systems for fabricating and assembling same
US20080173884A1 (en) * 2007-01-22 2008-07-24 Cree, Inc. Wafer level phosphor coating method and devices fabricated utilizing method
US9024349B2 (en) * 2007-01-22 2015-05-05 Cree, Inc. Wafer level phosphor coating method and devices fabricated utilizing method
US20120326203A1 (en) * 2008-02-05 2012-12-27 Kyong Jun Kim Light emitting apparatus and light unit having the same
US20090267102A1 (en) * 2008-03-12 2009-10-29 Industrial Technology Research Institute Light emitting diode package structure and method for fabricating the same
US8067777B2 (en) * 2008-05-12 2011-11-29 Occam Portfolio Llc Light emitting diode package assembly
US8162444B2 (en) * 2008-06-17 2012-04-24 Canon Kabushiki Kaisha Printing head and manufacturing method of printing head
US8134163B2 (en) * 2008-08-11 2012-03-13 Taiwan Semiconductor Manfacturing Co., Ltd. Light-emitting diodes on concave texture substrate
US8791486B2 (en) * 2010-06-01 2014-07-29 Lg Innotek Co., Ltd. Light emitting device package
US20120025241A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led packaging structure and method based on a silicon substrate
US20120025242A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led structure and packaging method of integrating functional circuits on a silicon
US20110193105A1 (en) * 2010-08-27 2011-08-11 Quarkstar, Llc Solid State Light Sheet for General Illumination Having Substrates for Creating Series Connection of Dies
US8680877B2 (en) * 2010-09-15 2014-03-25 Samsung Electronics Co., Ltd. Touch sensing apparatus and method for detecting approach
US20120292760A1 (en) * 2011-05-17 2012-11-22 Renesas Electronics Corporation Semiconductor device and method of manufacturing the same
US8803185B2 (en) * 2012-02-21 2014-08-12 Peiching Ling Light emitting diode package and method of fabricating the same
US20150014738A1 (en) * 2012-02-21 2015-01-15 Peiching Ling Light emitting diode package and method of fabricating the same

Also Published As

Publication number Publication date
US8803185B2 (en) 2014-08-12
US20130214315A1 (en) 2013-08-22
TW201336124A (en) 2013-09-01
WO2013126169A1 (en) 2013-08-29

Similar Documents

Publication Publication Date Title
US8803185B2 (en) Light emitting diode package and method of fabricating the same
US7719122B2 (en) System-in-package packaging for minimizing bond wire contamination and yield loss
US7476962B2 (en) Stack semiconductor package formed by multiple molding and method of manufacturing the same
US7723839B2 (en) Semiconductor device, stacked semiconductor device, and manufacturing method for semiconductor device
US6661089B2 (en) Semiconductor package which has no resinous flash formed on lead frame and method for manufacturing the same
US7675180B1 (en) Stacked electronic component package having film-on-wire spacer
US9129870B2 (en) Package structure having embedded electronic component
US20070090508A1 (en) Multi-chip package structure
US7608915B2 (en) Heat dissipation semiconductor package
US20130299957A1 (en) Semiconductor device
US8129226B2 (en) Power lead-on-chip ball grid array package
TWI398933B (en) Package structure of integrated circuit device and manufacturing method thereof
US20150115429A1 (en) Semiconductor package
US20090051019A1 (en) Multi-chip module package
TW200939411A (en) Chip structure
KR20050119414A (en) Stacked package comprising two edge pad-type semiconductor chips and method of manufacturing the same
US6683386B2 (en) Low profile optically-sensitive semiconductor package
TW201802956A (en) Method of forming a semiconductor package with conductive interconnect frame and structure
US20150014738A1 (en) Light emitting diode package and method of fabricating the same
US11469156B2 (en) Semiconductor package for discharging heat generated by semiconductor chip
KR100391094B1 (en) Dual die package and manufacturing method thereof
US20080179726A1 (en) Multi-chip semiconductor package and method for fabricating the same
CN101930971A (en) Multichip packaging structure and the method that forms multichip packaging structure
KR20110055985A (en) Stack package
US8519522B2 (en) Semiconductor package

Legal Events

Date Code Title Description
AS Assignment

Owner name: LING, PEICHING, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LING, PEICHING;DUTTA, VIVEK B.;REEL/FRAME:032806/0666

Effective date: 20111116

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION