US20140141601A1 - Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon - Google Patents

Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon Download PDF

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US20140141601A1
US20140141601A1 US14/146,383 US201414146383A US2014141601A1 US 20140141601 A1 US20140141601 A1 US 20140141601A1 US 201414146383 A US201414146383 A US 201414146383A US 2014141601 A1 US2014141601 A1 US 2014141601A1
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silicon
substrate
film
temperature
semiconductor
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Praveen Chaudhari
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Solar-Tectic LLC
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SOLAR-TECTIC LLC
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Definitions

  • the present invention is related to producing large grained to single crystal semiconductor films, such as silicon films, for producing articles such as photovoltaic and other electronic devices.
  • a major cost component in photovoltaic cells is the cost of the substrate on which the semiconductor film capable of converting sunlight into electricity is placed.
  • the most widely used substrate is single crystal silicon (Si). These substrates developed for the microelectronics industry have been modified for application in photovoltaic technology. If a silicon film could be deposited on an inexpensive substrate, such as glass, and with comparable quality as that found in silicon single crystals used in the microelectronics industry, the cost of photovoltaic technology would drop significantly.
  • Epitaxial growth of thin films is a very well established process. It has been investigated by hundreds of researchers. Epitaxial deposition provides a very viable way of growing very good quality films. Many single crystal semiconductors and insulator surfaces are used to study the epitaxial growth of metallic films; for example, the growth of silver on silicon, sapphire, or a mica surface. Epitaxial metallic films have also been grown on other metallic films, such as gold on silver. In contrast to metals, semiconductors, such as silicon, are difficult to grow epitaxially. For example, heteroepitaxial films of silicon have been successfully grown only on sapphire but at temperatures that are relatively high for the applications we disclose here, such as the growth of silicon on glass substrates.
  • phase diagram The thermodynamic stability and formation temperature of two or more elements is described by a composition versus temperature diagram, called a phase diagram.
  • phase diagrams are available in the scientific literature (Massalski et al).
  • the phase diagram provides information on the behavior of different phases, solid or liquid as a function of temperature and composition.
  • the liquidus in a simple binary eutectic system, such as Au and Si shows how the relative composition of the liquid and solid, it is in equilibrium with, changes with temperature. It is therefore possible to choose an average composition, different from the eutectic composition, and cool the mixture in such a way as to precipitate out one phase or the other.
  • the composition is chosen to be richer in silicon than the eutectic composition then on cooling through the liquidus boundary between the single phase liquid and the two phase liquid plus solid, silicon will nucleate and form a solid phase. If on the other hand it is gold rich relative to the eutectic composition the first solid phase to nucleate is gold rather than silicon.
  • the two components in this case, Au and Si solidify from the liquid phase to phase separate into the two components Au and Si.
  • the interface energy between the two components is generally positive and therefore drives the two components to aggregate into distinct phases with a minimum of surface area between the two rather than a fine mixture of the two.
  • the energetics of two other interfaces to consider also: one with the substrate and the other with vacuum or gas. In considering energetics it is not only the chemical interaction of the metal or Si with the substrate that is important but also its crystallographic orientation, for the surface or interface energy depends upon orientation of the grains.
  • eutectics compositions are lower than the melting temperature of the constituent elements.
  • the eutectic temperatures of Au, Al, and Ag with Si are 363, 577, and 835 degrees Centigrade (° C.), respectively.
  • the melting temperatures of the elements are 1064, 660, and 961° C., respectively.
  • the melting temperature of silicon is 1414° C.
  • the eutectics then offer the possibility of nucleating a silicon crystal from the liquid far below the temperature at which pure liquid silicon crystallizes. By a proper choice of the substrate surface exposed to the nucleating silicon, it is possible to nucleate and grow single crystal or large grained silicon films.
  • silicon eutectics using elements such as Au, Ag, and Al.
  • the compound nickel silicide forms a eutectic with Si.
  • silicide compounds forming a eutectic with Si Massalski et al.
  • An advantage of using a silicide is that frequently the electrical contact of the silicide with silicon has very desirable properties, such as a good ohmic contact or a Schottky barrier.
  • Some silicides are also known to have an epitaxial relationship with silicon. In this case, by appropriately choosing either a silicide rich or silicon rich melt either the silicon can be induced to grow epitaxially on the silicide or the silicide on silicon.
  • a disadvantage in this approach is the eutectic temperature, which is generally high.
  • Low temperature solutions can also be formed with some elements, For example, gallium (Ga) and Si have a eutectic temperature of less than 30° C., very close to that of the melting point of Ga.
  • elements such as indium or tin that form low temperature liquid solutions with silicon.
  • Si can be nucleated from these solutions at very low temperatures relative to pure silicon (Girault et al, Kass et al). These temperatures are sufficiently low that it opens up the possibility of using organic materials as substrates on which large grained to single crystal films can be grown. While this is an advantage, there is also a serious disadvantage; at these low temperatures, the silicon film can contain defects and hence are not very useful as a photovoltaic material.
  • these very low temperature deposits can be used to initiate the nucleation of a very thin silicon film, which is subsequently thickened by using higher temperature processes to optimize its photovoltaic properties.
  • phase diagram The choice of a particular system (phase diagram) is not only determined by temperature and energetics of the interfaces, but also by the solubility of the second element in Si. It is desirable to have precise control of the doping of Si in order to optimize its semiconductor properties for photovoltaic applications. It is also important to select the composition of the substrate and temperature of processing such that there is minimal or no chemical interaction between the silicon film and the surface of the substrate on which it is being deposited.
  • thermodynamically predicted concentration of the second element or phase in the semiconductor is minimal. If there is solubility then it must be a desirable dopant. For example aluminum (Al) in silicon behaves as a p-type dopant and experience in the semiconductor industry has shown that trace amount of Al can be desirable.
  • the liquidus curve has the highest temperature on the semiconductor side.
  • the melting point of the semiconductor is greater than the liquidus for all compositions in equilibrium with the semiconductor.
  • the homogeneous nucleation energy of silicon crystal from the melt is greater than that for heterogeneous nucleation on the substrate. This latter condition promotes heterogeneous nucleation.
  • the temperature for epitaxial growth is low enough to use inexpensive substrates such as glass but high enough to promote a good quality silicon film. For example, a growth temperature above approximately 550 degrees Centigrade (550° C.) is desirable to make a good quality silicon film.
  • the softening temperature of ordinary glasses is around 600° C.
  • the softening temperature of borosilicate glasses is higher. However it is not high enough to use conventional deposition temperature of greater than 750 degrees Centigrade for silicon on insulator, such as a sapphire substrate.
  • the semiconductor material has to be deposited on a substrate material which is inexpensive, and the surface of which enables heterogeneous nucleation and growth.
  • a substrate material which is inexpensive, and the surface of which enables heterogeneous nucleation and growth.
  • the nickel ribbon is used as a substrate for ion beam assisted deposition of a wide variety of highly textured ceramics, for example, magnesium oxide (MgO).
  • MgO magnesium oxide
  • the ion beam aligns the growing MgO film, which provides a template for the subsequent deposition of the cuprate superconductor.
  • the latter approach is not limited to using metal tapes but can be extended to other inexpensive substrates such as glass (Teplin et al). It has been found that texture can also be induced in MgO by depositing the film on a substrate that is inclined to the normal from the oncoming vapor of MgO.
  • the growth temperature is between 450 and 750 degrees Centigrade.
  • the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates out of the melt and on the surface of a substrate.
  • the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates on the surface of a substrate to produce a highly textured relatively large grained or single crystalline film.
  • the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates on the surface of a substrate made of a buffered tape in which texture is produced by mechanical deformation and the buffer layers are epitaxial to the texture of the metal tape.
  • the buffer layer exposed to the melt comprises of compounds, such as Al 2 O 3 or MgO.
  • the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates on the surface of a substrate made of a buffered tape, a glass substrate, or any other material suitable for inexpensive manufacture of photovoltaic cells in which strong texture is produced by ion beam assisted deposition.
  • the final layer, which is exposed to the silicon melt comprises of compounds, such as Al 2 O 3 or MgO.
  • a solid phase composition comprising a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and in which a thin film of the element or compound is deposited first followed by the semiconductor, such as silicon, and depositing at a temperature where the semiconductor atoms diffuse through the element or compound to heterogeneously nucleate on the substrate and propagate this crystallinity to the semiconductor film remaining on top of the element or compound.
  • FIG. 1 shows the phase diagram of the eutectic system Au—Si, taken from the literature (Massalski et al). The melting points of the two elements Au and Si, as well as the eutectic temperature are shown in the figure. The eutectic composition is also indicated. The liquidus line, which defines the boundary between the liquid gold-silicon alloy and solid silicon and a gold-silicon liquid alloy, and on the silicon rich side of the phase diagram, is marked. The figure also shows the change in phases as the composition is changed by depositing silicon on a film of gold held at constant temperature. As the silicon is evaporated on to the gold film, the film comprises of gold solid and a liquid gold-silicon alloy which changes from the point marked by 11 towards 12 .
  • FIG. 1 shows the phase diagram of the eutectic system Au—Si.
  • the eutectic composition is nominally 18.6 atomic percent pct Si and the rest being gold.
  • a thin gold film is first deposited on the buffered substrate. This is followed by silicon deposition. As the silicon concentration increases the film first forms a two phase mixture of gold and liquid gold-silicon. The composition of the latter is determined by the choice of the deposition temperature. With further increase of silicon, the liquid phase region, marked 12 , is reached and the remaining gold is dissolved. With still further increase of the amount of silicon, the second liquidus phase boundary, marked 13 , is reached and subsequent deposition of silicon atoms results in a solid phase of silicon in equilibrium with the silicon-gold liquid.
  • the solid silicon nucleates heterogeneously onto the surface.
  • the choice of the temperature of deposition is determined by balancing two considerations: quality in terms of defects of the epitaxial film; too low a temperature or too rapid a growth rate of the film at that temperature can introduce defects versus too high a temperature when chemical interaction or mechanical integrity of the substrate limit the usefulness of the material.
  • the metallic element and silicon can be co evaporated to reach any concentration between the points marked 12 and 13 in the figure and subsequently silicon added to reach the desired thickness, before cooling to room temperature.
  • the substrate with the film is cooled to room temperature. Even though the amount of gold required to catalyze a silicon film is small, it can be further reduced by etching the gold away, for example, by using iodine etch, available commercially. This gold can be recycled
  • a good high vacuum system with two electron beam guns is used to deposit gold and silicon independently.
  • a glass substrate coated with ion beam assisted deposited MgO film is held at temperatures between 575 and 600° C. These are nominal temperatures. It is understood to one skilled in the art that lower or higher temperatures can also be used depending upon the softening temperature of the glass substrate or the reaction kinetics of either gold or silicon with the metallic tape or its buffer layers when used as substrates.
  • a thin gold film of approximately 10 nm thickness is deposited first. This is followed by a silicon film deposited at a rate of 2 nm per minute on top of the gold film. The ratio of the thickness of the gold and silicon films is chosen such that the final composition ensures that a point, marked 13 , in FIG. 1 is reached.
  • This point lies at the boundary between the two phase region of solid Si and a liquid Si—Au mixture.
  • a 10 nm gold film followed a 100 nm silicon film satisfies this condition. Additional silicon film nucleates heterogeneously on the MgO surface to form the desired thin film.
  • the film can now be cooled to room temperature, where the film now comprises of two phases: gold and a relatively large grained and highly textured film of silicon on MgO.
  • the gold diffuses to the surface of the silicon film, driven by its lower surface energy relative to the silicon surface.
  • the film is etched in a solution, such as a commercially available iodine based chemical, which removes the gold from the two phases, gold and silicon, leaving behind a silicon film.
  • This silicon film can now be used as the surface on which a thicker silicon film appropriately doped to form a p-n junction, suitable for applications such as photovoltaics, can be deposited.
  • the thin silicon film can be used for heteroepitaxial deposition of other semiconductors, which might be more efficient convertors of sunlight to electricity.
  • a good high vacuum system with two electron beam guns is used to deposit aluminum and silicon independently.
  • a glass substrate or a Ni based substrate coated with a buffer layer of Al 2 O 3 is held at temperatures between 600 and 615 degree ° C. These are nominal temperatures. It is understood to one skilled in the art that lower or higher temperatures can also be used depending upon the softening temperature of the glass substrate or the reaction kinetics of either aluminum or silicon with the metallic tape or its buffer layers when used a substrates.
  • the eutectic Al—Si is used instead of the Au—Si example above.
  • a thin Al film 6 nm thick is deposited on the Al 2 O 3 followed by a 100 nm thick silicon deposition, and as described in example 1, above, the two phase region comprising of solid silicon and a liquid Si—Al mixture is reached.
  • the deposition is stopped and the sample is slowly cooled to room temperature.
  • Aluminum diffuses through the silicon film, driven by its lower surface energy relative to silicon.
  • the silicon film is heteroepitaxially aligned by the Al 2 O 3 surface.
  • the aluminum film on the surface can be etched chemically by well known processes to leave behind a silicon film. The surface of this film can now be used for further growth of epitaxial films either for photovoltaic devices or for field effect transistors.
  • silicon can be grown epitaxially on sapphire but at temperatures higher than 750° C. This is a well established commercial process. However, in the absence of aluminum, silicon deposition at, say, 600° C. produces a fine grained film rather than a heteroepitaxial film, as described above.
  • the Si film produced from the deposition of example 1 is etched to remove the Au and then placed back into the vacuum chamber and p + -Si is deposited on this film.
  • This latter layer serves two purposes: it provides a conducting layer for a photovoltaic device to be subsequently built on it and can be the starting point for a variety of differently configured photovoltaic devices as, for example, a nanowire photovoltaic device.
  • a 2-3 nm thick gold film is deposited on the silicon using an electron gun.
  • This 2-3 nm thick gold film breaks up into nanoparticles and is the starting point used by a number of investigators to use chemical vapor deposition to grow nanowires and use these nanowires for photovoltaic devices. The difference is that we show how an inexpensive buffered glass can be used rather than a relatively expensive single crystal Si substrate.
  • a second possibility is to deposit a Au film of thickness 5 nm as islands on a MgO buffered glass substrate, using lithographic or other means known in the art.
  • a heavily doped silicon (p + or n ⁇ ) film is now deposited on the surface followed by a p- or n-type silicon using electron beam deposition, as described in example 1.
  • the thickness of the heavily doped film is in the micron range whereas the lightly doped film is of the order of 100 nm.
  • the deposition process is now changed and chemical vapor deposition is used for subsequent deposition of suitably doped films of silicon, practiced in the art to grow silicon nanowire photovoltaic devices.
  • the heavier doped silicon film serves the purpose of a conducting layer.
  • Using gold islands has the advantage of controlling the nanowires diameter and length in order to maximize the efficiency of the photovoltaic cell (Kayes et al).
  • a conducting material such as TiN can be used.
  • the Si precipitates to heterogeneously nucleate to form an epitaxial film on the surface of the sapphire substrate.
  • This film is continuous and can be doped by adding borane or phosphene gases to silane to obtain p or n type semiconductor behavior.
  • This film can now be used as a basis to construct thin film photovoltaic cells or, alternatively, grow nanowires of Si on top of it by simply lowering the temperature of the substrate below the eutectic temperature of Al—Si (577° C.). For example, if the temperature of deposition is 500° C., Si nanowires will grow on top of the Si film.
  • the Al particles that precipitate out of the Al—Si solution once the temperature of the substrates is below the eutectic temperature now catalytically reduce the silane gas to form nanowires, as described in the literature. These nanowires can be used to build electronic devices, including photovoltaic cells.

Abstract

A method is provided for producing field effect transistors (FETs) for display applications. The method involves low temperature deposition of semiconductor films on inexpensive substrates such as ordinary soda-lime glass or borosilicate glass.

Description

    REFERENCES CITED
  • U.S. Patent Documents
    4,717,688 January 1987 Jaentsch 148/171
    5,326,719 July 1994 Green et al. 427/74 
    5,544,616 August 1996 Ciszek et al. 117/60 
    6,429,035 B2 August 2002 Nakagawa et al. 438/57 
    6,784,139 B1 August 2004 Sankar et al. 505/230
  • Other Publications
    • Kass et al, Liquid Phase Epitaxy of Silicon: Potentialialities and Prospects”, Physica B, Vol 129, 161 (1985)
    • Massalski et al, “Binary Alloy Phase Diagrams”, 2nd. edition, (1990), ASM International
    • Findikoglu et al, “Well-oriented Silicon Thin Films with High Carrier Mobility on Polycrystalline Substrates”, Adv. Materials, Vol 17, 1527, (2005)
    • Teplin et al, “A Proposed Route to Thin Film Crystal Si Using Biaxially Textured Foreign Template Layers” Conference paper NREL/CP-520-38977, November 2005
    • Goyal et al., “The RABiTS approach: Using Rolling-assisted Biaxially Textured Substrates for High-performance YBCO Superconductors,” MRS Bulletin, Vol. 29, 552, (2004)
    • Nast et al, “Aluminum Induced Crystallization of Amorphous Silicon on Glass Substrates Above and Below the Eutectic Temperature”, Appl. Phys. Lett., Vol 73, 3214, (1998)
    • Girault et al, “Liquid Phase Epitaxy of Silicon at very low Temperatures”, J. Crystal Growth, Vol 37, 169 (1977)
    • Kayes et al, “Comparison of the Device Physics Principles of Planar and Radial p-n junction Nanorod Solar Cells”, J. Appl. Phys., Vol 97, 114302, (2005)
    FIELD OF THE INVENTION
  • The present invention is related to producing large grained to single crystal semiconductor films, such as silicon films, for producing articles such as photovoltaic and other electronic devices.
  • FEDERAL FUNDING
  • None
  • BACKGROUND OF THE INVENTION
  • It is widely known that radiation from the sun striking earth provides enough energy to supply all of mankind's needs for energy for the indefinite future. Such a source of energy can be clean and environmentally benign.
  • It is also widely known that global warming is associated with the use of fossil fuels, such as coal, oil, and natural gas. It is accepted by the scientific community that global warming can have severe adverse effects around the planet. There are numerous efforts around the world, combined with a sense of urgency, to cut down emissions from the usage of fossil fuels. A dominant factor in favor of the continual use of fossil fuels is their cost per unit of available energy. If, for example, the cost of producing photovoltaic cells can be reduced by a factor of approximately three while maintaining efficiency of conversion, the photovoltaic technology would become cost competitive with fossil fuels.
  • A major cost component in photovoltaic cells is the cost of the substrate on which the semiconductor film capable of converting sunlight into electricity is placed. The most widely used substrate is single crystal silicon (Si). These substrates developed for the microelectronics industry have been modified for application in photovoltaic technology. If a silicon film could be deposited on an inexpensive substrate, such as glass, and with comparable quality as that found in silicon single crystals used in the microelectronics industry, the cost of photovoltaic technology would drop significantly.
  • Epitaxial growth of thin films is a very well established process. It has been investigated by hundreds of researchers. Epitaxial deposition provides a very viable way of growing very good quality films. Many single crystal semiconductors and insulator surfaces are used to study the epitaxial growth of metallic films; for example, the growth of silver on silicon, sapphire, or a mica surface. Epitaxial metallic films have also been grown on other metallic films, such as gold on silver. In contrast to metals, semiconductors, such as silicon, are difficult to grow epitaxially. For example, heteroepitaxial films of silicon have been successfully grown only on sapphire but at temperatures that are relatively high for the applications we disclose here, such as the growth of silicon on glass substrates.
  • In order to take advantage of highly textured large grained films for photovoltaic technology two problems need to be solved: inexpensive growth of high quality films and the availability of an inexpensive substrate on which desirable properties can be achieved. Here, we disclose a method for growing semiconductor films, such as silicon, satisfying the two requirements listed above and suitable for photovoltaic technology and other electronic applications.
  • The thermodynamic stability and formation temperature of two or more elements is described by a composition versus temperature diagram, called a phase diagram. In this invention we shall make use of phase diagrams. These phase diagrams are available in the scientific literature (Massalski et al). The phase diagram provides information on the behavior of different phases, solid or liquid as a function of temperature and composition. For example, the liquidus in a simple binary eutectic system, such as Au and Si, shows how the relative composition of the liquid and solid, it is in equilibrium with, changes with temperature. It is therefore possible to choose an average composition, different from the eutectic composition, and cool the mixture in such a way as to precipitate out one phase or the other. If the composition is chosen to be richer in silicon than the eutectic composition then on cooling through the liquidus boundary between the single phase liquid and the two phase liquid plus solid, silicon will nucleate and form a solid phase. If on the other hand it is gold rich relative to the eutectic composition the first solid phase to nucleate is gold rather than silicon.
  • At and below the eutectic temperature the two components, in this case, Au and Si solidify from the liquid phase to phase separate into the two components Au and Si. The interface energy between the two components is generally positive and therefore drives the two components to aggregate into distinct phases with a minimum of surface area between the two rather than a fine mixture of the two. There is, however, the energetics of two other interfaces to consider also: one with the substrate and the other with vacuum or gas. In considering energetics it is not only the chemical interaction of the metal or Si with the substrate that is important but also its crystallographic orientation, for the surface or interface energy depends upon orientation of the grains. Another concern is the difference in lattice match between the nucleating film and the substrate which can lead to strain induced energy that is minimized by either inducing defects or not growing uniformly in thickness across the substrate surface. These factors determine if silicon is likely to deposit on the substrate (heterogeneous nucleation) or nucleate and forms small crystals in the liquid (homogeneous nucleation).
  • An advantage of using eutectics compositions is that the eutectic temperature is lower than the melting temperature of the constituent elements. For example, the eutectic temperatures of Au, Al, and Ag with Si are 363, 577, and 835 degrees Centigrade (° C.), respectively. In contrast the melting temperatures of the elements are 1064, 660, and 961° C., respectively. The melting temperature of silicon is 1414° C. The eutectics then offer the possibility of nucleating a silicon crystal from the liquid far below the temperature at which pure liquid silicon crystallizes. By a proper choice of the substrate surface exposed to the nucleating silicon, it is possible to nucleate and grow single crystal or large grained silicon films.
  • We have discussed silicon eutectics using elements such as Au, Ag, and Al. However, it is possible to replace the elements by silicon based compounds. For example, the compound nickel silicide forms a eutectic with Si. There are numerous other examples of silicide compounds forming a eutectic with Si (Massalski et al). An advantage of using a silicide is that frequently the electrical contact of the silicide with silicon has very desirable properties, such as a good ohmic contact or a Schottky barrier. Some silicides are also known to have an epitaxial relationship with silicon. In this case, by appropriately choosing either a silicide rich or silicon rich melt either the silicon can be induced to grow epitaxially on the silicide or the silicide on silicon. A disadvantage in this approach is the eutectic temperature, which is generally high.
  • Low temperature solutions can also be formed with some elements, For example, gallium (Ga) and Si have a eutectic temperature of less than 30° C., very close to that of the melting point of Ga. There are other elements, such as indium or tin that form low temperature liquid solutions with silicon. Si can be nucleated from these solutions at very low temperatures relative to pure silicon (Girault et al, Kass et al). These temperatures are sufficiently low that it opens up the possibility of using organic materials as substrates on which large grained to single crystal films can be grown. While this is an advantage, there is also a serious disadvantage; at these low temperatures, the silicon film can contain defects and hence are not very useful as a photovoltaic material. However, these very low temperature deposits can be used to initiate the nucleation of a very thin silicon film, which is subsequently thickened by using higher temperature processes to optimize its photovoltaic properties.
  • The choice of a particular system (phase diagram) is not only determined by temperature and energetics of the interfaces, but also by the solubility of the second element in Si. It is desirable to have precise control of the doping of Si in order to optimize its semiconductor properties for photovoltaic applications. It is also important to select the composition of the substrate and temperature of processing such that there is minimal or no chemical interaction between the silicon film and the surface of the substrate on which it is being deposited.
  • From the preceding description, we can extract five common points which are relevant to this invention. First, one end of the phase diagram always has the semiconductor we wish to nucleate and use to produce a film, we have used silicon in the preceding examples but it could be germanium or a compound such as gallium arsenide or cadmium selenide. Second, the thermodynamically predicted concentration of the second element or phase in the semiconductor is minimal. If there is solubility then it must be a desirable dopant. For example aluminum (Al) in silicon behaves as a p-type dopant and experience in the semiconductor industry has shown that trace amount of Al can be desirable. Third, the liquidus curve has the highest temperature on the semiconductor side. In other words, the melting point of the semiconductor is greater than the liquidus for all compositions in equilibrium with the semiconductor. Fourth, the homogeneous nucleation energy of silicon crystal from the melt is greater than that for heterogeneous nucleation on the substrate. This latter condition promotes heterogeneous nucleation. And, fifth, the temperature for epitaxial growth is low enough to use inexpensive substrates such as glass but high enough to promote a good quality silicon film. For example, a growth temperature above approximately 550 degrees Centigrade (550° C.) is desirable to make a good quality silicon film. The softening temperature of ordinary glasses is around 600° C. The softening temperature of borosilicate glasses is higher. However it is not high enough to use conventional deposition temperature of greater than 750 degrees Centigrade for silicon on insulator, such as a sapphire substrate.
  • In order to take full advantage of the invention disclosed here the semiconductor material has to be deposited on a substrate material which is inexpensive, and the surface of which enables heterogeneous nucleation and growth. In the following we shall discuss two specific methods for producing substrates suitable for heterogeneous deposition of films for photovoltaic technology. Both of these methods have been described in the scientific literature and we do not claim to invent them. We include them here for completeness.
  • The use of rolled and textured Ni and Ni-alloy sheets has been proposed as substrate material for superconducting films and, more recently, for films for photovoltaic devices (Findikoglu et al). In order to facilitate the growth of epitaxial superconducting films on such substrates, there have been two approaches described in the scientific literature: in one the sharp rolling texture produced in a rolled and annealed Ni alloy is used as a template on which various epitaxial buffer layers are deposited followed finally by an epitaxial film of a high temperature cuprate superconductors (Goyal et al). In the second approach (Findikoglu et al), the nickel ribbon is used as a substrate for ion beam assisted deposition of a wide variety of highly textured ceramics, for example, magnesium oxide (MgO). The ion beam aligns the growing MgO film, which provides a template for the subsequent deposition of the cuprate superconductor. The latter approach is not limited to using metal tapes but can be extended to other inexpensive substrates such as glass (Teplin et al). It has been found that texture can also be induced in MgO by depositing the film on a substrate that is inclined to the normal from the oncoming vapor of MgO.
  • One limitation of the use of glass as a substrate has been its softening temperature, which is generally lower than the conventional processing temperatures required for the growth of large grained or single crystal films of silicon. With the method of depositing silicon films at low temperatures, described in this invention, the use of buffered glass becomes an option for we can deposit highly textured and large grained silicon on MgO at or below the softening temperature of glass. Similarly, researchers have grown crystalline aluminum oxide (Al2O3) on inexpensive substrates (Findikoglu et al). We shall use MgO and Al2O3 as illustrative examples. However, it is understood to those skilled in the art that a variety of other materials can also work. Both Findikoglu et al and Goyal et al describe other buffer layers, including conducting ceramic layers, such as TiN.
  • OBJECTS OF THE INVENTION
  • It is an object of the present invention to provide single crystal or highly textured relatively large grained good quality semiconductor films and, in particular silicon films, for photovoltaic technology or other semiconductor devices, such as field effect transistors used, for example, in displays.
  • It is yet another object of this invention to provide single crystal or highly textured relatively large grained good quality semiconductor films and, in particular silicon films, at low temperatures. For example, if silicon films are used, the growth temperature is between 450 and 750 degrees Centigrade.
  • It is yet another object of this invention to provide single crystal or highly textured relatively large grained good quality semiconductor films and, in particular silicon films, on inexpensive substrates, for example, substrates such as glass on which buffer layers such as MgO and/or Al2O3 have been deposited.
  • SUMMARY OF THE INVENTION
  • In accordance with one aspect of the present invention, the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates out of the melt and on the surface of a substrate.
  • In accordance with another aspect of the present invention, the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates on the surface of a substrate to produce a highly textured relatively large grained or single crystalline film.
  • In accordance with yet another aspect of the present invention, the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates on the surface of a substrate made of a buffered tape in which texture is produced by mechanical deformation and the buffer layers are epitaxial to the texture of the metal tape. The buffer layer exposed to the melt comprises of compounds, such as Al2O3 or MgO.
  • In accordance with yet another aspect of the present invention, the forgoing and other objects can be achieved by alloying a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and increasing slowly the concentration of the semiconductor, such as silicon, through the liquidus line to reach the two phase region in which the semiconductor, in particular silicon, nucleates on the surface of a substrate made of a buffered tape, a glass substrate, or any other material suitable for inexpensive manufacture of photovoltaic cells in which strong texture is produced by ion beam assisted deposition. The final layer, which is exposed to the silicon melt, comprises of compounds, such as Al2O3 or MgO.
  • In accordance with still another aspect of the present invention, the forgoing and other objects can be achieved by using a solid phase composition comprising a semiconductor and, in particular silicon, with elements or compounds that form an eutectic system, and in which a thin film of the element or compound is deposited first followed by the semiconductor, such as silicon, and depositing at a temperature where the semiconductor atoms diffuse through the element or compound to heterogeneously nucleate on the substrate and propagate this crystallinity to the semiconductor film remaining on top of the element or compound.
  • The method of manufacture of materials suitable for photovoltaic technologies described in this invention are much less expensive in the conversion of sunlight into electricity than those practiced in the prior art.
  • BRIEF DESCRIPTION OF DRAWINGS
  • FIG. 1 shows the phase diagram of the eutectic system Au—Si, taken from the literature (Massalski et al). The melting points of the two elements Au and Si, as well as the eutectic temperature are shown in the figure. The eutectic composition is also indicated. The liquidus line, which defines the boundary between the liquid gold-silicon alloy and solid silicon and a gold-silicon liquid alloy, and on the silicon rich side of the phase diagram, is marked. The figure also shows the change in phases as the composition is changed by depositing silicon on a film of gold held at constant temperature. As the silicon is evaporated on to the gold film, the film comprises of gold solid and a liquid gold-silicon alloy which changes from the point marked by 11 towards 12. Further deposition of silicon results in the film entering the liquid phase region between the points marked 12 and 13. As the silicon deposition continues beyond the point 13, the liquidus boundary, solid silicon nucleates from the liquid which is in equilibrium with a silicon-gold liquid alloy. The solid silicon is deposited on a MgO substrate, forming a highly textured and relatively large grained heterogeneously nucleated film. The thickness of the solid silicon film increases till the deposition is stopped. As it cools Si continues to deposit from the melt while the Au—Si liquid solution becomes richer in gold. This process continues till the eutectic temperature is reached, at which point the liquid solidifies and phase separates into gold and silicon solids.
  • We have used the phase diagram of the Au—Si eutectic. The Al—Si eutectic is very similar. Here we can heterogeneously nucleate silicon from the Al—Si melt on a single crystal sapphire substrate to form a single crystal heteroepitaxial silicon film.
  • DETAILED DESCRIPTION OF THE INVENTION
  • As described above, we have disclosed a method to produce low cost single crystal or large grained epitaxially aligned good quality semiconductor films, in particular silicon, for photovoltaic technology. We have also suggested the use of tapes or glass slabs as substrate materials. The tapes provide strong texture on which buffer layers suitable for silicon growth are present. Our method can produce silicon epitaxy at substantially lower temperatures than those commonly practiced, hence not only minimizing interaction with the surface of the substrate but also enabling the use of glass substrates.
  • We shall be using the eutectics of silicon with gold and aluminum in describing the details of the invention. It is, however, understood that one skilled in the art can extend the methodology to other semiconductors such as germanium, gallium arsenide, or the cadmium selenide class of photovoltaic materials.
  • FIG. 1 shows the phase diagram of the eutectic system Au—Si. The eutectic composition is nominally 18.6 atomic percent pct Si and the rest being gold. A thin gold film is first deposited on the buffered substrate. This is followed by silicon deposition. As the silicon concentration increases the film first forms a two phase mixture of gold and liquid gold-silicon. The composition of the latter is determined by the choice of the deposition temperature. With further increase of silicon, the liquid phase region, marked 12, is reached and the remaining gold is dissolved. With still further increase of the amount of silicon, the second liquidus phase boundary, marked 13, is reached and subsequent deposition of silicon atoms results in a solid phase of silicon in equilibrium with the silicon-gold liquid. If the substrate surface is suitably chosen, for example MgO crystals, the solid silicon nucleates heterogeneously onto the surface. The choice of the temperature of deposition is determined by balancing two considerations: quality in terms of defects of the epitaxial film; too low a temperature or too rapid a growth rate of the film at that temperature can introduce defects versus too high a temperature when chemical interaction or mechanical integrity of the substrate limit the usefulness of the material.
  • We have started with vapor deposition of the metallic film and added silicon to it to traverse the phase diagram from point marked 11 in the figure. However, the metallic element and silicon can be co evaporated to reach any concentration between the points marked 12 and 13 in the figure and subsequently silicon added to reach the desired thickness, before cooling to room temperature.
  • When the desired thickness of the silicon film is obtained, the substrate with the film is cooled to room temperature. Even though the amount of gold required to catalyze a silicon film is small, it can be further reduced by etching the gold away, for example, by using iodine etch, available commercially. This gold can be recycled
  • EXAMPLES OF THE INVENTION
  • The following non-limiting examples are used as illustrations of the various aspects and features of this invention.
  • Example 1
  • A good high vacuum system with two electron beam guns, is used to deposit gold and silicon independently. A glass substrate coated with ion beam assisted deposited MgO film is held at temperatures between 575 and 600° C. These are nominal temperatures. It is understood to one skilled in the art that lower or higher temperatures can also be used depending upon the softening temperature of the glass substrate or the reaction kinetics of either gold or silicon with the metallic tape or its buffer layers when used as substrates. A thin gold film of approximately 10 nm thickness is deposited first. This is followed by a silicon film deposited at a rate of 2 nm per minute on top of the gold film. The ratio of the thickness of the gold and silicon films is chosen such that the final composition ensures that a point, marked 13, in FIG. 1 is reached. This point lies at the boundary between the two phase region of solid Si and a liquid Si—Au mixture. For example, for a 10 nm gold film followed a 100 nm silicon film satisfies this condition. Additional silicon film nucleates heterogeneously on the MgO surface to form the desired thin film. The film can now be cooled to room temperature, where the film now comprises of two phases: gold and a relatively large grained and highly textured film of silicon on MgO.
  • By relatively large grained it is understood to imply a grain size larger than would have been achieved if a silicon film had been deposited under the same conditions but without Au. In the example discussed above the crystallographic texture is strongly [111]. Instead of an insulating substrate such as MgO, it is possible to choose stable and electrically conducting nitrides, such as TiN.
  • The gold diffuses to the surface of the silicon film, driven by its lower surface energy relative to the silicon surface. The film is etched in a solution, such as a commercially available iodine based chemical, which removes the gold from the two phases, gold and silicon, leaving behind a silicon film.
  • This silicon film can now be used as the surface on which a thicker silicon film appropriately doped to form a p-n junction, suitable for applications such as photovoltaics, can be deposited. Alternatively, the thin silicon film can be used for heteroepitaxial deposition of other semiconductors, which might be more efficient convertors of sunlight to electricity.
  • We have used two electron beam guns as an illustrative example. It is understood to one skilled in the art that other methods such as a single gun with multiple hearths, chemical vapor deposition, thermal heating, or sputtering can also be used.
  • Example 2
  • A good high vacuum system with two electron beam guns is used to deposit aluminum and silicon independently. A glass substrate or a Ni based substrate coated with a buffer layer of Al2O3 is held at temperatures between 600 and 615 degree ° C. These are nominal temperatures. It is understood to one skilled in the art that lower or higher temperatures can also be used depending upon the softening temperature of the glass substrate or the reaction kinetics of either aluminum or silicon with the metallic tape or its buffer layers when used a substrates. The eutectic Al—Si is used instead of the Au—Si example above. A thin Al film 6 nm thick is deposited on the Al2O3 followed by a 100 nm thick silicon deposition, and as described in example 1, above, the two phase region comprising of solid silicon and a liquid Si—Al mixture is reached. The deposition is stopped and the sample is slowly cooled to room temperature. Aluminum diffuses through the silicon film, driven by its lower surface energy relative to silicon. The silicon film is heteroepitaxially aligned by the Al2O3 surface. The aluminum film on the surface can be etched chemically by well known processes to leave behind a silicon film. The surface of this film can now be used for further growth of epitaxial films either for photovoltaic devices or for field effect transistors.
  • We note, as stated earlier, that silicon can be grown epitaxially on sapphire but at temperatures higher than 750° C. This is a well established commercial process. However, in the absence of aluminum, silicon deposition at, say, 600° C. produces a fine grained film rather than a heteroepitaxial film, as described above.
  • Example 3
  • We describe in this example how different methods of deposition can be combined to take advantage of highly textured films as described in example 1, above. The Si film produced from the deposition of example 1 is etched to remove the Au and then placed back into the vacuum chamber and p+-Si is deposited on this film. This latter layer serves two purposes: it provides a conducting layer for a photovoltaic device to be subsequently built on it and can be the starting point for a variety of differently configured photovoltaic devices as, for example, a nanowire photovoltaic device. Here a 2-3 nm thick gold film is deposited on the silicon using an electron gun. This 2-3 nm thick gold film breaks up into nanoparticles and is the starting point used by a number of investigators to use chemical vapor deposition to grow nanowires and use these nanowires for photovoltaic devices. The difference is that we show how an inexpensive buffered glass can be used rather than a relatively expensive single crystal Si substrate.
  • A second possibility is to deposit a Au film of thickness 5 nm as islands on a MgO buffered glass substrate, using lithographic or other means known in the art. A heavily doped silicon (p+ or n) film is now deposited on the surface followed by a p- or n-type silicon using electron beam deposition, as described in example 1. The thickness of the heavily doped film is in the micron range whereas the lightly doped film is of the order of 100 nm. The deposition process is now changed and chemical vapor deposition is used for subsequent deposition of suitably doped films of silicon, practiced in the art to grow silicon nanowire photovoltaic devices. The heavier doped silicon film serves the purpose of a conducting layer. Using gold islands has the advantage of controlling the nanowires diameter and length in order to maximize the efficiency of the photovoltaic cell (Kayes et al). Instead of using the insulating MgO buffer layer, a conducting material such as TiN can be used.
  • Example 4
  • We describe how different methods of deposition and temperature can be combined to take advantage of films grown as described in Examples 1 and 2, above to produce desirable device structures. Instead of depositing the Al and Si films described in Example 2 above, by two electron beam heated sources in a vacuum, we deposit the Si by decomposition of silane using a chemical vapor deposition chamber. This is a well known industrial process. As in Example 2, we deposit a 6 nm thin film of Al on to a sapphire substrate held at 600° C. We then introduce silane gas into the chamber. At these temperatures, the silane decomposes to form a Si film which reacts with the Al to produce a eutectic solution and when this solution is saturated with Si (the equivalent of point marked 13 in FIG. 1 for an Au—Si alloy) the Si precipitates to heterogeneously nucleate to form an epitaxial film on the surface of the sapphire substrate. This film is continuous and can be doped by adding borane or phosphene gases to silane to obtain p or n type semiconductor behavior. This film can now be used as a basis to construct thin film photovoltaic cells or, alternatively, grow nanowires of Si on top of it by simply lowering the temperature of the substrate below the eutectic temperature of Al—Si (577° C.). For example, if the temperature of deposition is 500° C., Si nanowires will grow on top of the Si film. The Al particles that precipitate out of the Al—Si solution once the temperature of the substrates is below the eutectic temperature now catalytically reduce the silane gas to form nanowires, as described in the literature. These nanowires can be used to build electronic devices, including photovoltaic cells.
  • While the principles of the invention have been described in connection with specific embodiments, it should be understood clearly that the descriptions, along with the examples, are made by way of example and are not intended to limit the scope of this invention in any manner. For example, a variety of suitable substrates different from the examples given above can be utilized or a different variety of deposition methods and conditions can be employed as would be understood from this invention by one skilled in the art upon reading this document.

Claims (13)

1. A method of manufacturing Field Effect Transistors (FETS), comprising the steps of:
providing a substrate; and
depositing a semiconductor film onto the substrate, the semiconductor film being deposited from a eutectic liquid, said semiconductor being deposited on said substrate at a deposition temperature, said deposition temperature being between a eutectic temperature of said eutectic liquid and below a softening temperature of said substrate.
2. The method of claim 1, wherein said substrate is soda-lime glass.
3. The method of claim 1, wherein said substrate is borosilicate glass.
4. The method of claim 1, wherein said substrate is sapphire glass.
5. The method of claim 1, wherein said substrate is an organic material.
6. The method of claim 1, wherein the semiconductor film is silicon.
7. The method of claim 1, wherein the semiconductor film is Cadmium Selenide.
8. The method of claim 1, wherein the semiconductor film is Germanium.
9. The method of claim 1. wherein the semiconductor film is Gallium Arsenide.
10. The method of claim 1, wherein the semiconductor film is Gallium.
11. The method of claim 1, wherein said eutectic liquid comprises at least one of the following metals: Al, Au, or Sn.
12. The method of claim 1, wherein said substrate has a buffer layer comprising Al2O3 and/or MgO.
13. The method of claim 1, wherein said substrate is a metal tape.
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Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206780B (en) 2007-06-19 2017-12-05 昆南诺股份有限公司 Solar battery structure based on nano wire
CN102084467A (en) 2008-04-14 2011-06-01 班德加普工程有限公司 Process for fabricating nanowire arrays
US8491718B2 (en) * 2008-05-28 2013-07-23 Karin Chaudhari Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
US20090297774A1 (en) * 2008-05-28 2009-12-03 Praveen Chaudhari Methods of growing heterepitaxial single crystal or large grained semiconductor films and devices thereon
US10199518B2 (en) 2008-05-28 2019-02-05 Solar-Tectic Llc Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
US10199529B2 (en) * 2008-05-28 2019-02-05 Solar-Tectic, Llc Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
WO2010120233A2 (en) 2009-04-15 2010-10-21 Sol Voltaics Ab Multi-junction photovoltaic cell with nanowires
WO2010120849A2 (en) 2009-04-16 2010-10-21 Pinon Technologies, Inc. Synthesis of silicon nanorods
US10096817B2 (en) 2009-05-07 2018-10-09 Amprius, Inc. Template electrode structures with enhanced adhesion characteristics
US20100285358A1 (en) 2009-05-07 2010-11-11 Amprius, Inc. Electrode Including Nanostructures for Rechargeable Cells
EP2499686A2 (en) * 2009-11-11 2012-09-19 Amprius, Inc. Intermediate layers for electrode fabrication
US20110143019A1 (en) 2009-12-14 2011-06-16 Amprius, Inc. Apparatus for Deposition on Two Sides of the Web
US9172088B2 (en) 2010-05-24 2015-10-27 Amprius, Inc. Multidimensional electrochemically active structures for battery electrodes
US9780365B2 (en) 2010-03-03 2017-10-03 Amprius, Inc. High-capacity electrodes with active material coatings on multilayered nanostructured templates
CN102844917B (en) 2010-03-03 2015-11-25 安普雷斯股份有限公司 For the template electric electrode structure of position activity material
GB2494565B (en) 2010-05-31 2014-04-09 Ibm Producing a mono-crystalline sheet
US8697541B1 (en) 2010-12-24 2014-04-15 Ananda H. Kumar Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial growth of crack-free gallium nitride films and devices
JP2014508415A (en) 2011-03-04 2014-04-03 モザイク クリスタルズ リミテッド Method for the growth of surfactant crystals of metal-nonmetal compounds
US9099411B2 (en) 2011-08-24 2015-08-04 The Board Of Trustees Of The Leland Stanford Junior University Metal-induced crystallization of continuous semiconductor thin films controlled by a diffusion barrier
US9695501B2 (en) 2014-09-12 2017-07-04 Hong Kong Baptist University Sapphire thin film coated substrate
FR2989389B1 (en) * 2012-04-11 2015-07-17 Commissariat Energie Atomique PROCESS FOR THE PREPARATION OF A CRYSTALLIZED SILICON LAYER WITH LARGE GRAINS.
US9059366B2 (en) 2012-04-23 2015-06-16 The Aerospace Corporation Bonding of photovoltaic device to covering material
WO2014055491A1 (en) 2012-10-03 2014-04-10 Corning Incorporated Surface-modified glass substrate
CN104823127B (en) * 2012-11-14 2019-06-28 Gtat公司 Mobile electronic device comprising ultra-thin sapphire cladding plate
US9718249B2 (en) 2012-11-16 2017-08-01 Apple Inc. Laminated aluminum oxide cover component
US20140158192A1 (en) * 2012-12-06 2014-06-12 Michael Cudzinovic Seed layer for solar cell conductive contact
JP6559069B2 (en) 2012-12-10 2019-08-14 ジーティーエイティー コーポレーションGtat Corporation Portable electronic device comprising a multilayer sapphire cover plate
US9232672B2 (en) 2013-01-10 2016-01-05 Apple Inc. Ceramic insert control mechanism
EP2778252A3 (en) 2013-03-15 2014-12-10 Apple Inc. Layered Coatings For Sapphire Structure
DE102013004558B4 (en) 2013-03-18 2018-04-05 Apple Inc. Method for producing a surface-strained sapphire disk, surface-strained sapphire disk and electrical device with a transparent cover
DE102013004559B4 (en) 2013-03-18 2015-07-23 Apple Inc. Shatter-resistant sapphire disk and method of making the same
US9219515B2 (en) 2013-09-05 2015-12-22 Apple Inc. Protective film and related assembly and method
US9349995B2 (en) * 2013-12-23 2016-05-24 Solar-Tectic Llc Hybrid organic/inorganic eutectic solar cell
WO2015143206A1 (en) * 2014-03-19 2015-09-24 Solar-Tectic, Llc Method of making ceramic glass
JP7182758B2 (en) 2014-05-12 2022-12-05 アンプリウス テクノロジーズ インコーポレイテッド Anode for lithium battery and method of making same
US9843014B2 (en) 2015-02-20 2017-12-12 Apple Inc. Electronic devices with sapphire-coated substrates
WO2016201526A1 (en) * 2015-06-19 2016-12-22 Chee Yee Kwok Silicon film and process for forming silicon film
US9997661B2 (en) 2016-07-27 2018-06-12 Solar-Tectic Llc Method of making a copper oxide/silicon thin-film tandem solar cell using copper-inorganic film from a eutectic alloy
US11269374B2 (en) 2019-09-11 2022-03-08 Apple Inc. Electronic device with a cover assembly having an adhesion layer

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4534820A (en) * 1981-10-19 1985-08-13 Nippon Telegraph & Telephone Public Corporation Method for manufacturing crystalline film
US5897331A (en) * 1996-11-08 1999-04-27 Midwest Research Institute High efficiency low cost thin film silicon solar cell design and method for making
US6500604B1 (en) * 2000-01-03 2002-12-31 International Business Machines Corporation Method for patterning sensitive organic thin films
US20060115964A1 (en) * 2004-11-30 2006-06-01 Findikoglu Alp T Near single-crystalline, high-carrier-mobility silicon thin film on a polycrystalline/amorphous substrate
US20060255481A1 (en) * 2004-04-30 2006-11-16 Nanosys, Inc. Systems and methods for nanowire growth and harvesting
US20070004222A1 (en) * 2005-06-29 2007-01-04 Qingqiao Wei Fabrication of aligned nanowire lattices
US20070096304A1 (en) * 2005-08-26 2007-05-03 Kabir Mohammad S Interconnects and heat dissipators based on nanostructures
US20080090072A1 (en) * 2006-10-17 2008-04-17 The Regents Of The University Of California Aligned crystalline semiconducting film on a glass substrate and method of making
US20080188064A1 (en) * 2002-07-08 2008-08-07 Qunano Ab Nanostructures and methods for manufacturing the same
US8491718B2 (en) * 2008-05-28 2013-07-23 Karin Chaudhari Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
US9054249B2 (en) * 2008-05-28 2015-06-09 Solar—Tectic LLC Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3983012A (en) 1975-10-08 1976-09-28 The Board Of Trustees Of Leland Stanford Junior University Epitaxial growth of silicon or germanium by electrodeposition from molten salts
US4707197A (en) * 1984-08-02 1987-11-17 American Telephone And Telegraph Company, At&T Bell Laboratories Method of producing a silicide/Si heteroepitaxial structure, and articles produced by the method
JPS6191974A (en) * 1984-10-11 1986-05-10 Kanegafuchi Chem Ind Co Ltd Heat resisting multijunction type semiconductor element
US4717688A (en) * 1986-04-16 1988-01-05 Siemens Aktiengesellschaft Liquid phase epitaxy method
US5326719A (en) * 1988-03-11 1994-07-05 Unisearch Limited Thin film growth using two part metal solvent
US5314571A (en) * 1992-05-13 1994-05-24 Midwest Research Institute Crystallization from high temperature solutions of Si in copper
US5523587A (en) 1993-06-24 1996-06-04 At&T Corp. Method for low temperature growth of epitaxial silicon and devices produced thereby
TW448584B (en) * 1995-03-27 2001-08-01 Semiconductor Energy Lab Semiconductor device and a method of manufacturing the same
US5670798A (en) * 1995-03-29 1997-09-23 North Carolina State University Integrated heterostructures of Group III-V nitride semiconductor materials including epitaxial ohmic contact non-nitride buffer layer and methods of fabricating same
US6097139A (en) * 1995-08-04 2000-08-01 Printable Field Emitters Limited Field electron emission materials and devices
US5985404A (en) * 1996-08-28 1999-11-16 Tdk Corporation Recording medium, method of making, and information processing apparatus
JPH11162859A (en) * 1997-11-28 1999-06-18 Canon Inc Liquid phase growth of silicon crystal and manufacture of solar battery using the same
US7906229B2 (en) * 2007-03-08 2011-03-15 Amit Goyal Semiconductor-based, large-area, flexible, electronic devices
US6784139B1 (en) * 2000-07-10 2004-08-31 Applied Thin Films, Inc. Conductive and robust nitride buffer layers on biaxially textured substrates
US8178221B2 (en) * 2000-07-10 2012-05-15 Amit Goyal {100}<100> or 45°-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices
US7087113B2 (en) * 2002-07-03 2006-08-08 Ut-Battelle, Llc Textured substrate tape and devices thereof
US6913649B2 (en) * 2003-06-23 2005-07-05 Sharp Laboratories Of America, Inc. System and method for forming single-crystal domains using crystal seeds
US20050279274A1 (en) * 2004-04-30 2005-12-22 Chunming Niu Systems and methods for nanowire growth and manufacturing
US7129154B2 (en) * 2004-05-28 2006-10-31 Agilent Technologies, Inc Method of growing semiconductor nanowires with uniform cross-sectional area using chemical vapor deposition
WO2006016914A2 (en) * 2004-07-07 2006-02-16 Nanosys, Inc. Methods for nanowire growth
KR100547934B1 (en) * 2004-08-20 2006-01-31 삼성전자주식회사 Transistor and method of manufacturing the same
US7645337B2 (en) * 2004-11-18 2010-01-12 The Trustees Of Columbia University In The City Of New York Systems and methods for creating crystallographic-orientation controlled poly-silicon films
EP1696473A3 (en) * 2005-02-25 2009-06-10 Samsung Electronics Co.,Ltd. Silicon nano wires, semiconductor device including the same, and method of manufacturing the silicon nano wires
US20060208257A1 (en) 2005-03-15 2006-09-21 Branz Howard M Method for low-temperature, hetero-epitaxial growth of thin film cSi on amorphous and multi-crystalline substrates and c-Si devices on amorphous, multi-crystalline, and crystalline substrates
WO2006138671A2 (en) * 2005-06-17 2006-12-28 Illuminex Corporation Photovoltaic wire
KR101124503B1 (en) 2005-06-24 2012-03-15 삼성전자주식회사 Method for forming Highly-orientated Silicon Layer and Substrate containing the Same
US8795854B2 (en) * 2005-08-01 2014-08-05 Amit Goyal Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates
WO2007025062A2 (en) 2005-08-25 2007-03-01 Wakonda Technologies, Inc. Photovoltaic template
KR100745735B1 (en) * 2005-12-13 2007-08-02 삼성에스디아이 주식회사 Method for growing carbon nanotubes and manufacturing method of field emission device therewith
KR100671824B1 (en) * 2005-12-14 2007-01-19 진 장 Method for manutacturing reverse-staggered film transistor
DE102006013245A1 (en) * 2006-03-22 2007-10-04 Infineon Technologies Ag Mold layer forming method, involves forming mold layer on one of surface sections of substrate after forming template, and removing template after applying mold layer, where opening is formed in mold layer via another surface section
US7442575B2 (en) * 2006-09-29 2008-10-28 Texas Christian University Method of manufacturing semiconductor nanowires
EP1936666A1 (en) * 2006-12-22 2008-06-25 Interuniversitair Microelektronica Centrum Doping of nanostructures
EP2122667A2 (en) * 2007-02-19 2009-11-25 Imec Low-temperature formation of layers of polycrystalline semiconductor material
US8071872B2 (en) 2007-06-15 2011-12-06 Translucent Inc. Thin film semi-conductor-on-glass solar cell devices
US20090183774A1 (en) 2007-07-13 2009-07-23 Translucent, Inc. Thin Film Semiconductor-on-Sapphire Solar Cell Devices
WO2009018472A1 (en) * 2007-07-31 2009-02-05 The Regents Of The University Of California Low-temperature formation of polycrystalline semiconductor films via enhanced metal-induced crystallization
US8012861B2 (en) * 2007-11-21 2011-09-06 The Trustees Of Columbia University In The City Of New York Systems and methods for preparing epitaxially textured polycrystalline films
WO2011017392A1 (en) * 2009-08-04 2011-02-10 Ut-Battelle, Llc Vertically-aligned nanopillar array on biaxially-textured substrates for nanoelectronics and energy conversion applications
US9065009B2 (en) * 2012-04-10 2015-06-23 First Solar, Inc. Apparatus and method for forming a transparent conductive oxide layer over a substrate using a laser

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4534820A (en) * 1981-10-19 1985-08-13 Nippon Telegraph & Telephone Public Corporation Method for manufacturing crystalline film
US5897331A (en) * 1996-11-08 1999-04-27 Midwest Research Institute High efficiency low cost thin film silicon solar cell design and method for making
US6500604B1 (en) * 2000-01-03 2002-12-31 International Business Machines Corporation Method for patterning sensitive organic thin films
US20080188064A1 (en) * 2002-07-08 2008-08-07 Qunano Ab Nanostructures and methods for manufacturing the same
US20060255481A1 (en) * 2004-04-30 2006-11-16 Nanosys, Inc. Systems and methods for nanowire growth and harvesting
US20060115964A1 (en) * 2004-11-30 2006-06-01 Findikoglu Alp T Near single-crystalline, high-carrier-mobility silicon thin film on a polycrystalline/amorphous substrate
US20070004222A1 (en) * 2005-06-29 2007-01-04 Qingqiao Wei Fabrication of aligned nanowire lattices
US20070096304A1 (en) * 2005-08-26 2007-05-03 Kabir Mohammad S Interconnects and heat dissipators based on nanostructures
US20080090072A1 (en) * 2006-10-17 2008-04-17 The Regents Of The University Of California Aligned crystalline semiconducting film on a glass substrate and method of making
US8491718B2 (en) * 2008-05-28 2013-07-23 Karin Chaudhari Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
US9054249B2 (en) * 2008-05-28 2015-06-09 Solar—Tectic LLC Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon

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