US20140049299A1 - Programmable ultrasound transmit beamformer integrated circuit and method - Google Patents
Programmable ultrasound transmit beamformer integrated circuit and method Download PDFInfo
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- US20140049299A1 US20140049299A1 US13/587,551 US201213587551A US2014049299A1 US 20140049299 A1 US20140049299 A1 US 20140049299A1 US 201213587551 A US201213587551 A US 201213587551A US 2014049299 A1 US2014049299 A1 US 2014049299A1
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10K—SOUND-PRODUCING DEVICES; METHODS OR DEVICES FOR PROTECTING AGAINST, OR FOR DAMPING, NOISE OR OTHER ACOUSTIC WAVES IN GENERAL; ACOUSTICS NOT OTHERWISE PROVIDED FOR
- G10K11/00—Methods or devices for transmitting, conducting or directing sound in general; Methods or devices for protecting against, or for damping, noise or other acoustic waves in general
- G10K11/18—Methods or devices for transmitting, conducting or directing sound
- G10K11/26—Sound-focusing or directing, e.g. scanning
- G10K11/34—Sound-focusing or directing, e.g. scanning using electrical steering of transducer arrays, e.g. beam steering
- G10K11/341—Circuits therefor
- G10K11/346—Circuits therefor using phase variation
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Abstract
Description
- The present provisional application is related to U.S. patent application entitled, “Ultrasound Transmit Beamformer Integrated Circuit and Method”, Filed Feb. 15, 2007, and having U.S. Ser. No. 11/675,517 in the name of Lazar A. Shifrin. This patent application further is related to U.S. Provisional Application No. 61/073,850, filed Jun. 19, 2008, entitled “PROGRAMMABLE ULTRASOUND TRANSMIT BEAMFORMER INTEGRATED CIRCUIT AND METHOD” in the name of the same inventor, and which is incorporated herein by reference in its entirety, U.S. Pat. No. 8,013,640, filed Jun. 19, 2009, entitled “PROGRAMMABLE ULTRASOUND TRANSMIT BEAMFORMER INTEGRATED CIRCUIT AND METHOD” in the name of the same inventor; and U.S. Pat. No. 8,198,922, filed May 6, 2010, entitled “PROGRAMMABLE ULTRASOUND TRANSMIT BEAMFORMER INTEGRATED CIRCUIT AND METHOD”.
- This invention relates to a programmable ultrasound transmit beamformer waveform generator, and more particularly, to an ultrasound pulse waveform generator circuit and method with waveform and transmitting sequence control data memory for driving a piezoelectric transducer array probe for transmit beamforming and dynamic focusing.
- Ultrasound array transmitters in medical or nondestructive testing (NDT) imaging application have a growing demand for more sophisticated electrical excitation waveforms to generate well-focused, high resolution targeted, coherently formed, high frequency acoustic dynamic scanning beams. The conventional ultrasound transmit pulse generator circuits that can generate two different voltage amplitudes of bidirectional and return-to-zero pulses (such as a 5-level pulser) include at least six high-voltage high current MOSFET transistors in an output stage, such as described below in conjunction with
FIG. 1 . The cost per transmit channel of such pulsers compared to a 2-level or 3-level pulser increases dramatically. - Therefore, a need exists to provide a device and method to overcome the above problem.
- In accordance with one embodiment, an electrical waveform generating circuit is provided. The electrical waveform generating circuit has a programmable current source-driver. A digital switched current source is coupled to the programmable current source-driver and controlled by waveforms stored in the programmable current source-driver. A plurality of MOSFETs is coupled to the programmable current source driver. A first coupled inductor is connected to the plurality of high voltage MOSFETs. A transducer is coupled to the first coupled inductor.
- The present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings.
-
FIG. 1 is a schematic diagram illustrating a conventional 5-Level high voltage pulser. -
FIG. 2 is a schematic diagram illustrating a high voltage waveform generator circuit that includes a push-pull source-driving current-source pulse amplitude modulation and voltage amplifier stage for ultrasound transmit excitation applications in accordance with the present invention. -
FIG. 3 is a graph showing PAM waveforms. -
FIG. 4 is a schematic diagram illustrating a waveform generator circuit including a push-pull source-driving current-source pulse amplitude and width modulations, vector angle lookup table and voltage amplifier stage configuration in accordance with another embodiment of the present invention. -
FIG. 5 is a graph showing a typical waveform of Gaussian sine wave to generated by IA, QA, IB, QB PWM signals. -
FIG. 6 is a schematic diagram illustrating a high voltage waveform generator circuit that includes a transformer-less complementary source-driving current-source pulse amplitude modulation and voltage amplifier stage for ultrasound transmit excitation applications in accordance with the present invention. -
FIG. 7 is a schematic diagram illustrating another embodiment of the high voltage waveform generator circuit of the present invention. -
FIG. 8 is a schematic diagram illustrating another embodiment of the high voltage waveform generator circuit of the present invention -
FIG. 9 is a schematic diagram illustrating a high voltage waveform generator circuit of the present invention. - In various embodiments, the waveform generators of the present invention provide ultrasound imaging probe transducer excitation using a large number array of high voltage and high current transmit pulse waveform generators that may be controlled by a digital logic interface directly with fast response and precise timing. Electronics controlled dynamic focus, acoustic phase-array, and transmitting beamforming technology may be used in color Doppler image portable ultrasound machines. In various embodiments, the waveform generators of the present invention provide digital controlled, programmable high voltage waveform multiple generator channels that are integrated into very small ICs. In various embodiments, the waveform generators of the present invention may generate various transmitting waveforms, and include only two high current output stage MOSFETs.
- Referring to
FIG. 1 , a schematic diagram illustrating a conventional 5-levelhigh voltage pulser 100 with a return-to-zero (RTZ) function is shown. Thepulser 100 generates a 5-level high voltage waveform 140. In the present embodiment, thepulser 100 uses a plurality of power amplifiers 102-1 through 102-3. Each power amplifier is coupled to a corresponding diode protection circuit 104-1 through 104-3. The output of each diode protection circuit 104-1 through 104-3 is coupled to a back-to-back cross coupleddiode circuit 106. The back-to-back cross coupleddiode circuit 106 is further coupled to atransducer 108. - Each of the power amplifiers 102-1 through 102-3 comprises a plurality of
level translators driver 112 or an N-driver 113. APMOS transistor 114 is coupled to the P-driver 112 and anNMOS transistor 115 is coupled to the N-driver 113. For simplicity and clarity, reference numbers are shown only in the power amplifier 102-1. - Each of the diode circuit 104-1 through 104-3 comprises a plurality of
diodes diodes 120 is coupled to the PMOS transistors. Theother diode 121 is coupled to the NMOS transistor. For simplicity and clarity, reference numbers are shown only in the diode circuit 104-1. - The cross coupled
diode circuit 106 comprises a plurality ofdiodes diode 124 coupled to the cathode of thediode 125 and the cathode of thediode 124 being coupled to the anode of thediode 125. In accordance with one embodiment of the present invention, thetransducer 108 may be an electroactive lens, or a piezoelectric element. - In operation, the
level translator 110 shifts the voltage level of aninput signal 130 and provides the level shifted signal to the P-driver 112. The P-driver 112 controls the gate of thePMOS transistor 114, which is arranged in a source follower power amplifier configuration between a voltage source VPP1 and the cathode of thediode 120 of the diode protection circuit 104. ThePMOS transistor 114 and theNMOS transistor 115 are driven by the directly coupledMOSFET gate drivers PMOS transistor 112 provides the amplified signal through thediode 124 of thecross-coupled diode circuit 106 to thetransducer 108. - The
level translator 111 shifts the voltage level of aninput signal 131 and provides the level shifted signal to the N-driver 113. The N-driver 113 controls the gate of theNMOS transistor 114, which is arranged in a source follower power amplifier configuration between the anode of thediode 121 of thediode protection circuit 121 and a negative voltage source VNN1. TheNMOS transistor 114 receives amplified signal through thediode 125 of thecross-coupled diode circuit 106 from thetransducer 108. - Referring now to
FIG. 2 , a schematic block diagram illustrating awaveform generator circuit 200 of the present invention is shown. Thecircuit 200 has a source-driver andcontrol circuit 201. In accordance with the present embodiment, the source-driver andcontrol circuit 201 may havecontrol logic 203,waveform memory 205,address generator 225, transmitting frequency pre-scale 228,serial port interface 226, and aDAC 224. - A switching
current control circuit 223 is coupled to the source-driver andcontrol circuit 201. Two push-pulloutput MOSFETs circuit current control circuit 223. A protection diode 210 and 220 are connected to the push-pulloutput MOSFETs circuit voltage source VDD voltage 204. The drain of each push-pulloutput MOSFET circuit N type MOSFETs N type MOSFETs - The bias voltage of 211 and 219 and the gate threshold have been selected such when PA and PB are off same voltage as +V1, that the high voltage
N type MOSFETs N type MOSFETs - The current of the maximum to zero level may be linearly or almost linearly controlled by the digital switch
current source 223 and the full-scalecurrent DAC 224 settings. The digital current source is controlled by thewaveform memory 205. Thewaveform memory 205 can be read and write accessed via theserial port interface 226 via the input pins 227, including serial data input, serial data output and select control etc pins. - The
clock pin 229 of the circuit is shared for the serial interface and data transmitting operation. There is memory and control registers in theserial port interface 226 circuit. The memory and control registers may be used for storing all the programmable features such as setting start address on theaddress generator 225, length of the waveform data set, transmitting frequency pre-scale 228 (clock frequency divide-by-N) and number of repeating transmitting loops or infinite times (CW) mode, the polarity of the output swapping and time-symmetric waveform memory address fast-reverse function to save half of the waveform data points etc. - The high voltage
N type MOSFETs current transformer 215. The secondary of the RFcurrent transformer 215 is connected to the load piezoelectric orcapacitive ultrasound transducer 216. The RFcurrent transformer 215 not only serves as push-pull differential-to-single-end RF converter, but also performs the work output impedance matching component. The center tap of the RFcurrent transform 215 is connected to the highvoltage power supply 213. Tworesistors current transformer 215 as the damper resistors to absorb the energy in the winding leakage inductance of the RFcurrent transformer 215. - The
DAC 224 is used for setting up the full-scale current of both digital switch control current in the digital switchcurrent source 223. There is an external pin for the input of the DAC reference voltage +VREF. Besides the de-coupling capacitors for each of the power supply voltages, there are additional de-coupling capacitors and the bypass capacitors DAC 224 and it's reference, constant current control loop and bias circuit. - In accordance with one embodiment of the present invention, The voltage supply of the circuit +V1=+5V, +V2=VCC=+3.3V and VPP=+15V to +100V fixed power supply typically.
- Referring to
FIG. 3 , a sample waveform of the circuit depicted inFIG. 2 is shown. - Referring to
FIG. 4 , another embodiment of thewaveform generator circuit 300 of the present invention is shown. Thewaveform generator circuit 300 is a PWM version. In the present embodiment, thewaveform generator 300 replaces thewaveform memory 205 ofFIG. 2 with a sine-cosine look-up table 303 and 4-bit width PWMcontrol data memory 302 which is used for storing PWM waveforms. - Referring to
FIG. 5 , the waveform that typical waveform of Gaussian sine wave to generated by IA, QA, IB, QB PWM signals is shown. - This disclosure provides exemplary embodiments of the present invention. The scope of the present invention is not limited by these exemplary embodiments. Numerous variations, whether explicitly provided for by the specification or implied by the specification, such as variations in structure, dimension, type of material and manufacturing process, may be implemented by one skilled in the art in view of this disclosure.
- Referring now to
FIG. 6 , a schematic block diagram illustrating a transformer-less ofwaveform generator circuit 600 of the present invention is shown. Thecircuit 600 has a floating source-driver andcontrol circuit 601. In accordance with the present embodiment, the source-driver andcontrol circuit 601 may havecontrol logic 603,waveform memory 605,address generator 625, transmittingfrequency pre-scale 628,serial port interface 626,DACs - A switching current control circuit 623 is coupled to the source-driver and
control circuit 601. Two P- and N-typeoutput MOSFETs circuit current control circuit 623A and 623B. The drain of eachoutput MOSFET circuit type MOSFETs type MOSFETs - The bias voltage of 611 and 619 and the gate threshold have been selected such when PA and PB are off same voltage as VPF or VNF, that the high voltage P- or N-
type MOSFETs type MOSFETs - The current of the maximum to zero level may be linearly or almost linearly controlled by the digital switch current source 623 and the full-scale
current DAC 624A/B settings. The digital current source is controlled by thewaveform memory 605. Thewaveform memory 605 can be read and write accessed via theserial port interface 626 via the input pins 627, including serial data input, serial data output and select control etc pins. - The
clock pin 629 of the circuit is shared for the serial interface and data transmitting operation. There is memory and control registers in theserial port interface 626 circuit. The memory and control registers may be used for storing all the programmable features such as setting start address on theaddress generator 225, length of the waveform data set, transmitting frequency pre-scale 628 (clock frequency divide-by-N) and number of repeating transmitting loops or infinite times (CW) mode, the polarity of the output swapping and time-symmetric waveform memory address fast-reverse function to save half of the waveform data points etc. - The high voltage P- and N-
type MOSFETs capacitive ultrasound transducer 616. There is no need of a RF current transformer like 215. The highvoltage power supply source circuit block 623A top, and to the sinking current programmable source circuit block 623B bottom respectively. - The DAC 624 is used for setting up the full-scale current of both digital switch control current in the digital switch
current source 623A/B. There is an external pin for the input of the DAC reference voltage VRA and VRB. Besides the de-coupling capacitors for each of the power supply voltages, there are additional de-coupling capacitors and the bypass capacitors 606A/B, 607A/B on the both side of circuits for theDAC 624A/B and it's reference, constant current control loop and bias circuit. - In accordance with one embodiment of the present invention, The voltage supply of the circuit VDD=+5V, VCC=+3.3V and VPP/VNN=±15V to ±100V fixed power supplies, and (VPP−VPF)=+5V, (VNF−VNN)=+5V floating power supplies typically.
- Referring now to
FIG. 7 , a schematic block diagram illustrating awaveform generator circuit 200A of the present invention is shown. Thecircuit 200A is similar tocircuit 200 shown inFIG. 2 .Circuit 200A has a source-driver andcontrol circuit 201. In accordance with the present embodiment, the source-driver andcontrol circuit 201 may havecontrol logic 203,waveform memory 205,address generator 225, transmittingfrequency pre-scale 228,serial port interface 226, and aDAC 224. - A switching
current control circuit 223 is coupled to the source-driver andcontrol circuit 201. Two push-pulloutput MOSFETs circuit current control circuit 223. A protection diode 210 and 220 are connected to the push-pulloutput MOSFETs circuit voltage source VDD voltage 204. The drain of each push-pulloutput MOSFET circuit N type MOSFETs N type MOSFETs - The bias voltage of 211 and 219 and the gate threshold have been selected such when PA and PB are off same voltage as +V1, that the high voltage
N type MOSFETs N type MOSFETs - The current of the maximum to zero level may be linearly or almost linearly controlled by the digital switch
current source 223 and the full-scalecurrent DAC 224 settings. The digital current source is controlled by thewaveform memory 205. Thewaveform memory 205 can be read and write accessed via theserial port interface 226 via the input pins 227, including serial data input, serial data output and select control etc pins. - The
clock pin 229 of the circuit is shared for the serial interface and data transmitting operation. There is memory and control registers in theserial port interface 226 circuit. The memory and control registers may be used for storing all the programmable features such as setting start address on theaddress generator 225, length of the waveform data set, transmitting frequency pre-scale 228 (clock frequency divide-by-N) and number of repeating transmitting loops or infinite times (CW) mode, the polarity of the output swapping and time-symmetric waveform memory address fast-reverse function to save half of the waveform data points etc. - The high voltage
N type MOSFETs inductor 233 which replaces the RFcurrent transformer 215. The coupledinductor 233 is much smaller (in size) and lower in cost as compared to the RFcurrent transformer 215. The drain of the high voltageN type MOSFET 212 is also coupled to a first terminal of acapacitive element 234. A second terminal of thecapacitive element 234 is coupled to the load piezoelectric orcapacitive ultrasound transducer 216. - The coupled
inductor 233 and thecapacitive element 234 replaces the RFcurrent transformer 215 serves as push-pull differential-to-single-end RF converter, but also performs the work output impedance matching component. A center tap of the coupledinductor 233 is connected to the highvoltage power supply 213. Tworesistors inductor 233 as the damper resistors. - The
DAC 224 is used for setting up the full-scale current of both digital switch control current in the digital switchcurrent source 223. There is an external pin for the input of the DAC reference voltage +VREF. Besides the de-coupling capacitors for each of the power supply voltages, there are additional de-coupling capacitors and the bypass capacitors DAC 224 and it's reference, constant current control loop and bias circuit. - Referring now to
FIG. 8 , a schematic block diagram illustrating awaveform generator circuit 200B of the present invention is shown. Thecircuit 200B is similar tocircuit 200A shown inFIG. 7 . Thecircuit 200B has an additional capacitive element 235. The drain of the high voltageN type MOSFET 218 is coupled to a first terminal of the capacitive element 235. A second terminal of the capacitive element 235 is coupled to the load piezoelectric orcapacitive ultrasound transducer 216. - Referring now to
FIG. 9 , a schematic block diagram illustrating awaveform generator circuit 200C of the present invention is shown. Thecircuit 200C is similar tocircuit 200A shown inFIG. 7 and similar tocircuit 200B shown inFIG. 8 . - The high voltage
N type MOSFETs inductor 233 which replaces the RFcurrent transformer 215. The coupledinductor 233 is much smaller (in size) and lower in cost as compared to the RFcurrent transformer 215. A center tap of the coupledinductor 233 is connected to the highvoltage power supply 213. Tworesistors inductor 233 as the damper resistors. - A second coupled inductor 236 is provided. A first terminal of the second coupled inductor 236 is coupled to the load single-ended piezoelectric or
capacitive ultrasound transducer 216. A first terminal of the other winding of the second coupled inductor 236 is connected to the drain of theN type MOSFET 218 and to the second terminal of the first coupledinductor 233. A second terminal of the winding of the second coupled inductor 236 is connected to the drain of theN type MOSFET 212 and to the second terminal of the first coupledinductor 233. - This disclosure provides exemplary embodiments of the present invention. The scope of the present invention is not limited by these exemplary embodiments. Numerous variations, whether explicitly provided for by the specification or implied by the specification, such as variations in structure, dimension, type of material and manufacturing process may be implemented by one of skill in the art in view of this disclosure.
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Cited By (4)
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US20150098307A1 (en) * | 2012-11-29 | 2015-04-09 | Jimes Lei | Pulse amplitude controlled current source for ultrasound transmit beamformer and method thereof |
US20170059698A1 (en) * | 2014-05-30 | 2017-03-02 | Flir Systems, Inc. | Transmission signal shaping systems and methods |
US10449570B2 (en) * | 2015-05-11 | 2019-10-22 | Stryker Corporation | System and method for driving an ultrasonic handpiece with a linear amplifier |
US11673163B2 (en) | 2016-05-31 | 2023-06-13 | Stryker Corporation | Power console for a surgical tool that includes a transformer with an integrated current source for producing a matched current to offset the parasitic current |
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US20150098307A1 (en) * | 2012-11-29 | 2015-04-09 | Jimes Lei | Pulse amplitude controlled current source for ultrasound transmit beamformer and method thereof |
US9975145B2 (en) * | 2012-11-29 | 2018-05-22 | Microchip Technology Inc. | Pulse amplitude controlled current source for ultrasound transmit beamformer and method thereof |
US20170059698A1 (en) * | 2014-05-30 | 2017-03-02 | Flir Systems, Inc. | Transmission signal shaping systems and methods |
US10436887B2 (en) * | 2014-05-30 | 2019-10-08 | Flir Systems, Inc. | Transmission signal shaping systems and methods |
US10449570B2 (en) * | 2015-05-11 | 2019-10-22 | Stryker Corporation | System and method for driving an ultrasonic handpiece with a linear amplifier |
US11241716B2 (en) | 2015-05-11 | 2022-02-08 | Stryker Corporation | System and method for driving an ultrasonic handpiece with a linear amplifier |
US11717853B2 (en) | 2015-05-11 | 2023-08-08 | Stryker Corporation | System and method for driving an ultrasonic handpiece with a linear amplifier |
US11673163B2 (en) | 2016-05-31 | 2023-06-13 | Stryker Corporation | Power console for a surgical tool that includes a transformer with an integrated current source for producing a matched current to offset the parasitic current |
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