US20120284459A1 - Write-through-and-back cache - Google Patents
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- US20120284459A1 US20120284459A1 US13/101,984 US201113101984A US2012284459A1 US 20120284459 A1 US20120284459 A1 US 20120284459A1 US 201113101984 A US201113101984 A US 201113101984A US 2012284459 A1 US2012284459 A1 US 2012284459A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/22—Employing cache memory using specific memory technology
- G06F2212/222—Non-volatile memory
Definitions
- the present invention relates generally to computer cache memory systems, and more particularly, to a cache memory that includes aspects of write-through and write-back caches.
- Data may be stored and retrieved from some types of memory devices used in computer systems more rapidly than for other types of memory devices.
- DRAM dynamic random access memory
- a disadvantage of DRAM is that is it is volatile and data stored in DRAM is lost when power is removed from the memory devices.
- Disk storage devices with magnetic, optical, or other types of rotating disk media are nonvolatile, have very low cost per byte of storage, and very high storage capacity.
- a disadvantage of disk storage devices is that they have relatively slow access for storing and retrieving data.
- cache memory systems may be used to hold data that has been recently read or modified and may also hold data areas adjacent to recently read or modified data.
- the latency for cache memory devices is generally somewhere between latency for DRAM and latency for disk storage devices.
- the term latency refers to a time delay between initiation of a read request, to read requested data, or write request, to write requested date to storage, a memory device and the retrieval of data from or storage of data to the memory device.
- Relatively fast memory devices such as DRAM or flash memory may be used in cache memory systems.
- “Flash” memory is a type of nonvolatile memory device with faster access time than disk storage devices, but slower access time than DRAM memory devices. While flash memory devices have faster access time than disk storage devices, they are generally considered to be too expensive to be used for the entire memory space in a computer system. A combination of DRAM, cache memory, and disk storage may therefore be used to achieve a balance between system performance and system cost.
- a write-through cache data is written to the cache memory and to the disk storage device at about the same time.
- data to be saved is not immediately written to the disk storage device. Instead, data to be saved is written into the cache, the cache monitors which of its locations have been modified, and the modified cache locations are marked as “dirty data.” Dirty data is data that has not yet been written to a disk storage device. Data is copied from the write-back cache to a disk storage device when a data replacement algorithm determines the dirty data may be removed from the cache.
- a system that includes a storage device, and at least one storage class memory device operating as a write cache for the storage device.
- the storage device further includes a first storage location for data received from a host computer during a host write request and a second storage. Data received from a host write request is written to the storage class memory device, to the first location in the storage device, and to the second location in the storage device that logically reflects the location of the data in the storage class device location configured as a log structured file.
- a computer system with a write-through-and-back cache, and a plurality of disk storage devices arranged in a selected Redundant Array of Independent Disks configuration.
- Data received by the write-through-and-back cache is stored in the write-through-and-back cache and in two different storage locations in the storage devices, and wherein a second storage location of the two different storage locations a second storage location logically reflects the location of the data in a storage class device of the write-through-and-back cache.
- a computer readable storage medium having computer readable program code embodied therewith.
- the computer readable program code comprises computer readable program code configured to receive a host write request from a host computer, computer readable program code configured to create a sequential log file in a storage device, and computer readable program code configured to copy data received during the host write request to a storage buffer.
- the computer readable program code further comprises computer readable program code configured to determine if a selected quantity of data has been accumulated in the storage buffer, and computer readable program code configured to execute a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer.
- the computer readable program code additionally comprises computer readable program code configured to receive a host write request from the host computer if the selected quantity of data has not been accumulated in the storage buffer, computer readable program code configured to execute a write back of data if it is determined that data is to be destaged from the storage class memory device, and computer readable program code configured to write the data to a logical block address in the storage device specified by the host write request
- a method that includes receiving a host write request from a host computer, creating a sequential log file in a storage device, and copying data received during the host write request to a storage buffer. The method further comprises determining if a selected quantity of data has been accumulated in the storage buffer and executing a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer.
- FIG. 1 is a functional block diagram showing an embodiment of a of a write-TAB cache in data communication with a data storage device
- FIG. 2 is a flow diagram showing an embodiment of an execution of a method.
- aspects of the present invention may be embodied as a system, method or computer program product. Accordingly, aspects of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present invention may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.
- the computer readable medium may be a computer readable signal medium or a computer readable storage medium.
- a computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.
- a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
- a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof.
- a computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
- Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
- Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages.
- the program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server.
- the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
- LAN local area network
- WAN wide area network
- Internet Service Provider for example, AT&T, MCI, Sprint, EarthLink, MSN, GTE, etc.
- These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
- the computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
- a system that includes a host, at least one storage device, and at least one storage class memory device operating as a write cache for the storage device.
- the storage device further includes a first storage location for data received from a host computer during a host write request and a second storage. Data received from a host write request is written to the storage class memory device, to the first location in the storage device, and to the second location in the storage device that logically reflects the location of the data in the storage class device location configured as a log structured file.
- a computer system with a host, a write-through-and-back cache, and a plurality of disk storage devices arranged in a selected Redundant Array of Independent Disks configuration.
- Data received by the write-through-and-back cache is stored in the write-through-and-back cache and in two different storage locations in the storage devices, and wherein a second storage location of the two different storage locations a second storage location logically reflects the location of the data in a storage class device of the write-through-and-back cache.
- a computer readable storage medium having computer readable program code embodied therewith.
- the computer readable program code comprises computer readable program code configured to receive a host write request from a host computer, computer readable program code configured to create a sequential log file in a storage device, and computer readable program code configured to copy data received during the host write request to a storage buffer.
- the computer readable program code further comprises computer readable program code configured to determine if a selected quantity of data has been accumulated in the storage buffer, and computer readable program code configured to execute a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer.
- the computer readable program code additionally comprises computer readable program code configured to receive a host write request from the host computer if the selected quantity of data has not been accumulated in the storage buffer, computer readable program code configured to execute a write back of data if it is determined that data is to be destaged from the storage class memory device, and computer readable program code configured to write the data to a logical block address in the storage device specified by the host write request
- a system 100 includes a write-through-and-back cache, referred to hereinafter as a write-TAB cache, in communication with a host computer 102 and at least one so-called “reliable” storage device 120 .
- a “reliable” storage device 120 include, but are not limited to, a disk drive with rotating magnetic media, a disk drive with rotating optical media, a disk drive with fixed rotating media, a disk drive with removable rotating media, and a magnetic tape system.
- the storage device 120 may further alternatively comprise a single-disk disk drive, a selected RAID (redundant array of independent disks) configuration of more than one disk drives, or a plurality of disk drives connected for operation according to other data storage protocols known in the art.
- the write-TAB cache 106 may optionally be located in the host computer 102 . Alternatively, the write-TAB cache 106 may be located in an external peripheral device or other suitable location.
- the write-TAB cache 106 includes a storage buffer 108 for receiving data sent from the host computer 102 .
- the storage buffer 108 may comprise a so-called “reliable” storage buffer and may comprise either comprise volatile DRAM or nonvolatile random access memory (NVRAM), for example.
- the storage buffer 108 is connected for data communication to a memory 112 in the write-TAB cache 106 .
- the memory 112 may comprise a storage class memory (SCM).
- SCM storage class memory
- SCM comprises an emerging data storage technology, where solid state, nonvolatile, non-rotating, and random access memory devices are being developed as an alternative to conventional disk-type data storage devices.
- Systems using storage class memory devices may experience a substantial reduction in the amount of space and power consumed by such a system as compared to similar disk-based systems, for example.
- Flash memory which is a known non-volatile computer storage memory device that can be electrically erased and reprogrammed, is an example of storage class memory (SCM). Flash memory devices are known to suffer from multiple wear-out mechanisms, i.e., failures from repeated read/write cycles, which over time increase the probability of data corruption or data loss. Currently, flash memory may be expected to be less reliable, i.e. have a greater probability of data corruption or device failure, than disk-type storage devices or DRAM. Such failures reduce the reliability of computer systems using flash memory devices and represent a challenge to the use of flash memory devices in cache memory applications.
- SCM storage class memory
- flash memory reliability is multiplied in RAID (redundant array of independent disks) applications, where flash memory failures tend to be correlated as the devices may wear out together.
- Using flash memory as a write-back cache therefore requires the implementation of computationally expensive redundancy codes and health-tracking algorithms for predicting end-of-life for the flash memory devices.
- the memory 112 may comprise a flash memory, or other suitable storage class memory (SCM), that functions as a write cache within the write-TAB cache 106 for other, slower memory devices served by the write-TAB cache 106 .
- SCM storage class memory
- data in the memory 112 is read to determine if a cache hit occurs during a read request from the host computer 102 .
- Data from the flash memory 112 is also read to serve a cache hit.
- a DRAM buffer 114 within the write-TAB cache 106 receives data from flash memory 112 .
- the storage device 120 receives data from the write-TAB cache 106 during a write back step on a write back connection 118 .
- the storage device 120 receives another copy of the data from the write-TAB cache 106 during a write through step on a write through connection 116 between the storage buffer 108 and a sequential log file 122 , referred to hereinafter as sequential log 122 , for ease of clarity only.
- the sequential log 122 may be collocated in the same physical storage components as the data it caches or could alternately be located in a separate physical or virtual storage device having approximately the same, or better, operational reliability than the storage devices 120 used to store other data.
- the modified data to be written is first stored in the storage buffer 108 .
- the storage buffer 108 is relatively small, for example about 64 kilobytes, and is able to retain the modified data reliably.
- the data is written sequentially through the write through connection 116 to one or more sequential logs 122 on the storage device 120 .
- data is written to the storage device 120 in location that logically reflects the location of the data in the flash memory device 112 . Doing this, avoids the necessity of maintaining mapping between the contents of the flash memory 112 and the location of the data on the storage device 120 .
- the same data written to the storage device 120 in the write-through step is also written to the flash memory 112 when a selected quantity of data has been accumulated.
- the quantity of data to be accumulated before a write to either the flash memory 112 and storage device 120 is selected according to the hardware used. For example, in some embodiments, a selected quantity of data is in a range from about 64 kilobytes to about 256 kilobytes. Embodiments are easily adapted for other selected quantities of data to be accumulated before a write occurs.
- the write-TAB cache 106 may employ any of several write cache algorithms known in the art for determining when data should be destaged (e.g., ejected) from the write-TAB cache 106 . After it has been determined that some data is to be destaged from the write-TAB cache 106 , the data to be written to storage device 120 is copied into the DRAM buffer 114 . From there the data is written to the storage device 120 through write back connection 118 . Data is written at a logical block address in the storage device 120 as specified in the host write request 104 .
- data is written at a logical block address in the storage device 120 as specified in the host write request 104 .
- the write-TAB cache 106 may functions as a read cache. After being read from the storage device 120 , data is copied to the storage buffer 108 , from where the data are batched and sent to the flash memory 112 for caching. The data read from the storage device 120 are unmodified data and are protected from loss, by virtue of having copies of the data in both the storage device 120 and flash memory 112 .
- the sequential log 122 on the storage device 120 may be read to recover the lost data.
- the data is repopulated into the flash memory 112 in healthy, i.e., uncorrupted or undamaged, locations.
- a background process may be started to read all the data that was lost from the sequential log 122 into the flash memory 112 .
- Successful recovery of lost data requires the flash memory 112 to have enough storage capacity available to receive all the recovered data.
- the modified data in the flash memory 112 may optionally be destaged and a portion of the unmodified data in the flash memory 112 may be removed.
- the write-TAB cache 106 does not decrease reliability of a storage system below that of the storage buffer 108 and storage device 120 . Since the modified, and optionally the unmodified, data in the flash memory 112 is also replicated in the storage device 120 as one or more sequential logs 122 , the reliability of the flash memory 112 paired with its copy in the storage 120 provides improved reliability, as compared to the reliability of the storage device 120 alone, even though the sequential logs 122 can be located in the same physical storage components as the data it caches.
- the write-TAB cache 106 may keep track of what it has cached in the form of metadata.
- the metadata may be logged along with the data, into the sequential log 122 . Including the metadata in the sequential log 122 may protect the Write-TAB cache 106 from metadata loss.
- the write-TAB cache 106 adds the overhead of writing the sequential logs 122 onto the storage device 120 . It should be noted that disk drives and tape drives are able to deliver an order of magnitude better performance for sequential (log-like) writes than for random writes. Thus, the additional burden imposed by the sequential logs 122 in a system employing a write-TAB cache 106 compared to a system using only a write back cache is relatively small. For example, in calculations of the storage benchmark SPC-1 known to those familiar with measurements of storage system performance, the additional burden imposed by a write-TAB cache compared to a system known in the art having a conventional write through cache was calculated to be only 6.49%.
- the sequential log 122 in FIG. 1 is preferably to be managed so that its overall size is less than a selected limit.
- log-structured writes are done for both the flash memory 112 and the sequential logs 122 .
- Log-structured writes to the flash memory 112 may cause memory occupied by data that is no longer in use by the system to be reclaimed, a resource management process sometimes referred to as “garbage collection.” This may be an advantage of the discussed approach. If the sequential log 122 simply replicates the contents of the flash memory 112 , then the size of the sequential log will be equal to the size of the flash memory and is therefore not a significant contributor to system cost, and writes will also be sequential. In another embodiment, only modified data is written in the sequential log 122 . In this case, the maximum size of the sequential log 122 is also equal to the size of the flash memory 112 .
- the write-TAB cache 106 optionally saves metadata that keeps some pointers for recording corresponding locations between the flash memory data and log data.
- the data read will require some amount of scanning from a nearest recording pointer location within the sequential log 122 .
- Yet another approach may be to allow non-log-structured writes within the flash memory 112 , but record the corresponding location within the sequential log 122 for each data item.
- metadata will is stored in a reliable storage, such as NVRAM, disk storage device, or combinations thereof.
- FIG. 2 shows an embodiment of a disk cache method 200 .
- the method 200 commences at start step 202 .
- a write request is received from the host computer 102 .
- data received during the write request is copied to the storage buffer 108 .
- a sequential log 122 is created in the storage device 120 .
- step 210 it is determined if a selected quantity of data has been accumulated in the storage buffer 108 , for writing the data to the storage device 120 . If it is determined that the selected quantity of data has not yet accumulated in the storage buffer 108 , then the method returns to step 204 . If it is determined that the selected quantity of data has accumulated in the storage buffer 108 , then the method continues to step 212 .
- a write through of data is executed and data is copied from the storage buffer 108 to one or more sequential logs 122 in the storage device 120 through the write through connection 116 .
- Data is also written to the flash memory 112 at this time.
- Data is thus written to the storage device 120 in a location that logically reflects the location of the data in the flash memory device 112 .
- Writing the data in location in the storage device 120 that logically reflects the location of the data in the flash memory 112 obviates the need for retaining mapping between the contents of the flash memory 112 and the location of the data on the storage device 120 .
- a write back of data may be executed. After it has been determined that some data is to be destaged from the write-TAB cache 106 , the data to be written to storage device 120 is copied into the DRAM buffer 114 . At step 216 , data is written from the DRAM buffer 114 to the storage device 120 through write back connection 118 . At this time, data is written at a logical block address in the storage device 120 as specified in the write request 104 .
- An embodiment of the method 200 may additionally include any of the following steps: at step 218 , limiting reading of the sequential file log for recovery of data lost from either the flash memory 112 or the storage device 120 ; at step 220 , locating the sequential log file and data received during a write request on separate storage devices 120 ; and at step 222 , writing data received during a write request at a logical block address in a storage device 120 as specified in the host write request.
- the method 200 ends at step 224 .
Abstract
Embodiments are provided for cache memory systems. In one general embodiment, a system that includes a storage device, and at least one storage class memory device operating as a write cache for the storage device. The storage device further includes a first storage location for data received from a host computer during a host write request and a second storage. Data received from a host write request is written to the storage class memory device, to the first location in the storage device, and to the second location in the storage device that logically reflects the location of the data in the storage class device location configured as a log structured file.
Description
- The present invention relates generally to computer cache memory systems, and more particularly, to a cache memory that includes aspects of write-through and write-back caches.
- Data may be stored and retrieved from some types of memory devices used in computer systems more rapidly than for other types of memory devices. For example, DRAM (dynamic random access memory) is relatively low in cost and has fast access. However, a disadvantage of DRAM is that is it is volatile and data stored in DRAM is lost when power is removed from the memory devices. Disk storage devices with magnetic, optical, or other types of rotating disk media are nonvolatile, have very low cost per byte of storage, and very high storage capacity. However, a disadvantage of disk storage devices is that they have relatively slow access for storing and retrieving data.
- To reduce access times for disk storage devices, cache memory systems may be used to hold data that has been recently read or modified and may also hold data areas adjacent to recently read or modified data. The latency for cache memory devices is generally somewhere between latency for DRAM and latency for disk storage devices. The term latency refers to a time delay between initiation of a read request, to read requested data, or write request, to write requested date to storage, a memory device and the retrieval of data from or storage of data to the memory device. Relatively fast memory devices such as DRAM or flash memory may be used in cache memory systems. “Flash” memory is a type of nonvolatile memory device with faster access time than disk storage devices, but slower access time than DRAM memory devices. While flash memory devices have faster access time than disk storage devices, they are generally considered to be too expensive to be used for the entire memory space in a computer system. A combination of DRAM, cache memory, and disk storage may therefore be used to achieve a balance between system performance and system cost.
- The difference in latency between disk storage devices and DRAM has increased over time. While the storage capacities of both DRAM and disk storage have increased and memory cost per byte has decreased over time, the ratio in a computer system of storage capacity implemented as cache memory to storage capacity implemented as disk storage has remained relatively small. As costs for flash memory decrease, it has become a viable consideration to use flash memory devices in cache memory applications, such as write-through caches and write-back caches.
- In a write-through cache, data is written to the cache memory and to the disk storage device at about the same time. In a write-back cache, data to be saved is not immediately written to the disk storage device. Instead, data to be saved is written into the cache, the cache monitors which of its locations have been modified, and the modified cache locations are marked as “dirty data.” Dirty data is data that has not yet been written to a disk storage device. Data is copied from the write-back cache to a disk storage device when a data replacement algorithm determines the dirty data may be removed from the cache.
- In one general embodiment, a system that includes a storage device, and at least one storage class memory device operating as a write cache for the storage device. The storage device further includes a first storage location for data received from a host computer during a host write request and a second storage. Data received from a host write request is written to the storage class memory device, to the first location in the storage device, and to the second location in the storage device that logically reflects the location of the data in the storage class device location configured as a log structured file.
- In another embodiment, a computer system with a write-through-and-back cache, and a plurality of disk storage devices arranged in a selected Redundant Array of Independent Disks configuration. Data received by the write-through-and-back cache is stored in the write-through-and-back cache and in two different storage locations in the storage devices, and wherein a second storage location of the two different storage locations a second storage location logically reflects the location of the data in a storage class device of the write-through-and-back cache.
- In another embodiment, a computer readable storage medium having computer readable program code embodied therewith. The computer readable program code comprises computer readable program code configured to receive a host write request from a host computer, computer readable program code configured to create a sequential log file in a storage device, and computer readable program code configured to copy data received during the host write request to a storage buffer. The computer readable program code further comprises computer readable program code configured to determine if a selected quantity of data has been accumulated in the storage buffer, and computer readable program code configured to execute a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer. The computer readable program code additionally comprises computer readable program code configured to receive a host write request from the host computer if the selected quantity of data has not been accumulated in the storage buffer, computer readable program code configured to execute a write back of data if it is determined that data is to be destaged from the storage class memory device, and computer readable program code configured to write the data to a logical block address in the storage device specified by the host write request
- In another embodiment, a method that includes receiving a host write request from a host computer, creating a sequential log file in a storage device, and copying data received during the host write request to a storage buffer. The method further comprises determining if a selected quantity of data has been accumulated in the storage buffer and executing a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer.
- For a fuller understanding of the nature and advantages of the invention, as well as a preferred mode of use, reference should be made to the following detailed description read in conjunction with the accompanying drawings, in which:
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FIG. 1 is a functional block diagram showing an embodiment of a of a write-TAB cache in data communication with a data storage device; and -
FIG. 2 is a flow diagram showing an embodiment of an execution of a method. - The following description is made for the purpose of illustrating the general principles of the invention and is not meant to limit the inventive concepts claimed herein. Further, particular features described herein can be used in combination with other described features in each of the various possible combinations and permutations. Unless otherwise specifically defined herein, all terms are to be given their broadest possible interpretation including meanings implied from the specification as well as meanings understood by those skilled in the art and/or as defined in dictionaries, treatises, etc.
- As will be appreciated by one skilled in the art, aspects of the present invention may be embodied as a system, method or computer program product. Accordingly, aspects of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present invention may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.
- Any combination of one or more computer readable medium(s) may be utilized. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
- A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
- Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
- Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
- Aspects of the present invention are described below with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
- These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
- The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
- In one general embodiment, a system that includes a host, at least one storage device, and at least one storage class memory device operating as a write cache for the storage device. The storage device further includes a first storage location for data received from a host computer during a host write request and a second storage. Data received from a host write request is written to the storage class memory device, to the first location in the storage device, and to the second location in the storage device that logically reflects the location of the data in the storage class device location configured as a log structured file.
- In another embodiment, a computer system with a host, a write-through-and-back cache, and a plurality of disk storage devices arranged in a selected Redundant Array of Independent Disks configuration. Data received by the write-through-and-back cache is stored in the write-through-and-back cache and in two different storage locations in the storage devices, and wherein a second storage location of the two different storage locations a second storage location logically reflects the location of the data in a storage class device of the write-through-and-back cache.
- In another embodiment, a computer readable storage medium having computer readable program code embodied therewith. The computer readable program code comprises computer readable program code configured to receive a host write request from a host computer, computer readable program code configured to create a sequential log file in a storage device, and computer readable program code configured to copy data received during the host write request to a storage buffer. The computer readable program code further comprises computer readable program code configured to determine if a selected quantity of data has been accumulated in the storage buffer, and computer readable program code configured to execute a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer. The computer readable program code additionally comprises computer readable program code configured to receive a host write request from the host computer if the selected quantity of data has not been accumulated in the storage buffer, computer readable program code configured to execute a write back of data if it is determined that data is to be destaged from the storage class memory device, and computer readable program code configured to write the data to a logical block address in the storage device specified by the host write request
- Referring now to
FIG. 1 , in one embodiment asystem 100 includes a write-through-and-back cache, referred to hereinafter as a write-TAB cache, in communication with ahost computer 102 and at least one so-called “reliable”storage device 120. Examples of a “reliable”storage device 120 include, but are not limited to, a disk drive with rotating magnetic media, a disk drive with rotating optical media, a disk drive with fixed rotating media, a disk drive with removable rotating media, and a magnetic tape system. Thestorage device 120 may further alternatively comprise a single-disk disk drive, a selected RAID (redundant array of independent disks) configuration of more than one disk drives, or a plurality of disk drives connected for operation according to other data storage protocols known in the art. The write-TAB cache 106 may optionally be located in thehost computer 102. Alternatively, the write-TAB cache 106 may be located in an external peripheral device or other suitable location. - In one embodiment, the write-
TAB cache 106 includes astorage buffer 108 for receiving data sent from thehost computer 102. Thestorage buffer 108 may comprise a so-called “reliable” storage buffer and may comprise either comprise volatile DRAM or nonvolatile random access memory (NVRAM), for example. Thestorage buffer 108 is connected for data communication to amemory 112 in the write-TAB cache 106. - In one embodiment, the
memory 112, may comprise a storage class memory (SCM). Storage class memory (SCM) comprises an emerging data storage technology, where solid state, nonvolatile, non-rotating, and random access memory devices are being developed as an alternative to conventional disk-type data storage devices. Systems using storage class memory devices may experience a substantial reduction in the amount of space and power consumed by such a system as compared to similar disk-based systems, for example. - Flash memory, which is a known non-volatile computer storage memory device that can be electrically erased and reprogrammed, is an example of storage class memory (SCM). Flash memory devices are known to suffer from multiple wear-out mechanisms, i.e., failures from repeated read/write cycles, which over time increase the probability of data corruption or data loss. Currently, flash memory may be expected to be less reliable, i.e. have a greater probability of data corruption or device failure, than disk-type storage devices or DRAM. Such failures reduce the reliability of computer systems using flash memory devices and represent a challenge to the use of flash memory devices in cache memory applications. The problem of flash memory reliability is multiplied in RAID (redundant array of independent disks) applications, where flash memory failures tend to be correlated as the devices may wear out together. Using flash memory as a write-back cache therefore requires the implementation of computationally expensive redundancy codes and health-tracking algorithms for predicting end-of-life for the flash memory devices.
- In one embodiment, the
memory 112, may comprise a flash memory, or other suitable storage class memory (SCM), that functions as a write cache within the write-TAB cache 106 for other, slower memory devices served by the write-TAB cache 106. - In one embodiment, data in the
memory 112, hereinafterflash memory 112, is read to determine if a cache hit occurs during a read request from thehost computer 102. Data from theflash memory 112 is also read to serve a cache hit. ADRAM buffer 114 within the write-TAB cache 106 receives data fromflash memory 112. - In one embodiment, the
storage device 120 receives data from the write-TAB cache 106 during a write back step on a write backconnection 118. Thestorage device 120 receives another copy of the data from the write-TAB cache 106 during a write through step on a write throughconnection 116 between thestorage buffer 108 and asequential log file 122, referred to hereinafter assequential log 122, for ease of clarity only. In one embodiment, thesequential log 122 may be collocated in the same physical storage components as the data it caches or could alternately be located in a separate physical or virtual storage device having approximately the same, or better, operational reliability than thestorage devices 120 used to store other data. - When a
host write request 104 is presented by thehost computer 102 to the write-TAB cache 106, the modified data to be written is first stored in thestorage buffer 108. In one embodiment, thestorage buffer 108 is relatively small, for example about 64 kilobytes, and is able to retain the modified data reliably. After thestorage buffer 108 has sufficient data to write to thestorage device 120, the data is written sequentially through the write throughconnection 116 to one or moresequential logs 122 on thestorage device 120. Thus, data is written to thestorage device 120 in location that logically reflects the location of the data in theflash memory device 112. Doing this, avoids the necessity of maintaining mapping between the contents of theflash memory 112 and the location of the data on thestorage device 120. - The same data written to the
storage device 120 in the write-through step is also written to theflash memory 112 when a selected quantity of data has been accumulated. The quantity of data to be accumulated before a write to either theflash memory 112 andstorage device 120 is selected according to the hardware used. For example, in some embodiments, a selected quantity of data is in a range from about 64 kilobytes to about 256 kilobytes. Embodiments are easily adapted for other selected quantities of data to be accumulated before a write occurs. - In one embodiment, the write-
TAB cache 106 may employ any of several write cache algorithms known in the art for determining when data should be destaged (e.g., ejected) from the write-TAB cache 106. After it has been determined that some data is to be destaged from the write-TAB cache 106, the data to be written tostorage device 120 is copied into theDRAM buffer 114. From there the data is written to thestorage device 120 through write backconnection 118. Data is written at a logical block address in thestorage device 120 as specified in thehost write request 104. - In one embodiment, the write-
TAB cache 106 may functions as a read cache. After being read from thestorage device 120, data is copied to thestorage buffer 108, from where the data are batched and sent to theflash memory 112 for caching. The data read from thestorage device 120 are unmodified data and are protected from loss, by virtue of having copies of the data in both thestorage device 120 andflash memory 112. - In the event the
flash memory 112 loses some or all of its data or some of the data is otherwise corrupted, thesequential log 122 on thestorage device 120 may be read to recover the lost data. As replacement data corresponding to lost data is read from thesequential log 122, the data is repopulated into theflash memory 112 in healthy, i.e., uncorrupted or undamaged, locations. In one embodiment, a background process may be started to read all the data that was lost from thesequential log 122 into theflash memory 112. Successful recovery of lost data requires theflash memory 112 to have enough storage capacity available to receive all the recovered data. If sufficient free space in theflash memory 112 is not available, for example because some part of theflash memory 112 has failed or become corrupted, then only modified data may be read from thesequential log 122. Furthermore, the modified data in theflash memory 112 may optionally be destaged and a portion of the unmodified data in theflash memory 112 may be removed. - While the
flash memory 112 may be less reliable than thestorage buffer 108 orstorage device 120, the write-TAB cache 106 does not decrease reliability of a storage system below that of thestorage buffer 108 andstorage device 120. Since the modified, and optionally the unmodified, data in theflash memory 112 is also replicated in thestorage device 120 as one or moresequential logs 122, the reliability of theflash memory 112 paired with its copy in thestorage 120 provides improved reliability, as compared to the reliability of thestorage device 120 alone, even though thesequential logs 122 can be located in the same physical storage components as the data it caches. - In one embodiment, the write-
TAB cache 106 may keep track of what it has cached in the form of metadata. The metadata may be logged along with the data, into thesequential log 122. Including the metadata in thesequential log 122 may protect the Write-TAB cache 106 from metadata loss. - Compared to a known write back cache, the write-
TAB cache 106 adds the overhead of writing thesequential logs 122 onto thestorage device 120. It should be noted that disk drives and tape drives are able to deliver an order of magnitude better performance for sequential (log-like) writes than for random writes. Thus, the additional burden imposed by thesequential logs 122 in a system employing a write-TAB cache 106 compared to a system using only a write back cache is relatively small. For example, in calculations of the storage benchmark SPC-1 known to those familiar with measurements of storage system performance, the additional burden imposed by a write-TAB cache compared to a system known in the art having a conventional write through cache was calculated to be only 6.49%. - The
sequential log 122 inFIG. 1 is preferably to be managed so that its overall size is less than a selected limit. In one embodiment, log-structured writes are done for both theflash memory 112 and thesequential logs 122. Log-structured writes to theflash memory 112 may cause memory occupied by data that is no longer in use by the system to be reclaimed, a resource management process sometimes referred to as “garbage collection.” This may be an advantage of the discussed approach. If thesequential log 122 simply replicates the contents of theflash memory 112, then the size of the sequential log will be equal to the size of the flash memory and is therefore not a significant contributor to system cost, and writes will also be sequential. In another embodiment, only modified data is written in thesequential log 122. In this case, the maximum size of thesequential log 122 is also equal to the size of theflash memory 112. - In one embodiment, the write-
TAB cache 106 optionally saves metadata that keeps some pointers for recording corresponding locations between the flash memory data and log data. In the event of a data loss in theflash memory 112, the data read will require some amount of scanning from a nearest recording pointer location within thesequential log 122. Yet another approach may be to allow non-log-structured writes within theflash memory 112, but record the corresponding location within thesequential log 122 for each data item. In this case, metadata will is stored in a reliable storage, such as NVRAM, disk storage device, or combinations thereof. - Referring to
FIG. 1 andFIG. 2 of the drawings,FIG. 2 shows an embodiment of adisk cache method 200. Themethod 200 commences atstart step 202. Next, atstep 204, a write request is received from thehost computer 102. Atstep 206, data received during the write request is copied to thestorage buffer 108. Atstep 208, asequential log 122 is created in thestorage device 120. - Next, at
step 210, it is determined if a selected quantity of data has been accumulated in thestorage buffer 108, for writing the data to thestorage device 120. If it is determined that the selected quantity of data has not yet accumulated in thestorage buffer 108, then the method returns to step 204. If it is determined that the selected quantity of data has accumulated in thestorage buffer 108, then the method continues to step 212. - At
step 212, a write through of data is executed and data is copied from thestorage buffer 108 to one or moresequential logs 122 in thestorage device 120 through the write throughconnection 116. Data is also written to theflash memory 112 at this time. Data is thus written to thestorage device 120 in a location that logically reflects the location of the data in theflash memory device 112. Writing the data in location in thestorage device 120 that logically reflects the location of the data in theflash memory 112, obviates the need for retaining mapping between the contents of theflash memory 112 and the location of the data on thestorage device 120. - Next, at
step 214, a write back of data may be executed. After it has been determined that some data is to be destaged from the write-TAB cache 106, the data to be written tostorage device 120 is copied into theDRAM buffer 114. Atstep 216, data is written from theDRAM buffer 114 to thestorage device 120 through write backconnection 118. At this time, data is written at a logical block address in thestorage device 120 as specified in thewrite request 104. - An embodiment of the
method 200 may additionally include any of the following steps: atstep 218, limiting reading of the sequential file log for recovery of data lost from either theflash memory 112 or thestorage device 120; atstep 220, locating the sequential log file and data received during a write request onseparate storage devices 120; and atstep 222, writing data received during a write request at a logical block address in astorage device 120 as specified in the host write request. Themethod 200 ends atstep 224. - Those skilled in the art will appreciate that various adaptations and modifications can be configured without departing from the scope and spirit of the embodiments described herein. Therefore, it is to be understood that, within the scope of the appended claims, the embodiments of the invention may be practiced other than as specifically described herein.
Claims (23)
1. A system comprising:
a storage device; and
at least one storage class memory device operating as a write cache for the storage device; the storage device further comprising:
a first storage location for storing data received from a host computer during a host write request; and
a second storage location;
wherein data received from a host write request is written to the storage class memory device, to the first location in the storage device, and to the second location in the storage device that logically reflects the location of the data in the storage class device.
2. The system of claim 1 , wherein the second storage location is configured as a log structured file and wherein data is sequentially written to the log structured file after a host write request is performed.
3. The system of claim 2 , wherein a second write of data to the storage device after a host write request is to a logical block address in the storage device, wherein the logical block address is specified in the host write request.
4. The system of claim 3 , wherein the reliability of the system is unaffected by either a storage class memory device having lower reliability than a reliability of the storage class memory device or by a storage class memory device having lower reliability than a reliability of the storage device.
5. The system of claim 3 , wherein data in the storage class memory is read to determine if a cache hit occurs after a read request from a host computer.
6. The system of claim 5 , wherein data in the storage class memory is read to serve a cache hit after a read request from a host computer.
7. The system of claim 3 , wherein data stored in the system is protected against loss unless data in the storage class memory and data in the second storage location are both lost.
8. The system of claim 3 , wherein data stored in the system comprises data sent from a host computer during a host write request and metadata.
9. The system of claim 8 , wherein metadata is protected against loss unless data in the storage class memory and data in the second storage location are both lost.
10. The system of claim 3 , wherein data is read from the second storage location only when data is to be recovered following a loss of data from the storage class memory or from the storage device.
11. The system of claim 3 , wherein the storage device comprises a plurality of storage devices arranged in a selected Redundant Array of Independent Disks (RAID) configuration.
12. A computer system comprising:
a write-through-and-back cache; and
a plurality of storage devices arranged in a selected Redundant Array of Independent Disks configuration,
wherein data received by the write-through-and-back cache is stored in the write-through-and-back cache and in two different storage locations in the storage devices, and wherein a second storage location of the two different storage locations a second storage location logically reflects the location of the data in a storage class device of the write-through-and-back cache.
13. The computer system of claim 12 , wherein the write-through-and-back cache further comprises:
a storage buffer adapted to receive input data corresponding to a write request from a host computer;
at least one storage class memory in data communication with the storage buffer and adapted to receive input data from the write request; and
a dynamic random access buffer in data communication with the storage class memory and with the storage devices.
14. The computer system of claim 13 , further comprising:
at least one storage device of the Redundant Array of Independent Disks including a sequential log file adapted for log-structured sequential writes; and
data received from the host during a host write request is written to the storage class memory device, to the sequential log file, and to another storage device location.
15. The computer system of claim 14 , wherein data in the storage class memory is log-structured and data in the write-through-and-back cache and the sequential log are mirrors of each other, thereby avoiding a need to track which data has been written to any of the plurality of storage devices.
16. A computer program product, comprising:
a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code comprising:
computer readable program code configured to receive a host write request from a host computer;
computer readable program code configured to create a sequential log file in a storage device;
computer readable program code configured to copy data received during the host write request to a storage buffer;
computer readable program code configured to determine if a selected quantity of data has been accumulated in the storage buffer; and
computer readable program code configured to execute a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer/
17. The computer program product of claim 16 , further comprising:
computer readable program code configured to receive a host write request from the host computer if the selected quantity of data has not been accumulated in the storage buffer;
computer readable program code configured to execute a write back of data if it is determined that data is to be destaged from the storage class memory device; and
computer readable program code configured to write the data to a logical block address in the storage device specified by the host write request.
18. The computer program product of claim 16 , further comprising:
computer readable program code configured to limit reading of the sequential log file to recovery of data lost from either the storage class memory or the storage device.
19. The computer program product of claim 16 , further comprising:
computer readable program code configured to locate the sequential log file and data received during a host write request on separate storage devices.
20. The computer program product of claim 16 , further comprising:
computer readable program code configured to operate a write-through-and-back cache;
computer readable program code configured to operate at least one storage class memory device to communicate with the storage buffer and configured to receive input data from the write request; and
computer readable program code configured to operate a dynamic random access buffer in communication with the storage class memory and with the storage device.
21. The computer program product of claim 20 , further comprising:
computer readable program code configured to structure the storage class memory in a log-structure; and
computer readable program code configured to mirror data in the write-through-and-back cache and in the sequential log are to avoid a need to track which data has been written to the storage device.
22. (canceled)
23. (canceled)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/101,984 US20120284459A1 (en) | 2011-05-05 | 2011-05-05 | Write-through-and-back cache |
US13/567,350 US9514052B2 (en) | 2011-05-05 | 2012-08-06 | Write-through-and-back-cache |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/101,984 US20120284459A1 (en) | 2011-05-05 | 2011-05-05 | Write-through-and-back cache |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/567,350 Continuation US9514052B2 (en) | 2011-05-05 | 2012-08-06 | Write-through-and-back-cache |
Publications (1)
Publication Number | Publication Date |
---|---|
US20120284459A1 true US20120284459A1 (en) | 2012-11-08 |
Family
ID=47091035
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/101,984 Abandoned US20120284459A1 (en) | 2011-05-05 | 2011-05-05 | Write-through-and-back cache |
US13/567,350 Expired - Fee Related US9514052B2 (en) | 2011-05-05 | 2012-08-06 | Write-through-and-back-cache |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/567,350 Expired - Fee Related US9514052B2 (en) | 2011-05-05 | 2012-08-06 | Write-through-and-back-cache |
Country Status (1)
Country | Link |
---|---|
US (2) | US20120284459A1 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140101373A1 (en) * | 2012-09-27 | 2014-04-10 | Samsung Electronics Co., Ltd. | Method of managing data storage device and data storage device |
US20160378368A1 (en) * | 2015-06-26 | 2016-12-29 | International Business Machines Corporation | Performing preprocessing operations in anticipation of log file writes |
US9535836B2 (en) | 2013-03-13 | 2017-01-03 | Hewlett Packard Enterprise Development Lp | Non-volatile memory update tracking |
US10163510B1 (en) * | 2013-08-09 | 2018-12-25 | Ellis Robinson Giles | System and method for atomic persistence in storage class memory |
US10216429B2 (en) | 2015-06-26 | 2019-02-26 | International Business Machines Corporation | Performing post-processing operations for log file writes |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120284459A1 (en) * | 2011-05-05 | 2012-11-08 | International Business Machines Corporation | Write-through-and-back cache |
KR20210066631A (en) | 2019-11-28 | 2021-06-07 | 삼성전자주식회사 | Apparatus and method for writing data in memory |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4507751A (en) * | 1982-06-21 | 1985-03-26 | International Business Machines Corporation | Method and apparatus for logging journal data using a log write ahead data set |
US5522057A (en) * | 1993-10-25 | 1996-05-28 | Intel Corporation | Hybrid write back/write through cache having a streamlined four state cache coherency protocol for uniprocessor computer systems |
US5581750A (en) * | 1993-03-15 | 1996-12-03 | International Business Machines Corporation | System and method for improving data recovery performance |
US5666514A (en) * | 1994-07-01 | 1997-09-09 | Board Of Trustees Of The Leland Stanford Junior University | Cache memory containing extra status bits to indicate memory regions where logging of data should occur |
US5835955A (en) * | 1995-06-23 | 1998-11-10 | Elonex I. P. Holdings | Disk array controller with enhanced synchronous write |
US6161208A (en) * | 1994-05-06 | 2000-12-12 | International Business Machines Corporation | Storage subsystem including an error correcting cache and means for performing memory to memory transfers |
US6240508B1 (en) * | 1992-07-06 | 2001-05-29 | Compaq Computer Corporation | Decode and execution synchronized pipeline processing using decode generated memory read queue with stop entry to allow execution generated memory read |
US6748463B1 (en) * | 1996-03-13 | 2004-06-08 | Hitachi, Ltd. | Information processor with snoop suppressing function, memory controller, and direct memory access processing method |
US20060031267A1 (en) * | 2004-08-04 | 2006-02-09 | Lim Victor K | Apparatus, system, and method for efficient recovery of a database from a log of database activities |
US20120303906A1 (en) * | 2011-05-05 | 2012-11-29 | International Business Machines Corporation | Write-through-and-back-cache |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5297258A (en) * | 1991-11-21 | 1994-03-22 | Ast Research, Inc. | Data logging for hard disk data storage systems |
US6141731A (en) | 1998-08-19 | 2000-10-31 | International Business Machines Corporation | Method and system for managing data in cache using multiple data structures |
US6496905B1 (en) * | 1999-10-01 | 2002-12-17 | Hitachi, Ltd. | Write buffer with burst capability |
US6629211B2 (en) * | 2001-04-20 | 2003-09-30 | International Business Machines Corporation | Method and system for improving raid controller performance through adaptive write back/write through caching |
JP4938328B2 (en) * | 2006-03-28 | 2012-05-23 | 株式会社日立製作所 | Storage system, power supply control method thereof, and storage apparatus |
JP2008065525A (en) * | 2006-09-06 | 2008-03-21 | Hitachi Ltd | Computer system, data management method and management computer |
CN102576333B (en) * | 2009-10-05 | 2016-01-13 | 马维尔国际贸易有限公司 | Data cache in nonvolatile memory |
US9773431B2 (en) * | 2009-11-10 | 2017-09-26 | Maxim Integrated Products, Inc. | Block encryption security for integrated microcontroller and external memory system |
US8407403B2 (en) * | 2009-12-07 | 2013-03-26 | Microsoft Corporation | Extending SSD lifetime using hybrid storage |
JP4806084B1 (en) * | 2010-05-28 | 2011-11-02 | 株式会社東芝 | Information processing device |
US8352685B2 (en) * | 2010-08-20 | 2013-01-08 | Apple Inc. | Combining write buffer with dynamically adjustable flush metrics |
-
2011
- 2011-05-05 US US13/101,984 patent/US20120284459A1/en not_active Abandoned
-
2012
- 2012-08-06 US US13/567,350 patent/US9514052B2/en not_active Expired - Fee Related
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4507751A (en) * | 1982-06-21 | 1985-03-26 | International Business Machines Corporation | Method and apparatus for logging journal data using a log write ahead data set |
US6240508B1 (en) * | 1992-07-06 | 2001-05-29 | Compaq Computer Corporation | Decode and execution synchronized pipeline processing using decode generated memory read queue with stop entry to allow execution generated memory read |
US5581750A (en) * | 1993-03-15 | 1996-12-03 | International Business Machines Corporation | System and method for improving data recovery performance |
US5522057A (en) * | 1993-10-25 | 1996-05-28 | Intel Corporation | Hybrid write back/write through cache having a streamlined four state cache coherency protocol for uniprocessor computer systems |
US6161208A (en) * | 1994-05-06 | 2000-12-12 | International Business Machines Corporation | Storage subsystem including an error correcting cache and means for performing memory to memory transfers |
US5666514A (en) * | 1994-07-01 | 1997-09-09 | Board Of Trustees Of The Leland Stanford Junior University | Cache memory containing extra status bits to indicate memory regions where logging of data should occur |
US5893155A (en) * | 1994-07-01 | 1999-04-06 | The Board Of Trustees Of The Leland Stanford Junior University | Cache memory for efficient data logging |
US5835955A (en) * | 1995-06-23 | 1998-11-10 | Elonex I. P. Holdings | Disk array controller with enhanced synchronous write |
US6748463B1 (en) * | 1996-03-13 | 2004-06-08 | Hitachi, Ltd. | Information processor with snoop suppressing function, memory controller, and direct memory access processing method |
US20060031267A1 (en) * | 2004-08-04 | 2006-02-09 | Lim Victor K | Apparatus, system, and method for efficient recovery of a database from a log of database activities |
US20120303906A1 (en) * | 2011-05-05 | 2012-11-29 | International Business Machines Corporation | Write-through-and-back-cache |
Non-Patent Citations (6)
Title |
---|
A Case for Redundant Arrays of Inexpensive Disks (RAID), Patterson et al, University of California at Berkeley Berkeley, CA, USA, ACM, 1988, retrieved from http://www.cs.cmu.edu/~garth/RAIDpaper/Patterson88.pdf on 6/18/2013 (8 pages) * |
definition of "Redundant Array of Independent Disks", The Free Dictionary by Farlex, retrieved from http://encyclopedia2.thefreedictionary.com/Redundant+Array+of+Independent+Disks * |
definition of limited, Google Define, retrieved from https://www.google.com/search?q=define%3A+limited&oq=define%3A+limited&aqs=chrome.0.57j58j62l3.4240&sugexp=chrome,mod=0&sourceid=chrome&ie=UTF-8 on 11/22/2013 (1 page) * |
definition of metadata, Free Online Dictionary of Computing, retrieved from http://foldoc.org/metadata on 11/19/2013 (1 page) * |
definition of pointer, Free Online Dictionary of Computing, retrieved from http://foldoc.org/pointer on 11/19/2013 (1 page) * |
Integrating NAND Flash Devices onto Servers, Roberts et al, Communications of the ACM, vol. 52, no. 4, 4/2008 (9 pages) * |
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US20120303906A1 (en) | 2012-11-29 |
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